UFS PA errors were observed during data read operation hence Hardware programming guide have recommended setting QSERDES_RX1_UCDR_PI_CONTROLS register to value 0x81 which will use CDR DIV4 in all bands and fastlock. Change-Id: I456354b346aca7abfaa4839d538c5054c3e79fbf Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>