diff --git a/bindings/arm/msm/msm.yaml b/bindings/arm/msm/msm.yaml index 6eccd379..9d44bfbb 100644 --- a/bindings/arm/msm/msm.yaml +++ b/bindings/arm/msm/msm.yaml @@ -119,6 +119,28 @@ properties: - qcom,qrd - const: qcom,ravelinp + - description: Qualcomm Technologies, Inc. MONTAGUE + items: + - enum: + - qcom,montague-rumi + - qcom,rumi + - qcom,montague-idp + - qcom,idp + - qcom,montague-qrd + - qcom,qrd + - const: qcom,montague + + - description: Qualcomm Technologies, Inc. MONTAGUEP + items: + - enum: + - qcom,montaguep-rumi + - qcom,rumi + - qcom,montaguep-idp + - qcom,idp + - qcom,montaguep-qrd + - qcom,qrd + - const: qcom,montaguep + - description: Qualcomm Technologies, Inc. TUNA items: - enum: diff --git a/bindings/power/reset/qcom,reboot-reason.yaml b/bindings/power/reset/qcom,reboot-reason.yaml index 1f871355..588cf763 100644 --- a/bindings/power/reset/qcom,reboot-reason.yaml +++ b/bindings/power/reset/qcom,reboot-reason.yaml @@ -1,7 +1,7 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- -$id: "http://devicetree.org/schemas/power/reset/qcom-reboot-reason.yaml#" +$id: "http://devicetree.org/schemas/power/reset/qcom,reboot-reason.yaml#" $schema: "http://devicetree.org/meta-schemas/core.yaml#" title: Qualcomm Technologies, Inc. Reboot Reason @@ -15,26 +15,35 @@ description: | restarting into a ramdump collection mode (CrashDump), or restarting into "emergency download mode". +allOf: + - $ref: /schemas/nvmem/nvmem-consumer.yaml# + properties: compatible: items: - const: qcom,reboot-mode - allOf: - - $ref: /schemas/nvmem/nvmem-consumer.yaml#/properties - - items: - nvmem-cell-names: - items: - - const: restart_reason + nvmem-cells: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: Phandle to the nvmem cell providing the reboot reason. + + nvmem-cell-names: + items: + - const: restart_reason + + qcom,no-nvmem-cell-support: + type: boolean + description: "bool property for device not having nvmem cell support." + required: - compatible - - nvmem-cells-names -dependencies: - allOf: - - $ref: /schemas/nvmem/nvmem-consumer.yaml#/dependencies +oneOf: + - required: [nvmem-cell-names] + - required: [qcom,no-nvmem-cell-support] +additionalProperties: false examples: - | @@ -43,3 +52,9 @@ examples: nvmem-cells = <&restart_reason>; nvmem-cell-names = "restart_reason"; }; + + - | + reboot-reason { + compatible = "qcom,reboot-reason"; + qcom,no-nvmem-cell-support; + }; \ No newline at end of file diff --git a/bindings/soc/qcom/cx-ipeak.yaml b/bindings/soc/qcom/cx-ipeak.yaml new file mode 100644 index 00000000..040b2e19 --- /dev/null +++ b/bindings/soc/qcom/cx-ipeak.yaml @@ -0,0 +1,28 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/soc/qcom/cx-ipeak.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Qualcomm CX Ipeak driver + +maintainers: + - vtalluri@qti.quacomm.com + +description: + Cx ipeak HW module is used to limit the current drawn by various subsystem + blocks on Cx power rail. Each client needs to set their bit in tcsr register + if it is going to cross its own threshold. If all clients are going to cross + their thresholds then Cx ipeak hw module will raise an interrupt to cDSP block + to throttle cDSP's fmax. + +properties: + compatible: + enum: + - qcom,cx-ipeak-v1 + - qcom,cx-ipeak-v2 + +required: + - compatible + +additionalProperties: false diff --git a/bindings/soc/qcom/qcom,dmof.yaml b/bindings/soc/qcom/qcom,dmof.yaml new file mode 100644 index 00000000..db82ee3a --- /dev/null +++ b/bindings/soc/qcom/qcom,dmof.yaml @@ -0,0 +1,30 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/qcom/qcom,dmof.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies,Inc. Disable Memcpy Optimization Device + +maintainers: + - Souradeep Chowdhury + +description: |+ + The qcom dmof is used to set/unset the per CPU disable memcpy optimization + variable, this variable is set using threads scheduled on individual CPUs. + +properties: + compatible: + items: + - const: qcom,dmof + +required: + - compatible + +additionalProperties: false + +examples: + - | + qcom-dmof { + compatible = "qcom,dmof"; + }; diff --git a/bindings/soc/qcom/qcom,spmi-pmic-err-debug.yaml b/bindings/soc/qcom/qcom,spmi-pmic-err-debug.yaml new file mode 100644 index 00000000..06bcf7b3 --- /dev/null +++ b/bindings/soc/qcom/qcom,spmi-pmic-err-debug.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/qcom/qcom,spmi-pmic-err-debug.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. SPMI error debug + +maintainers: + - Jishnu Prakash + +description: | + This binding describes the Qualcomm Technologies, Inc. SPMI error debug device. + In case of any hardware errors in the SPMI PMIC Arbiter, this device processes + the protocol IRQ triggered to read and dump the relevant data needed for further + debugging. + +properties: + compatible: + const: qcom,spmi-pmic-err-debug + + reg: + items: + - description: configuration registers + - description: geni registers + + reg-names: + items: + - const: cnfg + - const: geni + + interrupts: + maxItems: 1 + + interrupt-names: + const: protocol_irq + + nvmem-cells: + maxItems: 1 + + nvmem-cell-names: + const: tz_dbg + +required: + - compatible + - reg + - reg-names + - interrupts + - interrupt-names + +additionalProperties: false + +examples: + - | + #include + spmi-err@c42d000 { + compatible = "qcom,spmi-pmic-err-debug"; + reg = <0xc42d000 0x4000>, + <0xc42c000 0x4c>; + reg-names = "cnfg", "geni"; + + interrupts-extended = <&pdc 23 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "protocol_irq"; + nvmem-cells = <&tz_dbg_en>; + nvmem-cell-names = "tz_dbg"; + }; diff --git a/qcom/Makefile b/qcom/Makefile index 1d11d87c..84c5c33e 100644 --- a/qcom/Makefile +++ b/qcom/Makefile @@ -185,8 +185,8 @@ parrot-dtb-$(CONFIG_ARCH_PARROT) += \ parrot-overlays-dtb-$(CONFIG_ARCH_PARROT) += $(PARROT_BOARDS) $(PARROT_BASE_DTB) $(PARROT_4GB_BOARDS) $(PARROT_4GB_BASE_DTB) dtb-y += $(parrot-dtb-y) -RAVELIN_BASE_DTB += ravelin.dtb ravelinp.dtb ravelin-sg.dtb ravelinp-sg.dtb -RAVELIN_4GB_BASE_DTB += ravelin-4gb.dtb ravelinp-4gb.dtb ravelin-sg.dtb ravelinp-sg.dtb +RAVELIN_BASE_DTB += ravelin.dtb ravelinp.dtb ravelin-sg.dtb ravelinp-sg.dtb montague.dtb montaguep.dtb +RAVELIN_4GB_BASE_DTB += ravelin-4gb.dtb ravelinp-4gb.dtb ravelin-sg.dtb ravelinp-sg.dtb montague-4gb.dtb montaguep-4gb.dtb RAVELIN_BOARDS += \ ravelin-rumi-overlay.dtbo \ @@ -194,10 +194,19 @@ RAVELIN_BOARDS += \ ravelin-idp-overlay.dtbo \ ravelin-idp-wcn3950-amoled-rcm-overlay.dtbo \ ravelin-qrd-overlay.dtbo \ + montague-rumi-overlay.dtbo \ + montague-hsp-overlay.dtbo \ + montague-rcm-overlay.dtbo \ + montague-wsa-overlay.dtbo \ + montague-wsd-overlay.dtbo \ + montague-idp-qps615-overlay.dtbo \ + montague-adrastea-overlay.dtbo \ + montague-apache-overlay.dtbo RAVELIN_4GB_BOARDS += \ ravelin-idp-wcn3988-4gb-overlay.dtbo \ ravelin-qrd-4gb-overlay.dtbo \ + montague-moselle-overlay.dtbo parrot-dtb-$(CONFIG_ARCH_RAVELIN) += \ $(call add-overlays, $(RAVELIN_BOARDS),$(RAVELIN_BASE_DTB)) \ @@ -351,7 +360,9 @@ parrot_tuivm-dtb-$(CONFIG_ARCH_QTI_VM) += ravelin-vm-rumi.dtb \ ravelin-vm-idp.dtb \ ravelin-vm-idp-wcn3988.dtb \ ravelin-vm-idp-wcn3950-amoled-rcm.dtb \ - ravelin-vm-qrd.dtb + ravelin-vm-qrd.dtb \ + montague-vm-hsp.dtb \ + montague-vm-moselle.dtb dtb-y += $(parrot_tuivm-dtb-y) diff --git a/qcom/montague-4gb.dts b/qcom/montague-4gb.dts new file mode 100644 index 00000000..a8cc116b --- /dev/null +++ b/qcom/montague-4gb.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "montague-4gb.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague 4Gb SoC"; + compatible = "qcom,montague"; + qcom,board-id = <0 0x600>; +}; diff --git a/qcom/montague-4gb.dtsi b/qcom/montague-4gb.dtsi new file mode 100644 index 00000000..25e63260 --- /dev/null +++ b/qcom/montague-4gb.dtsi @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "montague.dtsi" +#include "ravelin-low-memory.dtsi" +/ { +}; + diff --git a/qcom/montague-adrastea-overlay.dts b/qcom/montague-adrastea-overlay.dts new file mode 100644 index 00000000..460696da --- /dev/null +++ b/qcom/montague-adrastea-overlay.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +/plugin/; + +#include "montague-adrastea.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague Adrastea IDP"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,msm-id = <581 0x10000>, <582 0x10000>; + qcom,board-id = <0x10022 0x0>; +}; + +&pcie0 { + + qcom,config-recovery; + qcom,drv-supported; + +}; diff --git a/qcom/montague-adrastea.dts b/qcom/montague-adrastea.dts new file mode 100644 index 00000000..4acbb965 --- /dev/null +++ b/qcom/montague-adrastea.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + + +#include "montague.dtsi" +#include "montague-adrastea.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague Adrastea IDP"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,board-id = <0x10022 0x0>; +}; diff --git a/qcom/montague-adrastea.dtsi b/qcom/montague-adrastea.dtsi new file mode 100644 index 00000000..75b6deee --- /dev/null +++ b/qcom/montague-adrastea.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "montague-talyn.dtsi" diff --git a/qcom/montague-apache-overlay.dts b/qcom/montague-apache-overlay.dts new file mode 100644 index 00000000..159ca0ad --- /dev/null +++ b/qcom/montague-apache-overlay.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +/plugin/; + +#include "montague-talyn.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague Apache IDP"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,msm-id = <581 0x10000>, <582 0x10000>; + qcom,board-id = <0x10022 0x8>; +}; diff --git a/qcom/montague-apache.dts b/qcom/montague-apache.dts new file mode 100644 index 00000000..c39e8455 --- /dev/null +++ b/qcom/montague-apache.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "montague.dtsi" +#include "montague-talyn.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague Apache IDP"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,board-id = <0x10022 0x8>; +}; diff --git a/qcom/montague-hsp-overlay.dts b/qcom/montague-hsp-overlay.dts new file mode 100644 index 00000000..a9b7ae2a --- /dev/null +++ b/qcom/montague-hsp-overlay.dts @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +/plugin/; + +#include "montague-hsp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague HSP IDP"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,msm-id = <581 0x10000>, <582 0x10000>; + qcom,board-id = <0x10022 0x4>; +}; + +&reserved_memory { + wlan_msa_mem: wlan_msa_mem_region@82a00000 { + no-map; + reg = <0x0 0x82a00000 0x0 0x0>; + }; +}; + +&pcie0 { + + qcom,config-recovery; + qcom,drv-supported; + +}; + diff --git a/qcom/montague-hsp.dts b/qcom/montague-hsp.dts new file mode 100644 index 00000000..87d483a7 --- /dev/null +++ b/qcom/montague-hsp.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + + +#include "montague.dtsi" +#include "montague-hsp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague HSP IDP"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,board-id = <0x10022 0x4>; +}; diff --git a/qcom/montague-hsp.dtsi b/qcom/montague-hsp.dtsi new file mode 100644 index 00000000..c324fa9d --- /dev/null +++ b/qcom/montague-hsp.dtsi @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "ravelin-idp.dtsi" + +&soc { +}; + +&pcie0 { + status = "ok"; +}; + +&pcie0_msi { + status = "ok"; +}; + +&bluetooth { + status = "disabled"; +}; + +&wpss_pas { + status = "disabled"; +}; diff --git a/qcom/montague-idp-qps615-overlay.dts b/qcom/montague-idp-qps615-overlay.dts new file mode 100644 index 00000000..b9ae5c7f --- /dev/null +++ b/qcom/montague-idp-qps615-overlay.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +/plugin/; + +#include "montague-idp-qps615.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague IDP QPS615"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,msm-id = <581 0x10000>, <582 0x10000>; + qcom,board-id = <0x10022 0x9>; +}; diff --git a/qcom/montague-idp-qps615.dts b/qcom/montague-idp-qps615.dts new file mode 100644 index 00000000..fbed51af --- /dev/null +++ b/qcom/montague-idp-qps615.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "montague.dtsi" +#include "montague-idp-qps615.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague IDP QPS615"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,board-id = <0x10022 0x9>; +}; diff --git a/qcom/montague-idp-qps615.dtsi b/qcom/montague-idp-qps615.dtsi new file mode 100644 index 00000000..3a44d894 --- /dev/null +++ b/qcom/montague-idp-qps615.dtsi @@ -0,0 +1,162 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "montague-hsp.dtsi" + +&qupv3_se0_i2c { + status = "ok"; + + pcie0_i2c_ctrl: pcie0_i2c_ctrl { + rc-index = <0x0>; + reg = <0x77>; + gpio-config-reg = <0x801208>; + ep-reset-reg = <0x801210>; + ep-reset-gpio-mask = <0xc>; + version-reg = <0x800000>; + dump-regs = <0x801330 0x801350 0x801370>; + reg_update = <0x82c030 0x1 + 0x828000 0x3 + 0x82bd00 0x8 + 0x82c030 0x2 + 0x828000 0x3 + 0x82bd00 0x8 + 0x82c030 0x8 + 0x828000 0x1 + 0x82bd00 0x8 + 0x82c01c 0x10 + 0x82c030 0xf + 0x828000 0xf + 0x82b268 0x2>; + /*FOM for preset caluclation*/ + switch_reg_update = <0x82c02c 0x00000007 + 0x824a10 0x00000001 + 0x82c030 0x00000008 + 0x828000 0x00000001 + 0x82b074 0x00000020 + 0x82b2bc 0x00000001>; + }; +}; + +&pcie0 { + + pcie-i2c-phandle = <&qupv3_se0_i2c>; + qcom,boot-option = <0x2>; + iommu-map = <0x0 &apps_smmu 0x1400 0x1>, + <0x100 &apps_smmu 0x1401 0x1>, + <0x208 &apps_smmu 0x1404 0x1>, + <0x210 &apps_smmu 0x1405 0x1>, + <0x218 &apps_smmu 0x1406 0x1>, + <0x300 &apps_smmu 0x1407 0x1>, + <0x400 &apps_smmu 0x1410 0x1>, + <0x500 &apps_smmu 0x1411 0x1>, + <0x501 &apps_smmu 0x1412 0x1>; + + qcom,phy-sequence = <0x0240 0x03 0x0 + 0x0094 0x08 0x0 + 0x0154 0x34 0x0 + 0x016c 0x08 0x0 + 0x0058 0x0f 0x0 + 0x00a4 0x42 0x0 + 0x0110 0x24 0x0 + 0x011c 0x03 0x0 + 0x0118 0xb4 0x0 + 0x010c 0x02 0x0 + 0x01bc 0x11 0x0 + 0x00bc 0x82 0x0 + 0x00d4 0x03 0x0 + 0x00d0 0x55 0x0 + 0x00cc 0x55 0x0 + 0x00b0 0x1a 0x0 + 0x00ac 0x0a 0x0 + 0x00c4 0x68 0x0 + 0x00e0 0x02 0x0 + 0x00dc 0xaa 0x0 + 0x00d8 0xab 0x0 + 0x00b8 0x34 0x0 + 0x00b4 0x14 0x0 + 0x0158 0x01 0x0 + 0x0074 0x06 0x0 + 0x007c 0x16 0x0 + 0x0084 0x36 0x0 + 0x0078 0x06 0x0 + 0x0080 0x16 0x0 + 0x0088 0x36 0x0 + 0x01b0 0x1e 0x0 + 0x01ac 0xca 0x0 + 0x01b8 0x18 0x0 + 0x01b4 0xa2 0x0 + 0x0050 0x07 0x0 + 0x0010 0x01 0x0 + 0x001c 0x31 0x0 + 0x0020 0x01 0x0 + 0x0024 0xde 0x0 + 0x0028 0x07 0x0 + 0x0030 0x4c 0x0 + 0x0034 0x06 0x0 + 0x0ee4 0x20 0x0 + 0x0e84 0x75 0x0 + 0x0e90 0x3f 0x0 + 0x115c 0x7f 0x0 + 0x1160 0xff 0x0 + 0x1164 0xbf 0x0 + 0x1168 0x3f 0x0 + 0x116c 0xd8 0x0 + 0x1170 0xdc 0x0 + 0x1174 0xdc 0x0 + 0x1178 0x5c 0x0 + 0x117c 0x34 0x0 + 0x1180 0xa6 0x0 + 0x1190 0x34 0x0 + 0x1194 0x38 0x0 + 0x10d8 0x0f 0x0 + 0x0e3c 0x12 0x0 + 0x0e40 0x01 0x0 + 0x10dc 0x00 0x0 + 0x104c 0x08 0x0 + 0x1050 0x08 0x0 + 0x1044 0xf0 0x0 + 0x11a4 0x38 0x0 + 0x10cc 0xf0 0x0 + 0x10f4 0x07 0x0 + 0x1008 0x09 0x0 + 0x1014 0x05 0x0 + 0x0694 0x00 0x0 + 0x0654 0x00 0x0 + 0x06a8 0x0f 0x0 + 0x0048 0x90 0x0 + 0x0620 0xc1 0x0 + 0x0624 0x40 0x0 + 0x0388 0x77 0x0 + 0x0398 0x0b 0x0 + 0x02dc 0x05 0x0 + 0x0200 0x00 0x0 + 0x0244 0x03 0x0>; + +}; + +&pcie0_rp { + #address-cells = <5>; + #size-cells = <0>; + + /* BDF 1.0.0 */ + pcie0_bus1_dev0_fn0: pcie0_bus1_dev0_fn0 { + reg = <0 0 0 0 0>; + + /* BDF 2.1.0 */ + pcie0_bus2_dev1_fn0: pcie0_bus2_dev1_fn0 { + reg = <0x800 0x0 0x0 0x0 0x0>; + }; + + /* BDF 2.2.0 */ + pcie0_bus2_dev2_fn0: pcie0_bus2_dev2_fn0 { + reg = <0x1000 0x0 0x0 0x0 0x0>; + }; + + /* BDF 2.3.0 */ + pcie0_bus2_dev3_fn0: pcie0_bus2_dev3_fn0 { + reg = <0x1800 0x0 0x0 0x0 0x0>; + }; + }; +}; diff --git a/qcom/montague-moselle-4gb.dts b/qcom/montague-moselle-4gb.dts new file mode 100644 index 00000000..3423dbd7 --- /dev/null +++ b/qcom/montague-moselle-4gb.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +#include "montague-4gb.dtsi" +#include "montague-moselle.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague Moselle 4Gb IDP"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,board-id = <0x10022 0x603>; +}; diff --git a/qcom/montague-moselle-overlay.dts b/qcom/montague-moselle-overlay.dts new file mode 100644 index 00000000..77170806 --- /dev/null +++ b/qcom/montague-moselle-overlay.dts @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +/plugin/; + +#include "montague-moselle.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague Moselle IDP"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,msm-id = <581 0x10000>, <582 0x10000>; + qcom,board-id = <0x10022 3>; +}; + +&pcie0 { + + qcom,config-recovery; + qcom,drv-supported; + +}; + + diff --git a/qcom/montague-moselle.dts b/qcom/montague-moselle.dts new file mode 100644 index 00000000..e62f4371 --- /dev/null +++ b/qcom/montague-moselle.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "montague.dtsi" +#include "montague-moselle.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague Moselle IDP"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,board-id = <0x10022 3>; +}; + diff --git a/qcom/montague-moselle.dtsi b/qcom/montague-moselle.dtsi new file mode 100644 index 00000000..a98bce6d --- /dev/null +++ b/qcom/montague-moselle.dtsi @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "montague-hsp.dtsi" + +&icnss2 { + status = "ok"; +}; + +&pcie0 { + status = "disabled"; +}; + +&pcie0_msi { + status = "disabled"; +}; + +&bluetooth { + status = "disabled"; +}; + +&wpss_pas { + status = "ok"; +}; diff --git a/qcom/montague-rcm-overlay.dts b/qcom/montague-rcm-overlay.dts new file mode 100644 index 00000000..4258ba05 --- /dev/null +++ b/qcom/montague-rcm-overlay.dts @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +/plugin/; + +#include "montague-rcm.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague RCM IDP"; + compatible = "qcom,montague-qrd", "qcom,montague", "qcom,idp"; + qcom,msm-id = <581 0x10000>, <582 0x10000>; + qcom,board-id = <0x10022 0x5>; +}; + +&pcie0 { + + qcom,config-recovery; + qcom,drv-supported; + +}; + + diff --git a/qcom/montague-rcm.dts b/qcom/montague-rcm.dts new file mode 100644 index 00000000..75f6e1c7 --- /dev/null +++ b/qcom/montague-rcm.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "montague.dtsi" +#include "montague-rcm.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague RCM IDP"; + compatible = "qcom,montague-qrd", "qcom,montague", "qcom,idp"; + qcom,board-id = <0x10022 0x5>; +}; + diff --git a/qcom/montague-rcm.dtsi b/qcom/montague-rcm.dtsi new file mode 100644 index 00000000..dd8cec6e --- /dev/null +++ b/qcom/montague-rcm.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "montague-hsp.dtsi" diff --git a/qcom/montague-rumi-overlay.dts b/qcom/montague-rumi-overlay.dts new file mode 100644 index 00000000..23b3dd77 --- /dev/null +++ b/qcom/montague-rumi-overlay.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +/plugin/; + +#include "montague-rumi.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague RUMI"; + compatible = "qcom,montague-rumi", "qcom,montague", "qcom,rumi"; + qcom,msm-id = <581 0x10000>, <582 0x10000>; + qcom,board-id = <0x1000F 0>; +}; + diff --git a/qcom/montague-rumi.dts b/qcom/montague-rumi.dts new file mode 100644 index 00000000..a697a719 --- /dev/null +++ b/qcom/montague-rumi.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +/memreserve/ 0x90000000 0x00010000; + +#include "montague.dtsi" +#include "montague-rumi.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague RUMI"; + compatible = "qcom,montague-rumi", "qcom,montague", "qcom,rumi"; + qcom,board-id = <0x1000F 0>; +}; + diff --git a/qcom/montague-rumi.dtsi b/qcom/montague-rumi.dtsi new file mode 100644 index 00000000..0bd20ff1 --- /dev/null +++ b/qcom/montague-rumi.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "ravelin-rumi.dtsi" diff --git a/qcom/montague-talyn.dtsi b/qcom/montague-talyn.dtsi new file mode 100644 index 00000000..3ff9163c --- /dev/null +++ b/qcom/montague-talyn.dtsi @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "ravelin-idp.dtsi" +#include "ravelin-qcx6438.dtsi" + +&soc { +}; + +&pcie0 { + status = "ok"; +}; + +&pcie0_msi { + status = "ok"; +}; + +&wil6210 { + status = "ok"; +}; + +&bluetooth { + status = "disabled"; +}; + +&wpss_pas { + status = "disabled"; +}; diff --git a/qcom/montague-vm-hsp.dts b/qcom/montague-vm-hsp.dts new file mode 100644 index 00000000..95a730f3 --- /dev/null +++ b/qcom/montague-vm-hsp.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "ravelin-vm.dtsi" +#include "ravelin-vm-idp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague VM QRD"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,board-id = <0x10022 0x4>; +}; diff --git a/qcom/montague-vm-moselle.dts b/qcom/montague-vm-moselle.dts new file mode 100644 index 00000000..df0c5288 --- /dev/null +++ b/qcom/montague-vm-moselle.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "ravelin-vm.dtsi" +#include "ravelin-vm-qrd.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague Moselle QRD"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,board-id = <0x10022 3>; +}; diff --git a/qcom/montague-wsa-overlay.dts b/qcom/montague-wsa-overlay.dts new file mode 100644 index 00000000..cae69498 --- /dev/null +++ b/qcom/montague-wsa-overlay.dts @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +/plugin/; + +#include "montague-wsa.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague WSA IDP"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,msm-id = <581 0x10000>, <582 0x10000>; + qcom,board-id = <0x10022 0x7>; +}; + +&pcie0 { + + qcom,config-recovery; + qcom,drv-supported; + +}; + diff --git a/qcom/montague-wsa.dts b/qcom/montague-wsa.dts new file mode 100644 index 00000000..3f850f86 --- /dev/null +++ b/qcom/montague-wsa.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + + +#include "montague.dtsi" +#include "montague-wsa.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague WSA IDP"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,board-id = <0x10022 0x7>; +}; diff --git a/qcom/montague-wsa.dtsi b/qcom/montague-wsa.dtsi new file mode 100644 index 00000000..296589b8 --- /dev/null +++ b/qcom/montague-wsa.dtsi @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "ravelin-idp.dtsi" + +&soc { +}; + +&pcie0 { + status = "ok"; +}; + +&pcie0_msi { + status = "ok"; +}; + +&wpss_pas { + status = "disabled"; +}; diff --git a/qcom/montague-wsd-overlay.dts b/qcom/montague-wsd-overlay.dts new file mode 100644 index 00000000..abc38b72 --- /dev/null +++ b/qcom/montague-wsd-overlay.dts @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +/plugin/; + +#include "montague-wsd.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague WSD IDP"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,msm-id = <581 0x10000>, <582 0x10000>; + qcom,board-id = <0x10022 0x6>; +}; + +&pcie0 { + + qcom,config-recovery; + qcom,drv-supported; + +}; + diff --git a/qcom/montague-wsd.dts b/qcom/montague-wsd.dts new file mode 100644 index 00000000..2c96221d --- /dev/null +++ b/qcom/montague-wsd.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "montague.dtsi" +#include "montague-wsd.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague WSD IDP"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,board-id = <0x10022 0x6>; +}; diff --git a/qcom/montague-wsd.dtsi b/qcom/montague-wsd.dtsi new file mode 100644 index 00000000..296589b8 --- /dev/null +++ b/qcom/montague-wsd.dtsi @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "ravelin-idp.dtsi" + +&soc { +}; + +&pcie0 { + status = "ok"; +}; + +&pcie0_msi { + status = "ok"; +}; + +&wpss_pas { + status = "disabled"; +}; diff --git a/qcom/montague.dts b/qcom/montague.dts new file mode 100644 index 00000000..b54dcb8c --- /dev/null +++ b/qcom/montague.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "montague.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague SoC"; + compatible = "qcom,montague"; + qcom,board-id = <0 0>; +}; + diff --git a/qcom/montague.dtsi b/qcom/montague.dtsi new file mode 100644 index 00000000..f5688efd --- /dev/null +++ b/qcom/montague.dtsi @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "ravelin.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague SoC"; + compatible = "qcom,montague"; + qcom,msm-id = <581 0x10000>; +}; + +&apps_rsc { + rpmh-regulator-sf1-vreg-enable { + status = "ok"; + }; + + rpmh-regulator-sf1-vreg-mode { + status = "ok"; + }; +}; + +&soc { + st54spi_gpio { + status = "ok"; + /* gpio used as SE_nRESET */ + gpio-power_nreset = <&tlmm 48 0x00>; + }; + + mhi_qrtr_cnss { + compatible = "qcom,qrtr-mhi"; + qcom,dev-id = <0x1103>; + qcom,net-id = <0>; + qcom,low-latency; + }; +}; + +&pcie0 { + +/delete-property/ qcom,config-recovery; +/delete-property/ qcom,drv-supported; + +}; + diff --git a/qcom/montaguep-4gb.dts b/qcom/montaguep-4gb.dts new file mode 100644 index 00000000..045a02c5 --- /dev/null +++ b/qcom/montaguep-4gb.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "montaguep-4gb.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. MontagueP 4Gb SoC"; + compatible = "qcom,montaguep"; + qcom,board-id = <0 0x600>; +}; diff --git a/qcom/montaguep-4gb.dtsi b/qcom/montaguep-4gb.dtsi new file mode 100644 index 00000000..ae2ef25a --- /dev/null +++ b/qcom/montaguep-4gb.dtsi @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "montaguep.dtsi" +#include "ravelin-low-memory.dtsi" +/ { +}; + diff --git a/qcom/montaguep-apache.dts b/qcom/montaguep-apache.dts new file mode 100644 index 00000000..b09f89f9 --- /dev/null +++ b/qcom/montaguep-apache.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "montaguep.dtsi" +#include "montague-talyn.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague Apache IDP"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,board-id = <0x10022 0x8>; +}; diff --git a/qcom/montaguep-hsp.dts b/qcom/montaguep-hsp.dts new file mode 100644 index 00000000..ad79d2e3 --- /dev/null +++ b/qcom/montaguep-hsp.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "montaguep.dtsi" +#include "montaguep-hsp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montaguep HSP IDP"; + compatible = "qcom,montaguep-idp", "qcom,montaguep", "qcom,idp"; + qcom,board-id = <0x10022 0x4>; +}; + diff --git a/qcom/montaguep-hsp.dtsi b/qcom/montaguep-hsp.dtsi new file mode 100644 index 00000000..274387e6 --- /dev/null +++ b/qcom/montaguep-hsp.dtsi @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "ravelin-idp.dtsi" + +&soc { +}; + diff --git a/qcom/montaguep-idp-qps615.dts b/qcom/montaguep-idp-qps615.dts new file mode 100644 index 00000000..635a551e --- /dev/null +++ b/qcom/montaguep-idp-qps615.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "montaguep.dtsi" +#include "montaguep-idp-qps615.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague IDP QPS615"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,board-id = <0x10022 0x9>; +}; diff --git a/qcom/montaguep-idp-qps615.dtsi b/qcom/montaguep-idp-qps615.dtsi new file mode 100644 index 00000000..87463147 --- /dev/null +++ b/qcom/montaguep-idp-qps615.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "ravelinp-idp.dtsi" diff --git a/qcom/montaguep-moselle-4gb.dts b/qcom/montaguep-moselle-4gb.dts new file mode 100644 index 00000000..54b79875 --- /dev/null +++ b/qcom/montaguep-moselle-4gb.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +#include "montaguep-4gb.dtsi" +#include "montaguep-moselle.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague Moselle 4Gb IDP"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,board-id = <0x10022 0x603>; +}; + diff --git a/qcom/montaguep-moselle.dts b/qcom/montaguep-moselle.dts new file mode 100644 index 00000000..16cd834b --- /dev/null +++ b/qcom/montaguep-moselle.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "montaguep.dtsi" +#include "montaguep-moselle.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montaguep Moselle IDP"; + compatible = "qcom,montaguep-idp", "qcom,montaguep", "qcom,idp"; + qcom,board-id = <0x10022 3>; +}; + diff --git a/qcom/montaguep-moselle.dtsi b/qcom/montaguep-moselle.dtsi new file mode 100644 index 00000000..d0f2ccf9 --- /dev/null +++ b/qcom/montaguep-moselle.dtsi @@ -0,0 +1,7 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "montague-hsp.dtsi" + diff --git a/qcom/montaguep-rcm.dts b/qcom/montaguep-rcm.dts new file mode 100644 index 00000000..507c2cb3 --- /dev/null +++ b/qcom/montaguep-rcm.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "montaguep.dtsi" +#include "montaguep-rcm.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montaguep RCM IDP"; + compatible = "qcom,montaguep-idp", "qcom,montaguep", "qcom,idp"; + qcom,board-id = <0x10022 0x5>; +}; + diff --git a/qcom/montaguep-rcm.dtsi b/qcom/montaguep-rcm.dtsi new file mode 100644 index 00000000..dd8cec6e --- /dev/null +++ b/qcom/montaguep-rcm.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "montague-hsp.dtsi" diff --git a/qcom/montaguep-rumi.dts b/qcom/montaguep-rumi.dts new file mode 100644 index 00000000..3b20ca11 --- /dev/null +++ b/qcom/montaguep-rumi.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "montaguep.dtsi" +#include "montaguep-rumi.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montaguep RUMI"; + compatible = "qcom,montaguep-rumi", "qcom,montaguep", "qcom,rumi"; + qcom,board-id = <0x1000F 0>; +}; + diff --git a/qcom/montaguep-rumi.dtsi b/qcom/montaguep-rumi.dtsi new file mode 100644 index 00000000..0bd20ff1 --- /dev/null +++ b/qcom/montaguep-rumi.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "ravelin-rumi.dtsi" diff --git a/qcom/montaguep.dts b/qcom/montaguep.dts new file mode 100644 index 00000000..3b153099 --- /dev/null +++ b/qcom/montaguep.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "montaguep.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. MontagueP SoC"; + compatible = "qcom,montaguep"; + qcom,board-id = <0 0>; +}; + diff --git a/qcom/montaguep.dtsi b/qcom/montaguep.dtsi new file mode 100644 index 00000000..68df995a --- /dev/null +++ b/qcom/montaguep.dtsi @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "montague.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. MontagueP SoC"; + compatible = "qcom,montaguep"; + qcom,msm-id = <582 0x10000>; +}; + diff --git a/qcom/parrot-vm.dtsi b/qcom/parrot-vm.dtsi index 146e1d6f..6e66d709 100644 --- a/qcom/parrot-vm.dtsi +++ b/qcom/parrot-vm.dtsi @@ -32,6 +32,28 @@ gvsock-message-queue-pair { status = "disabled"; }; + + ddump-shm { + vdevice-type = "shm-doorbell"; + generate = "/hypervisor/ddump-shm"; + push-compatible = "qcom,ddump-gunyah-gen"; + peer-default; + memory { + qcom,label = <0x7>; + allocate-base; + }; + }; + + gunyah-panic-notifier-shm { + vdevice-type = "shm-doorbell"; + generate = "/hypervisor/gpn-shm"; + push-compatible = "qcom,gunyah-panic-gen"; + peer-default; + memory { + qcom,label = <0x9>; + allocate-base; + }; + }; }; }; }; diff --git a/qcom/parrot.dtsi b/qcom/parrot.dtsi index e4b64748..3784d44c 100644 --- a/qcom/parrot.dtsi +++ b/qcom/parrot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ #include @@ -56,6 +56,24 @@ hsuart0 = &qupv3_se11_4uart; }; + qcom,gunyah-panic-notifier { + compatible = "qcom,gh-panic-notifier"; + qcom,primary-vm; + gunyah-label = <9>; + peer-name = <2>; + memory-region = <&vm_comm_mem>; + shared-buffer-size = <0x1000>; + }; + + dmesg-dump { + compatible = "qcom,dmesg-dump"; + qcom,primary-vm; + gunyah-label = <7>; + peer-name = <2>; + memory-region = <&vm_comm_mem>; + shared-buffer-size = <0x1000>; + }; + mmio_sram: mmio-sram@17D09100 { #address-cells = <2>; #size-cells = <2>; diff --git a/qcom/platform_map.bzl b/qcom/platform_map.bzl index d4ad5d60..46bcb320 100644 --- a/qcom/platform_map.bzl +++ b/qcom/platform_map.bzl @@ -258,6 +258,8 @@ _platform_map = { {"name": "ravelin-vm-idp-wcn3988.dtb"}, {"name": "ravelin-vm-idp-wcn3950-amoled-rcm.dtb"}, {"name": "ravelin-vm-qrd.dtb"}, + {"name": "montague-vm-hsp.dtb"}, + {"name": "montague-vm-moselle.dtb"}, ], }, "sun-tuivm": { @@ -482,6 +484,10 @@ _platform_map = { {"name": "ravelinp-4gb.dtb"}, {"name": "ravelin-sg.dtb"}, {"name": "ravelinp-sg.dtb"}, + {"name": "montague.dtb"}, + {"name": "montaguep.dtb"}, + {"name": "montague-4gb.dtb"}, + {"name": "montaguep-4gb.dtb"}, ], "dtbo_list": [ # keep sorted @@ -517,6 +523,15 @@ _platform_map = { {"name": "ravelin-qrd-overlay.dtbo"}, {"name": "ravelin-idp-wcn3988-4gb-overlay.dtbo"}, {"name": "ravelin-qrd-4gb-overlay.dtbo"}, + {"name": "montague-rumi-overlay.dtbo"}, + {"name": "montague-hsp-overlay.dtbo"}, + {"name": "montague-rcm-overlay.dtbo"}, + {"name": "montague-wsa-overlay.dtbo"}, + {"name": "montague-wsd-overlay.dtbo"}, + {"name": "montague-idp-qps615-overlay.dtbo"}, + {"name": "montague-adrastea-overlay.dtbo"}, + {"name": "montague-apache-overlay.dtbo"}, + {"name": "montague-moselle-overlay.dtbo"}, ], }, } diff --git a/qcom/pm6150.dtsi b/qcom/pm6150.dtsi index 57db5d18..f183f26e 100644 --- a/qcom/pm6150.dtsi +++ b/qcom/pm6150.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ #include @@ -545,24 +545,22 @@ vbat { polling-delay-passive = <0>; polling-delay = <0>; + thermal-sensors = <&pm6150_bcl 2>; trips { vbat_lvl0: vbat-lvl0 { - thermal-sensors = <&pm6150_bcl 2>; temperature = <3000>; hysteresis = <200>; type = "passive"; }; vbat_lvl1:vbat-lvl1 { - thermal-sensors = <&pm6150_bcl 3>; temperature = <2800>; hysteresis = <200>; type = "passive"; }; vbat_lvl2:vbat-lvl2 { - thermal-sensors = <&pm6150_bcl 4>; temperature = <2600>; hysteresis = <200>; type = "passive"; diff --git a/qcom/qcs610.dtsi b/qcom/qcs610.dtsi index be5a3b90..d647599e 100644 --- a/qcom/qcs610.dtsi +++ b/qcom/qcs610.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ #include "sm6150.dtsi" @@ -91,6 +91,25 @@ }; }; + qcom_cedev: qcedev@1de0000 { + compatible = "qcom,qcedev"; + reg = <0x1de0000 0x20000>, + <0x1dc4000 0x24000>; + reg-names = "crypto-base","crypto-bam-base"; + interrupts = ; + qcom,bam-pipe-pair = <3>; + qcom,ce-hw-instance = <0>; + qcom,ce-device = <0>; + qcom,ce-hw-shared; + qcom,bam-ee = <0>; + qcom,smmu-s1-enable; + qcom,no-clock-support; + interconnect-names = "data_path"; + interconnects = <&aggre1_noc MASTER_CRYPTO &mc_virt SLAVE_EBI1>; + iommus = <&apps_smmu 0x0106 0x0011>, + <&apps_smmu 0x0116 0x0011>; + qcom,iommu-dma = "atomic"; + }; }; &qupv3_se3_i2c { diff --git a/qcom/sm6150-dma-heaps.dtsi b/qcom/sm6150-dma-heaps.dtsi index abde5f52..fe66985c 100644 --- a/qcom/sm6150-dma-heaps.dtsi +++ b/qcom/sm6150-dma-heaps.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ #include @@ -24,7 +24,7 @@ qcom,qseecom { /* QSEECOM HEAP */ qcom,dma-heap-name = "qcom,qseecom"; - qcom,dma-heap-type = ; + qcom,dma-heap-type = ; memory-region = <&qseecom_mem>; }; diff --git a/qcom/sm6150-pinctrl.dtsi b/qcom/sm6150-pinctrl.dtsi index b5d33dd8..041e2f19 100644 --- a/qcom/sm6150-pinctrl.dtsi +++ b/qcom/sm6150-pinctrl.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ &tlmm { @@ -528,6 +528,32 @@ }; qupv3_se7_4uart_pins: qupv3_se7_4uart_pins { + qupv3_se7_default_cts:qupv3_se7_default_cts { + mux { + pins = "gpio10"; + function = "gpio"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; + bias-disable; + }; + }; + + qupv3_se7_default_rts:qupv3_se7_default_rts { + mux { + pins = "gpio11"; + function = "gpio"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; + bias-pull-down; + }; + }; + qupv3_se7_default_tx: qupv3_se7_default_tx { mux { pins = "gpio12"; @@ -541,28 +567,27 @@ }; }; - qupv3_se7_default_ctsrtsrx: - qupv3_se7_default_ctsrtsrx { - mux { - pins = "gpio10", "gpio11", "gpio13"; - function = "gpio"; - }; + qupv3_se7_default_rx: qupv3_se7_default_rx { + mux { + pins = "gpio13"; + function = "gpio"; + }; - config { - pins = "gpio10", "gpio11", "gpio13"; - drive-strength = <2>; - bias-pull-down; - }; + config { + pins = "gpio13"; + drive-strength = <2>; + bias-pull-down; + }; }; - qupv3_se7_ctsrx: qupv3_se7_ctsrx { + qupv3_se7_cts: qupv3_se7_cts { mux { - pins = "gpio10", "gpio13"; + pins = "gpio10"; function = "qup13"; }; config { - pins = "gpio10", "gpio13"; + pins = "gpio10"; drive-strength = <2>; bias-disable; }; @@ -593,5 +618,440 @@ bias-pull-up; }; }; + + qupv3_se7_rx_active: qupv3_se7_rx_active { + mux { + pins = "gpio13"; + function = "qup13"; + }; + + config { + pins = "gpio13"; + drive-strength = <2>; + bias-disable; + }; + }; + + qupv3_se7_rx_wake: qupv3_se7_rx_wake { + mux { + pins = "gpio13"; + function = "gpio"; + }; + + config { + pins = "gpio13"; + drive-strength = <2>; + bias-disable; + }; + }; }; + + wsa_swr_clk_pin: wsa_swr_clk_pin { + wsa_swr_clk_sleep: wsa_swr_clk_sleep { + mux { + pins = "gpio111"; + function = "WSA_CLK"; + }; + + config { + pins = "gpio111"; + drive-strength = <2>; + bias-bus-hold; + }; + }; + + wsa_swr_clk_active: wsa_swr_clk_active { + mux { + pins = "gpio111"; + function = "WSA_CLK"; + }; + + config { + pins = "gpio111"; + drive-strength = <2>; + bias-bus-hold; + }; + }; + }; + + wsa_swr_data_pin: wsa_swr_data_pin { + wsa_swr_data_sleep: wsa_swr_data_sleep { + mux { + pins = "gpio110"; + function = "WSA_DATA"; + }; + + config { + pins = "gpio110"; + drive-strength = <4>; + bias-bus-hold; + }; + }; + + wsa_swr_data_active: wsa_swr_data_active { + mux { + pins = "gpio110"; + function = "WSA_DATA"; + }; + + config { + pins = "gpio110"; + drive-strength = <4>; + bias-bus-hold; + }; + }; + }; + + /* WSA speaker reset pins */ + spkr_1_sd_n: spkr_1_sd_n { + spkr_1_sd_n_sleep: spkr_1_sd_n_sleep { + mux { + pins = "gpio108"; + function = "gpio"; + }; + + config { + pins = "gpio108"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; + input-enable; + }; + }; + + spkr_1_sd_n_active: spkr_1_sd_n_active { + mux { + pins = "gpio108"; + function = "gpio"; + }; + + config { + pins = "gpio108"; + drive-strength = <16>; /* 16 mA */ + bias-disable; + output-high; + }; + }; + }; + + spkr_2_sd_n: spkr_2_sd_n { + spkr_2_sd_n_sleep: spkr_2_sd_n_sleep { + mux { + pins = "gpio109"; + function = "gpio"; + }; + + config { + pins = "gpio109"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; + input-enable; + }; + }; + + spkr_2_sd_n_active: spkr_2_sd_n_active { + mux { + pins = "gpio109"; + function = "gpio"; + }; + + config { + pins = "gpio109"; + drive-strength = <16>; /* 16 mA */ + bias-disable; + output-high; + }; + }; + }; + + wcd9xxx_intr: wcd9xxx_intr { + wcd_intr_default: wcd_intr_default { + mux { + pins = "gpio122"; + function = "gpio"; + }; + + config { + pins = "gpio122"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* pull down */ + input-enable; + }; + }; + }; + + + tert_i2s_sck_ws_d0: tert_i2s_sck_ws_d0 { + tert_i2s_sck_ws_d0_sleep: tert_i2s_sck_ws_do_sleep { + mux { + pins = "gpio115", "gpio116", "gpio117"; + function = "ter_mi2s"; + }; + + config { + pins = "gpio115", "gpio116", "gpio117"; + drive-strength = <2>; /* 2 mA */ + }; + }; + + tert_i2s_sck_ws_d0_active: tert_i2s_sck_ws_do_active { + mux { + pins = "gpio115", "gpio116", "gpio117"; + function = "ter_mi2s"; + }; + + config { + pins = "gpio115", "gpio116", "gpio117"; + drive-strength = <8>; /* 8 mA */ + bias-disable; + output-high; + input-enable; + }; + }; + }; + + emac: emac { + emac_mdc: emac_mdc { + mux { + pins = "gpio113"; + function = "rgmii_mdc"; + }; + + config { + pins = "gpio113"; + bias-pull-up; + }; + }; + + emac_mdio: emac_mdio { + mux { + pins = "gpio114"; + function = "rgmii_mdio"; + }; + + config { + pins = "gpio114"; + bias-pull-up; + }; + }; + + emac_rgmii_txd0: emac_rgmii_txd0 { + mux { + pins = "gpio96"; + function = "rgmii_txd0"; + }; + + config { + pins = "gpio96"; + bias-pull-up; + drive-strength = <16>; + }; + }; + + emac_rgmii_txd1: emac_rgmii_txd1 { + mux { + pins = "gpio95"; + function = "rgmii_txd1"; + }; + + config { + pins = "gpio95"; + bias-pull-up; + drive-strength = <16>; + }; + }; + + emac_rgmii_txd2: emac_rgmii_txd2 { + mux { + pins = "gpio94"; + function = "rgmii_txd2"; + }; + + config { + pins = "gpio94"; + bias-pull-up; + drive-strength = <16>; + }; + }; + + emac_rgmii_txd3: emac_rgmii_txd3 { + mux { + pins = "gpio93"; + function = "rgmii_txd3"; + }; + + config { + pins = "gpio93"; + bias-pull-up; + drive-strength = <16>; + }; + }; + + emac_rgmii_txc: emac_rgmii_txc { + mux { + pins = "gpio92"; + function = "rgmii_txc"; + }; + + config { + pins = "gpio92"; + bias-pull-up; + drive-strength = <16>; + }; + }; + + emac_rgmii_tx_ctl: emac_rgmii_tx_ctl { + mux { + pins = "gpio97"; + function = "rgmii_tx"; + }; + + config { + pins = "gpio97"; + bias-pull-up; + drive-strength = <16>; + }; + }; + + emac_rgmii_rxd0: emac_rgmii_rxd0 { + mux { + pins = "gpio83"; + function = "rgmii_rxd0"; + }; + + config { + pins = "gpio83"; + bias-disable; /* NO pull */ + drive-strength = <2>; /* 2MA */ + }; + }; + + emac_rgmii_rxd1: emac_rgmii_rxd1 { + mux { + pins = "gpio82"; + function = "rgmii_rxd1"; + }; + + config { + pins = "gpio82"; + bias-disable; /* NO pull */ + drive-strength = <2>; + }; + }; + + emac_rgmii_rxd2: emac_rgmii_rxd2 { + mux { + pins = "gpio81"; + function = "rgmii_rxd2"; + }; + + config { + pins = "gpio81"; + bias-disable; /* NO pull */ + drive-strength = <2>; + }; + }; + + emac_rgmii_rxd3: emac_rgmii_rxd3 { + mux { + pins = "gpio103"; + function = "rgmii_rxd3"; + }; + + config { + pins = "gpio103"; + bias-disable; /* NO pull */ + drive-strength = <2>; + }; + }; + + emac_rgmii_rxc: emac_rgmii_rxc { + mux { + pins = "gpio102"; + function = "rgmii_rxc"; + }; + + config { + pins = "gpio102"; + bias-disable; /* NO pull */ + drive-strength = <2>; + }; + }; + + emac_rgmii_rxc_suspend: emac_rgmii_rxc_suspend { + mux { + pins = "gpio102"; + function = "rgmii_rxc"; + }; + + config { + pins = "gpio102"; + input-disable; + }; + }; + + emac_rgmii_rxc_resume: emac_rgmii_rxc_resume { + mux { + pins = "gpio102"; + function = "rgmii_rxc"; + }; + + config { + pins = "gpio102"; + input-enable; + bias-disable;/* NO pull */ + }; + }; + + emac_rgmii_rx_ctl: emac_rgmii_rx_ctl { + mux { + pins = "gpio112"; + function = "rgmii_rx"; + }; + + config { + pins = "gpio112"; + bias-disable; /* NO pull */ + drive-strength = <2>; + }; + }; + + emac_phy_intr: emac_phy_intr { + mux { + pins = "gpio121"; + function = "emac_phy"; + }; + + config { + pins = "gpio121"; + bias-disable; /* NO pull */ + drive-strength = <2>; + }; + }; + + emac_phy_reset_state: emac_phy_reset_state { + mux { + pins = "gpio104"; + function = "gpio"; + }; + + config { + pins = "gpio104"; + bias-pull-up; + drive-strength = <16>; + }; + }; + + emac_pin_pps_0: emac_pin_pps_0 { + mux { + pins = "gpio91"; + function = "rgmii_sync"; + }; + + config { + pins = "gpio91"; + bias-pull-up; + drive-strength = <16>; + }; + }; + }; }; diff --git a/qcom/sm6150-qupv3.dtsi b/qcom/sm6150-qupv3.dtsi index 11d2ddd9..24ef6824 100644 --- a/qcom/sm6150-qupv3.dtsi +++ b/qcom/sm6150-qupv3.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - *Copyright (c) 2025, Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ &soc { /* @@ -404,14 +404,14 @@ <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>, <&aggre1_noc MASTER_BLSP_1 &mc_virt SLAVE_EBI1>; pinctrl-names = "default", "active", "sleep", "shutdown"; - pinctrl-0 = <&qupv3_se7_default_ctsrtsrx>, - <&qupv3_se7_default_tx>; - pinctrl-1 = <&qupv3_se7_ctsrx>, <&qupv3_se7_rts>, - <&qupv3_se7_tx>; - pinctrl-2 = <&qupv3_se7_ctsrx>, <&qupv3_se7_rts>, - <&qupv3_se7_tx>; - pinctrl-3 = <&qupv3_se7_default_ctsrtsrx>, - <&qupv3_se7_default_tx>; + pinctrl-0 = <&qupv3_se7_default_cts>, <&qupv3_se7_default_rts>, + <&qupv3_se7_default_tx>, <&qupv3_se7_default_rx>; + pinctrl-1 = <&qupv3_se7_cts>, <&qupv3_se7_rts>, + <&qupv3_se7_tx>, <&qupv3_se7_rx_active>; + pinctrl-2 = <&qupv3_se7_cts>, <&qupv3_se7_default_rts>, + <&qupv3_se7_tx>, <&qupv3_se7_rx_wake>; + pinctrl-3 = <&qupv3_se7_default_cts>, <&qupv3_se7_default_rts>, + <&qupv3_se7_default_tx>, <&qupv3_se7_default_rx>; interrupts-extended = <&intc GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>, <&tlmm 13 IRQ_TYPE_LEVEL_HIGH>; qcom,wakeup-byte = <0xFD>; diff --git a/qcom/sm6150-thermal.dtsi b/qcom/sm6150-thermal.dtsi index 21e5a78b..a8f80f37 100644 --- a/qcom/sm6150-thermal.dtsi +++ b/qcom/sm6150-thermal.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ #include @@ -186,6 +186,24 @@ }; }; + qcom,devfreq-cdev { + compatible = "qcom,devfreq-cdev"; + qcom,devfreq = <&msm_gpu>; + }; + + qcom,cpufreq-cdev { + compatible = "qcom,cpufreq-cdev"; + + cpu-cluster0 { + qcom,cpus = <&CPU0 &CPU1 &CPU2 &CPU3 &CPU4 &CPU5>; + }; + + cpu-cluster1 { + qcom,cpus = <&CPU6 &CPU7>; + }; + }; + + qmi-tmd-devices { compatible = "qcom,qmi-cooling-devices"; diff --git a/qcom/sm6150.dtsi b/qcom/sm6150.dtsi index 855711af..82ce668f 100644 --- a/qcom/sm6150.dtsi +++ b/qcom/sm6150.dtsi @@ -68,13 +68,13 @@ #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 0 6>; L2_0: l2-cache { - compatible = "arm,arch-cache"; + compatible = "cache"; cache-size = <0x10000>; cache-level = <2>; next-level-cache = <&L3_0>; L3_0: l3-cache { - compatible = "arm,arch-cache"; + compatible = "cache"; cache-size = <0x100000>; cache-level = <3>; }; @@ -96,7 +96,7 @@ #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 0 6>; L2_100: l2-cache { - compatible = "arm,arch-cache"; + compatible = "cache"; cache-size = <0x10000>; cache-level = <2>; next-level-cache = <&L3_0>; @@ -119,7 +119,7 @@ #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 0 6>; L2_200: l2-cache { - compatible = "arm,arch-cache"; + compatible = "cache"; cache-size = <0x10000>; cache-level = <2>; next-level-cache = <&L3_0>; @@ -141,7 +141,7 @@ #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 0 6>; L2_300: l2-cache { - compatible = "arm,arch-cache"; + compatible = "cache"; cache-size = <0x10000>; cache-level = <2>; next-level-cache = <&L3_0>; @@ -163,7 +163,7 @@ #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 0 6>; L2_400: l2-cache { - compatible = "arm,arch-cache"; + compatible = "cache"; cache-size = <0x10000>; cache-level = <2>; next-level-cache = <&L3_0>; @@ -185,7 +185,7 @@ #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 0 6>; L2_500: l2-cache { - compatible = "arm,arch-cache"; + compatible = "cache"; cache-size = <0x10000>; cache-level = <2>; next-level-cache = <&L3_0>; @@ -207,7 +207,7 @@ qcom,freq-domain = <&cpufreq_hw 1 2>; #cooling-cells = <2>; L2_600: l2-cache { - compatible = "arm,arch-cache"; + compatible = "cache"; cache-size = <0x40000>; cache-level = <2>; next-level-cache = <&L3_0>; @@ -229,7 +229,7 @@ #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 1 2>; L2_700: l2-cache { - compatible = "arm,arch-cache"; + compatible = "cache"; cache-size = <0x40000>; cache-level = <2>; next-level-cache = <&L3_0>; @@ -277,6 +277,8 @@ }; idle-states { + entry-method = "psci"; + SILVER_OFF: silver-c3 { /* C3 */ compatible = "arm,idle-state"; idle-state-name = "pc"; @@ -431,8 +433,16 @@ qseecom_mem: qseecom_region { compatible = "shared-dma-pool"; + alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; + reusable; + alignment = <0x0 0x400000>; + size = <0x0 0x1400000>; + }; + + kinfo_mem: debug_kinfo_region { + alloc-ranges = <0x0 0x00000000 0xffffffff 0xffffffff>; + size = <0x0 0x1000>; no-map; - reg = <0x0 0x9e400000 0x0 0x1400000>; }; cdsp_sec_mem: cdsp_sec_regions@9f800000 { @@ -1017,6 +1027,18 @@ reg-names = "lagg-base"; }; + wdog: qcom,wdt@17c10000 { + compatible = "qcom,msm-watchdog"; + reg = <0x17c10000 0x1000>; + reg-names = "wdt-base"; + interrupts = , + ; + qcom,bark-time = <11000>; + qcom,pet-time = <9360>; + qcom,ipi-ping; + qcom,wakeup-enable; + }; + cpu_pmu: cpu-pmu { compatible = "arm,armv8-pmuv3"; qcom,irq-is-percpu; @@ -1272,14 +1294,12 @@ compatible = "qcom,ufshc"; reg = <0x1d84000 0x3000>, <0x1d90000 0x8000>; - reg-names = "ufs_mem", "ufs_ice"; + reg-names = "ufs_mem", "ice"; interrupts = ; phys = <&ufsphy_mem>; phy-names = "ufsphy"; #reset-cells = <1>; - qcom,ice-use-hwkm; - lanes-per-direction = <1>; limit-phy-submode = <0>; dev-ref-clk-freq = <0>; /* 19.2 MHz */ @@ -1399,7 +1419,7 @@ sdhc_1: sdhci@7c4000 { compatible = "qcom,sdhci-msm-v5"; reg = <0x7c4000 0x1000>, <0x7c5000 0x1000>, <0x7C8000 0x8000>; - reg-names = "hc", "cqhci", "cqhci_ice"; + reg-names = "hc", "cqhci", "ice"; interrupts = , ; @@ -1444,7 +1464,6 @@ nvmem-cells = <&boot_config>; nvmem-cell-names = "boot_conf"; boot_device_type = <0x0>; - qcom,ice-use-hwkm; cap-mmc-hw-reset; @@ -1611,6 +1630,16 @@ qcom,no-nvmem-cell-support; }; + restart@c264000 { + compatible = "qcom,pshold"; + reg = <0xc264000 0x1000>; + }; + + tcsr: syscon@1fc0000 { + compatible = "syscon"; + reg = <0x1fc0000 0x30000>; + }; + qcom,chd { compatible = "qcom,core-hang-detect"; label = "core"; @@ -1645,17 +1674,71 @@ qcom,vmid = <3>; }; + google,debug-kinfo { + compatible = "google,debug-kinfo"; + memory-region = <&kinfo_mem>; + }; + mini_dump_mode { compatible = "qcom,minidump"; status = "ok"; }; + vendor_hooks: qcom,cpu-vendor-hooks { + compatible = "qcom,cpu-vendor-hooks"; + }; + + logbuf: qcom,logbuf-vendor-hooks { + compatible = "qcom,logbuf-vendor-hooks"; + }; + va_mini_dump { compatible = "qcom,va-minidump"; memory-region = <&va_md_mem>; status = "ok"; }; + qcom_qseecom: qseecom@86d00000 { + compatible = "qcom,qseecom"; + reg = <0x86d00000 0xe00000>; + reg-names = "secapp-region"; + memory-region = <&qseecom_mem>; + qseecom_mem = <&qseecom_mem>; + qseecom_ta_mem = <&qseecom_ta_mem>; + user_contig_mem = <&user_contig_mem>; + qcom,hlos-num-ce-hw-instances = <1>; + qcom,hlos-ce-hw-instance = <0>; + qcom,qsee-ce-hw-instance = <0>; + qcom,disk-encrypt-pipe-pair = <2>; + qcom,support-fde; + qcom,no-clock-support; + qcom,fde-key-size; + qcom,appsbl-qseecom-support; + qcom,commonlib64-loaded-by-uefi; + qcom,qsee-reentrancy-support = <2>; + }; + + qcom_smcinvoke: smcinvoke@86d00000 { + compatible = "qcom,smcinvoke"; + reg = <0x86d00000 0xe00000>; + reg-names = "secapp-region"; + }; + + qcom_rng: qrng@793000 { + compatible = "qcom,msm-rng"; + reg = <0x793000 0x1000>; + qcom,msm-rng-iface-clk; + qcom,no-qrng-config; + interconnect-names = "data_path"; + interconnects = <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_PRNG>; + clock-names = "km_clk_src"; + clocks = <&gcc GCC_PRNG_AHB_CLK>; + }; + + qtee_shmbridge { + compatible = "qcom,tee-shared-memory-bridge"; + }; + qcom_tzlog: tz-log@146aa720 { compatible = "qcom,tz-log"; reg = <0x146aa720 0x3000>; @@ -1698,6 +1781,256 @@ wakeup-parent = <&pdc>; }; + mem_dump { + compatible = "qcom,mem-dump"; + memory-region = <&dump_mem>; + + c0_context { + qcom,dump-size = <0x800>; + qcom,dump-id = <0x0>; + }; + + c100_context { + qcom,dump-size = <0x800>; + qcom,dump-id = <0x1>; + }; + + c200_context { + qcom,dump-size = <0x800>; + qcom,dump-id = <0x2>; + }; + + c300_context { + qcom,dump-size = <0x800>; + qcom,dump-id = <0x3>; + }; + + c400_context { + qcom,dump-size = <0x800>; + qcom,dump-id = <0x4>; + }; + + c500_context { + qcom,dump-size = <0x800>; + qcom,dump-id = <0x5>; + }; + + c600_context { + qcom,dump-size = <0x800>; + qcom,dump-id = <0x6>; + }; + + c700_context { + qcom,dump-size = <0x800>; + qcom,dump-id = <0x7>; + }; + + rpmh { + qcom,dump-size = <0x2000000>; + qcom,dump-id = <0xec>; + }; + + rpm_sw { + qcom,dump-size = <0x28000>; + qcom,dump-id = <0xea>; + }; + + pmic { + qcom,dump-size = <0x10000>; + qcom,dump-id = <0xe4>; + }; + + fcm { + qcom,dump-size = <0x8400>; + qcom,dump-id = <0xee>; + }; + + tmc_etf { + qcom,dump-size = <0x8000>; + qcom,dump-id = <0xf0>; + }; + + etf_swao { + qcom,dump-size = <0x8000>; + qcom,dump-id = <0xf1>; + }; + + etr_reg { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0x100>; + }; + + etf_reg { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0x101>; + }; + + etfswao_reg { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0x102>; + }; + + misc_data { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0xe8>; + }; + + l1_icache0 { + qcom,dump-size = <0x8800>; + qcom,dump-id = <0x60>; + }; + + l1_icache100 { + qcom,dump-size = <0x8800>; + qcom,dump-id = <0x61>; + }; + + l1_icache200 { + qcom,dump-size = <0x8800>; + qcom,dump-id = <0x62>; + }; + + l1_icache300 { + qcom,dump-size = <0x8800>; + qcom,dump-id = <0x63>; + }; + + l1_icache400 { + qcom,dump-size = <0x8800>; + qcom,dump-id = <0x64>; + }; + + l1_icache500 { + qcom,dump-size = <0x8800>; + qcom,dump-id = <0x65>; + }; + + l1_icache600 { + qcom,dump-size = <0x11000>; + qcom,dump-id = <0x66>; + }; + + l1_icache700 { + qcom,dump-size = <0x11000>; + qcom,dump-id = <0x67>; + }; + + l1_dcache0 { + qcom,dump-size = <0x9000>; + qcom,dump-id = <0x80>; + }; + + l1_dcache100 { + qcom,dump-size = <0x9000>; + qcom,dump-id = <0x81>; + }; + + l1_dcache200 { + qcom,dump-size = <0x9000>; + qcom,dump-id = <0x82>; + }; + + l1_dcache300 { + qcom,dump-size = <0x9000>; + qcom,dump-id = <0x83>; + }; + + l1_dcache400 { + qcom,dump-size = <0x9000>; + qcom,dump-id = <0x84>; + }; + + l1_dcache500 { + qcom,dump-size = <0x9000>; + qcom,dump-id = <0x85>; + }; + + l1_dcache600 { + qcom,dump-size = <0x12000>; + qcom,dump-id = <0x86>; + }; + + l1_dcache700 { + qcom,dump-size = <0x12000>; + qcom,dump-id = <0x87>; + }; + + l1_itlb600 { + qcom,dump-size = <0x300>; + qcom,dump-id = <0x26>; + }; + + l1_itlb700 { + qcom,dump-size = <0x300>; + qcom,dump-id = <0x27>; + }; + + l1_dtlb600 { + qcom,dump-size = <0x480>; + qcom,dump-id = <0x46>; + }; + + l1_dtlb700 { + qcom,dump-size = <0x480>; + qcom,dump-id = <0x47>; + }; + + l2_cache600 { + qcom,dump-size = <0x48000>; + qcom,dump-id = <0xc6>; + }; + + l2_cache700 { + qcom,dump-size = <0x48000>; + qcom,dump-id = <0xc7>; + }; + + l2_tlb0 { + qcom,dump-size = <0x5000>; + qcom,dump-id = <0x120>; + }; + + l2_tlb100 { + qcom,dump-size = <0x5000>; + qcom,dump-id = <0x121>; + }; + + l2_tlb200 { + qcom,dump-size = <0x5000>; + qcom,dump-id = <0x122>; + }; + + l2_tlb300 { + qcom,dump-size = <0x5000>; + qcom,dump-id = <0x123>; + }; + + l2_tlb400 { + qcom,dump-size = <0x5000>; + qcom,dump-id = <0x124>; + }; + + l2_tlb500 { + qcom,dump-size = <0x5000>; + qcom,dump-id = <0x125>; + }; + + l2_tlb600 { + qcom,dump-size = <0x7800>; + qcom,dump-id = <0x126>; + }; + + l2_tlb700 { + qcom,dump-size = <0x7800>; + qcom,dump-id = <0x127>; + }; + + llcc1_d_cache { + qcom,dump-size = <0x6c000>; + qcom,dump-id = <0x140>; + }; + }; + apss_shared: mailbox@17c00000 { compatible = "qcom,sm8150-apss-shared"; reg = <0x17c00000 0x1000>; @@ -2139,5 +2472,6 @@ &firmware { qcom_scm { compatible = "qcom,scm"; + qcom,dload-mode = <&tcsr 0x13000>; }; }; diff --git a/qcom/sun-atp-overlay.dts b/qcom/sun-atp-overlay.dts index c521d397..6fd79f89 100644 --- a/qcom/sun-atp-overlay.dts +++ b/qcom/sun-atp-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ /dts-v1/; @@ -14,6 +14,9 @@ "qcom,atp"; qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>, <0x100026a 0x10000>, <0x100026a 0x20000>, - <0x100027f 0x10000>, <0x100027f 0x20000>; + <0x100027f 0x10000>, <0x100027f 0x20000>, + <705 0x10000>, <705 0x20000>, <706 0x10000>, <706 0x20000>, + <0x10002c1 0x10000>, <0x10002c1 0x20000>, + <0x10002c2 0x10000>, <0x10002c2 0x20000>; qcom,board-id = <0x10021 0>; }; diff --git a/qcom/sun-cdp-kiwi-overlay.dts b/qcom/sun-cdp-kiwi-overlay.dts index 433c2812..4b4cbd58 100644 --- a/qcom/sun-cdp-kiwi-overlay.dts +++ b/qcom/sun-cdp-kiwi-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ /dts-v1/; @@ -14,6 +14,9 @@ "qcom,cdp"; qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>, <0x100026a 0x10000>, <0x100026a 0x20000>, - <0x100027f 0x10000>, <0x100027f 0x20000>; + <0x100027f 0x10000>, <0x100027f 0x20000>, + <705 0x10000>, <705 0x20000>, <706 0x10000>, <706 0x20000>, + <0x10002c1 0x10000>, <0x10002c1 0x20000>, + <0x10002c2 0x10000>, <0x10002c2 0x20000>; qcom,board-id = <0x20001 0>; }; diff --git a/qcom/sun-cdp-kiwi-v8-overlay.dts b/qcom/sun-cdp-kiwi-v8-overlay.dts index 0e77c536..dab6b004 100644 --- a/qcom/sun-cdp-kiwi-v8-overlay.dts +++ b/qcom/sun-cdp-kiwi-v8-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ /dts-v1/; @@ -14,6 +14,9 @@ "qcom,cdp"; qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>, <0x100026a 0x10000>, <0x100026a 0x20000>, - <0x100027f 0x10000>, <0x100027f 0x20000>; + <0x100027f 0x10000>, <0x100027f 0x20000>, + <705 0x10000>, <705 0x20000>, <706 0x10000>, <706 0x20000>, + <0x10002c1 0x10000>, <0x10002c1 0x20000>, + <0x10002c2 0x10000>, <0x10002c2 0x20000>; qcom,board-id = <0x60001 0>; }; diff --git a/qcom/sun-cdp-overlay.dts b/qcom/sun-cdp-overlay.dts index 4ba26c03..a3b9acab 100644 --- a/qcom/sun-cdp-overlay.dts +++ b/qcom/sun-cdp-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ /dts-v1/; @@ -14,6 +14,9 @@ "qcom,cdp"; qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>, <0x100026a 0x10000>, <0x100026a 0x20000>, - <0x100027f 0x10000>, <0x100027f 0x20000>; + <0x100027f 0x10000>, <0x100027f 0x20000>, + <705 0x10000>, <705 0x20000>, <706 0x10000>, <706 0x20000>, + <0x10002c1 0x10000>, <0x10002c1 0x20000>, + <0x10002c2 0x10000>, <0x10002c2 0x20000>; qcom,board-id = <1 0>; }; diff --git a/qcom/sun-cdp-v8-overlay.dts b/qcom/sun-cdp-v8-overlay.dts index 02f6685d..022dbc68 100644 --- a/qcom/sun-cdp-v8-overlay.dts +++ b/qcom/sun-cdp-v8-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ /dts-v1/; @@ -14,6 +14,9 @@ "qcom,cdp"; qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>, <0x100026a 0x10000>, <0x100026a 0x20000>, - <0x100027f 0x10000>, <0x100027f 0x20000>; + <0x100027f 0x10000>, <0x100027f 0x20000>, + <705 0x10000>, <705 0x20000>, <706 0x10000>, <706 0x20000>, + <0x10002c1 0x10000>, <0x10002c1 0x20000>, + <0x10002c2 0x10000>, <0x10002c2 0x20000>; qcom,board-id = <0x50001 0>; }; diff --git a/qcom/sun-mtp-kiwi-overlay.dts b/qcom/sun-mtp-kiwi-overlay.dts index d5444429..6090b8c6 100644 --- a/qcom/sun-mtp-kiwi-overlay.dts +++ b/qcom/sun-mtp-kiwi-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ /dts-v1/; @@ -14,6 +14,9 @@ "qcom,mtp"; qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>, <0x100026a 0x10000>, <0x100026a 0x20000>, - <0x100027f 0x10000>, <0x100027f 0x20000>; + <0x100027f 0x10000>, <0x100027f 0x20000>, + <705 0x10000>, <705 0x20000>, <706 0x10000>, <706 0x20000>, + <0x10002c1 0x10000>, <0x10002c1 0x20000>, + <0x10002c2 0x10000>, <0x10002c2 0x20000>; qcom,board-id = <0x20008 0>; }; diff --git a/qcom/sun-mtp-kiwi-v8-overlay.dts b/qcom/sun-mtp-kiwi-v8-overlay.dts index dfaf396c..e7b02b72 100644 --- a/qcom/sun-mtp-kiwi-v8-overlay.dts +++ b/qcom/sun-mtp-kiwi-v8-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ /dts-v1/; @@ -14,6 +14,9 @@ "qcom,mtp"; qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>, <0x100026a 0x10000>, <0x100026a 0x20000>, - <0x100027f 0x10000>, <0x100027f 0x20000>; + <0x100027f 0x10000>, <0x100027f 0x20000>, + <705 0x10000>, <705 0x20000>, <706 0x10000>, <706 0x20000>, + <0x10002c1 0x10000>, <0x10002c1 0x20000>, + <0x10002c2 0x10000>, <0x10002c2 0x20000>; qcom,board-id = <0x50008 0>; }; diff --git a/qcom/sun-mtp-overlay.dts b/qcom/sun-mtp-overlay.dts index 8da7d8eb..f8d49283 100644 --- a/qcom/sun-mtp-overlay.dts +++ b/qcom/sun-mtp-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ /dts-v1/; @@ -14,6 +14,9 @@ "qcom,mtp"; qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>, <0x100026a 0x10000>, <0x100026a 0x20000>, - <0x100027f 0x10000>, <0x100027f 0x20000>; + <0x100027f 0x10000>, <0x100027f 0x20000>, + <705 0x10000>, <705 0x20000>, <706 0x10000>, <706 0x20000>, + <0x10002c1 0x10000>, <0x10002c1 0x20000>, + <0x10002c2 0x10000>, <0x10002c2 0x20000>; qcom,board-id = <8 0>; }; diff --git a/qcom/sun-mtp-v8-overlay.dts b/qcom/sun-mtp-v8-overlay.dts index 82baf63c..61754f34 100644 --- a/qcom/sun-mtp-v8-overlay.dts +++ b/qcom/sun-mtp-v8-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ /dts-v1/; @@ -14,6 +14,9 @@ "qcom,mtp"; qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>, <0x100026a 0x10000>, <0x100026a 0x20000>, - <0x100027f 0x10000>, <0x100027f 0x20000>; + <0x100027f 0x10000>, <0x100027f 0x20000>, + <705 0x10000>, <705 0x20000>, <706 0x10000>, <706 0x20000>, + <0x10002c1 0x10000>, <0x10002c1 0x20000>, + <0x10002c2 0x10000>, <0x10002c2 0x20000>; qcom,board-id = <0x40008 0>; }; diff --git a/qcom/sun-rcm-overlay.dts b/qcom/sun-rcm-overlay.dts index b5d3a092..81cab23c 100644 --- a/qcom/sun-rcm-overlay.dts +++ b/qcom/sun-rcm-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ /dts-v1/; @@ -10,9 +10,12 @@ / { model = "Qualcomm Technologies, Inc. Sun RCM"; - compatible = "qcom,sun-rcm", "qcom,sun", "qcom,sunp", "qcom,rcm"; + compatible = "qcom,sun-rcm", "qcom,sun", "qcom,sunp", "qcom,sunp-rcm", "qcom,rcm"; qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>, <0x100026a 0x10000>, <0x100026a 0x20000>, - <0x100027f 0x10000>, <0x100027f 0x20000>; + <0x100027f 0x10000>, <0x100027f 0x20000>, + <705 0x10000>, <705 0x20000>, <706 0x10000>, <706 0x20000>, + <0x10002c1 0x10000>, <0x10002c1 0x20000>, + <0x10002c2 0x10000>, <0x10002c2 0x20000>; qcom,board-id = <0x15 0>; }; diff --git a/qcom/sun.dtsi b/qcom/sun.dtsi index b7afac02..364c49fd 100644 --- a/qcom/sun.dtsi +++ b/qcom/sun.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023-2025, Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ #include @@ -952,6 +952,10 @@ qcom,vmid = <3>; }; + qcom,dmof { + compatible = "qcom,dmof"; + }; + qcom,mem-buf-msgq { compatible = "qcom,mem-buf-msgq"; qcom,msgq-names = "trusted_vm", "oem_vm"; diff --git a/qcom/sunp-hdk-overlay.dts b/qcom/sunp-hdk-overlay.dts index 8cbe9274..dd5a1e11 100644 --- a/qcom/sunp-hdk-overlay.dts +++ b/qcom/sunp-hdk-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ /dts-v1/; @@ -13,6 +13,9 @@ compatible = "qcom,sunp-hdk", "qcom,sunp", "qcom,hdk"; qcom,msm-id = <639 0x10000>, <639 0x20000>, <618 0x10000>, <618 0x20000>, <0x100026a 0x10000>, <0x100026a 0x20000>, - <0x100027f 0x10000>, <0x100027f 0x20000>; + <0x100027f 0x10000>, <0x100027f 0x20000>, + <705 0x10000>, <705 0x20000>, <706 0x10000>, <706 0x20000>, + <0x10002c1 0x10000>, <0x10002c1 0x20000>, + <0x10002c2 0x10000>, <0x10002c2 0x20000>; qcom,board-id = <0x1001f 0>; }; diff --git a/qcom/sunp-v2.dtsi b/qcom/sunp-v2.dtsi index 0809f16c..f4f46004 100644 --- a/qcom/sunp-v2.dtsi +++ b/qcom/sunp-v2.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ #include "sun-v2.dtsi" @@ -8,5 +8,5 @@ / { model = "Qualcomm Technologies, Inc. SunP v2 SoC"; compatible = "qcom,sunp"; - qcom,msm-id = <639 0x20000>; + qcom,msm-id = <639 0x20000>, <705 0x10000>, <706 0x10000>; }; diff --git a/qcom/sunp.dtsi b/qcom/sunp.dtsi index fec5362e..989a38bd 100644 --- a/qcom/sunp.dtsi +++ b/qcom/sunp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ #include "sun.dtsi" @@ -8,5 +8,5 @@ / { model = "Qualcomm Technologies, Inc. SunP SoC"; compatible = "qcom,sunp"; - qcom,msm-id = <639 0x10000>; + qcom,msm-id = <639 0x10000>, <705 0x10000>, <706 0x10000>; }; diff --git a/qcom/waipio-vm.dtsi b/qcom/waipio-vm.dtsi index cf746ca9..0286ec66 100644 --- a/qcom/waipio-vm.dtsi +++ b/qcom/waipio-vm.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ #include @@ -77,6 +77,29 @@ gunyah-label = <3>; }; + dmesg-dump { + compatible = "qcom,dmesg-dump"; + gunyah-label = <7>; + ddump-pubkey-size = <270>; + ddump-pubkey = /bits/ 8 <0x30 0x82 0x01 0x0a 0x02 0x82 0x01 0x01 0x00 0xe6 0x4b 0x31 0x82 0x61 0x14 0xf2 + 0xbe 0xd1 0xe4 0xde 0xe7 0xed 0xba 0x8f 0x3b 0x23 0x5f 0x7a 0xb8 0x16 0x40 0x96 + 0xae 0x77 0x5e 0x1b 0xf0 0x3f 0x39 0xab 0x69 0x90 0xb1 0xd4 0x70 0xcb 0x66 0xbc + 0x41 0x08 0x1d 0x37 0xdb 0x49 0xc8 0x49 0x5b 0x99 0x5c 0x32 0xbe 0x62 0xd5 0xa7 + 0x3c 0x0f 0xa4 0x4b 0x43 0x49 0xdb 0x54 0x69 0x06 0x0c 0xe5 0x99 0xe5 0xf9 0x1e + 0x25 0x84 0x17 0x47 0x62 0x2b 0x5d 0x0d 0xec 0x5e 0xc6 0xb5 0x86 0xb9 0x75 0x6d + 0xfe 0x7d 0x35 0x4f 0x35 0xc1 0x48 0x10 0x75 0x4c 0x57 0x6b 0x46 0x4b 0xff 0x5b + 0x52 0x22 0x40 0x2c 0xb0 0x47 0xe1 0x47 0xc4 0xe5 0x47 0x0c 0x56 0xe8 0x17 0xd0 + 0x7e 0xc3 0x4d 0x9f 0xea 0xd0 0xea 0x87 0xe5 0x51 0x39 0xe8 0x45 0x4c 0x54 0x27 + 0x9c 0x50 0x38 0xb7 0x72 0x93 0x12 0x0b 0xa1 0x2f 0x9e 0x04 0x92 0x20 0x6e 0x31 + 0x42 0x87 0xe1 0xfe 0x88 0x3f 0xe5 0x09 0xe1 0xf9 0xbe 0x44 0xc6 0xbf 0x10 0x79 + 0x36 0x47 0x7b 0xa0 0x8e 0x27 0x31 0xa3 0x70 0x69 0x01 0x54 0x92 0xf4 0x42 0xbd + 0xcd 0x7e 0x79 0x2b 0x2c 0xe1 0xd4 0xba 0x6e 0x34 0xc6 0xe6 0xc6 0x5c 0x63 0xd0 + 0x7f 0x39 0x1f 0xe8 0x8d 0x67 0xe6 0x27 0x67 0x0d 0x16 0x57 0x94 0xd1 0xfb 0xdf + 0xce 0xaf 0xfd 0x43 0xb3 0xbe 0x5d 0x83 0x4b 0x93 0x05 0xe8 0xdf 0x04 0xad 0xac + 0xeb 0xa6 0x81 0xa7 0xd5 0x04 0x63 0xbf 0x83 0xb8 0x0c 0xbc 0x20 0x18 0xb5 0x50 + 0xd7 0x61 0x84 0x11 0xca 0x2d 0x22 0xb3 0x29 0x02 0x03 0x01 0x00 0x01>; + }; + qcom,vm-config { compatible = "qcom,vm-1.0"; vm-type = "aarch64-guest";