From 5f856322e0bffd0a352d3099602548687bb0db70 Mon Sep 17 00:00:00 2001 From: Saranya R Date: Mon, 26 May 2025 10:33:48 +0530 Subject: [PATCH 1/6] ARM: dts: msm: Add support for parrot lite SoC Add support for parrot lite SoC. Change-Id: Ia1ac3d8b82b1420e9818de48c673f314c14c28a2 Signed-off-by: Saranya R --- qcom/Makefile | 2 +- qcom/parrot-atp-overlay.dts | 5 +++-- qcom/parrot-idp-nopmi-overlay.dts | 5 +++-- qcom/parrot-idp-overlay.dts | 5 +++-- qcom/parrot-idp-pm8350b-overlay.dts | 5 +++-- qcom/parrot-idp-wcn3990-amoled-rcm-overlay.dts | 5 +++-- qcom/parrot-idp-wcn3990-overlay.dts | 5 +++-- qcom/parrot-idp-wcn6750-amoled-overlay.dts | 4 ++-- qcom/parrot-idp-wcn6750-amoled-rcm-overlay.dts | 5 +++-- qcom/parrot-idp-wcn6755-amoled-rcm-overlay.dts | 5 +++-- qcom/parrot-idp-wcn6755-nopmi-overlay.dts | 5 +++-- qcom/parrot-idp-wcn6755-overlay.dts | 5 +++-- qcom/parrot-idp-wcn6755-pm8350b-overlay.dts | 5 +++-- qcom/parrot-lite.dts | 14 ++++++++++++++ qcom/parrot-lite.dtsi | 12 ++++++++++++ qcom/parrot-qrd-nopmi-overlay.dts | 5 +++-- qcom/parrot-qrd-overlay.dts | 5 +++-- qcom/parrot-qrd-pm8350b-overlay.dts | 5 +++-- qcom/parrot-qrd-wcn6750-overlay.dts | 5 +++-- qcom/parrot-qrd-wcn6755-overlay.dts | 5 +++-- qcom/parrot-vm.dtsi | 4 ++-- qcom/platform_map.bzl | 1 + 22 files changed, 80 insertions(+), 37 deletions(-) create mode 100644 qcom/parrot-lite.dts create mode 100644 qcom/parrot-lite.dtsi diff --git a/qcom/Makefile b/qcom/Makefile index 5b4a02d5..1d11d87c 100644 --- a/qcom/Makefile +++ b/qcom/Makefile @@ -146,7 +146,7 @@ pineapple-dtb-$(CONFIG_ARCH_PINEAPPLE) += \ pineapple-overlays-dtb-$(CONFIG_ARCH_PINEAPPLE) += $(PINEAPPLE_BOARDS) $(NOAPQ_PINEAPPLE_BOARDS) $(PINEAPPLE_BASE_DTB) $(PINEAPPLE_APQ_BASE_DTB) dtb-y += $(pineapple-dtb-y) -PARROT_BASE_DTB += parrot.dtb parrotp.dtb parrot-sg.dtb parrotp-sg.dtb +PARROT_BASE_DTB += parrot.dtb parrotp.dtb parrot-sg.dtb parrotp-sg.dtb parrot-lite.dtb PARROT_4GB_BASE_DTB += parrot-4gb.dtb PARROT_BOARDS += \ diff --git a/qcom/parrot-atp-overlay.dts b/qcom/parrot-atp-overlay.dts index 400353a4..5a5f2eef 100644 --- a/qcom/parrot-atp-overlay.dts +++ b/qcom/parrot-atp-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ /dts-v1/; @@ -13,6 +13,7 @@ compatible = "qcom,parrot-atp", "qcom,parrot", "qcom,atp"; qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>, <633 0x10000>, <634 0x10000>, <638 0x10000>, - <663 0x10000>, <713 0x10000>, <714 0x10000>; + <663 0x10000>, <713 0x10000>, <714 0x10000>, + <715 0x10000>; qcom,board-id = <33 0>; }; diff --git a/qcom/parrot-idp-nopmi-overlay.dts b/qcom/parrot-idp-nopmi-overlay.dts index e627265c..4165330c 100644 --- a/qcom/parrot-idp-nopmi-overlay.dts +++ b/qcom/parrot-idp-nopmi-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ /dts-v1/; @@ -13,7 +13,8 @@ compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp"; qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>, <633 0x10000>, <634 0x10000>, <638 0x10000>, - <663 0x10000>, <713 0x10000>, <714 0x10000>; + <663 0x10000>, <713 0x10000>, <714 0x10000>, + <715 0x10000>; qcom,board-id = <34 0>; qcom,pmic-id-size = <9>; qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>; diff --git a/qcom/parrot-idp-overlay.dts b/qcom/parrot-idp-overlay.dts index fe2e4ae0..f01decbe 100644 --- a/qcom/parrot-idp-overlay.dts +++ b/qcom/parrot-idp-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ /dts-v1/; @@ -14,6 +14,7 @@ compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp"; qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>, <633 0x10000>, <634 0x10000>, <638 0x10000>, - <663 0x10000>, <713 0x10000>, <714 0x10000>; + <663 0x10000>, <713 0x10000>, <714 0x10000>, + <715 0x10000>; qcom,board-id = <34 0>; }; diff --git a/qcom/parrot-idp-pm8350b-overlay.dts b/qcom/parrot-idp-pm8350b-overlay.dts index 6e830354..14f9d6a1 100644 --- a/qcom/parrot-idp-pm8350b-overlay.dts +++ b/qcom/parrot-idp-pm8350b-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ /dts-v1/; @@ -14,6 +14,7 @@ compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp"; qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>, <633 0x10000>, <634 0x10000>, <638 0x10000>, - <663 0x10000>, <713 0x10000>, <714 0x10000>; + <663 0x10000>, <713 0x10000>, <714 0x10000>, + <715 0x10000>; qcom,board-id = <34 0>; }; diff --git a/qcom/parrot-idp-wcn3990-amoled-rcm-overlay.dts b/qcom/parrot-idp-wcn3990-amoled-rcm-overlay.dts index f4fc571e..264b8323 100644 --- a/qcom/parrot-idp-wcn3990-amoled-rcm-overlay.dts +++ b/qcom/parrot-idp-wcn3990-amoled-rcm-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ /dts-v1/; @@ -14,6 +14,7 @@ compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp"; qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>, <633 0x10000>, <634 0x10000>, <638 0x10000>, - <663 0x10000>, <713 0x10000>, <714 0x10000>; + <663 0x10000>, <713 0x10000>, <714 0x10000>, + <715 0x10000>; qcom,board-id = <34 3>; }; diff --git a/qcom/parrot-idp-wcn3990-overlay.dts b/qcom/parrot-idp-wcn3990-overlay.dts index de1fabbf..ebb787db 100644 --- a/qcom/parrot-idp-wcn3990-overlay.dts +++ b/qcom/parrot-idp-wcn3990-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ /dts-v1/; @@ -13,6 +13,7 @@ compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp"; qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>, <633 0x10000>, <634 0x10000>, <638 0x10000>, - <663 0x10000>, <713 0x10000>, <714 0x10000>; + <663 0x10000>, <713 0x10000>, <714 0x10000>, + <715 0x10000>; qcom,board-id = <34 1>; }; diff --git a/qcom/parrot-idp-wcn6750-amoled-overlay.dts b/qcom/parrot-idp-wcn6750-amoled-overlay.dts index 07251a7f..9b2179fb 100644 --- a/qcom/parrot-idp-wcn6750-amoled-overlay.dts +++ b/qcom/parrot-idp-wcn6750-amoled-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ /dts-v1/; @@ -14,6 +14,6 @@ compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp"; qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>, <633 0x10000>, <634 0x10000>, <638 0x10000>, <663 0x10000>, - <713 0x10000>, <714 0x10000>; + <713 0x10000>, <714 0x10000>, <715 0x10000>; qcom,board-id = <34 4>; }; diff --git a/qcom/parrot-idp-wcn6750-amoled-rcm-overlay.dts b/qcom/parrot-idp-wcn6750-amoled-rcm-overlay.dts index 89690a34..48910fd5 100644 --- a/qcom/parrot-idp-wcn6750-amoled-rcm-overlay.dts +++ b/qcom/parrot-idp-wcn6750-amoled-rcm-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ /dts-v1/; @@ -14,6 +14,7 @@ compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp"; qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>, <633 0x10000>, <634 0x10000>, <638 0x10000>, - <663 0x10000>, <713 0x10000>, <714 0x10000>; + <663 0x10000>, <713 0x10000>, <714 0x10000>, + <715 0x10000>; qcom,board-id = <34 2>; }; diff --git a/qcom/parrot-idp-wcn6755-amoled-rcm-overlay.dts b/qcom/parrot-idp-wcn6755-amoled-rcm-overlay.dts index cbec3968..8fbbaa0c 100644 --- a/qcom/parrot-idp-wcn6755-amoled-rcm-overlay.dts +++ b/qcom/parrot-idp-wcn6755-amoled-rcm-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ /dts-v1/; @@ -14,6 +14,7 @@ compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp"; qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>, <633 0x10000>, <634 0x10000>, <638 0x10000>, - <663 0x10000>, <713 0x10000>, <714 0x10000>; + <663 0x10000>, <713 0x10000>, <714 0x10000>, + <715 0x10000>; qcom,board-id = <34 6>; }; diff --git a/qcom/parrot-idp-wcn6755-nopmi-overlay.dts b/qcom/parrot-idp-wcn6755-nopmi-overlay.dts index 4c81bc65..704ddbde 100644 --- a/qcom/parrot-idp-wcn6755-nopmi-overlay.dts +++ b/qcom/parrot-idp-wcn6755-nopmi-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ /dts-v1/; @@ -13,7 +13,8 @@ compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp"; qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>, <633 0x10000>, <634 0x10000>, <638 0x10000>, - <663 0x10000>, <713 0x10000>, <714 0x10000>; + <663 0x10000>, <713 0x10000>, <714 0x10000>, + <715 0x10000>; qcom,board-id = <34 5>; qcom,pmic-id-size = <9>; qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>; diff --git a/qcom/parrot-idp-wcn6755-overlay.dts b/qcom/parrot-idp-wcn6755-overlay.dts index 2df08890..68354023 100644 --- a/qcom/parrot-idp-wcn6755-overlay.dts +++ b/qcom/parrot-idp-wcn6755-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ /dts-v1/; @@ -14,6 +14,7 @@ compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp"; qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>, <633 0x10000>, <634 0x10000>, <638 0x10000>, - <663 0x10000>, <713 0x10000>, <714 0x10000>; + <663 0x10000>, <713 0x10000>, <714 0x10000>, + <715 0x10000>; qcom,board-id = <34 5>; }; diff --git a/qcom/parrot-idp-wcn6755-pm8350b-overlay.dts b/qcom/parrot-idp-wcn6755-pm8350b-overlay.dts index 25f7fbd3..fbd7bbf2 100644 --- a/qcom/parrot-idp-wcn6755-pm8350b-overlay.dts +++ b/qcom/parrot-idp-wcn6755-pm8350b-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ /dts-v1/; @@ -14,6 +14,7 @@ compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp"; qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>, <633 0x10000>, <634 0x10000>, <638 0x10000>, - <663 0x10000>, <713 0x10000>, <714 0x10000>; + <663 0x10000>, <713 0x10000>, <714 0x10000>, + <715 0x10000>; qcom,board-id = <34 5>; }; diff --git a/qcom/parrot-lite.dts b/qcom/parrot-lite.dts new file mode 100644 index 00000000..ade840c7 --- /dev/null +++ b/qcom/parrot-lite.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "parrot-lite.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Parrot Lite"; + compatible = "qcom,parrot"; + qcom,board-id = <0 0>; +}; diff --git a/qcom/parrot-lite.dtsi b/qcom/parrot-lite.dtsi new file mode 100644 index 00000000..c1bcd98b --- /dev/null +++ b/qcom/parrot-lite.dtsi @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "parrot.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Parrot Lite"; + compatible = "qcom,parrot"; + qcom,msm-id = <715 0x10000>; +}; diff --git a/qcom/parrot-qrd-nopmi-overlay.dts b/qcom/parrot-qrd-nopmi-overlay.dts index c2d3816e..9ea73a7c 100644 --- a/qcom/parrot-qrd-nopmi-overlay.dts +++ b/qcom/parrot-qrd-nopmi-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ /dts-v1/; @@ -13,7 +13,8 @@ compatible = "qcom,parrot-qrd", "qcom,parrot", "qcom,qrd"; qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>, <633 0x10000>, <634 0x10000>, <638 0x10000>, - <663 0x10000>, <713 0x10000>, <714 0x10000>; + <663 0x10000>, <713 0x10000>, <714 0x10000>, + <715 0x10000>; qcom,board-id = <0x1000B 0>; qcom,pmic-id-size = <9>; qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>; diff --git a/qcom/parrot-qrd-overlay.dts b/qcom/parrot-qrd-overlay.dts index f4c5e6db..909e23f5 100644 --- a/qcom/parrot-qrd-overlay.dts +++ b/qcom/parrot-qrd-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ /dts-v1/; @@ -14,6 +14,7 @@ compatible = "qcom,parrot-qrd", "qcom,parrot", "qcom,qrd"; qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>, <633 0x10000>, <634 0x10000>, <638 0x10000>, - <663 0x10000>, <713 0x10000>, <714 0x10000>; + <663 0x10000>, <713 0x10000>, <714 0x10000>, + <715 0x10000>; qcom,board-id = <0x1000B 0>; }; diff --git a/qcom/parrot-qrd-pm8350b-overlay.dts b/qcom/parrot-qrd-pm8350b-overlay.dts index d3506670..b40af340 100644 --- a/qcom/parrot-qrd-pm8350b-overlay.dts +++ b/qcom/parrot-qrd-pm8350b-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ /dts-v1/; @@ -14,6 +14,7 @@ compatible = "qcom,parrot-qrd", "qcom,parrot", "qcom,qrd"; qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>, <633 0x10000>, <634 0x10000>, <638 0x10000>, - <663 0x10000>, <713 0x10000>, <714 0x10000>; + <663 0x10000>, <713 0x10000>, <714 0x10000>, + <715 0x10000>; qcom,board-id = <0x1000B 0>; }; diff --git a/qcom/parrot-qrd-wcn6750-overlay.dts b/qcom/parrot-qrd-wcn6750-overlay.dts index b6549e86..ed867d86 100644 --- a/qcom/parrot-qrd-wcn6750-overlay.dts +++ b/qcom/parrot-qrd-wcn6750-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ /dts-v1/; @@ -14,6 +14,7 @@ compatible = "qcom,parrot-qrd", "qcom,parrot", "qcom,qrd"; qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>, <633 0x10000>, <634 0x10000>, <638 0x10000>, - <663 0x10000>, <713 0x10000>, <714 0x10000>; + <663 0x10000>, <713 0x10000>, <714 0x10000>, + <715 0x10000>; qcom,board-id = <0x1000B 1>; }; diff --git a/qcom/parrot-qrd-wcn6755-overlay.dts b/qcom/parrot-qrd-wcn6755-overlay.dts index 27cf3581..82c5361a 100644 --- a/qcom/parrot-qrd-wcn6755-overlay.dts +++ b/qcom/parrot-qrd-wcn6755-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ /dts-v1/; @@ -14,6 +14,7 @@ compatible = "qcom,parrot-qrd", "qcom,parrot", "qcom,qrd"; qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>, <633 0x10000>, <634 0x10000>, <638 0x10000>, - <663 0x10000>, <713 0x10000>, <714 0x10000>; + <663 0x10000>, <713 0x10000>, <714 0x10000>, + <715 0x10000>; qcom,board-id = <0x1000B 2>; }; diff --git a/qcom/parrot-vm.dtsi b/qcom/parrot-vm.dtsi index 328f10b2..ae129a9c 100644 --- a/qcom/parrot-vm.dtsi +++ b/qcom/parrot-vm.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ #include "waipio-vm.dtsi" @@ -9,7 +9,7 @@ / { qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>, <633 0x10000>, <634 0x10000>, <638 0x10000>, <663 0x10000>, - <713 0x10000>, <714 0x10000>; + <713 0x10000>, <714 0x10000>, <715 0x10000>; interrupt-parent = <&vgic>; qcom,vm-config { diff --git a/qcom/platform_map.bzl b/qcom/platform_map.bzl index cc178a00..d4ad5d60 100644 --- a/qcom/platform_map.bzl +++ b/qcom/platform_map.bzl @@ -475,6 +475,7 @@ _platform_map = { {"name": "parrot-sg.dtb"}, {"name": "parrotp-sg.dtb"}, {"name": "parrot-4gb.dtb"}, + {"name": "parrot-lite.dtb"}, {"name": "ravelin.dtb"}, {"name": "ravelinp.dtb"}, {"name": "ravelin-4gb.dtb"}, From c931e8c91b6220965c918a339ee9733b3b94d0f1 Mon Sep 17 00:00:00 2001 From: Kavya Nunna Date: Fri, 28 Mar 2025 11:08:53 +0530 Subject: [PATCH 2/6] ARM: dts: msm: Update S3B min voltage to 0.75v for tuna Update S3B min voltage to 0.75v to optimize power as per the WLAN requirements for tuna. Change-Id: I69e2306f53b22b8244f781b4892f79ae448ca448 Signed-off-by: Kavya Nunna --- qcom/tuna-regulators.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/qcom/tuna-regulators.dtsi b/qcom/tuna-regulators.dtsi index 99caf721..66628ed4 100644 --- a/qcom/tuna-regulators.dtsi +++ b/qcom/tuna-regulators.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024-2025, Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ #include @@ -44,7 +44,7 @@ S3B: pmxr2230_s3: vreg-pmxr2230-s3 { regulator-name = "pmxr2230_s3"; qcom,set = ; - regulator-min-microvolt = <864000>; + regulator-min-microvolt = <750000>; regulator-max-microvolt = <1040000>; qcom,init-voltage = <952000>; }; From f7b8fb4932a2821324ab7b5e9b674083d39d3d5e Mon Sep 17 00:00:00 2001 From: Swetha Chikkaboraiah Date: Mon, 23 Jun 2025 11:32:19 +0530 Subject: [PATCH 3/6] ARM: dts: msm: Move dmesg dumper to parrot-vm dmesg dumper is compatible with new TZ version and only parrot supports new TZ. So move dmesg dumper from waipio to parrot dt files. Change-Id: I85a87f7105849457a4899b790de420e1b479de28 Signed-off-by: Swetha Chikkaboraiah --- qcom/parrot-vm.dtsi | 24 ++++++++++++++++++++++++ qcom/waipio-vm.dtsi | 23 ----------------------- 2 files changed, 24 insertions(+), 23 deletions(-) diff --git a/qcom/parrot-vm.dtsi b/qcom/parrot-vm.dtsi index 031d5596..abc71675 100644 --- a/qcom/parrot-vm.dtsi +++ b/qcom/parrot-vm.dtsi @@ -56,6 +56,30 @@ }; }; }; + + dmesg-dump { + compatible = "qcom,dmesg-dump"; + gunyah-label = <7>; + ddump-pubkey-size = <270>; + ddump-pubkey = /bits/ 8 <0x30 0x82 0x01 0x0a 0x02 0x82 0x01 0x01 0x00 0xe6 0x4b 0x31 0x82 0x61 0x14 0xf2 + 0xbe 0xd1 0xe4 0xde 0xe7 0xed 0xba 0x8f 0x3b 0x23 0x5f 0x7a 0xb8 0x16 0x40 0x96 + 0xae 0x77 0x5e 0x1b 0xf0 0x3f 0x39 0xab 0x69 0x90 0xb1 0xd4 0x70 0xcb 0x66 0xbc + 0x41 0x08 0x1d 0x37 0xdb 0x49 0xc8 0x49 0x5b 0x99 0x5c 0x32 0xbe 0x62 0xd5 0xa7 + 0x3c 0x0f 0xa4 0x4b 0x43 0x49 0xdb 0x54 0x69 0x06 0x0c 0xe5 0x99 0xe5 0xf9 0x1e + 0x25 0x84 0x17 0x47 0x62 0x2b 0x5d 0x0d 0xec 0x5e 0xc6 0xb5 0x86 0xb9 0x75 0x6d + 0xfe 0x7d 0x35 0x4f 0x35 0xc1 0x48 0x10 0x75 0x4c 0x57 0x6b 0x46 0x4b 0xff 0x5b + 0x52 0x22 0x40 0x2c 0xb0 0x47 0xe1 0x47 0xc4 0xe5 0x47 0x0c 0x56 0xe8 0x17 0xd0 + 0x7e 0xc3 0x4d 0x9f 0xea 0xd0 0xea 0x87 0xe5 0x51 0x39 0xe8 0x45 0x4c 0x54 0x27 + 0x9c 0x50 0x38 0xb7 0x72 0x93 0x12 0x0b 0xa1 0x2f 0x9e 0x04 0x92 0x20 0x6e 0x31 + 0x42 0x87 0xe1 0xfe 0x88 0x3f 0xe5 0x09 0xe1 0xf9 0xbe 0x44 0xc6 0xbf 0x10 0x79 + 0x36 0x47 0x7b 0xa0 0x8e 0x27 0x31 0xa3 0x70 0x69 0x01 0x54 0x92 0xf4 0x42 0xbd + 0xcd 0x7e 0x79 0x2b 0x2c 0xe1 0xd4 0xba 0x6e 0x34 0xc6 0xe6 0xc6 0x5c 0x63 0xd0 + 0x7f 0x39 0x1f 0xe8 0x8d 0x67 0xe6 0x27 0x67 0x0d 0x16 0x57 0x94 0xd1 0xfb 0xdf + 0xce 0xaf 0xfd 0x43 0xb3 0xbe 0x5d 0x83 0x4b 0x93 0x05 0xe8 0xdf 0x04 0xad 0xac + 0xeb 0xa6 0x81 0xa7 0xd5 0x04 0x63 0xbf 0x83 0xb8 0x0c 0xbc 0x20 0x18 0xb5 0x50 + 0xd7 0x61 0x84 0x11 0xca 0x2d 0x22 0xb3 0x29 0x02 0x03 0x01 0x00 0x01>; + }; + }; &soc { diff --git a/qcom/waipio-vm.dtsi b/qcom/waipio-vm.dtsi index 0286ec66..b9d2ab13 100644 --- a/qcom/waipio-vm.dtsi +++ b/qcom/waipio-vm.dtsi @@ -77,29 +77,6 @@ gunyah-label = <3>; }; - dmesg-dump { - compatible = "qcom,dmesg-dump"; - gunyah-label = <7>; - ddump-pubkey-size = <270>; - ddump-pubkey = /bits/ 8 <0x30 0x82 0x01 0x0a 0x02 0x82 0x01 0x01 0x00 0xe6 0x4b 0x31 0x82 0x61 0x14 0xf2 - 0xbe 0xd1 0xe4 0xde 0xe7 0xed 0xba 0x8f 0x3b 0x23 0x5f 0x7a 0xb8 0x16 0x40 0x96 - 0xae 0x77 0x5e 0x1b 0xf0 0x3f 0x39 0xab 0x69 0x90 0xb1 0xd4 0x70 0xcb 0x66 0xbc - 0x41 0x08 0x1d 0x37 0xdb 0x49 0xc8 0x49 0x5b 0x99 0x5c 0x32 0xbe 0x62 0xd5 0xa7 - 0x3c 0x0f 0xa4 0x4b 0x43 0x49 0xdb 0x54 0x69 0x06 0x0c 0xe5 0x99 0xe5 0xf9 0x1e - 0x25 0x84 0x17 0x47 0x62 0x2b 0x5d 0x0d 0xec 0x5e 0xc6 0xb5 0x86 0xb9 0x75 0x6d - 0xfe 0x7d 0x35 0x4f 0x35 0xc1 0x48 0x10 0x75 0x4c 0x57 0x6b 0x46 0x4b 0xff 0x5b - 0x52 0x22 0x40 0x2c 0xb0 0x47 0xe1 0x47 0xc4 0xe5 0x47 0x0c 0x56 0xe8 0x17 0xd0 - 0x7e 0xc3 0x4d 0x9f 0xea 0xd0 0xea 0x87 0xe5 0x51 0x39 0xe8 0x45 0x4c 0x54 0x27 - 0x9c 0x50 0x38 0xb7 0x72 0x93 0x12 0x0b 0xa1 0x2f 0x9e 0x04 0x92 0x20 0x6e 0x31 - 0x42 0x87 0xe1 0xfe 0x88 0x3f 0xe5 0x09 0xe1 0xf9 0xbe 0x44 0xc6 0xbf 0x10 0x79 - 0x36 0x47 0x7b 0xa0 0x8e 0x27 0x31 0xa3 0x70 0x69 0x01 0x54 0x92 0xf4 0x42 0xbd - 0xcd 0x7e 0x79 0x2b 0x2c 0xe1 0xd4 0xba 0x6e 0x34 0xc6 0xe6 0xc6 0x5c 0x63 0xd0 - 0x7f 0x39 0x1f 0xe8 0x8d 0x67 0xe6 0x27 0x67 0x0d 0x16 0x57 0x94 0xd1 0xfb 0xdf - 0xce 0xaf 0xfd 0x43 0xb3 0xbe 0x5d 0x83 0x4b 0x93 0x05 0xe8 0xdf 0x04 0xad 0xac - 0xeb 0xa6 0x81 0xa7 0xd5 0x04 0x63 0xbf 0x83 0xb8 0x0c 0xbc 0x20 0x18 0xb5 0x50 - 0xd7 0x61 0x84 0x11 0xca 0x2d 0x22 0xb3 0x29 0x02 0x03 0x01 0x00 0x01>; - }; - qcom,vm-config { compatible = "qcom,vm-1.0"; vm-type = "aarch64-guest"; From baaa6419a3ebd074d3bde488222165ef1db6791f Mon Sep 17 00:00:00 2001 From: kamasali Satyanarayan Date: Fri, 16 May 2025 14:11:28 +0530 Subject: [PATCH 4/6] ARM: dts: msm: Add initial device tree for Montague This is a snapshot of Device tree files as of msm-5.10 'commit (ARM: dts: msm: update DPC values for cpus of anorak). Change-Id: I319eaa319043928f635391a461b6904c921709ef Signed-off-by: kamasali Satyanarayan --- qcom/Makefile | 17 ++- qcom/montague-4gb.dts | 14 +++ qcom/montague-4gb.dtsi | 10 ++ qcom/montague-adrastea-overlay.dts | 23 ++++ qcom/montague-adrastea.dts | 16 +++ qcom/montague-adrastea.dtsi | 6 + qcom/montague-apache-overlay.dts | 16 +++ qcom/montague-apache.dts | 15 +++ qcom/montague-hsp-overlay.dts | 31 +++++ qcom/montague-hsp.dts | 16 +++ qcom/montague-hsp.dtsi | 25 +++++ qcom/montague-idp-qps615-overlay.dts | 16 +++ qcom/montague-idp-qps615.dts | 15 +++ qcom/montague-idp-qps615.dtsi | 162 +++++++++++++++++++++++++++ qcom/montague-moselle-4gb.dts | 14 +++ qcom/montague-moselle-overlay.dts | 25 +++++ qcom/montague-moselle.dts | 16 +++ qcom/montague-moselle.dtsi | 26 +++++ qcom/montague-rcm-overlay.dts | 25 +++++ qcom/montague-rcm.dts | 16 +++ qcom/montague-rcm.dtsi | 6 + qcom/montague-rumi-overlay.dts | 17 +++ qcom/montague-rumi.dts | 17 +++ qcom/montague-rumi.dtsi | 6 + qcom/montague-talyn.dtsi | 30 +++++ qcom/montague-vm-hsp.dts | 15 +++ qcom/montague-vm-moselle.dts | 15 +++ qcom/montague-wsa-overlay.dts | 24 ++++ qcom/montague-wsa.dts | 16 +++ qcom/montague-wsa.dtsi | 21 ++++ qcom/montague-wsd-overlay.dts | 24 ++++ qcom/montague-wsd.dts | 15 +++ qcom/montague-wsd.dtsi | 21 ++++ qcom/montague.dts | 15 +++ qcom/montague.dtsi | 45 ++++++++ qcom/montaguep-4gb.dts | 14 +++ qcom/montaguep-4gb.dtsi | 10 ++ qcom/montaguep-apache.dts | 15 +++ qcom/montaguep-hsp.dts | 16 +++ qcom/montaguep-hsp.dtsi | 10 ++ qcom/montaguep-idp-qps615.dts | 15 +++ qcom/montaguep-idp-qps615.dtsi | 6 + qcom/montaguep-moselle-4gb.dts | 15 +++ qcom/montaguep-moselle.dts | 16 +++ qcom/montaguep-moselle.dtsi | 7 ++ qcom/montaguep-rcm.dts | 16 +++ qcom/montaguep-rcm.dtsi | 6 + qcom/montaguep-rumi.dts | 16 +++ qcom/montaguep-rumi.dtsi | 6 + qcom/montaguep.dts | 15 +++ qcom/montaguep.dtsi | 13 +++ qcom/platform_map.bzl | 15 +++ 52 files changed, 999 insertions(+), 3 deletions(-) create mode 100644 qcom/montague-4gb.dts create mode 100644 qcom/montague-4gb.dtsi create mode 100644 qcom/montague-adrastea-overlay.dts create mode 100644 qcom/montague-adrastea.dts create mode 100644 qcom/montague-adrastea.dtsi create mode 100644 qcom/montague-apache-overlay.dts create mode 100644 qcom/montague-apache.dts create mode 100644 qcom/montague-hsp-overlay.dts create mode 100644 qcom/montague-hsp.dts create mode 100644 qcom/montague-hsp.dtsi create mode 100644 qcom/montague-idp-qps615-overlay.dts create mode 100644 qcom/montague-idp-qps615.dts create mode 100644 qcom/montague-idp-qps615.dtsi create mode 100644 qcom/montague-moselle-4gb.dts create mode 100644 qcom/montague-moselle-overlay.dts create mode 100644 qcom/montague-moselle.dts create mode 100644 qcom/montague-moselle.dtsi create mode 100644 qcom/montague-rcm-overlay.dts create mode 100644 qcom/montague-rcm.dts create mode 100644 qcom/montague-rcm.dtsi create mode 100644 qcom/montague-rumi-overlay.dts create mode 100644 qcom/montague-rumi.dts create mode 100644 qcom/montague-rumi.dtsi create mode 100644 qcom/montague-talyn.dtsi create mode 100644 qcom/montague-vm-hsp.dts create mode 100644 qcom/montague-vm-moselle.dts create mode 100644 qcom/montague-wsa-overlay.dts create mode 100644 qcom/montague-wsa.dts create mode 100644 qcom/montague-wsa.dtsi create mode 100644 qcom/montague-wsd-overlay.dts create mode 100644 qcom/montague-wsd.dts create mode 100644 qcom/montague-wsd.dtsi create mode 100644 qcom/montague.dts create mode 100644 qcom/montague.dtsi create mode 100644 qcom/montaguep-4gb.dts create mode 100644 qcom/montaguep-4gb.dtsi create mode 100644 qcom/montaguep-apache.dts create mode 100644 qcom/montaguep-hsp.dts create mode 100644 qcom/montaguep-hsp.dtsi create mode 100644 qcom/montaguep-idp-qps615.dts create mode 100644 qcom/montaguep-idp-qps615.dtsi create mode 100644 qcom/montaguep-moselle-4gb.dts create mode 100644 qcom/montaguep-moselle.dts create mode 100644 qcom/montaguep-moselle.dtsi create mode 100644 qcom/montaguep-rcm.dts create mode 100644 qcom/montaguep-rcm.dtsi create mode 100644 qcom/montaguep-rumi.dts create mode 100644 qcom/montaguep-rumi.dtsi create mode 100644 qcom/montaguep.dts create mode 100644 qcom/montaguep.dtsi diff --git a/qcom/Makefile b/qcom/Makefile index ed06ed4a..d34d21d1 100644 --- a/qcom/Makefile +++ b/qcom/Makefile @@ -171,8 +171,8 @@ parrot-dtb-$(CONFIG_ARCH_PARROT) += \ parrot-overlays-dtb-$(CONFIG_ARCH_PARROT) += $(PARROT_BOARDS) $(PARROT_BASE_DTB) $(PARROT_4GB_BOARDS) $(PARROT_4GB_BASE_DTB) dtb-y += $(parrot-dtb-y) -RAVELIN_BASE_DTB += ravelin.dtb ravelinp.dtb ravelin-sg.dtb ravelinp-sg.dtb -RAVELIN_4GB_BASE_DTB += ravelin-4gb.dtb ravelinp-4gb.dtb ravelin-sg.dtb ravelinp-sg.dtb +RAVELIN_BASE_DTB += ravelin.dtb ravelinp.dtb ravelin-sg.dtb ravelinp-sg.dtb montague.dtb montaguep.dtb +RAVELIN_4GB_BASE_DTB += ravelin-4gb.dtb ravelinp-4gb.dtb ravelin-sg.dtb ravelinp-sg.dtb montague-4gb.dtb montaguep-4gb.dtb RAVELIN_BOARDS += \ ravelin-rumi-overlay.dtbo \ @@ -180,10 +180,19 @@ RAVELIN_BOARDS += \ ravelin-idp-overlay.dtbo \ ravelin-idp-wcn3950-amoled-rcm-overlay.dtbo \ ravelin-qrd-overlay.dtbo \ + montague-rumi-overlay.dtbo \ + montague-hsp-overlay.dtbo \ + montague-rcm-overlay.dtbo \ + montague-wsa-overlay.dtbo \ + montague-wsd-overlay.dtbo \ + montague-idp-qps615-overlay.dtbo \ + montague-adrastea-overlay.dtbo \ + montague-apache-overlay.dtbo RAVELIN_4GB_BOARDS += \ ravelin-idp-wcn3988-4gb-overlay.dtbo \ ravelin-qrd-4gb-overlay.dtbo \ + montague-moselle-overlay.dtbo parrot-dtb-$(CONFIG_ARCH_RAVELIN) += \ $(call add-overlays, $(RAVELIN_BOARDS),$(RAVELIN_BASE_DTB)) \ @@ -329,7 +338,9 @@ parrot_tuivm-dtb-$(CONFIG_ARCH_QTI_VM) += ravelin-vm-rumi.dtb \ ravelin-vm-idp.dtb \ ravelin-vm-idp-wcn3988.dtb \ ravelin-vm-idp-wcn3950-amoled-rcm.dtb \ - ravelin-vm-qrd.dtb + ravelin-vm-qrd.dtb \ + montague-vm-hsp.dtb \ + montague-vm-moselle.dtb dtb-y += $(parrot_tuivm-dtb-y) diff --git a/qcom/montague-4gb.dts b/qcom/montague-4gb.dts new file mode 100644 index 00000000..a8cc116b --- /dev/null +++ b/qcom/montague-4gb.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "montague-4gb.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague 4Gb SoC"; + compatible = "qcom,montague"; + qcom,board-id = <0 0x600>; +}; diff --git a/qcom/montague-4gb.dtsi b/qcom/montague-4gb.dtsi new file mode 100644 index 00000000..25e63260 --- /dev/null +++ b/qcom/montague-4gb.dtsi @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "montague.dtsi" +#include "ravelin-low-memory.dtsi" +/ { +}; + diff --git a/qcom/montague-adrastea-overlay.dts b/qcom/montague-adrastea-overlay.dts new file mode 100644 index 00000000..460696da --- /dev/null +++ b/qcom/montague-adrastea-overlay.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +/plugin/; + +#include "montague-adrastea.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague Adrastea IDP"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,msm-id = <581 0x10000>, <582 0x10000>; + qcom,board-id = <0x10022 0x0>; +}; + +&pcie0 { + + qcom,config-recovery; + qcom,drv-supported; + +}; diff --git a/qcom/montague-adrastea.dts b/qcom/montague-adrastea.dts new file mode 100644 index 00000000..4acbb965 --- /dev/null +++ b/qcom/montague-adrastea.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + + +#include "montague.dtsi" +#include "montague-adrastea.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague Adrastea IDP"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,board-id = <0x10022 0x0>; +}; diff --git a/qcom/montague-adrastea.dtsi b/qcom/montague-adrastea.dtsi new file mode 100644 index 00000000..75b6deee --- /dev/null +++ b/qcom/montague-adrastea.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "montague-talyn.dtsi" diff --git a/qcom/montague-apache-overlay.dts b/qcom/montague-apache-overlay.dts new file mode 100644 index 00000000..159ca0ad --- /dev/null +++ b/qcom/montague-apache-overlay.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +/plugin/; + +#include "montague-talyn.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague Apache IDP"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,msm-id = <581 0x10000>, <582 0x10000>; + qcom,board-id = <0x10022 0x8>; +}; diff --git a/qcom/montague-apache.dts b/qcom/montague-apache.dts new file mode 100644 index 00000000..c39e8455 --- /dev/null +++ b/qcom/montague-apache.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "montague.dtsi" +#include "montague-talyn.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague Apache IDP"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,board-id = <0x10022 0x8>; +}; diff --git a/qcom/montague-hsp-overlay.dts b/qcom/montague-hsp-overlay.dts new file mode 100644 index 00000000..a9b7ae2a --- /dev/null +++ b/qcom/montague-hsp-overlay.dts @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +/plugin/; + +#include "montague-hsp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague HSP IDP"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,msm-id = <581 0x10000>, <582 0x10000>; + qcom,board-id = <0x10022 0x4>; +}; + +&reserved_memory { + wlan_msa_mem: wlan_msa_mem_region@82a00000 { + no-map; + reg = <0x0 0x82a00000 0x0 0x0>; + }; +}; + +&pcie0 { + + qcom,config-recovery; + qcom,drv-supported; + +}; + diff --git a/qcom/montague-hsp.dts b/qcom/montague-hsp.dts new file mode 100644 index 00000000..87d483a7 --- /dev/null +++ b/qcom/montague-hsp.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + + +#include "montague.dtsi" +#include "montague-hsp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague HSP IDP"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,board-id = <0x10022 0x4>; +}; diff --git a/qcom/montague-hsp.dtsi b/qcom/montague-hsp.dtsi new file mode 100644 index 00000000..c324fa9d --- /dev/null +++ b/qcom/montague-hsp.dtsi @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "ravelin-idp.dtsi" + +&soc { +}; + +&pcie0 { + status = "ok"; +}; + +&pcie0_msi { + status = "ok"; +}; + +&bluetooth { + status = "disabled"; +}; + +&wpss_pas { + status = "disabled"; +}; diff --git a/qcom/montague-idp-qps615-overlay.dts b/qcom/montague-idp-qps615-overlay.dts new file mode 100644 index 00000000..b9ae5c7f --- /dev/null +++ b/qcom/montague-idp-qps615-overlay.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +/plugin/; + +#include "montague-idp-qps615.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague IDP QPS615"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,msm-id = <581 0x10000>, <582 0x10000>; + qcom,board-id = <0x10022 0x9>; +}; diff --git a/qcom/montague-idp-qps615.dts b/qcom/montague-idp-qps615.dts new file mode 100644 index 00000000..fbed51af --- /dev/null +++ b/qcom/montague-idp-qps615.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "montague.dtsi" +#include "montague-idp-qps615.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague IDP QPS615"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,board-id = <0x10022 0x9>; +}; diff --git a/qcom/montague-idp-qps615.dtsi b/qcom/montague-idp-qps615.dtsi new file mode 100644 index 00000000..3a44d894 --- /dev/null +++ b/qcom/montague-idp-qps615.dtsi @@ -0,0 +1,162 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "montague-hsp.dtsi" + +&qupv3_se0_i2c { + status = "ok"; + + pcie0_i2c_ctrl: pcie0_i2c_ctrl { + rc-index = <0x0>; + reg = <0x77>; + gpio-config-reg = <0x801208>; + ep-reset-reg = <0x801210>; + ep-reset-gpio-mask = <0xc>; + version-reg = <0x800000>; + dump-regs = <0x801330 0x801350 0x801370>; + reg_update = <0x82c030 0x1 + 0x828000 0x3 + 0x82bd00 0x8 + 0x82c030 0x2 + 0x828000 0x3 + 0x82bd00 0x8 + 0x82c030 0x8 + 0x828000 0x1 + 0x82bd00 0x8 + 0x82c01c 0x10 + 0x82c030 0xf + 0x828000 0xf + 0x82b268 0x2>; + /*FOM for preset caluclation*/ + switch_reg_update = <0x82c02c 0x00000007 + 0x824a10 0x00000001 + 0x82c030 0x00000008 + 0x828000 0x00000001 + 0x82b074 0x00000020 + 0x82b2bc 0x00000001>; + }; +}; + +&pcie0 { + + pcie-i2c-phandle = <&qupv3_se0_i2c>; + qcom,boot-option = <0x2>; + iommu-map = <0x0 &apps_smmu 0x1400 0x1>, + <0x100 &apps_smmu 0x1401 0x1>, + <0x208 &apps_smmu 0x1404 0x1>, + <0x210 &apps_smmu 0x1405 0x1>, + <0x218 &apps_smmu 0x1406 0x1>, + <0x300 &apps_smmu 0x1407 0x1>, + <0x400 &apps_smmu 0x1410 0x1>, + <0x500 &apps_smmu 0x1411 0x1>, + <0x501 &apps_smmu 0x1412 0x1>; + + qcom,phy-sequence = <0x0240 0x03 0x0 + 0x0094 0x08 0x0 + 0x0154 0x34 0x0 + 0x016c 0x08 0x0 + 0x0058 0x0f 0x0 + 0x00a4 0x42 0x0 + 0x0110 0x24 0x0 + 0x011c 0x03 0x0 + 0x0118 0xb4 0x0 + 0x010c 0x02 0x0 + 0x01bc 0x11 0x0 + 0x00bc 0x82 0x0 + 0x00d4 0x03 0x0 + 0x00d0 0x55 0x0 + 0x00cc 0x55 0x0 + 0x00b0 0x1a 0x0 + 0x00ac 0x0a 0x0 + 0x00c4 0x68 0x0 + 0x00e0 0x02 0x0 + 0x00dc 0xaa 0x0 + 0x00d8 0xab 0x0 + 0x00b8 0x34 0x0 + 0x00b4 0x14 0x0 + 0x0158 0x01 0x0 + 0x0074 0x06 0x0 + 0x007c 0x16 0x0 + 0x0084 0x36 0x0 + 0x0078 0x06 0x0 + 0x0080 0x16 0x0 + 0x0088 0x36 0x0 + 0x01b0 0x1e 0x0 + 0x01ac 0xca 0x0 + 0x01b8 0x18 0x0 + 0x01b4 0xa2 0x0 + 0x0050 0x07 0x0 + 0x0010 0x01 0x0 + 0x001c 0x31 0x0 + 0x0020 0x01 0x0 + 0x0024 0xde 0x0 + 0x0028 0x07 0x0 + 0x0030 0x4c 0x0 + 0x0034 0x06 0x0 + 0x0ee4 0x20 0x0 + 0x0e84 0x75 0x0 + 0x0e90 0x3f 0x0 + 0x115c 0x7f 0x0 + 0x1160 0xff 0x0 + 0x1164 0xbf 0x0 + 0x1168 0x3f 0x0 + 0x116c 0xd8 0x0 + 0x1170 0xdc 0x0 + 0x1174 0xdc 0x0 + 0x1178 0x5c 0x0 + 0x117c 0x34 0x0 + 0x1180 0xa6 0x0 + 0x1190 0x34 0x0 + 0x1194 0x38 0x0 + 0x10d8 0x0f 0x0 + 0x0e3c 0x12 0x0 + 0x0e40 0x01 0x0 + 0x10dc 0x00 0x0 + 0x104c 0x08 0x0 + 0x1050 0x08 0x0 + 0x1044 0xf0 0x0 + 0x11a4 0x38 0x0 + 0x10cc 0xf0 0x0 + 0x10f4 0x07 0x0 + 0x1008 0x09 0x0 + 0x1014 0x05 0x0 + 0x0694 0x00 0x0 + 0x0654 0x00 0x0 + 0x06a8 0x0f 0x0 + 0x0048 0x90 0x0 + 0x0620 0xc1 0x0 + 0x0624 0x40 0x0 + 0x0388 0x77 0x0 + 0x0398 0x0b 0x0 + 0x02dc 0x05 0x0 + 0x0200 0x00 0x0 + 0x0244 0x03 0x0>; + +}; + +&pcie0_rp { + #address-cells = <5>; + #size-cells = <0>; + + /* BDF 1.0.0 */ + pcie0_bus1_dev0_fn0: pcie0_bus1_dev0_fn0 { + reg = <0 0 0 0 0>; + + /* BDF 2.1.0 */ + pcie0_bus2_dev1_fn0: pcie0_bus2_dev1_fn0 { + reg = <0x800 0x0 0x0 0x0 0x0>; + }; + + /* BDF 2.2.0 */ + pcie0_bus2_dev2_fn0: pcie0_bus2_dev2_fn0 { + reg = <0x1000 0x0 0x0 0x0 0x0>; + }; + + /* BDF 2.3.0 */ + pcie0_bus2_dev3_fn0: pcie0_bus2_dev3_fn0 { + reg = <0x1800 0x0 0x0 0x0 0x0>; + }; + }; +}; diff --git a/qcom/montague-moselle-4gb.dts b/qcom/montague-moselle-4gb.dts new file mode 100644 index 00000000..3423dbd7 --- /dev/null +++ b/qcom/montague-moselle-4gb.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +#include "montague-4gb.dtsi" +#include "montague-moselle.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague Moselle 4Gb IDP"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,board-id = <0x10022 0x603>; +}; diff --git a/qcom/montague-moselle-overlay.dts b/qcom/montague-moselle-overlay.dts new file mode 100644 index 00000000..77170806 --- /dev/null +++ b/qcom/montague-moselle-overlay.dts @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +/plugin/; + +#include "montague-moselle.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague Moselle IDP"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,msm-id = <581 0x10000>, <582 0x10000>; + qcom,board-id = <0x10022 3>; +}; + +&pcie0 { + + qcom,config-recovery; + qcom,drv-supported; + +}; + + diff --git a/qcom/montague-moselle.dts b/qcom/montague-moselle.dts new file mode 100644 index 00000000..e62f4371 --- /dev/null +++ b/qcom/montague-moselle.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "montague.dtsi" +#include "montague-moselle.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague Moselle IDP"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,board-id = <0x10022 3>; +}; + diff --git a/qcom/montague-moselle.dtsi b/qcom/montague-moselle.dtsi new file mode 100644 index 00000000..a98bce6d --- /dev/null +++ b/qcom/montague-moselle.dtsi @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "montague-hsp.dtsi" + +&icnss2 { + status = "ok"; +}; + +&pcie0 { + status = "disabled"; +}; + +&pcie0_msi { + status = "disabled"; +}; + +&bluetooth { + status = "disabled"; +}; + +&wpss_pas { + status = "ok"; +}; diff --git a/qcom/montague-rcm-overlay.dts b/qcom/montague-rcm-overlay.dts new file mode 100644 index 00000000..4258ba05 --- /dev/null +++ b/qcom/montague-rcm-overlay.dts @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +/plugin/; + +#include "montague-rcm.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague RCM IDP"; + compatible = "qcom,montague-qrd", "qcom,montague", "qcom,idp"; + qcom,msm-id = <581 0x10000>, <582 0x10000>; + qcom,board-id = <0x10022 0x5>; +}; + +&pcie0 { + + qcom,config-recovery; + qcom,drv-supported; + +}; + + diff --git a/qcom/montague-rcm.dts b/qcom/montague-rcm.dts new file mode 100644 index 00000000..75f6e1c7 --- /dev/null +++ b/qcom/montague-rcm.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "montague.dtsi" +#include "montague-rcm.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague RCM IDP"; + compatible = "qcom,montague-qrd", "qcom,montague", "qcom,idp"; + qcom,board-id = <0x10022 0x5>; +}; + diff --git a/qcom/montague-rcm.dtsi b/qcom/montague-rcm.dtsi new file mode 100644 index 00000000..dd8cec6e --- /dev/null +++ b/qcom/montague-rcm.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "montague-hsp.dtsi" diff --git a/qcom/montague-rumi-overlay.dts b/qcom/montague-rumi-overlay.dts new file mode 100644 index 00000000..23b3dd77 --- /dev/null +++ b/qcom/montague-rumi-overlay.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +/plugin/; + +#include "montague-rumi.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague RUMI"; + compatible = "qcom,montague-rumi", "qcom,montague", "qcom,rumi"; + qcom,msm-id = <581 0x10000>, <582 0x10000>; + qcom,board-id = <0x1000F 0>; +}; + diff --git a/qcom/montague-rumi.dts b/qcom/montague-rumi.dts new file mode 100644 index 00000000..a697a719 --- /dev/null +++ b/qcom/montague-rumi.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +/memreserve/ 0x90000000 0x00010000; + +#include "montague.dtsi" +#include "montague-rumi.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague RUMI"; + compatible = "qcom,montague-rumi", "qcom,montague", "qcom,rumi"; + qcom,board-id = <0x1000F 0>; +}; + diff --git a/qcom/montague-rumi.dtsi b/qcom/montague-rumi.dtsi new file mode 100644 index 00000000..0bd20ff1 --- /dev/null +++ b/qcom/montague-rumi.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "ravelin-rumi.dtsi" diff --git a/qcom/montague-talyn.dtsi b/qcom/montague-talyn.dtsi new file mode 100644 index 00000000..3ff9163c --- /dev/null +++ b/qcom/montague-talyn.dtsi @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "ravelin-idp.dtsi" +#include "ravelin-qcx6438.dtsi" + +&soc { +}; + +&pcie0 { + status = "ok"; +}; + +&pcie0_msi { + status = "ok"; +}; + +&wil6210 { + status = "ok"; +}; + +&bluetooth { + status = "disabled"; +}; + +&wpss_pas { + status = "disabled"; +}; diff --git a/qcom/montague-vm-hsp.dts b/qcom/montague-vm-hsp.dts new file mode 100644 index 00000000..95a730f3 --- /dev/null +++ b/qcom/montague-vm-hsp.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "ravelin-vm.dtsi" +#include "ravelin-vm-idp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague VM QRD"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,board-id = <0x10022 0x4>; +}; diff --git a/qcom/montague-vm-moselle.dts b/qcom/montague-vm-moselle.dts new file mode 100644 index 00000000..df0c5288 --- /dev/null +++ b/qcom/montague-vm-moselle.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "ravelin-vm.dtsi" +#include "ravelin-vm-qrd.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague Moselle QRD"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,board-id = <0x10022 3>; +}; diff --git a/qcom/montague-wsa-overlay.dts b/qcom/montague-wsa-overlay.dts new file mode 100644 index 00000000..cae69498 --- /dev/null +++ b/qcom/montague-wsa-overlay.dts @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +/plugin/; + +#include "montague-wsa.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague WSA IDP"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,msm-id = <581 0x10000>, <582 0x10000>; + qcom,board-id = <0x10022 0x7>; +}; + +&pcie0 { + + qcom,config-recovery; + qcom,drv-supported; + +}; + diff --git a/qcom/montague-wsa.dts b/qcom/montague-wsa.dts new file mode 100644 index 00000000..3f850f86 --- /dev/null +++ b/qcom/montague-wsa.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + + +#include "montague.dtsi" +#include "montague-wsa.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague WSA IDP"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,board-id = <0x10022 0x7>; +}; diff --git a/qcom/montague-wsa.dtsi b/qcom/montague-wsa.dtsi new file mode 100644 index 00000000..296589b8 --- /dev/null +++ b/qcom/montague-wsa.dtsi @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "ravelin-idp.dtsi" + +&soc { +}; + +&pcie0 { + status = "ok"; +}; + +&pcie0_msi { + status = "ok"; +}; + +&wpss_pas { + status = "disabled"; +}; diff --git a/qcom/montague-wsd-overlay.dts b/qcom/montague-wsd-overlay.dts new file mode 100644 index 00000000..abc38b72 --- /dev/null +++ b/qcom/montague-wsd-overlay.dts @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +/plugin/; + +#include "montague-wsd.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague WSD IDP"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,msm-id = <581 0x10000>, <582 0x10000>; + qcom,board-id = <0x10022 0x6>; +}; + +&pcie0 { + + qcom,config-recovery; + qcom,drv-supported; + +}; + diff --git a/qcom/montague-wsd.dts b/qcom/montague-wsd.dts new file mode 100644 index 00000000..2c96221d --- /dev/null +++ b/qcom/montague-wsd.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "montague.dtsi" +#include "montague-wsd.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague WSD IDP"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,board-id = <0x10022 0x6>; +}; diff --git a/qcom/montague-wsd.dtsi b/qcom/montague-wsd.dtsi new file mode 100644 index 00000000..296589b8 --- /dev/null +++ b/qcom/montague-wsd.dtsi @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "ravelin-idp.dtsi" + +&soc { +}; + +&pcie0 { + status = "ok"; +}; + +&pcie0_msi { + status = "ok"; +}; + +&wpss_pas { + status = "disabled"; +}; diff --git a/qcom/montague.dts b/qcom/montague.dts new file mode 100644 index 00000000..b54dcb8c --- /dev/null +++ b/qcom/montague.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "montague.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague SoC"; + compatible = "qcom,montague"; + qcom,board-id = <0 0>; +}; + diff --git a/qcom/montague.dtsi b/qcom/montague.dtsi new file mode 100644 index 00000000..f5688efd --- /dev/null +++ b/qcom/montague.dtsi @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "ravelin.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague SoC"; + compatible = "qcom,montague"; + qcom,msm-id = <581 0x10000>; +}; + +&apps_rsc { + rpmh-regulator-sf1-vreg-enable { + status = "ok"; + }; + + rpmh-regulator-sf1-vreg-mode { + status = "ok"; + }; +}; + +&soc { + st54spi_gpio { + status = "ok"; + /* gpio used as SE_nRESET */ + gpio-power_nreset = <&tlmm 48 0x00>; + }; + + mhi_qrtr_cnss { + compatible = "qcom,qrtr-mhi"; + qcom,dev-id = <0x1103>; + qcom,net-id = <0>; + qcom,low-latency; + }; +}; + +&pcie0 { + +/delete-property/ qcom,config-recovery; +/delete-property/ qcom,drv-supported; + +}; + diff --git a/qcom/montaguep-4gb.dts b/qcom/montaguep-4gb.dts new file mode 100644 index 00000000..045a02c5 --- /dev/null +++ b/qcom/montaguep-4gb.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "montaguep-4gb.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. MontagueP 4Gb SoC"; + compatible = "qcom,montaguep"; + qcom,board-id = <0 0x600>; +}; diff --git a/qcom/montaguep-4gb.dtsi b/qcom/montaguep-4gb.dtsi new file mode 100644 index 00000000..ae2ef25a --- /dev/null +++ b/qcom/montaguep-4gb.dtsi @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "montaguep.dtsi" +#include "ravelin-low-memory.dtsi" +/ { +}; + diff --git a/qcom/montaguep-apache.dts b/qcom/montaguep-apache.dts new file mode 100644 index 00000000..b09f89f9 --- /dev/null +++ b/qcom/montaguep-apache.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "montaguep.dtsi" +#include "montague-talyn.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague Apache IDP"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,board-id = <0x10022 0x8>; +}; diff --git a/qcom/montaguep-hsp.dts b/qcom/montaguep-hsp.dts new file mode 100644 index 00000000..ad79d2e3 --- /dev/null +++ b/qcom/montaguep-hsp.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "montaguep.dtsi" +#include "montaguep-hsp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montaguep HSP IDP"; + compatible = "qcom,montaguep-idp", "qcom,montaguep", "qcom,idp"; + qcom,board-id = <0x10022 0x4>; +}; + diff --git a/qcom/montaguep-hsp.dtsi b/qcom/montaguep-hsp.dtsi new file mode 100644 index 00000000..274387e6 --- /dev/null +++ b/qcom/montaguep-hsp.dtsi @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "ravelin-idp.dtsi" + +&soc { +}; + diff --git a/qcom/montaguep-idp-qps615.dts b/qcom/montaguep-idp-qps615.dts new file mode 100644 index 00000000..635a551e --- /dev/null +++ b/qcom/montaguep-idp-qps615.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "montaguep.dtsi" +#include "montaguep-idp-qps615.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague IDP QPS615"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,board-id = <0x10022 0x9>; +}; diff --git a/qcom/montaguep-idp-qps615.dtsi b/qcom/montaguep-idp-qps615.dtsi new file mode 100644 index 00000000..87463147 --- /dev/null +++ b/qcom/montaguep-idp-qps615.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "ravelinp-idp.dtsi" diff --git a/qcom/montaguep-moselle-4gb.dts b/qcom/montaguep-moselle-4gb.dts new file mode 100644 index 00000000..54b79875 --- /dev/null +++ b/qcom/montaguep-moselle-4gb.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +#include "montaguep-4gb.dtsi" +#include "montaguep-moselle.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montague Moselle 4Gb IDP"; + compatible = "qcom,montague-idp", "qcom,montague", "qcom,idp"; + qcom,board-id = <0x10022 0x603>; +}; + diff --git a/qcom/montaguep-moselle.dts b/qcom/montaguep-moselle.dts new file mode 100644 index 00000000..16cd834b --- /dev/null +++ b/qcom/montaguep-moselle.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "montaguep.dtsi" +#include "montaguep-moselle.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montaguep Moselle IDP"; + compatible = "qcom,montaguep-idp", "qcom,montaguep", "qcom,idp"; + qcom,board-id = <0x10022 3>; +}; + diff --git a/qcom/montaguep-moselle.dtsi b/qcom/montaguep-moselle.dtsi new file mode 100644 index 00000000..d0f2ccf9 --- /dev/null +++ b/qcom/montaguep-moselle.dtsi @@ -0,0 +1,7 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "montague-hsp.dtsi" + diff --git a/qcom/montaguep-rcm.dts b/qcom/montaguep-rcm.dts new file mode 100644 index 00000000..507c2cb3 --- /dev/null +++ b/qcom/montaguep-rcm.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "montaguep.dtsi" +#include "montaguep-rcm.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montaguep RCM IDP"; + compatible = "qcom,montaguep-idp", "qcom,montaguep", "qcom,idp"; + qcom,board-id = <0x10022 0x5>; +}; + diff --git a/qcom/montaguep-rcm.dtsi b/qcom/montaguep-rcm.dtsi new file mode 100644 index 00000000..dd8cec6e --- /dev/null +++ b/qcom/montaguep-rcm.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "montague-hsp.dtsi" diff --git a/qcom/montaguep-rumi.dts b/qcom/montaguep-rumi.dts new file mode 100644 index 00000000..3b20ca11 --- /dev/null +++ b/qcom/montaguep-rumi.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "montaguep.dtsi" +#include "montaguep-rumi.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Montaguep RUMI"; + compatible = "qcom,montaguep-rumi", "qcom,montaguep", "qcom,rumi"; + qcom,board-id = <0x1000F 0>; +}; + diff --git a/qcom/montaguep-rumi.dtsi b/qcom/montaguep-rumi.dtsi new file mode 100644 index 00000000..0bd20ff1 --- /dev/null +++ b/qcom/montaguep-rumi.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "ravelin-rumi.dtsi" diff --git a/qcom/montaguep.dts b/qcom/montaguep.dts new file mode 100644 index 00000000..3b153099 --- /dev/null +++ b/qcom/montaguep.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "montaguep.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. MontagueP SoC"; + compatible = "qcom,montaguep"; + qcom,board-id = <0 0>; +}; + diff --git a/qcom/montaguep.dtsi b/qcom/montaguep.dtsi new file mode 100644 index 00000000..68df995a --- /dev/null +++ b/qcom/montaguep.dtsi @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "montague.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. MontagueP SoC"; + compatible = "qcom,montaguep"; + qcom,msm-id = <582 0x10000>; +}; + diff --git a/qcom/platform_map.bzl b/qcom/platform_map.bzl index e795bebb..7f0399f3 100644 --- a/qcom/platform_map.bzl +++ b/qcom/platform_map.bzl @@ -153,6 +153,8 @@ _platform_map = { {"name": "ravelin-vm-idp-wcn3988.dtb"}, {"name": "ravelin-vm-idp-wcn3950-amoled-rcm.dtb"}, {"name": "ravelin-vm-qrd.dtb"}, + {"name": "montague-vm-hsp.dtb"}, + {"name": "montague-vm-moselle.dtb"}, ], }, "sun-tuivm": { @@ -360,6 +362,10 @@ _platform_map = { {"name": "ravelinp-4gb.dtb"}, {"name": "ravelin-sg.dtb"}, {"name": "ravelinp-sg.dtb"}, + {"name": "montague.dtb"}, + {"name": "montaguep.dtb"}, + {"name": "montague-4gb.dtb"}, + {"name": "montaguep-4gb.dtb"}, ], "dtbo_list": [ # keep sorted @@ -395,6 +401,15 @@ _platform_map = { {"name": "ravelin-qrd-overlay.dtbo"}, {"name": "ravelin-idp-wcn3988-4gb-overlay.dtbo"}, {"name": "ravelin-qrd-4gb-overlay.dtbo"}, + {"name": "montague-rumi-overlay.dtbo"}, + {"name": "montague-hsp-overlay.dtbo"}, + {"name": "montague-rcm-overlay.dtbo"}, + {"name": "montague-wsa-overlay.dtbo"}, + {"name": "montague-wsd-overlay.dtbo"}, + {"name": "montague-idp-qps615-overlay.dtbo"}, + {"name": "montague-adrastea-overlay.dtbo"}, + {"name": "montague-apache-overlay.dtbo"}, + {"name": "montague-moselle-overlay.dtbo"}, ], }, } From 1fa1469b029654d73e07f75aedb5fb4d99de0504 Mon Sep 17 00:00:00 2001 From: Nandi Bhoopathi Date: Tue, 1 Jul 2025 21:16:48 +0530 Subject: [PATCH 5/6] ARM: dts: msm: Ignore dependencies on children by PM framework Change https://lore.kernel.org/all/20230525113034.46880-1-tony@atomide.com registers serial core controller as a child of msm uart device. Since child should suspend first, due to the child's auto suspend delay (SERIAL_PORT_AUTOSUSPEND_DELAY_MS), additional 500msecs delay is added during msm_geni_serial_runtime_suspend. Added new dtsi flag 'qcom,suspend-ignore-children', to ignore dependencies on children by runtime PM framework, this helps to exit quickly from msm_geni_serial_runtime_suspend and save power. Change-Id: If3fa3a4f063167dd93f80eb110496702dad7a835 Signed-off-by: Nandi Bhoopathi --- qcom/sm6150-qupv3.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/qcom/sm6150-qupv3.dtsi b/qcom/sm6150-qupv3.dtsi index 24ef6824..91014b66 100644 --- a/qcom/sm6150-qupv3.dtsi +++ b/qcom/sm6150-qupv3.dtsi @@ -415,6 +415,7 @@ interrupts-extended = <&intc GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>, <&tlmm 13 IRQ_TYPE_LEVEL_HIGH>; qcom,wakeup-byte = <0xFD>; + qcom,suspend-ignore-children; status = "disabled"; }; }; From e4def914efc6e2ff48aea510072ca4c42aa7de8d Mon Sep 17 00:00:00 2001 From: Venkata Talluri Date: Wed, 11 Jun 2025 19:30:32 +0530 Subject: [PATCH 6/6] ARM: dts: msm: add qdss component for SM6150 Add TPDM/TPDA/TMC/FUNNEL device node on SM6150. Change-Id: I64fb12e9bfe8510d2377ae77da6e7d84d090daf6 Signed-off-by: Venkata Talluri --- qcom/sm6150-coresight.dtsi | 2542 ++++++++++++++++++++++++++++++++++++ qcom/sm6150-debug.dtsi | 1041 +++++++++++++++ qcom/sm6150.dtsi | 2 + 3 files changed, 3585 insertions(+) create mode 100644 qcom/sm6150-coresight.dtsi create mode 100644 qcom/sm6150-debug.dtsi diff --git a/qcom/sm6150-coresight.dtsi b/qcom/sm6150-coresight.dtsi new file mode 100644 index 00000000..27b33792 --- /dev/null +++ b/qcom/sm6150-coresight.dtsi @@ -0,0 +1,2542 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +&soc { + csr: csr@6001000 { + compatible = "qcom,coresight-csr"; + reg = <0x6001000 0x1000>; + reg-names = "csr-base"; + + coresight-name = "coresight-csr"; + qcom,usb-bam-support; + qcom,hwctrl-set-support; + qcom,set-byte-cntr-support; + + qcom,blk-size = <1>; + }; + + replicator_qdss: replicator@6046000 { + compatible = "arm,coresight-dynamic-replicator", + "arm,primecell"; + + reg = <0x6046000 0x1000>; + reg-names = "replicator-base"; + + coresight-name = "coresight-replicator-qdss"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + replicator0_out_tmc_etr: endpoint { + remote-endpoint= + <&tmc_etr_in_replicator0>; + }; + }; + + port@1 { + reg = <1>; + replicator0_out_replicator1_in: endpoint { + remote-endpoint= + <&replicator1_in_replicator0_out>; + }; + }; + }; + + in-ports { + port { + replicator0_in_tmc_etf: endpoint { + remote-endpoint= + <&tmc_etf_out_replicator0>; + }; + }; + }; + }; + + replicator_qdss1: replicator@604a000 { + compatible = "arm,coresight-dynamic-replicator", + "arm,primecell"; + + reg = <0x604a000 0x1000>; + reg-names = "replicator-base"; + + coresight-name = "coresight-replicator-qdss1"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + replicator1_out_funnel_swao: endpoint { + remote-endpoint= + <&funnel_swao_in_replicator1_out>; + }; + }; + }; + + in-ports { + port { + replicator1_in_replicator0_out: endpoint { + remote-endpoint= + <&replicator0_out_replicator1_in>; + }; + }; + }; + }; + + tmc_etr: tmc@6048000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb961>; + reg = <0x6048000 0x1000>, + <0x6064000 0x15000>; + reg-names = "tmc-base", "bam-base"; + + qcom,iommu-dma = "bypass"; + iommus = <&apps_smmu 0x01e0 0>, + <&apps_smmu 0x00a0 0>; + qcom,iommu-dma-addr-pool = <0x0 0xffc00000>; + + #address-cells = <1>; + #size-cells = <1>; + ranges; + + arm,buffer-size = <0x400000>; + + coresight-name = "coresight-tmc-etr"; + coresight-ctis = <&cti0 &cti0>; + qcom,mem_support; + qcom,sw-usb; + dma-coherent; + arm,scatter-gather; + cti-reset-trig-num = <0>; + cti-flush-trig-num = <3>; + coresight-csr = <&csr>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + interrupts = ; + interrupt-names = "byte-cntr-irq"; + + in-ports { + port { + tmc_etr_in_replicator0: endpoint { + remote-endpoint = <&replicator0_out_tmc_etr>; + }; + }; + }; + }; + + turing-qmi { + compatible = "qcom,coresight-qmi"; + + coresight-name = "coresight-qmi-turing"; + qcom,inst-id = <13>; + + in-ports { + port { + qmi_in_turing_etm0: endpoint { + remote-endpoint = + <&turing_etm0_out_qmi>; + }; + }; + }; + }; + + tmc_etf: tmc@6047000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb961>; + + reg = <0x6047000 0x1000>; + reg-names = "tmc-base"; + + coresight-name = "coresight-tmc-etf"; + coresight-ctis = <&cti0 &cti0>; + cti-reset-trig-num = <0>; + cti-flush-trig-num = <1>; + coresight-csr = <&csr>; + arm,default-sink; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + tmc_etf_out_replicator0: endpoint { + remote-endpoint = + <&replicator0_in_tmc_etf>; + }; + }; + }; + + in-ports { + port { + tmc_etf_in_funnel_merg: endpoint { + remote-endpoint = + <&funnel_merg_out_tmc_etf>; + }; + }; + }; + + }; + + funnel_merg: funnel@6045000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb908>; + + reg = <0x6045000 0x1000>; + reg-names = "funnel-base"; + + coresight-name = "coresight-funnel-merg"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + funnel_merg_out_tmc_etf: endpoint { + remote-endpoint = + <&tmc_etf_in_funnel_merg>; + }; + }; + }; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + funnel_merg_in_funnel_in0: endpoint { + remote-endpoint = + <&funnel_in0_out_funnel_merg>; + }; + }; + + port@1 { + reg = <1>; + funnel_merg_in_funnel_in1: endpoint { + remote-endpoint = + <&funnel_in1_out_funnel_merg>; + }; + }; + }; + }; + + funnel_in0: funnel@6041000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb908>; + + reg = <0x6041000 0x1000>; + reg-names = "funnel-base"; + + coresight-name = "coresight-funnel-in0"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + funnel_in0_out_funnel_merg: endpoint { + remote-endpoint = + <&funnel_merg_in_funnel_in0>; + }; + }; + }; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <6>; + funnel_in0_in_funnel_qatb: endpoint { + remote-endpoint = + <&funnel_qatb_out_funnel_in0>; + }; + }; + + port@1 { + reg = <7>; + funnel_in0_in_stm: endpoint { + remote-endpoint = <&stm_out_funnel_in0>; + }; + }; + }; + }; + + funnel_qatb: funnel@6005000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb908>; + + reg = <0x6005000 0x1000>; + reg-names = "funnel-base"; + + coresight-name = "coresight-funnel-qatb"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + funnel_qatb_out_funnel_in0: endpoint { + remote-endpoint = + <&funnel_in0_in_funnel_qatb>; + }; + }; + }; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <0>; + funnel_qatb_in_tpda: endpoint { + remote-endpoint = + <&tpda_out_funnel_qatb>; + }; + }; + + port@2 { + reg = <5>; + funnel_qatb_in_funnel_monaq_1: endpoint { + remote-endpoint = + <&funnel_monaq_1_out_funnel_qatb>; + }; + }; + + port@3 { + reg = <7>; + funnel_qatb_in_funnel_turing_1: endpoint { + remote-endpoint = + <&funnel_turing_1_out_funnel_qatb>; + }; + }; + }; + }; + + tpda: tpda@6004000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b969>; + reg = <0x6004000 0x1000>; + reg-names = "tpda-base"; + + coresight-name = "coresight-tpda-dl"; + + qcom,tpda-atid = <65>; + qcom,bc-elem-size = <10 32>, + <13 32>; + qcom,tc-elem-size = <13 32>; + qcom,dsb-elem-size = <0 32>, + <2 32>, + <3 32>, + <5 32>, + <6 32>, + <10 32>, + <11 32>, + <13 32>; + qcom,cmb-elem-size = <3 64>, + <7 64>, + <13 64>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + tpda_out_funnel_qatb: endpoint { + remote-endpoint = + <&funnel_qatb_in_tpda>; + }; + }; + }; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + tpda_in_tpdm_center: endpoint { + remote-endpoint = + <&tpdm_center_out_tpda>; + }; + }; + + port@1 { + reg = <4>; + tpda_in_funnel_monaq: endpoint { + remote-endpoint = + <&funnel_monaq_out_tpda>; + }; + }; + + port@2 { + reg = <5>; + tpda_in_funnel_ddr_0: endpoint { + remote-endpoint = + <&funnel_ddr_0_out_tpda>; + }; + }; + + port@3 { + reg = <6>; + tpda_in_funnel_turing: endpoint { + remote-endpoint = + <&funnel_turing_out_tpda>; + }; + }; + + port@4 { + reg = <7>; + tpda_in_tpdm_vsense: endpoint { + remote-endpoint = + <&tpdm_vsense_out_tpda>; + }; + }; + + port@5 { + reg = <8>; + tpda_in_tpdm_dcc: endpoint { + remote-endpoint = + <&tpdm_dcc_out_tpda>; + }; + }; + + port@6 { + reg = <9>; + tpda_in_tpdm_prng: endpoint { + remote-endpoint = + <&tpdm_prng_out_tpda>; + }; + }; + + port@7 { + reg = <11>; + tpda_in_tpdm_qm: endpoint { + remote-endpoint = + <&tpdm_qm_out_tpda>; + }; + }; + + port@8 { + reg = <13>; + tpda_in_tpdm_pimem: endpoint { + remote-endpoint = + <&tpdm_pimem_out_tpda>; + }; + }; + + port@9 { + reg = <12>; + tpda_in_tpdm_west: endpoint { + remote-endpoint = + <&tpdm_west_out_tpda>; + }; + }; + }; + }; + + tpdm_wcss: tpdm@699c000 { + compatible = "arm,coresight-dummy-source"; + arm,primecell-periphid = <0x0003b968>; + coresight-name = "coresight-tpdm-wcss"; + qcom,dummy-source; + atid = <24>; + + out-ports { + port { + tpdm_wcss_out_funnel_in1: endpoint { + remote-endpoint = <&funnel_in1_in_tpdm_wcss>; + }; + }; + }; + }; + + tpdm_west: tpdm@6b48000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b968>; + reg = <0x6b48000 0x1000>; + reg-names = "tpdm-base"; + + coresight-name = "coresight-tpdm-west"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + qcom,msr-fix-req; + + out-ports { + port { + tpdm_west_out_tpda: endpoint { + remote-endpoint = <&tpda_in_tpdm_west>; + }; + }; + }; + }; + + tpdm_center: tpdm@6c28000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b968>; + reg = <0x6c28000 0x1000>; + reg-names = "tpdm-base"; + + coresight-name = "coresight-tpdm-center"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + qcom,msr-fix-req; + + out-ports { + port { + tpdm_center_out_tpda: endpoint { + remote-endpoint = <&tpda_in_tpdm_center>; + }; + }; + }; + }; + + funnel_monaq: funnel@69c3000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb908>; + + reg = <0x69c3000 0x1000>; + reg-names = "funnel-base"; + + coresight-name = "coresight-funnel-monaq"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + funnel_monaq_out_tpda: endpoint { + remote-endpoint = + <&tpda_in_funnel_monaq>; + }; + }; + }; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + funnel_monaq_in_tpdm_monaq: endpoint { + remote-endpoint = + <&tpdm_monaq_out_funnel_monaq>; + }; + }; + }; + }; + + funnel_monaq1: funnel_1@69c3000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb908>; + + reg = <0x69c1000 0x1>, + <0x69c3000 0x1000>; + reg-names = "funnel-base-dummy", "funnel-base-real"; + + coresight-name = "coresight-funnel-monaq1"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + qcom,duplicate-funnel; + + out-ports { + port { + funnel_monaq_1_out_funnel_qatb: endpoint { + remote-endpoint = + <&funnel_qatb_in_funnel_monaq_1>; + }; + }; + }; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <1>; + funnel_monaq_1_in_audio_etm0: endpoint { + slave-mode; + remote-endpoint = + <&audio_etm0_out_funnel_monaq_1>; + }; + }; + + port@1 { + reg = <7>; + funnel_monaq_1_in_funnel_modem: endpoint { + slave-mode; + remote-endpoint = + <&funnel_modem_out_funnel_monaq_1>; + }; + }; + + port@2 { + reg = <6>; + funnel_monaq_1_in_modem_etm0: endpoint { + slave-mode; + remote-endpoint = + <&modem_etm0_out_funnel_monaq_1>; + }; + }; + }; + }; + + funnel_modem: funnel@6832000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb908>; + + reg = <0x6832000 0x1000>; + reg-names = "funnel-base"; + + coresight-name = "coresight-funnel-modem"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + funnel_modem_out_funnel_monaq_1: endpoint { + remote-endpoint = + <&funnel_monaq_1_in_funnel_modem>; + }; + }; + }; + + in-ports { + port { + funnel_modem_in_tpda_modem: endpoint { + remote-endpoint = + <&tpda_modem_out_funnel_modem>; + }; + }; + }; + }; + + tpda_modem: tpda@6831000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b969>; + reg = <0x6831000 0x1000>; + reg-names = "tpda-base"; + + coresight-name = "coresight-tpda-modem"; + + qcom,tpda-atid = <67>; + qcom,dsb-elem-size = <0 32>; + qcom,cmb-elem-size = <0 64>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + tpda_modem_out_funnel_modem: endpoint { + remote-endpoint = + <&funnel_modem_in_tpda_modem>; + }; + }; + }; + + in-ports { + port { + tpda_modem_in_tpdm_modem: endpoint { + remote-endpoint = + <&tpdm_modem_out_tpda_modem>; + }; + }; + }; + }; + + tpdm_modem: tpdm@6830000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b968>; + reg = <0x6830000 0x1000>; + reg-names = "tpdm-base"; + + coresight-name = "coresight-tpdm-modem"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + + out-ports { + port { + tpdm_modem_out_tpda_modem: endpoint { + remote-endpoint = <&tpda_modem_in_tpdm_modem>; + }; + }; + }; + }; + + modem_etm0 { + compatible = "qcom,coresight-remote-etm"; + + coresight-name = "coresight-modem-etm0"; + qcom,inst-id = <2>; + atid = <36>; + + out-ports { + port@0 { + reg = <0>; + modem_etm0_out_funnel_monaq_1: endpoint { + remote-endpoint = + <&funnel_monaq_1_in_modem_etm0>; + }; + }; + + port@1 { + reg = <1>; + modem_etm0_out_qmi: endpoint { + remote-endpoint = + <&qmi_in_modem_etm0>; + }; + }; + }; + }; + + modem-qmi { + compatible = "qcom,coresight-qmi"; + + coresight-name = "coresight-qmi-modem"; + qcom,inst-id = <2>; + + in-ports { + port { + qmi_in_modem_etm0: endpoint { + remote-endpoint = + <&modem_etm0_out_qmi>; + }; + }; + }; + }; + + audio_etm0 { + compatible = "qcom,coresight-remote-etm"; + + coresight-name = "coresight-audio-etm0"; + qcom,inst-id = <5>; + atid = <40>; + + out-ports { + port@0 { + reg = <0>; + audio_etm0_out_funnel_monaq_1: endpoint { + remote-endpoint = + <&funnel_monaq_1_in_audio_etm0>; + }; + }; + + port@1 { + reg = <1>; + audio_etm0_out_qmi: endpoint { + remote-endpoint = + <&qmi_in_audio_etm0>; + }; + }; + }; + }; + + audio-qmi { + compatible = "qcom,coresight-qmi"; + + coresight-name = "coresight-qmi-auido"; + qcom,inst-id = <5>; + + in-ports { + port { + qmi_in_audio_etm0: endpoint { + remote-endpoint = + <&audio_etm0_out_qmi>; + }; + }; + }; + }; + + tpdm_monaq: tpdm@69c0000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b968>; + reg = <0x69c0000 0x1000>; + reg-names = "tpdm-base"; + + coresight-name = "coresight-tpdm-monaq"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + tpdm_monaq_out_funnel_monaq: endpoint { + remote-endpoint = + <&funnel_monaq_in_tpdm_monaq>; + }; + }; + }; + }; + + funnel_ddr_0: funnel@6a05000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb908>; + + reg = <0x6a05000 0x1000>; + reg-names = "funnel-base"; + + coresight-name = "coresight-funnel-ddr-0"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + funnel_ddr_0_out_tpda: endpoint { + remote-endpoint = + <&tpda_in_funnel_ddr_0>; + }; + }; + }; + + in-ports { + port { + funnel_ddr_0_in_tpdm_ddr: endpoint { + remote-endpoint = + <&tpdm_ddr_out_funnel_ddr_0>; + }; + }; + }; + }; + + tpdm_ddr: tpdm@6a00000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b968>; + reg = <0x6a00000 0x1000>; + reg-names = "tpdm-base"; + + coresight-name = "coresight-tpdm-ddr"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + qcom,msr-fix-req; + qcom,cmb-msr-skip; + + out-ports { + port { + tpdm_ddr_out_funnel_ddr_0: endpoint { + remote-endpoint = <&funnel_ddr_0_in_tpdm_ddr>; + }; + }; + }; + }; + + funnel_turing: funnel@6861000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb908>; + + reg = <0x6861000 0x1000>; + reg-names = "funnel-base"; + + coresight-name = "coresight-funnel-turing"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + funnel_turing_out_tpda: endpoint { + remote-endpoint = + <&tpda_in_funnel_turing>; + }; + }; + }; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + funnel_turing_in_tpdm_turing: endpoint { + remote-endpoint = + <&tpdm_turing_out_funnel_turing>; + }; + }; + }; + }; + + funnel_turing1: funnel_1@6861000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb908>; + + reg = <0x6867010 0x10>, + <0x6861000 0x1000>; + reg-names = "funnel-base-dummy", "funnel-base-real"; + + coresight-name = "coresight-funnel-turing1"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + qcom,duplicate-funnel; + + out-ports { + + port { + funnel_turing_1_out_funnel_qatb: endpoint { + remote-endpoint = + <&funnel_qatb_in_funnel_turing_1>; + }; + }; + }; + + in-ports { + port { + funnel_turing_1_in_turing_etm0: endpoint { + remote-endpoint = + <&turing_etm0_out_funnel_turing_1>; + }; + }; + }; + }; + + turing_etm0 { + compatible = "qcom,coresight-remote-etm"; + + coresight-name = "coresight-turing-etm0"; + atid = <38>; + trace-name = "turing-etm0"; + + out-ports { + port@0 { + reg = <0>; + turing_etm0_out_funnel_turing_1: endpoint { + remote-endpoint = + <&funnel_turing_1_in_turing_etm0>; + }; + }; + + port@1 { + reg = <1>; + turing_etm0_out_qmi: endpoint { + remote-endpoint = + <&qmi_in_turing_etm0>; + }; + }; + }; + }; + + tpdm_turing: tpdm@6860000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b968>; + reg = <0x6860000 0x1000>; + reg-names = "tpdm-base"; + + coresight-name = "coresight-tpdm-turing"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + qcom,msr-fix-req; + + out-ports { + port { + tpdm_turing_out_funnel_turing: endpoint { + remote-endpoint = + <&funnel_turing_in_tpdm_turing>; + }; + }; + }; + }; + + tpdm_vsense: tpdm@6840000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b968>; + reg = <0x6840000 0x1000>; + reg-names = "tpdm-base"; + + coresight-name = "coresight-tpdm-vsense"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + tpdm_vsense_out_tpda: endpoint { + remote-endpoint = <&tpda_in_tpdm_vsense>; + }; + }; + }; + }; + + tpdm_dcc: tpdm@6870000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b968>; + reg = <0x6870000 0x1000>; + reg-names = "tpdm-base"; + + coresight-name = "coresight-tpdm-dcc"; + + status = "disabled"; + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + tpdm_dcc_out_tpda: endpoint { + remote-endpoint = <&tpda_in_tpdm_dcc>; + }; + }; + }; + }; + + tpdm_prng: tpdm@684c000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b968>; + reg = <0x684c000 0x1000>; + reg-names = "tpdm-base"; + + coresight-name = "coresight-tpdm-prng"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + tpdm_prng_out_tpda: endpoint { + remote-endpoint = <&tpda_in_tpdm_prng>; + }; + }; + }; + }; + + tpdm_qm: tpdm@69d0000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b968>; + reg = <0x69d0000 0x1000>; + reg-names = "tpdm-base"; + + coresight-name = "coresight-tpdm-qm"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + tpdm_qm_out_tpda: endpoint { + remote-endpoint = <&tpda_in_tpdm_qm>; + }; + }; + }; + }; + + tpdm_pimem: tpdm@6850000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b968>; + reg = <0x6850000 0x1000>; + reg-names = "tpdm-base"; + + coresight-name = "coresight-tpdm-pimem"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + tpdm_pimem_out_tpda: endpoint { + remote-endpoint = <&tpda_in_tpdm_pimem>; + }; + }; + }; + }; + + stm: stm@6002000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb962>; + + reg = <0x6002000 0x1000>, + <0x16280000 0x180000>; + reg-names = "stm-base", "stm-stimulus-base"; + + coresight-name = "coresight-stm"; + atid = <16>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + stm_out_funnel_in0: endpoint { + remote-endpoint = <&funnel_in0_in_stm>; + }; + }; + }; + }; + + funnel_in1: funnel@6042000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb908>; + + reg = <0x6042000 0x1000>; + reg-names = "funnel-base"; + + coresight-name = "coresight-funnel-in1"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + funnel_in1_out_funnel_merg: endpoint { + remote-endpoint = + <&funnel_merg_in_funnel_in1>; + }; + }; + }; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <3>; + funnel_in1_in_replicator_swao: endpoint { + remote-endpoint = + <&replicator_swao_out_funnel_in1>; + }; + }; + + port@1 { + reg = <4>; + funnel_in1_in_tpdm_wcss: endpoint { + remote-endpoint = + <&tpdm_wcss_out_funnel_in1>; + }; + }; + + port@2 { + reg = <7>; + funnel_in1_in_funnel_apss_merg: endpoint { + remote-endpoint = + <&funnel_apss_merg_out_funnel_in1>; + }; + }; + }; + }; + + replicator_swao: replicator@6b0a000 { + compatible = "arm,coresight-dynamic-replicator", + "arm,primecell"; + + reg = <0x6b0a000 0x1000>; + reg-names = "replicator-base"; + + coresight-name = "coresight-replicator-swao"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + #address-cells = <1>; + #size-cells = <0>; + + /* Always have EUD before funnel leading to ETR. If both + * sink are active we need to give preference to EUD + * over ETR + */ + port@0 { + reg = <1>; + replicator_swao_out_eud: endpoint { + remote-endpoint = + <&eud_in_replicator_swao>; + }; + }; + + port@1 { + reg = <0>; + replicator_swao_out_funnel_in1: endpoint { + remote-endpoint = + <&funnel_in1_in_replicator_swao>; + }; + }; + }; + + in-ports { + port { + replicator_swao_in_tmc_etf_swao: endpoint { + remote-endpoint = + <&tmc_etf_swao_out_replicator_swao>; + }; + }; + }; + }; + + tmc_etf_swao: tmc@6b09000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb961>; + + reg = <0x6b09000 0x1000>; + reg-names = "tmc-base"; + + coresight-name = "coresight-tmc-etf-swao"; + coresight-csr = <&csr>; + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + tmc_etf_swao_out_replicator_swao: endpoint { + remote-endpoint= + <&replicator_swao_in_tmc_etf_swao>; + }; + }; + }; + + in-ports { + port { + tmc_etf_swao_in_funnel_swao: endpoint { + remote-endpoint= + <&funnel_swao_out_tmc_etf_swao>; + }; + }; + }; + + }; + + swao_csr: csr@6b0e000 { + compatible = "qcom,coresight-csr"; + reg = <0x6b0e000 0x1000>; + reg-names = "csr-base"; + + coresight-name = "coresight-swao-csr"; + qcom,timestamp-support; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + qcom,blk-size = <1>; + }; + + funnel_swao:funnel@6b08000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb908>; + + reg = <0x6b08000 0x1000>; + reg-names = "funnel-base"; + + coresight-name = "coresight-funnel-swao"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + funnel_swao_out_tmc_etf_swao: endpoint { + remote-endpoint = + <&tmc_etf_swao_in_funnel_swao>; + }; + }; + }; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <6>; + funnel_swao_in_replicator1_out: endpoint { + remote-endpoint= + <&replicator1_out_funnel_swao>; + }; + }; + + port@1 { + reg = <7>; + funnel_swao_in_tpda_swao: endpoint { + remote-endpoint= + <&tpda_swao_out_funnel_swao>; + }; + }; + }; + }; + + tpda_swao: tpda@6b01000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b969>; + reg = <0x6b01000 0x1000>; + reg-names = "tpda-base"; + + coresight-name = "coresight-tpda-swao"; + + qcom,tpda-atid = <71>; + qcom,dsb-elem-size = <1 32>; + qcom,cmb-elem-size = <0 64>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + tpda_swao_out_funnel_swao: endpoint { + remote-endpoint = + <&funnel_swao_in_tpda_swao>; + }; + + }; + }; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + tpda_swao_in_tpdm_swao0: endpoint { + remote-endpoint = + <&tpdm_swao0_out_tpda_swao>; + }; + }; + + port@1 { + reg = <1>; + tpda_swao_in_tpdm_swao1: endpoint { + remote-endpoint = + <&tpdm_swao1_out_tpda_swao>; + }; + + }; + }; + }; + + tpdm_swao0: tpdm@6b02000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b968>; + + reg = <0x6b02000 0x1000>; + reg-names = "tpdm-base"; + + coresight-name = "coresight-tpdm-swao-0"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + tpdm_swao0_out_tpda_swao: endpoint { + remote-endpoint = <&tpda_swao_in_tpdm_swao0>; + }; + }; + }; + }; + + tpdm_swao1: tpdm@6b03000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b968>; + reg = <0x6b03000 0x1000>; + reg-names = "tpdm-base"; + + coresight-name="coresight-tpdm-swao-1"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + qcom,msr-fix-req; + + out-ports { + port { + tpdm_swao1_out_tpda_swao: endpoint { + remote-endpoint = <&tpda_swao_in_tpdm_swao1>; + }; + }; + }; + }; + + dummy_eud: dummy_sink { + compatible = "arm,coresight-dummy-sink"; + + coresight-name = "coresight-eud"; + qcom,dummy-sink; + + out-ports { + port { + eud_in_replicator_swao: endpoint { + remote-endpoint = + <&replicator_swao_out_eud>; + }; + }; + }; + }; + + cti0_dlct: cti@6c29000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x6c29000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-dlct_cti0"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; + + cti1_dlct: cti@6c2a000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x6c2a000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-dlct_cti1"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; + + cti0_ddr0: cti@6a02000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x6a02000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-ddr_dl_0_cti0"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; + + cti1_ddr0: cti@6a03000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x6a03000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-ddr_dl_0_cti1"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; + + cti0_ddr1: cti@6a10000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x6a10000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-ddr_dl_1_cti0"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; + + cti1_ddr1: cti@6a11000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x6a11000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-ddr_dl_1_cti1"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; + + cti_mss_q6: cti@683b000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x683b000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-mss-q6"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; + + cti_turing: cti@6867000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x6867000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-turing"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; + + cti2_ssc_sdc: cti@6b10000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x6b10000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-ssc_sdc_cti2"; + status = "disabled"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; + + cti1_ssc: cti@6b11000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x6b11000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-ssc_cti1"; + status = "disabled"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; + + cti0_ssc_q6: cti@6b1b000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x6b1b000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-ssc_q6_cti0"; + status = "disabled"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; + + cti_ssc_noc: cti@6b1e000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x6b1e000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-ssc_noc"; + status = "disabled"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; + + cti6_ssc_noc: cti@6b1f000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x6b1f000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-ssc_noc_cti6"; + status = "disabled"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; + + cti0_swao: cti@6b04000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x6b04000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-swao_cti0"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; + + cti1_swao: cti@6b05000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x6b05000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-swao_cti1"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; + + cti2_swao: cti@6b06000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x6b06000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-swao_cti2"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; + + cti3_swao: cti@6b07000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x6b07000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-swao_cti3"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; + + cti_aop_m3: cti@6b21000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x6b21000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-aop-m3"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; + + cti_titan: cti@6c13000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x6c13000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-titan"; + + status = "disabled"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; + + cti_venus_arm9: cti@6c20000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x6c20000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-venus-arm9"; + + status = "disabled"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; + + cti0_apss: cti@78e0000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x78e0000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-apss_cti0"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; + + cti1_apss: cti@78f0000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x78f0000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-apss_cti1"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; + + cti2_apss: cti@7900000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x7900000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-apss_cti2"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; + + cti0: cti@6010000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x6010000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti0"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + }; + + cti1: cti@6011000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x6011000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti1"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + }; + + cti2: cti@6012000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x6012000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti2"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + }; + + cti3: cti@6013000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x6013000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti3"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + }; + + cti4: cti@6014000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x6014000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti4"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + }; + + cti5: cti@6015000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x6015000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti5"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + }; + + cti6: cti@6016000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x6016000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti6"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + }; + + cti7: cti@6017000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x6017000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti7"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + }; + + cti8: cti@6018000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x6018000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti8"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + }; + + cti9: cti@6019000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x6019000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti9"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + }; + + cti10: cti@601a000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x601a000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti10"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + }; + + cti11: cti@601b000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x601b000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti11"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + }; + + cti12: cti@601c000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x601c000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti12"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + }; + + cti13: cti@601d000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x601d000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti13"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + }; + + cti14: cti@601e000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x601e000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti14"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + }; + + cti15: cti@601f000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x601f000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti15"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + }; + + cti_cpu0: cti@7020000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x7020000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-cpu0"; + cpu = <&CPU0>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + }; + + cti_cpu1: cti@7120000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x7120000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-cpu1"; + cpu = <&CPU1>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; + + cti_cpu2: cti@7220000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x7220000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-cpu2"; + cpu = <&CPU2>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; + + cti_cpu3: cti@7320000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x7320000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-cpu3"; + cpu = <&CPU3>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; + + cti_cpu4: cti@7420000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x7420000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-cpu4"; + cpu = <&CPU4>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; + + cti_cpu5: cti@7520000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x7520000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-cpu5"; + cpu = <&CPU5>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; + + cti_cpu6: cti@7620000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x7620000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-cpu6"; + cpu = <&CPU6>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; + + cti_cpu7: cti@7720000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb922>; + reg = <0x7720000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-cpu7"; + cpu = <&CPU7>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; + + etm0: etm@7040000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb95d>; + + reg = <0x7040000 0x1000>; + cpu = <&CPU0>; + + qcom,tupwr-disable; + coresight-name = "coresight-etm0"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + etm0_out_funnel_apss: endpoint { + remote-endpoint = <&funnel_apss_in_etm0>; + }; + }; + }; + }; + + etm1: etm@7140000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb95d>; + + reg = <0x7140000 0x1000>; + cpu = <&CPU1>; + + qcom,tupwr-disable; + coresight-name = "coresight-etm1"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + etm1_out_funnel_apss: endpoint { + remote-endpoint = <&funnel_apss_in_etm1>; + }; + }; + }; + }; + + etm2: etm@7240000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb95d>; + + reg = <0x7240000 0x1000>; + cpu = <&CPU2>; + + qcom,tupwr-disable; + coresight-name = "coresight-etm2"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + etm2_out_funnel_apss: endpoint { + remote-endpoint = <&funnel_apss_in_etm2>; + }; + }; + }; + }; + + etm3: etm@7340000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb95d>; + + reg = <0x7340000 0x1000>; + cpu = <&CPU3>; + + qcom,tupwr-disable; + coresight-name = "coresight-etm3"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + etm3_out_funnel_apss: endpoint { + remote-endpoint = <&funnel_apss_in_etm3>; + }; + }; + }; + }; + + etm4: etm@7440000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb95d>; + + reg = <0x7440000 0x1000>; + cpu = <&CPU4>; + + qcom,tupwr-disable; + coresight-name = "coresight-etm4"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + etm4_out_funnel_apss: endpoint { + remote-endpoint = <&funnel_apss_in_etm4>; + }; + }; + }; + }; + + etm5: etm@7540000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb95d>; + + reg = <0x7540000 0x1000>; + cpu = <&CPU5>; + + qcom,tupwr-disable; + coresight-name = "coresight-etm5"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + etm5_out_funnel_apss: endpoint { + remote-endpoint = <&funnel_apss_in_etm5>; + }; + }; + }; + }; + + etm6: etm@7640000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb95d>; + + reg = <0x7640000 0x1000>; + cpu = <&CPU6>; + + qcom,tupwr-disable; + coresight-name = "coresight-etm6"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + etm6_out_funnel_apss: endpoint { + remote-endpoint = <&funnel_apss_in_etm6>; + }; + }; + }; + }; + + etm7: etm@7740000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb95d>; + + reg = <0x7740000 0x1000>; + cpu = <&CPU7>; + + qcom,tupwr-disable; + coresight-name = "coresight-etm7"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + etm7_out_funnel_apss: endpoint { + remote-endpoint = <&funnel_apss_in_etm7>; + }; + }; + }; + }; + + funnel_apss_merg: funnel@7810000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb908>; + + reg = <0x7810000 0x1000>; + reg-names = "funnel-base"; + + coresight-name = "coresight-funnel-apss-merg"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + + port { + funnel_apss_merg_out_funnel_in1: endpoint { + remote-endpoint = + <&funnel_in1_in_funnel_apss_merg>; + }; + }; + }; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + funnel_apss_merg_in_funnel_apss: endpoint { + remote-endpoint = + <&funnel_apss_out_funnel_apss_merg>; + }; + }; + + port@1 { + reg = <2>; + funnel_apss_merg_in_tpda_olc: endpoint { + remote-endpoint = + <&tpda_olc_out_funnel_apss_merg>; + }; + }; + + port@2 { + reg = <3>; + funnel_apss_merg_in_tpda_llm_silver: endpoint { + remote-endpoint = + <&tpda_llm_silver_out_funnel_apss_merg>; + }; + }; + + port@3 { + reg = <4>; + funnel_apss_merg_in_tpda_llm_gold: endpoint { + remote-endpoint = + <&tpda_llm_gold_out_funnel_apss_merg>; + }; + }; + + port@4 { + reg = <5>; + funnel_apss_merg_in_tpda_apss: endpoint { + remote-endpoint = + <&tpda_apss_out_funnel_apss_merg>; + }; + }; + }; + }; + + tpda_olc: tpda@7832000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b969>; + reg = <0x7832000 0x1000>; + reg-names = "tpda-base"; + + coresight-name = "coresight-tpda-olc"; + + qcom,tpda-atid = <69>; + qcom,cmb-elem-size = <0 64>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + tpda_olc_out_funnel_apss_merg: endpoint { + remote-endpoint = + <&funnel_apss_merg_in_tpda_olc>; + }; + }; + }; + + in-ports { + port { + tpda_olc_in_tpdm_olc: endpoint { + remote-endpoint = + <&tpdm_olc_out_tpda_olc>; + }; + }; + }; + }; + + tpdm_olc: tpdm@7830000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b968>; + reg = <0x7830000 0x1000>; + reg-names = "tpdm-base"; + + coresight-name = "coresight-tpdm-olc"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + tpdm_olc_out_tpda_olc: endpoint { + remote-endpoint = <&tpda_olc_in_tpdm_olc>; + }; + }; + }; + }; + + tpda_apss: tpda@7862000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b969>; + reg = <0x7862000 0x1000>; + reg-names = "tpda-base"; + + coresight-name = "coresight-tpda-apss"; + + qcom,tpda-atid = <66>; + qcom,dsb-elem-size = <0 32>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + reg = <0>; + tpda_apss_out_funnel_apss_merg: endpoint { + remote-endpoint = + <&funnel_apss_merg_in_tpda_apss>; + }; + }; + }; + + in-ports { + port { + reg = <0>; + tpda_apss_in_tpdm_apss: endpoint { + remote-endpoint = + <&tpdm_apss_out_tpda_apss>; + }; + }; + }; + }; + + tpdm_apss: tpdm@7860000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b968>; + reg = <0x7860000 0x1000>; + reg-names = "tpdm-base"; + + coresight-name = "coresight-tpdm-apss"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + tpdm_apss_out_tpda_apss: endpoint { + remote-endpoint = <&tpda_apss_in_tpdm_apss>; + }; + }; + }; + }; + + tpda_llm_silver: tpda@78c0000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b969>; + reg = <0x78c0000 0x1000>; + reg-names = "tpda-base"; + + coresight-name = "coresight-tpda-llm-silver"; + + qcom,tpda-atid = <72>; + qcom,cmb-elem-size = <0 32>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + tpda_llm_silver_out_funnel_apss_merg: endpoint { + remote-endpoint = + <&funnel_apss_merg_in_tpda_llm_silver>; + }; + }; + }; + + in-ports { + port { + tpda_llm_silver_in_tpdm_llm_silver: endpoint { + remote-endpoint = + <&tpdm_llm_silver_out_tpda_llm_silver>; + }; + }; + }; + }; + + tpdm_llm_silver: tpdm@78a0000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b968>; + reg = <0x78a0000 0x1000>; + reg-names = "tpdm-base"; + + coresight-name = "coresight-tpdm-llm-silver"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + tpdm_llm_silver_out_tpda_llm_silver: endpoint { + remote-endpoint = + <&tpda_llm_silver_in_tpdm_llm_silver>; + }; + }; + }; + }; + + tpda_llm_gold: tpda@78d0000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b969>; + reg = <0x78d0000 0x1000>; + reg-names = "tpda-base"; + + coresight-name = "coresight-tpda-llm-gold"; + + qcom,tpda-atid = <73>; + qcom,cmb-elem-size = <0 32>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + tpda_llm_gold_out_funnel_apss_merg: endpoint { + remote-endpoint = + <&funnel_apss_merg_in_tpda_llm_gold>; + }; + }; + }; + + in-ports { + port { + tpda_llm_gold_in_tpdm_llm_gold: endpoint { + remote-endpoint = + <&tpdm_llm_gold_out_tpda_llm_gold>; + }; + }; + }; + }; + + tpdm_llm_gold: tpdm@78b0000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b968>; + reg = <0x78b0000 0x1000>; + reg-names = "tpdm-base"; + + coresight-name = "coresight-tpdm-llm-gold"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + tpdm_llm_gold_out_tpda_llm_gold: endpoint { + remote-endpoint = + <&tpda_llm_gold_in_tpdm_llm_gold>; + }; + }; + }; + }; + + funnel_apss: funnel@7800000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb908>; + + reg = <0x7800000 0x1000>; + reg-names = "funnel-base"; + + coresight-name = "coresight-funnel-apss"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + funnel_apss_out_funnel_apss_merg: endpoint { + remote-endpoint = + <&funnel_apss_merg_in_funnel_apss>; + }; + }; + }; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <0>; + funnel_apss_in_etm0: endpoint { + remote-endpoint = + <&etm0_out_funnel_apss>; + }; + }; + + port@2 { + reg = <1>; + funnel_apss_in_etm1: endpoint { + remote-endpoint = + <&etm1_out_funnel_apss>; + }; + }; + + port@3 { + reg = <2>; + funnel_apss_in_etm2: endpoint { + remote-endpoint = + <&etm2_out_funnel_apss>; + }; + }; + + port@4 { + reg = <3>; + funnel_apss_in_etm3: endpoint { + remote-endpoint = + <&etm3_out_funnel_apss>; + }; + }; + + port@5 { + reg = <4>; + funnel_apss_in_etm4: endpoint { + remote-endpoint = + <&etm4_out_funnel_apss>; + }; + }; + + port@6 { + reg = <5>; + funnel_apss_in_etm5: endpoint { + remote-endpoint = + <&etm5_out_funnel_apss>; + }; + }; + + port@7 { + reg = <6>; + funnel_apss_in_etm6: endpoint { + remote-endpoint = + <&etm6_out_funnel_apss>; + }; + }; + + port@8 { + reg = <7>; + funnel_apss_in_etm7: endpoint { + remote-endpoint = + <&etm7_out_funnel_apss>; + }; + }; + }; + }; + + ipcb_tgu: tgu@6b0c000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b999>; + reg = <0x06b0c000 0x1000>; + reg-names = "tgu-base"; + tgu-steps = <3>; + tgu-conditions = <4>; + tgu-regs = <4>; + tgu-timer-counters = <8>; + + coresight-name = "coresight-tgu-ipcb"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + }; +}; diff --git a/qcom/sm6150-debug.dtsi b/qcom/sm6150-debug.dtsi new file mode 100644 index 00000000..864db591 --- /dev/null +++ b/qcom/sm6150-debug.dtsi @@ -0,0 +1,1041 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include + +&reserved_memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + dump_mem: mem_dump_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0 0x00000000 0 0xffffffff>; + reusable; + size = <0 0x2800000>; + }; +}; + +&soc { + dcc: dcc_v2@010a2000 { + compatible = "qcom,dcc-v2"; + reg = <0x10a2000 0x1000>, + <0x10ae000 0x2000>; + reg-names = "dcc-base", "dcc-ram-base"; + + dcc-ram-offset = <0x6000>; + link_list_0 { + qcom,curr-link-list = <3>; + qcom,data-sink = "sram"; + qcom,link-list = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + }; + + mem_dump { + compatible = "qcom,mem-dump"; + memory-region = <&dump_mem>; + + static_dump { + qcom,static-mem-dump; + + c0_context { + qcom,dump-size = <0x800>; + qcom,dump-id = <0x0>; + }; + + c100_context { + qcom,dump-size = <0x800>; + qcom,dump-id = <0x1>; + }; + + c200_context { + qcom,dump-size = <0x800>; + qcom,dump-id = <0x2>; + }; + + c300_context { + qcom,dump-size = <0x800>; + qcom,dump-id = <0x3>; + }; + + c400_context { + qcom,dump-size = <0x800>; + qcom,dump-id = <0x4>; + }; + + c500_context { + qcom,dump-size = <0x800>; + qcom,dump-id = <0x5>; + }; + + c600_context { + qcom,dump-size = <0x800>; + qcom,dump-id = <0x6>; + }; + + c700_context { + qcom,dump-size = <0x800>; + qcom,dump-id = <0x7>; + }; + + rpmh { + qcom,dump-size = <0x2000000>; + qcom,dump-id = <0xec>; + }; + + rpm_sw { + qcom,dump-size = <0x28000>; + qcom,dump-id = <0xea>; + }; + + pmic { + qcom,dump-size = <0x10000>; + qcom,dump-id = <0xe4>; + }; + + fcm { + qcom,dump-size = <0x8400>; + qcom,dump-id = <0xee>; + }; + + tmc_etf { + qcom,dump-size = <0x8000>; + qcom,dump-id = <0xf0>; + }; + + etf_swao { + qcom,dump-size = <0x8000>; + qcom,dump-id = <0xf1>; + }; + + etr_reg { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0x100>; + }; + + etf_reg { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0x101>; + }; + + etfswao_reg { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0x102>; + }; + + misc_data { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0xe8>; + }; + + l1_icache0 { + qcom,dump-size = <0x8800>; + qcom,dump-id = <0x60>; + }; + + l1_icache100 { + qcom,dump-size = <0x8800>; + qcom,dump-id = <0x61>; + }; + + l1_icache200 { + qcom,dump-size = <0x8800>; + qcom,dump-id = <0x62>; + }; + + l1_icache300 { + qcom,dump-size = <0x8800>; + qcom,dump-id = <0x63>; + }; + + l1_icache400 { + qcom,dump-size = <0x8800>; + qcom,dump-id = <0x64>; + }; + + l1_icache500 { + qcom,dump-size = <0x8800>; + qcom,dump-id = <0x65>; + }; + + l1_icache600 { + qcom,dump-size = <0x11000>; + qcom,dump-id = <0x66>; + }; + + l1_icache700 { + qcom,dump-size = <0x11000>; + qcom,dump-id = <0x67>; + }; + + l1_dcache0 { + qcom,dump-size = <0x9000>; + qcom,dump-id = <0x80>; + }; + + l1_dcache100 { + qcom,dump-size = <0x9000>; + qcom,dump-id = <0x81>; + }; + + l1_dcache200 { + qcom,dump-size = <0x9000>; + qcom,dump-id = <0x82>; + }; + + l1_dcache300 { + qcom,dump-size = <0x9000>; + qcom,dump-id = <0x83>; + }; + + l1_dcache400 { + qcom,dump-size = <0x9000>; + qcom,dump-id = <0x84>; + }; + + l1_dcache500 { + qcom,dump-size = <0x9000>; + qcom,dump-id = <0x85>; + }; + + l1_dcache600 { + qcom,dump-size = <0x12000>; + qcom,dump-id = <0x86>; + }; + + l1_dcache700 { + qcom,dump-size = <0x12000>; + qcom,dump-id = <0x87>; + }; + + l1_itlb600 { + qcom,dump-size = <0x300>; + qcom,dump-id = <0x26>; + }; + + l1_itlb700 { + qcom,dump-size = <0x300>; + qcom,dump-id = <0x27>; + }; + + l1_dtlb600 { + qcom,dump-size = <0x480>; + qcom,dump-id = <0x46>; + }; + + l1_dtlb700 { + qcom,dump-size = <0x480>; + qcom,dump-id = <0x47>; + }; + + l2_cache600 { + qcom,dump-size = <0x48000>; + qcom,dump-id = <0xc6>; + }; + + l2_cache700 { + qcom,dump-size = <0x48000>; + qcom,dump-id = <0xc7>; + }; + + l2_tlb0 { + qcom,dump-size = <0x5000>; + qcom,dump-id = <0x120>; + }; + + l2_tlb100 { + qcom,dump-size = <0x5000>; + qcom,dump-id = <0x121>; + }; + + l2_tlb200 { + qcom,dump-size = <0x5000>; + qcom,dump-id = <0x122>; + }; + + l2_tlb300 { + qcom,dump-size = <0x5000>; + qcom,dump-id = <0x123>; + }; + + l2_tlb400 { + qcom,dump-size = <0x5000>; + qcom,dump-id = <0x124>; + }; + + l2_tlb500 { + qcom,dump-size = <0x5000>; + qcom,dump-id = <0x125>; + }; + + l2_tlb600 { + qcom,dump-size = <0x7800>; + qcom,dump-id = <0x126>; + }; + + l2_tlb700 { + qcom,dump-size = <0x7800>; + qcom,dump-id = <0x127>; + }; + + llcc1_d_cache { + qcom,dump-size = <0x6c000>; + qcom,dump-id = <0x140>; + }; + }; + }; +}; diff --git a/qcom/sm6150.dtsi b/qcom/sm6150.dtsi index 82ce668f..5389f3eb 100644 --- a/qcom/sm6150.dtsi +++ b/qcom/sm6150.dtsi @@ -2370,6 +2370,8 @@ #include "sm6150-usb.dtsi" #include "sm6150-dma-heaps.dtsi" #include "sm6150-walt.dtsi" +#include "sm6150-coresight.dtsi" +#include "sm6150-debug.dtsi" &tlmm { status = "okay";