From 7dd9375dedc7449e2ec7dfa13fe4dfd44a275309 Mon Sep 17 00:00:00 2001 From: Vishal Miskin Date: Mon, 16 Jun 2025 20:41:24 +0530 Subject: [PATCH] ARM: dts: qcom: Define GPIO pin for wlan tsf sync Use qcom,wlan-tsf-gpio for GPIO based TSF sync feature between host and firmware. Change-Id: Ie60b9ce973427b15ec9a1bd8b9ebba8413cbae89 CRs-Fixed: 4186258 --- bindings/cnss-wlan.yaml | 4 ++-- seraph-peach-cnss.dtsi | 1 + 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/bindings/cnss-wlan.yaml b/bindings/cnss-wlan.yaml index 63ee9ba4..e02fb3ab 100644 --- a/bindings/cnss-wlan.yaml +++ b/bindings/cnss-wlan.yaml @@ -169,7 +169,7 @@ properties: qcom,mhi: description: phandle to indicate the device which needs MHI support. - qcom,cap-tsf-gpio: + qcom,wlan-tsf-gpio: description: | WLAN_TSF_CAPTURED GPIO signal specified by the chip specifications, should be drived depending on products. @@ -305,7 +305,7 @@ examples: qcom,wlan-rc-num = <0>; qcom,wlan-smmu-iova-address = <0 0x10000000>; qcom,mhi = <&mhi_wlan>; - qcom,cap-tsf-gpio = <&tlmm 126 1>; + qcom,wlan-tsf-gpio = <&tlmm 126 1>; }; wlan: qcom,cnss-qca6490@b0000000 { diff --git a/seraph-peach-cnss.dtsi b/seraph-peach-cnss.dtsi index cd910bab..2d1d1456 100644 --- a/seraph-peach-cnss.dtsi +++ b/seraph-peach-cnss.dtsi @@ -86,6 +86,7 @@ wlan-en-gpio = <&tlmm 31 0>; qcom,bt-en-gpio = <&tlmm 32 0>; qcom,sw-ctrl-gpio = <&tlmm 33 0>; + qcom,wlan-tsf-gpio = <&tlmm 71 0>; wlan-host-sol-gpio = <&tlmm 73 0>; wlan-dev-sol-gpio = <&tlmm 74 0>; /* List of GPIOs to be setup for interrupt wakeup capable */