diff --git a/qcom/sm6150-pinctrl.dtsi b/qcom/sm6150-pinctrl.dtsi index 8e57f736..041e2f19 100644 --- a/qcom/sm6150-pinctrl.dtsi +++ b/qcom/sm6150-pinctrl.dtsi @@ -528,6 +528,32 @@ }; qupv3_se7_4uart_pins: qupv3_se7_4uart_pins { + qupv3_se7_default_cts:qupv3_se7_default_cts { + mux { + pins = "gpio10"; + function = "gpio"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; + bias-disable; + }; + }; + + qupv3_se7_default_rts:qupv3_se7_default_rts { + mux { + pins = "gpio11"; + function = "gpio"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; + bias-pull-down; + }; + }; + qupv3_se7_default_tx: qupv3_se7_default_tx { mux { pins = "gpio12"; @@ -541,28 +567,27 @@ }; }; - qupv3_se7_default_ctsrtsrx: - qupv3_se7_default_ctsrtsrx { - mux { - pins = "gpio10", "gpio11", "gpio13"; - function = "gpio"; - }; + qupv3_se7_default_rx: qupv3_se7_default_rx { + mux { + pins = "gpio13"; + function = "gpio"; + }; - config { - pins = "gpio10", "gpio11", "gpio13"; - drive-strength = <2>; - bias-pull-down; - }; + config { + pins = "gpio13"; + drive-strength = <2>; + bias-pull-down; + }; }; - qupv3_se7_ctsrx: qupv3_se7_ctsrx { + qupv3_se7_cts: qupv3_se7_cts { mux { - pins = "gpio10", "gpio13"; + pins = "gpio10"; function = "qup13"; }; config { - pins = "gpio10", "gpio13"; + pins = "gpio10"; drive-strength = <2>; bias-disable; }; @@ -593,6 +618,32 @@ bias-pull-up; }; }; + + qupv3_se7_rx_active: qupv3_se7_rx_active { + mux { + pins = "gpio13"; + function = "qup13"; + }; + + config { + pins = "gpio13"; + drive-strength = <2>; + bias-disable; + }; + }; + + qupv3_se7_rx_wake: qupv3_se7_rx_wake { + mux { + pins = "gpio13"; + function = "gpio"; + }; + + config { + pins = "gpio13"; + drive-strength = <2>; + bias-disable; + }; + }; }; wsa_swr_clk_pin: wsa_swr_clk_pin { diff --git a/qcom/sm6150-qupv3.dtsi b/qcom/sm6150-qupv3.dtsi index 11d2ddd9..24ef6824 100644 --- a/qcom/sm6150-qupv3.dtsi +++ b/qcom/sm6150-qupv3.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - *Copyright (c) 2025, Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ &soc { /* @@ -404,14 +404,14 @@ <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>, <&aggre1_noc MASTER_BLSP_1 &mc_virt SLAVE_EBI1>; pinctrl-names = "default", "active", "sleep", "shutdown"; - pinctrl-0 = <&qupv3_se7_default_ctsrtsrx>, - <&qupv3_se7_default_tx>; - pinctrl-1 = <&qupv3_se7_ctsrx>, <&qupv3_se7_rts>, - <&qupv3_se7_tx>; - pinctrl-2 = <&qupv3_se7_ctsrx>, <&qupv3_se7_rts>, - <&qupv3_se7_tx>; - pinctrl-3 = <&qupv3_se7_default_ctsrtsrx>, - <&qupv3_se7_default_tx>; + pinctrl-0 = <&qupv3_se7_default_cts>, <&qupv3_se7_default_rts>, + <&qupv3_se7_default_tx>, <&qupv3_se7_default_rx>; + pinctrl-1 = <&qupv3_se7_cts>, <&qupv3_se7_rts>, + <&qupv3_se7_tx>, <&qupv3_se7_rx_active>; + pinctrl-2 = <&qupv3_se7_cts>, <&qupv3_se7_default_rts>, + <&qupv3_se7_tx>, <&qupv3_se7_rx_wake>; + pinctrl-3 = <&qupv3_se7_default_cts>, <&qupv3_se7_default_rts>, + <&qupv3_se7_default_tx>, <&qupv3_se7_default_rx>; interrupts-extended = <&intc GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>, <&tlmm 13 IRQ_TYPE_LEVEL_HIGH>; qcom,wakeup-byte = <0xFD>;