From e4def914efc6e2ff48aea510072ca4c42aa7de8d Mon Sep 17 00:00:00 2001
From: Venkata Talluri <quic_vtalluri@quicinc.com>
Date: Wed, 11 Jun 2025 19:30:32 +0530
Subject: [PATCH] ARM: dts: msm: add qdss component for SM6150

Add TPDM/TPDA/TMC/FUNNEL device node on SM6150.

Change-Id: I64fb12e9bfe8510d2377ae77da6e7d84d090daf6
Signed-off-by: Venkata Talluri <quic_vtalluri@quicinc.com>
---
 qcom/sm6150-coresight.dtsi | 2542 ++++++++++++++++++++++++++++++++++++
 qcom/sm6150-debug.dtsi     | 1041 +++++++++++++++
 qcom/sm6150.dtsi           |    2 +
 3 files changed, 3585 insertions(+)
 create mode 100644 qcom/sm6150-coresight.dtsi
 create mode 100644 qcom/sm6150-debug.dtsi

diff --git a/qcom/sm6150-coresight.dtsi b/qcom/sm6150-coresight.dtsi
new file mode 100644
index 00000000..27b33792
--- /dev/null
+++ b/qcom/sm6150-coresight.dtsi
@@ -0,0 +1,2542 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+&soc {
+	csr: csr@6001000 {
+		compatible = "qcom,coresight-csr";
+		reg = <0x6001000 0x1000>;
+		reg-names = "csr-base";
+
+		coresight-name = "coresight-csr";
+		qcom,usb-bam-support;
+		qcom,hwctrl-set-support;
+		qcom,set-byte-cntr-support;
+
+		qcom,blk-size = <1>;
+	};
+
+	replicator_qdss: replicator@6046000 {
+		compatible = "arm,coresight-dynamic-replicator",
+						"arm,primecell";
+
+		reg = <0x6046000 0x1000>;
+		reg-names = "replicator-base";
+
+		coresight-name = "coresight-replicator-qdss";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				replicator0_out_tmc_etr: endpoint {
+					remote-endpoint=
+						<&tmc_etr_in_replicator0>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+				replicator0_out_replicator1_in: endpoint {
+					remote-endpoint=
+					<&replicator1_in_replicator0_out>;
+				};
+			};
+		};
+
+		in-ports {
+			port {
+				replicator0_in_tmc_etf: endpoint {
+					remote-endpoint=
+						<&tmc_etf_out_replicator0>;
+				};
+			};
+		};
+	};
+
+	replicator_qdss1: replicator@604a000 {
+		compatible = "arm,coresight-dynamic-replicator",
+						"arm,primecell";
+
+		reg = <0x604a000 0x1000>;
+		reg-names = "replicator-base";
+
+		coresight-name = "coresight-replicator-qdss1";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				replicator1_out_funnel_swao: endpoint {
+					remote-endpoint=
+					<&funnel_swao_in_replicator1_out>;
+				};
+			};
+		};
+
+		in-ports {
+			port {
+				replicator1_in_replicator0_out: endpoint {
+					remote-endpoint=
+					<&replicator0_out_replicator1_in>;
+				};
+			};
+		};
+	};
+
+	tmc_etr: tmc@6048000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb961>;
+		reg = <0x6048000 0x1000>,
+		      <0x6064000 0x15000>;
+		reg-names = "tmc-base", "bam-base";
+
+		qcom,iommu-dma = "bypass";
+		iommus = <&apps_smmu 0x01e0 0>,
+				<&apps_smmu 0x00a0 0>;
+		qcom,iommu-dma-addr-pool = <0x0 0xffc00000>;
+
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		arm,buffer-size = <0x400000>;
+
+		coresight-name = "coresight-tmc-etr";
+		coresight-ctis = <&cti0 &cti0>;
+		qcom,mem_support;
+		qcom,sw-usb;
+		dma-coherent;
+		arm,scatter-gather;
+		cti-reset-trig-num = <0>;
+		cti-flush-trig-num = <3>;
+		coresight-csr = <&csr>;
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		interrupts = <GIC_SPI 270 IRQ_TYPE_EDGE_RISING>;
+		interrupt-names = "byte-cntr-irq";
+
+		in-ports {
+			port {
+				tmc_etr_in_replicator0: endpoint {
+					remote-endpoint = <&replicator0_out_tmc_etr>;
+				};
+			};
+		};
+	};
+
+	turing-qmi {
+		compatible = "qcom,coresight-qmi";
+
+		coresight-name = "coresight-qmi-turing";
+		qcom,inst-id = <13>;
+
+		in-ports {
+			port {
+				qmi_in_turing_etm0: endpoint {
+					remote-endpoint =
+						<&turing_etm0_out_qmi>;
+				};
+			};
+		};
+	};
+
+	tmc_etf: tmc@6047000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb961>;
+
+		reg = <0x6047000 0x1000>;
+		reg-names = "tmc-base";
+
+		coresight-name = "coresight-tmc-etf";
+		coresight-ctis = <&cti0 &cti0>;
+		cti-reset-trig-num = <0>;
+		cti-flush-trig-num = <1>;
+		coresight-csr = <&csr>;
+		arm,default-sink;
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				tmc_etf_out_replicator0: endpoint {
+					remote-endpoint =
+						<&replicator0_in_tmc_etf>;
+				};
+			};
+		};
+
+		in-ports {
+			port {
+				tmc_etf_in_funnel_merg: endpoint {
+					remote-endpoint =
+						<&funnel_merg_out_tmc_etf>;
+				};
+			};
+		};
+
+	};
+
+	funnel_merg: funnel@6045000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb908>;
+
+		reg = <0x6045000 0x1000>;
+		reg-names = "funnel-base";
+
+		coresight-name = "coresight-funnel-merg";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				funnel_merg_out_tmc_etf: endpoint {
+					remote-endpoint =
+						<&tmc_etf_in_funnel_merg>;
+				};
+			};
+		};
+
+		in-ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				funnel_merg_in_funnel_in0: endpoint {
+					remote-endpoint =
+						<&funnel_in0_out_funnel_merg>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+				funnel_merg_in_funnel_in1: endpoint {
+					remote-endpoint =
+						<&funnel_in1_out_funnel_merg>;
+				};
+			};
+		};
+	};
+
+	funnel_in0: funnel@6041000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb908>;
+
+		reg = <0x6041000 0x1000>;
+		reg-names = "funnel-base";
+
+		coresight-name = "coresight-funnel-in0";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				funnel_in0_out_funnel_merg: endpoint {
+					remote-endpoint =
+						<&funnel_merg_in_funnel_in0>;
+				};
+			};
+		};
+
+		in-ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <6>;
+				funnel_in0_in_funnel_qatb: endpoint {
+					remote-endpoint =
+						<&funnel_qatb_out_funnel_in0>;
+				};
+			};
+
+			port@1 {
+				reg = <7>;
+				funnel_in0_in_stm: endpoint {
+					remote-endpoint = <&stm_out_funnel_in0>;
+				};
+			};
+		};
+	};
+
+	funnel_qatb: funnel@6005000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb908>;
+
+		reg = <0x6005000 0x1000>;
+		reg-names = "funnel-base";
+
+		coresight-name = "coresight-funnel-qatb";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				funnel_qatb_out_funnel_in0: endpoint {
+					remote-endpoint =
+						<&funnel_in0_in_funnel_qatb>;
+				};
+			};
+		};
+
+		in-ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@1 {
+				reg = <0>;
+				funnel_qatb_in_tpda: endpoint {
+					remote-endpoint =
+						<&tpda_out_funnel_qatb>;
+				};
+			};
+
+			port@2 {
+				reg = <5>;
+				funnel_qatb_in_funnel_monaq_1: endpoint {
+					remote-endpoint =
+					    <&funnel_monaq_1_out_funnel_qatb>;
+				};
+			};
+
+			port@3 {
+				reg = <7>;
+				funnel_qatb_in_funnel_turing_1: endpoint {
+					remote-endpoint =
+					    <&funnel_turing_1_out_funnel_qatb>;
+				};
+			};
+		};
+	};
+
+	tpda: tpda@6004000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x0003b969>;
+		reg = <0x6004000 0x1000>;
+		reg-names = "tpda-base";
+
+		coresight-name = "coresight-tpda-dl";
+
+		qcom,tpda-atid = <65>;
+		qcom,bc-elem-size = <10 32>,
+				    <13 32>;
+		qcom,tc-elem-size = <13 32>;
+		qcom,dsb-elem-size = <0 32>,
+				     <2 32>,
+				     <3 32>,
+				     <5 32>,
+				     <6 32>,
+				     <10 32>,
+				     <11 32>,
+				     <13 32>;
+		qcom,cmb-elem-size = <3 64>,
+				     <7 64>,
+				     <13 64>;
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				tpda_out_funnel_qatb: endpoint {
+					remote-endpoint =
+						<&funnel_qatb_in_tpda>;
+				};
+			};
+		};
+
+		in-ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				tpda_in_tpdm_center: endpoint {
+					remote-endpoint =
+						<&tpdm_center_out_tpda>;
+				};
+			};
+
+			port@1 {
+				reg = <4>;
+				tpda_in_funnel_monaq: endpoint {
+					remote-endpoint =
+						<&funnel_monaq_out_tpda>;
+				};
+			};
+
+			port@2 {
+				reg = <5>;
+				tpda_in_funnel_ddr_0: endpoint {
+					remote-endpoint =
+						<&funnel_ddr_0_out_tpda>;
+				};
+			};
+
+			port@3 {
+				reg = <6>;
+				tpda_in_funnel_turing: endpoint {
+					remote-endpoint =
+						<&funnel_turing_out_tpda>;
+				};
+			};
+
+			port@4 {
+				reg = <7>;
+				tpda_in_tpdm_vsense: endpoint {
+					remote-endpoint =
+						<&tpdm_vsense_out_tpda>;
+				};
+			};
+
+			port@5 {
+				reg = <8>;
+				tpda_in_tpdm_dcc: endpoint {
+					remote-endpoint =
+						<&tpdm_dcc_out_tpda>;
+				};
+			};
+
+			port@6 {
+				reg = <9>;
+				tpda_in_tpdm_prng: endpoint {
+					remote-endpoint =
+						<&tpdm_prng_out_tpda>;
+				};
+			};
+
+			port@7 {
+				reg = <11>;
+				tpda_in_tpdm_qm: endpoint {
+					remote-endpoint =
+						<&tpdm_qm_out_tpda>;
+				};
+			};
+
+			port@8 {
+				reg = <13>;
+				tpda_in_tpdm_pimem: endpoint {
+					remote-endpoint =
+						<&tpdm_pimem_out_tpda>;
+				};
+			};
+
+			port@9 {
+				reg = <12>;
+				tpda_in_tpdm_west: endpoint {
+					remote-endpoint =
+						<&tpdm_west_out_tpda>;
+				};
+			};
+		};
+	};
+
+	tpdm_wcss: tpdm@699c000 {
+		compatible = "arm,coresight-dummy-source";
+		arm,primecell-periphid = <0x0003b968>;
+		coresight-name = "coresight-tpdm-wcss";
+		qcom,dummy-source;
+		atid = <24>;
+
+		out-ports {
+			port {
+				tpdm_wcss_out_funnel_in1: endpoint {
+					remote-endpoint = <&funnel_in1_in_tpdm_wcss>;
+				};
+			};
+		};
+	};
+
+	tpdm_west: tpdm@6b48000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x0003b968>;
+		reg = <0x6b48000 0x1000>;
+		reg-names = "tpdm-base";
+
+		coresight-name = "coresight-tpdm-west";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		qcom,msr-fix-req;
+
+		out-ports {
+			port {
+				tpdm_west_out_tpda: endpoint {
+					remote-endpoint = <&tpda_in_tpdm_west>;
+				};
+			};
+		};
+	};
+
+	tpdm_center: tpdm@6c28000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x0003b968>;
+		reg = <0x6c28000 0x1000>;
+		reg-names = "tpdm-base";
+
+		coresight-name = "coresight-tpdm-center";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		qcom,msr-fix-req;
+
+		out-ports {
+			port {
+				tpdm_center_out_tpda: endpoint {
+					remote-endpoint = <&tpda_in_tpdm_center>;
+				};
+			};
+		};
+	};
+
+	funnel_monaq: funnel@69c3000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb908>;
+
+		reg = <0x69c3000 0x1000>;
+		reg-names = "funnel-base";
+
+		coresight-name = "coresight-funnel-monaq";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				funnel_monaq_out_tpda: endpoint {
+					remote-endpoint =
+					    <&tpda_in_funnel_monaq>;
+				};
+			};
+		};
+
+		in-ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			port@0 {
+				reg = <0>;
+				funnel_monaq_in_tpdm_monaq: endpoint {
+					remote-endpoint =
+					    <&tpdm_monaq_out_funnel_monaq>;
+				};
+			};
+		};
+	};
+
+	funnel_monaq1: funnel_1@69c3000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb908>;
+
+		reg = <0x69c1000 0x1>,
+			<0x69c3000 0x1000>;
+		reg-names = "funnel-base-dummy", "funnel-base-real";
+
+		coresight-name = "coresight-funnel-monaq1";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+		qcom,duplicate-funnel;
+
+		out-ports {
+			port {
+				funnel_monaq_1_out_funnel_qatb: endpoint {
+					remote-endpoint =
+					<&funnel_qatb_in_funnel_monaq_1>;
+				};
+			};
+		};
+
+		in-ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			port@0 {
+				reg = <1>;
+				funnel_monaq_1_in_audio_etm0: endpoint {
+					slave-mode;
+					remote-endpoint =
+					<&audio_etm0_out_funnel_monaq_1>;
+				};
+			};
+
+			port@1 {
+				reg = <7>;
+				funnel_monaq_1_in_funnel_modem: endpoint {
+					slave-mode;
+					remote-endpoint =
+					<&funnel_modem_out_funnel_monaq_1>;
+				};
+			};
+
+			port@2 {
+				reg = <6>;
+				funnel_monaq_1_in_modem_etm0: endpoint {
+					slave-mode;
+					remote-endpoint =
+					<&modem_etm0_out_funnel_monaq_1>;
+				};
+			};
+		};
+	};
+
+	funnel_modem: funnel@6832000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb908>;
+
+		reg = <0x6832000 0x1000>;
+		reg-names = "funnel-base";
+
+		coresight-name = "coresight-funnel-modem";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				funnel_modem_out_funnel_monaq_1: endpoint {
+					remote-endpoint =
+					    <&funnel_monaq_1_in_funnel_modem>;
+				};
+			};
+		};
+
+		in-ports {
+			port {
+				funnel_modem_in_tpda_modem: endpoint {
+					remote-endpoint =
+						<&tpda_modem_out_funnel_modem>;
+				};
+			};
+		};
+	};
+
+	tpda_modem: tpda@6831000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x0003b969>;
+		reg = <0x6831000 0x1000>;
+		reg-names = "tpda-base";
+
+		coresight-name = "coresight-tpda-modem";
+
+		qcom,tpda-atid = <67>;
+		qcom,dsb-elem-size = <0 32>;
+		qcom,cmb-elem-size = <0 64>;
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				tpda_modem_out_funnel_modem: endpoint {
+					remote-endpoint =
+						<&funnel_modem_in_tpda_modem>;
+				};
+			};
+		};
+
+		in-ports {
+			port {
+				tpda_modem_in_tpdm_modem: endpoint {
+					remote-endpoint =
+						<&tpdm_modem_out_tpda_modem>;
+				};
+			};
+		};
+	};
+
+	tpdm_modem: tpdm@6830000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x0003b968>;
+		reg = <0x6830000 0x1000>;
+		reg-names = "tpdm-base";
+
+		coresight-name = "coresight-tpdm-modem";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+
+		out-ports {
+			port {
+				tpdm_modem_out_tpda_modem: endpoint {
+					remote-endpoint = <&tpda_modem_in_tpdm_modem>;
+				};
+			};
+		};
+	};
+
+	modem_etm0 {
+		compatible = "qcom,coresight-remote-etm";
+
+		coresight-name = "coresight-modem-etm0";
+		qcom,inst-id = <2>;
+		atid = <36>;
+
+		out-ports {
+			port@0 {
+				reg = <0>;
+				modem_etm0_out_funnel_monaq_1: endpoint {
+					remote-endpoint =
+						<&funnel_monaq_1_in_modem_etm0>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+				modem_etm0_out_qmi: endpoint {
+					remote-endpoint =
+					<&qmi_in_modem_etm0>;
+				};
+			};
+		};
+	};
+
+	modem-qmi {
+		compatible = "qcom,coresight-qmi";
+
+		coresight-name = "coresight-qmi-modem";
+		qcom,inst-id = <2>;
+
+		in-ports {
+			port {
+				qmi_in_modem_etm0: endpoint {
+					remote-endpoint =
+						<&modem_etm0_out_qmi>;
+				};
+			};
+		};
+	};
+
+	audio_etm0 {
+		compatible = "qcom,coresight-remote-etm";
+
+		coresight-name = "coresight-audio-etm0";
+		qcom,inst-id = <5>;
+		atid = <40>;
+
+		out-ports {
+			port@0 {
+				reg = <0>;
+				audio_etm0_out_funnel_monaq_1: endpoint {
+					remote-endpoint =
+						<&funnel_monaq_1_in_audio_etm0>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+				audio_etm0_out_qmi: endpoint {
+					remote-endpoint =
+					<&qmi_in_audio_etm0>;
+				};
+			};
+		};
+	};
+
+	audio-qmi {
+		compatible = "qcom,coresight-qmi";
+
+		coresight-name = "coresight-qmi-auido";
+		qcom,inst-id = <5>;
+
+		in-ports {
+			port {
+				qmi_in_audio_etm0: endpoint {
+					remote-endpoint =
+						<&audio_etm0_out_qmi>;
+				};
+			};
+		};
+	};
+
+	tpdm_monaq: tpdm@69c0000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x0003b968>;
+		reg = <0x69c0000 0x1000>;
+		reg-names = "tpdm-base";
+
+		coresight-name = "coresight-tpdm-monaq";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				tpdm_monaq_out_funnel_monaq: endpoint {
+					remote-endpoint =
+					<&funnel_monaq_in_tpdm_monaq>;
+				};
+			};
+		};
+	};
+
+	funnel_ddr_0: funnel@6a05000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb908>;
+
+		reg = <0x6a05000 0x1000>;
+		reg-names = "funnel-base";
+
+		coresight-name = "coresight-funnel-ddr-0";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				funnel_ddr_0_out_tpda: endpoint {
+					remote-endpoint =
+					    <&tpda_in_funnel_ddr_0>;
+				};
+			};
+		};
+
+		in-ports {
+			port {
+				funnel_ddr_0_in_tpdm_ddr: endpoint {
+					remote-endpoint =
+					    <&tpdm_ddr_out_funnel_ddr_0>;
+				};
+			};
+		};
+	};
+
+	tpdm_ddr: tpdm@6a00000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x0003b968>;
+		reg = <0x6a00000 0x1000>;
+		reg-names = "tpdm-base";
+
+		coresight-name = "coresight-tpdm-ddr";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		qcom,msr-fix-req;
+		qcom,cmb-msr-skip;
+
+		out-ports {
+			port {
+				tpdm_ddr_out_funnel_ddr_0: endpoint {
+					remote-endpoint = <&funnel_ddr_0_in_tpdm_ddr>;
+				};
+			};
+		};
+	};
+
+	funnel_turing: funnel@6861000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb908>;
+
+		reg = <0x6861000 0x1000>;
+		reg-names = "funnel-base";
+
+		coresight-name = "coresight-funnel-turing";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				funnel_turing_out_tpda: endpoint {
+					remote-endpoint =
+					    <&tpda_in_funnel_turing>;
+				};
+			};
+		};
+
+		in-ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			port@0 {
+				reg = <0>;
+				funnel_turing_in_tpdm_turing: endpoint {
+					remote-endpoint =
+					    <&tpdm_turing_out_funnel_turing>;
+				};
+			};
+		};
+	};
+
+	funnel_turing1: funnel_1@6861000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb908>;
+
+		reg = <0x6867010 0x10>,
+			<0x6861000 0x1000>;
+		reg-names = "funnel-base-dummy", "funnel-base-real";
+
+		coresight-name = "coresight-funnel-turing1";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		qcom,duplicate-funnel;
+
+		out-ports {
+
+			port {
+				funnel_turing_1_out_funnel_qatb: endpoint {
+					remote-endpoint =
+					    <&funnel_qatb_in_funnel_turing_1>;
+				};
+			};
+		};
+
+		in-ports {
+			port {
+				funnel_turing_1_in_turing_etm0: endpoint {
+					remote-endpoint =
+					    <&turing_etm0_out_funnel_turing_1>;
+				};
+			};
+		};
+	};
+
+	turing_etm0 {
+		compatible = "qcom,coresight-remote-etm";
+
+		coresight-name = "coresight-turing-etm0";
+		atid = <38>;
+		trace-name = "turing-etm0";
+
+		out-ports {
+			port@0 {
+				reg = <0>;
+				turing_etm0_out_funnel_turing_1: endpoint {
+					remote-endpoint =
+						<&funnel_turing_1_in_turing_etm0>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+				turing_etm0_out_qmi: endpoint {
+					remote-endpoint =
+						<&qmi_in_turing_etm0>;
+				};
+			};
+		};
+	};
+
+	tpdm_turing: tpdm@6860000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x0003b968>;
+		reg = <0x6860000 0x1000>;
+		reg-names = "tpdm-base";
+
+		coresight-name = "coresight-tpdm-turing";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		qcom,msr-fix-req;
+
+		out-ports {
+			port {
+				tpdm_turing_out_funnel_turing: endpoint {
+					remote-endpoint =
+						<&funnel_turing_in_tpdm_turing>;
+				};
+			};
+		};
+	};
+
+	tpdm_vsense: tpdm@6840000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x0003b968>;
+		reg = <0x6840000 0x1000>;
+		reg-names = "tpdm-base";
+
+		coresight-name = "coresight-tpdm-vsense";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				tpdm_vsense_out_tpda: endpoint {
+					remote-endpoint = <&tpda_in_tpdm_vsense>;
+				};
+			};
+		};
+	};
+
+	tpdm_dcc: tpdm@6870000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x0003b968>;
+		reg = <0x6870000 0x1000>;
+		reg-names = "tpdm-base";
+
+		coresight-name = "coresight-tpdm-dcc";
+
+		status = "disabled";
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				tpdm_dcc_out_tpda: endpoint {
+					remote-endpoint = <&tpda_in_tpdm_dcc>;
+				};
+			};
+		};
+	};
+
+	tpdm_prng: tpdm@684c000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x0003b968>;
+		reg = <0x684c000 0x1000>;
+		reg-names = "tpdm-base";
+
+		coresight-name = "coresight-tpdm-prng";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				tpdm_prng_out_tpda: endpoint {
+					remote-endpoint = <&tpda_in_tpdm_prng>;
+				};
+			};
+		};
+	};
+
+	tpdm_qm: tpdm@69d0000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x0003b968>;
+		reg = <0x69d0000 0x1000>;
+		reg-names = "tpdm-base";
+
+		coresight-name = "coresight-tpdm-qm";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				tpdm_qm_out_tpda: endpoint {
+					remote-endpoint = <&tpda_in_tpdm_qm>;
+				};
+			};
+		};
+	};
+
+	tpdm_pimem: tpdm@6850000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x0003b968>;
+		reg = <0x6850000 0x1000>;
+		reg-names = "tpdm-base";
+
+		coresight-name = "coresight-tpdm-pimem";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				tpdm_pimem_out_tpda: endpoint {
+					remote-endpoint = <&tpda_in_tpdm_pimem>;
+				};
+			};
+		};
+	};
+
+	stm: stm@6002000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb962>;
+
+		reg = <0x6002000 0x1000>,
+		      <0x16280000 0x180000>;
+		reg-names = "stm-base", "stm-stimulus-base";
+
+		coresight-name = "coresight-stm";
+		atid = <16>;
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				stm_out_funnel_in0: endpoint {
+					remote-endpoint = <&funnel_in0_in_stm>;
+				};
+			};
+		};
+	};
+
+	funnel_in1: funnel@6042000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb908>;
+
+		reg = <0x6042000 0x1000>;
+		reg-names = "funnel-base";
+
+		coresight-name = "coresight-funnel-in1";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				funnel_in1_out_funnel_merg: endpoint {
+					remote-endpoint =
+						<&funnel_merg_in_funnel_in1>;
+				};
+			};
+		};
+
+		in-ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <3>;
+				funnel_in1_in_replicator_swao: endpoint {
+					remote-endpoint =
+					    <&replicator_swao_out_funnel_in1>;
+				};
+			};
+
+			port@1 {
+				reg = <4>;
+				funnel_in1_in_tpdm_wcss: endpoint {
+					remote-endpoint =
+						<&tpdm_wcss_out_funnel_in1>;
+				};
+			};
+
+			port@2 {
+				reg = <7>;
+				funnel_in1_in_funnel_apss_merg: endpoint {
+					remote-endpoint =
+					<&funnel_apss_merg_out_funnel_in1>;
+				};
+			};
+		};
+	};
+
+	replicator_swao: replicator@6b0a000 {
+		compatible = "arm,coresight-dynamic-replicator",
+						"arm,primecell";
+
+		reg = <0x6b0a000 0x1000>;
+		reg-names = "replicator-base";
+
+		coresight-name = "coresight-replicator-swao";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			/* Always have EUD before funnel leading to ETR. If both
+			 * sink are active we need to give preference to EUD
+			 * over ETR
+			 */
+			port@0 {
+				reg = <1>;
+				replicator_swao_out_eud: endpoint {
+					remote-endpoint =
+					  <&eud_in_replicator_swao>;
+				};
+			};
+
+			port@1 {
+				reg = <0>;
+				replicator_swao_out_funnel_in1: endpoint {
+					remote-endpoint =
+					<&funnel_in1_in_replicator_swao>;
+				};
+			};
+		};
+
+		in-ports {
+			port {
+				replicator_swao_in_tmc_etf_swao: endpoint {
+					remote-endpoint =
+					  <&tmc_etf_swao_out_replicator_swao>;
+				};
+			};
+		};
+	};
+
+	tmc_etf_swao: tmc@6b09000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb961>;
+
+		reg = <0x6b09000 0x1000>;
+		reg-names = "tmc-base";
+
+		coresight-name = "coresight-tmc-etf-swao";
+		coresight-csr = <&csr>;
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				tmc_etf_swao_out_replicator_swao: endpoint {
+					remote-endpoint=
+					  <&replicator_swao_in_tmc_etf_swao>;
+				};
+			};
+		};
+
+		in-ports {
+			port {
+				tmc_etf_swao_in_funnel_swao: endpoint {
+					remote-endpoint=
+					  <&funnel_swao_out_tmc_etf_swao>;
+				};
+			};
+		};
+
+	};
+
+	swao_csr: csr@6b0e000 {
+		compatible = "qcom,coresight-csr";
+		reg = <0x6b0e000 0x1000>;
+		reg-names = "csr-base";
+
+		coresight-name = "coresight-swao-csr";
+		qcom,timestamp-support;
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		qcom,blk-size = <1>;
+	};
+
+	funnel_swao:funnel@6b08000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb908>;
+
+		reg = <0x6b08000 0x1000>;
+		reg-names = "funnel-base";
+
+		coresight-name = "coresight-funnel-swao";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				funnel_swao_out_tmc_etf_swao: endpoint {
+					remote-endpoint =
+						<&tmc_etf_swao_in_funnel_swao>;
+				};
+			};
+		};
+
+		in-ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <6>;
+				funnel_swao_in_replicator1_out: endpoint {
+					remote-endpoint=
+						<&replicator1_out_funnel_swao>;
+				};
+			};
+
+			port@1 {
+				reg = <7>;
+				funnel_swao_in_tpda_swao: endpoint {
+					remote-endpoint=
+						<&tpda_swao_out_funnel_swao>;
+				};
+			};
+		};
+	};
+
+	tpda_swao: tpda@6b01000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x0003b969>;
+		reg = <0x6b01000 0x1000>;
+		reg-names = "tpda-base";
+
+		coresight-name = "coresight-tpda-swao";
+
+		qcom,tpda-atid = <71>;
+		qcom,dsb-elem-size = <1 32>;
+		qcom,cmb-elem-size = <0 64>;
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				tpda_swao_out_funnel_swao: endpoint {
+					remote-endpoint =
+						<&funnel_swao_in_tpda_swao>;
+				};
+
+			};
+		};
+
+		in-ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				tpda_swao_in_tpdm_swao0: endpoint {
+					remote-endpoint =
+						<&tpdm_swao0_out_tpda_swao>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+				tpda_swao_in_tpdm_swao1: endpoint {
+					remote-endpoint =
+						<&tpdm_swao1_out_tpda_swao>;
+				};
+
+			};
+		};
+	};
+
+	tpdm_swao0: tpdm@6b02000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x0003b968>;
+
+		reg = <0x6b02000 0x1000>;
+		reg-names = "tpdm-base";
+
+		coresight-name = "coresight-tpdm-swao-0";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				tpdm_swao0_out_tpda_swao: endpoint {
+				remote-endpoint = <&tpda_swao_in_tpdm_swao0>;
+				};
+			};
+		};
+	};
+
+	tpdm_swao1: tpdm@6b03000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x0003b968>;
+		reg = <0x6b03000 0x1000>;
+		reg-names = "tpdm-base";
+
+		coresight-name="coresight-tpdm-swao-1";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		qcom,msr-fix-req;
+
+		out-ports {
+			port {
+				tpdm_swao1_out_tpda_swao: endpoint {
+					remote-endpoint = <&tpda_swao_in_tpdm_swao1>;
+				};
+			};
+		};
+	};
+
+	dummy_eud: dummy_sink {
+		compatible = "arm,coresight-dummy-sink";
+
+		coresight-name = "coresight-eud";
+		qcom,dummy-sink;
+
+		out-ports {
+			port {
+				eud_in_replicator_swao: endpoint {
+					remote-endpoint =
+						<&replicator_swao_out_eud>;
+				};
+			};
+		};
+	};
+
+	cti0_dlct: cti@6c29000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x6c29000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-dlct_cti0";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+
+	cti1_dlct: cti@6c2a000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x6c2a000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-dlct_cti1";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+
+	cti0_ddr0: cti@6a02000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x6a02000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-ddr_dl_0_cti0";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+
+	cti1_ddr0: cti@6a03000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x6a03000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-ddr_dl_0_cti1";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+
+	cti0_ddr1: cti@6a10000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x6a10000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-ddr_dl_1_cti0";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+
+	cti1_ddr1: cti@6a11000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x6a11000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-ddr_dl_1_cti1";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+
+	cti_mss_q6: cti@683b000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x683b000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-mss-q6";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+
+	cti_turing: cti@6867000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x6867000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-turing";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+
+	cti2_ssc_sdc: cti@6b10000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x6b10000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-ssc_sdc_cti2";
+		status = "disabled";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+
+	cti1_ssc: cti@6b11000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x6b11000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-ssc_cti1";
+		status = "disabled";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+
+	cti0_ssc_q6: cti@6b1b000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x6b1b000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-ssc_q6_cti0";
+		status = "disabled";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+
+	cti_ssc_noc: cti@6b1e000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x6b1e000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-ssc_noc";
+		status = "disabled";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+
+	cti6_ssc_noc: cti@6b1f000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x6b1f000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-ssc_noc_cti6";
+		status = "disabled";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+
+	cti0_swao: cti@6b04000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x6b04000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-swao_cti0";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+
+	cti1_swao: cti@6b05000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x6b05000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-swao_cti1";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+
+	cti2_swao: cti@6b06000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x6b06000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-swao_cti2";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+
+	cti3_swao: cti@6b07000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x6b07000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-swao_cti3";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+
+	cti_aop_m3: cti@6b21000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x6b21000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-aop-m3";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+
+	cti_titan: cti@6c13000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x6c13000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-titan";
+
+		status = "disabled";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+
+	cti_venus_arm9: cti@6c20000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x6c20000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-venus-arm9";
+
+		status = "disabled";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+
+	cti0_apss: cti@78e0000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x78e0000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-apss_cti0";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+
+	cti1_apss: cti@78f0000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x78f0000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-apss_cti1";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+
+	cti2_apss: cti@7900000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x7900000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-apss_cti2";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+
+	cti0: cti@6010000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x6010000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti0";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+	};
+
+	cti1: cti@6011000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x6011000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti1";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+	};
+
+	cti2: cti@6012000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x6012000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti2";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+	};
+
+	cti3: cti@6013000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x6013000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti3";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+	};
+
+	cti4: cti@6014000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x6014000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti4";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+	};
+
+	cti5: cti@6015000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x6015000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti5";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+	};
+
+	cti6: cti@6016000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x6016000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti6";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+	};
+
+	cti7: cti@6017000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x6017000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti7";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+	};
+
+	cti8: cti@6018000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x6018000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti8";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+	};
+
+	cti9: cti@6019000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x6019000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti9";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+	};
+
+	cti10: cti@601a000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x601a000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti10";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+	};
+
+	cti11: cti@601b000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x601b000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti11";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+	};
+
+	cti12: cti@601c000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x601c000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti12";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+	};
+
+	cti13: cti@601d000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x601d000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti13";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+	};
+
+	cti14: cti@601e000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x601e000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti14";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+	};
+
+	cti15: cti@601f000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x601f000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti15";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+	};
+
+	cti_cpu0: cti@7020000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x7020000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-cpu0";
+		cpu = <&CPU0>;
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+	};
+
+	cti_cpu1: cti@7120000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x7120000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-cpu1";
+		cpu = <&CPU1>;
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+
+	cti_cpu2: cti@7220000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x7220000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-cpu2";
+		cpu = <&CPU2>;
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+
+	cti_cpu3: cti@7320000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x7320000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-cpu3";
+		cpu = <&CPU3>;
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+
+	cti_cpu4: cti@7420000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x7420000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-cpu4";
+		cpu = <&CPU4>;
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+
+	cti_cpu5: cti@7520000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x7520000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-cpu5";
+		cpu = <&CPU5>;
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+
+	cti_cpu6: cti@7620000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x7620000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-cpu6";
+		cpu = <&CPU6>;
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+
+	cti_cpu7: cti@7720000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb922>;
+		reg = <0x7720000 0x1000>;
+		reg-names = "cti-base";
+
+		coresight-name = "coresight-cti-cpu7";
+		cpu = <&CPU7>;
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+
+	etm0: etm@7040000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb95d>;
+
+		reg = <0x7040000 0x1000>;
+		cpu = <&CPU0>;
+
+		qcom,tupwr-disable;
+		coresight-name = "coresight-etm0";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				etm0_out_funnel_apss: endpoint {
+					remote-endpoint = <&funnel_apss_in_etm0>;
+				};
+			};
+		};
+	};
+
+	etm1: etm@7140000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb95d>;
+
+		reg = <0x7140000 0x1000>;
+		cpu = <&CPU1>;
+
+		qcom,tupwr-disable;
+		coresight-name = "coresight-etm1";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				etm1_out_funnel_apss: endpoint {
+					remote-endpoint = <&funnel_apss_in_etm1>;
+				};
+			};
+		};
+	};
+
+	etm2: etm@7240000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb95d>;
+
+		reg = <0x7240000 0x1000>;
+		cpu = <&CPU2>;
+
+		qcom,tupwr-disable;
+		coresight-name = "coresight-etm2";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				etm2_out_funnel_apss: endpoint {
+					remote-endpoint = <&funnel_apss_in_etm2>;
+				};
+			};
+		};
+	};
+
+	etm3: etm@7340000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb95d>;
+
+		reg = <0x7340000 0x1000>;
+		cpu = <&CPU3>;
+
+		qcom,tupwr-disable;
+		coresight-name = "coresight-etm3";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				etm3_out_funnel_apss: endpoint {
+					remote-endpoint = <&funnel_apss_in_etm3>;
+				};
+			};
+		};
+	};
+
+	etm4: etm@7440000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb95d>;
+
+		reg = <0x7440000 0x1000>;
+		cpu = <&CPU4>;
+
+		qcom,tupwr-disable;
+		coresight-name = "coresight-etm4";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				etm4_out_funnel_apss: endpoint {
+					remote-endpoint = <&funnel_apss_in_etm4>;
+				};
+			};
+		};
+	};
+
+	etm5: etm@7540000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb95d>;
+
+		reg = <0x7540000 0x1000>;
+		cpu = <&CPU5>;
+
+		qcom,tupwr-disable;
+		coresight-name = "coresight-etm5";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				etm5_out_funnel_apss: endpoint {
+					remote-endpoint = <&funnel_apss_in_etm5>;
+				};
+			};
+		};
+	};
+
+	etm6: etm@7640000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb95d>;
+
+		reg = <0x7640000 0x1000>;
+		cpu = <&CPU6>;
+
+		qcom,tupwr-disable;
+		coresight-name = "coresight-etm6";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				etm6_out_funnel_apss: endpoint {
+					remote-endpoint = <&funnel_apss_in_etm6>;
+				};
+			};
+		};
+	};
+
+	etm7: etm@7740000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb95d>;
+
+		reg = <0x7740000 0x1000>;
+		cpu = <&CPU7>;
+
+		qcom,tupwr-disable;
+		coresight-name = "coresight-etm7";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				etm7_out_funnel_apss: endpoint {
+					remote-endpoint = <&funnel_apss_in_etm7>;
+				};
+			};
+		};
+	};
+
+	funnel_apss_merg: funnel@7810000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb908>;
+
+		reg = <0x7810000 0x1000>;
+		reg-names = "funnel-base";
+
+		coresight-name = "coresight-funnel-apss-merg";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+
+			port {
+				funnel_apss_merg_out_funnel_in1: endpoint {
+					remote-endpoint =
+					    <&funnel_in1_in_funnel_apss_merg>;
+				};
+			};
+		};
+
+		in-ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				funnel_apss_merg_in_funnel_apss: endpoint {
+					remote-endpoint =
+					    <&funnel_apss_out_funnel_apss_merg>;
+				};
+			};
+
+			port@1 {
+				reg = <2>;
+				funnel_apss_merg_in_tpda_olc: endpoint {
+					remote-endpoint =
+					    <&tpda_olc_out_funnel_apss_merg>;
+				};
+			};
+
+			port@2 {
+				reg = <3>;
+				funnel_apss_merg_in_tpda_llm_silver: endpoint {
+					remote-endpoint =
+					<&tpda_llm_silver_out_funnel_apss_merg>;
+				};
+			};
+
+			port@3 {
+				reg = <4>;
+				funnel_apss_merg_in_tpda_llm_gold: endpoint {
+					remote-endpoint =
+					  <&tpda_llm_gold_out_funnel_apss_merg>;
+				};
+			};
+
+			port@4 {
+				reg = <5>;
+				funnel_apss_merg_in_tpda_apss: endpoint {
+					remote-endpoint =
+					  <&tpda_apss_out_funnel_apss_merg>;
+				};
+			};
+		};
+	};
+
+	tpda_olc: tpda@7832000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x0003b969>;
+		reg = <0x7832000 0x1000>;
+		reg-names = "tpda-base";
+
+		coresight-name = "coresight-tpda-olc";
+
+		qcom,tpda-atid = <69>;
+		qcom,cmb-elem-size = <0 64>;
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				tpda_olc_out_funnel_apss_merg: endpoint {
+					remote-endpoint =
+						<&funnel_apss_merg_in_tpda_olc>;
+				};
+			};
+		};
+
+		in-ports {
+			port {
+				tpda_olc_in_tpdm_olc: endpoint {
+					remote-endpoint =
+						<&tpdm_olc_out_tpda_olc>;
+				};
+			};
+		};
+	};
+
+	tpdm_olc: tpdm@7830000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x0003b968>;
+		reg = <0x7830000 0x1000>;
+		reg-names = "tpdm-base";
+
+		coresight-name = "coresight-tpdm-olc";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				tpdm_olc_out_tpda_olc: endpoint {
+					remote-endpoint = <&tpda_olc_in_tpdm_olc>;
+				};
+			};
+		};
+	};
+
+	tpda_apss: tpda@7862000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x0003b969>;
+		reg = <0x7862000 0x1000>;
+		reg-names = "tpda-base";
+
+		coresight-name = "coresight-tpda-apss";
+
+		qcom,tpda-atid = <66>;
+		qcom,dsb-elem-size = <0 32>;
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				reg = <0>;
+				tpda_apss_out_funnel_apss_merg: endpoint {
+					remote-endpoint =
+					       <&funnel_apss_merg_in_tpda_apss>;
+				};
+			};
+		};
+
+		in-ports {
+			port {
+				reg = <0>;
+				tpda_apss_in_tpdm_apss: endpoint {
+					remote-endpoint =
+						<&tpdm_apss_out_tpda_apss>;
+				};
+			};
+		};
+	};
+
+	tpdm_apss: tpdm@7860000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x0003b968>;
+		reg = <0x7860000 0x1000>;
+		reg-names = "tpdm-base";
+
+		coresight-name = "coresight-tpdm-apss";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				tpdm_apss_out_tpda_apss: endpoint {
+					remote-endpoint = <&tpda_apss_in_tpdm_apss>;
+				};
+			};
+		};
+	};
+
+	tpda_llm_silver: tpda@78c0000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x0003b969>;
+		reg = <0x78c0000 0x1000>;
+		reg-names = "tpda-base";
+
+		coresight-name = "coresight-tpda-llm-silver";
+
+		qcom,tpda-atid = <72>;
+		qcom,cmb-elem-size = <0 32>;
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				tpda_llm_silver_out_funnel_apss_merg: endpoint {
+					remote-endpoint =
+					<&funnel_apss_merg_in_tpda_llm_silver>;
+				};
+			};
+		};
+
+		in-ports {
+			port {
+				tpda_llm_silver_in_tpdm_llm_silver: endpoint {
+					remote-endpoint =
+					<&tpdm_llm_silver_out_tpda_llm_silver>;
+				};
+			};
+		};
+	};
+
+	tpdm_llm_silver: tpdm@78a0000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x0003b968>;
+		reg = <0x78a0000 0x1000>;
+		reg-names = "tpdm-base";
+
+		coresight-name = "coresight-tpdm-llm-silver";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				tpdm_llm_silver_out_tpda_llm_silver: endpoint {
+					remote-endpoint =
+						<&tpda_llm_silver_in_tpdm_llm_silver>;
+				};
+			};
+		};
+	};
+
+	tpda_llm_gold: tpda@78d0000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x0003b969>;
+		reg = <0x78d0000 0x1000>;
+		reg-names = "tpda-base";
+
+		coresight-name = "coresight-tpda-llm-gold";
+
+		qcom,tpda-atid = <73>;
+		qcom,cmb-elem-size = <0 32>;
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				tpda_llm_gold_out_funnel_apss_merg: endpoint {
+						remote-endpoint =
+						<&funnel_apss_merg_in_tpda_llm_gold>;
+					};
+				};
+			};
+
+		in-ports {
+			port {
+				tpda_llm_gold_in_tpdm_llm_gold: endpoint {
+					remote-endpoint =
+					  <&tpdm_llm_gold_out_tpda_llm_gold>;
+				};
+			};
+		};
+	};
+
+	tpdm_llm_gold: tpdm@78b0000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x0003b968>;
+		reg = <0x78b0000 0x1000>;
+		reg-names = "tpdm-base";
+
+		coresight-name = "coresight-tpdm-llm-gold";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				tpdm_llm_gold_out_tpda_llm_gold: endpoint {
+					remote-endpoint =
+						<&tpda_llm_gold_in_tpdm_llm_gold>;
+				};
+			};
+		};
+	};
+
+	funnel_apss: funnel@7800000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x000bb908>;
+
+		reg = <0x7800000 0x1000>;
+		reg-names = "funnel-base";
+
+		coresight-name = "coresight-funnel-apss";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				funnel_apss_out_funnel_apss_merg: endpoint {
+					remote-endpoint =
+					    <&funnel_apss_merg_in_funnel_apss>;
+				};
+			};
+		};
+
+		in-ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@1 {
+				reg = <0>;
+				funnel_apss_in_etm0: endpoint {
+					remote-endpoint =
+						<&etm0_out_funnel_apss>;
+				};
+			};
+
+			port@2 {
+				reg = <1>;
+				funnel_apss_in_etm1: endpoint {
+					remote-endpoint =
+						<&etm1_out_funnel_apss>;
+				};
+			};
+
+			port@3 {
+				reg = <2>;
+				funnel_apss_in_etm2: endpoint {
+					remote-endpoint =
+						<&etm2_out_funnel_apss>;
+				};
+			};
+
+			port@4 {
+				reg = <3>;
+				funnel_apss_in_etm3: endpoint {
+					remote-endpoint =
+						<&etm3_out_funnel_apss>;
+				};
+			};
+
+			port@5 {
+				reg = <4>;
+				funnel_apss_in_etm4: endpoint {
+					remote-endpoint =
+						<&etm4_out_funnel_apss>;
+				};
+			};
+
+			port@6 {
+				reg = <5>;
+				funnel_apss_in_etm5: endpoint {
+					remote-endpoint =
+						<&etm5_out_funnel_apss>;
+				};
+			};
+
+			port@7 {
+				reg = <6>;
+				funnel_apss_in_etm6: endpoint {
+					remote-endpoint =
+						<&etm6_out_funnel_apss>;
+				};
+			};
+
+			port@8 {
+				reg = <7>;
+				funnel_apss_in_etm7: endpoint {
+					remote-endpoint =
+						<&etm7_out_funnel_apss>;
+				};
+			};
+		};
+	};
+
+	ipcb_tgu: tgu@6b0c000 {
+		compatible = "arm,primecell";
+		arm,primecell-periphid = <0x0003b999>;
+		reg = <0x06b0c000 0x1000>;
+		reg-names = "tgu-base";
+		tgu-steps = <3>;
+		tgu-conditions = <4>;
+		tgu-regs = <4>;
+		tgu-timer-counters = <8>;
+
+		coresight-name = "coresight-tgu-ipcb";
+
+		clocks = <&aoss_qmp>;
+		clock-names = "apb_pclk";
+	};
+};
diff --git a/qcom/sm6150-debug.dtsi b/qcom/sm6150-debug.dtsi
new file mode 100644
index 00000000..864db591
--- /dev/null
+++ b/qcom/sm6150-debug.dtsi
@@ -0,0 +1,1041 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#include <dt-bindings/soc/qcom,dcc_v2.h>
+
+&reserved_memory {
+	#address-cells = <2>;
+	#size-cells = <2>;
+	ranges;
+
+	dump_mem: mem_dump_region {
+		compatible = "shared-dma-pool";
+		alloc-ranges = <0 0x00000000 0 0xffffffff>;
+		reusable;
+		size = <0 0x2800000>;
+	};
+};
+
+&soc {
+	dcc: dcc_v2@010a2000 {
+		compatible = "qcom,dcc-v2";
+		reg = <0x10a2000 0x1000>,
+		      <0x10ae000 0x2000>;
+		reg-names = "dcc-base", "dcc-ram-base";
+
+		dcc-ram-offset = <0x6000>;
+		link_list_0 {
+			qcom,curr-link-list = <3>;
+			qcom,data-sink = "sram";
+			qcom,link-list = <DCC_READ 0x9680000 1 0>,
+				<DCC_READ 0x9680004 1 0>,
+				<DCC_READ 0x9681000 1 0>,
+				<DCC_READ 0x9681004 1 0>,
+				<DCC_READ 0x9681008 1 0>,
+				<DCC_READ 0x968100c 1 0>,
+				<DCC_READ 0x9681010 1 0>,
+				<DCC_READ 0x9681014 1 0>,
+				<DCC_READ 0x968101c 1 0>,
+				<DCC_READ 0x9681020 1 0>,
+				<DCC_READ 0x9681024 1 0>,
+				<DCC_READ 0x9681028 1 0>,
+				<DCC_READ 0x968102c 1 0>,
+				<DCC_READ 0x9681030 1 0>,
+				<DCC_READ 0x9681034 1 0>,
+				<DCC_READ 0x968103c 1 0>,
+				<DCC_READ 0x9698100 1 0>,
+				<DCC_READ 0x9698104 1 0>,
+				<DCC_READ 0x9698108 1 0>,
+				<DCC_READ 0x9698110 1 0>,
+				<DCC_READ 0x9698120 1 0>,
+				<DCC_READ 0x9698124 1 0>,
+				<DCC_READ 0x9698128 1 0>,
+				<DCC_READ 0x969812c 1 0>,
+				<DCC_READ 0x9698130 1 0>,
+				<DCC_READ 0x9698134 1 0>,
+				<DCC_READ 0x9698138 1 0>,
+				<DCC_READ 0x969813c 1 0>,
+				<DCC_READ 0x9698500 1 0>,
+				<DCC_READ 0x9698504 1 0>,
+				<DCC_READ 0x9698508 1 0>,
+				<DCC_READ 0x969850c 1 0>,
+				<DCC_READ 0x9698510 1 0>,
+				<DCC_READ 0x9698514 1 0>,
+				<DCC_READ 0x9698518 1 0>,
+				<DCC_READ 0x969851c 1 0>,
+				<DCC_READ 0x9698700 1 0>,
+				<DCC_READ 0x9698704 1 0>,
+				<DCC_READ 0x9698708 1 0>,
+				<DCC_READ 0x969870c 1 0>,
+				<DCC_READ 0x9698714 1 0>,
+				<DCC_READ 0x9698718 1 0>,
+				<DCC_READ 0x969871c 1 0>,
+				<DCC_READ 0x1620204 1 0>,
+				<DCC_READ 0x1620240 1 0>,
+				<DCC_READ 0x1620248 1 0>,
+				<DCC_READ 0x1620288 1 0>,
+				<DCC_READ 0x162028C 1 0>,
+				<DCC_READ 0x1620290 1 0>,
+				<DCC_READ 0x1620294 1 0>,
+				<DCC_READ 0x16202A8 1 0>,
+				<DCC_READ 0x16202AC 1 0>,
+				<DCC_READ 0x16202B0 1 0>,
+				<DCC_READ 0x16202B4 1 0>,
+				<DCC_READ 0x1620300 1 0>,
+				<DCC_READ 0x1700204 1 0>,
+				<DCC_READ 0x1700240 1 0>,
+				<DCC_READ 0x1700248 1 0>,
+				<DCC_READ 0x1700288 1 0>,
+				<DCC_READ 0x1700290 1 0>,
+				<DCC_READ 0x1700300 1 0>,
+				<DCC_READ 0x1700304 1 0>,
+				<DCC_READ 0x1700308 1 0>,
+				<DCC_READ 0x170030C 1 0>,
+				<DCC_READ 0x1700310 1 0>,
+				<DCC_READ 0x1700314 1 0>,
+				<DCC_READ 0x1700C08 1 0>,
+				<DCC_READ 0x1700C10 1 0>,
+				<DCC_READ 0x1700C20 1 0>,
+				<DCC_READ 0x1700C24 1 0>,
+				<DCC_READ 0x1700C28 1 0>,
+				<DCC_READ 0x1700C2C 1 0>,
+				<DCC_READ 0x1700C30 1 0>,
+				<DCC_READ 0x1700C34 1 0>,
+				<DCC_READ 0x1700C38 1 0>,
+				<DCC_READ 0x1700C3C 1 0>,
+				<DCC_READ 0x1740240 1 0>,
+				<DCC_READ 0x1740248 1 0>,
+				<DCC_READ 0x1740288 1 0>,
+				<DCC_READ 0x1740290 1 0>,
+				<DCC_READ 0x1740300 1 0>,
+				<DCC_READ 0x1740304 1 0>,
+				<DCC_READ 0x1740308 1 0>,
+				<DCC_READ 0x174030C 1 0>,
+				<DCC_READ 0x1740310 1 0>,
+				<DCC_READ 0x1740314 1 0>,
+				<DCC_READ 0x1740004 1 0>,
+				<DCC_READ 0x1740008 1 0>,
+				<DCC_READ 0x1740010 1 0>,
+				<DCC_READ 0x1740020 1 0>,
+				<DCC_READ 0x1740024 1 0>,
+				<DCC_READ 0x1740028 1 0>,
+				<DCC_READ 0x174002C 1 0>,
+				<DCC_READ 0x1740030 1 0>,
+				<DCC_READ 0x1740034 1 0>,
+				<DCC_READ 0x1740038 1 0>,
+				<DCC_READ 0x174003C 1 0>,
+				<DCC_READ 0x9698204 1 0>,
+				<DCC_READ 0x9698240 1 0>,
+				<DCC_READ 0x9698244 1 0>,
+				<DCC_READ 0x9698248 1 0>,
+				<DCC_READ 0x969824C 1 0>,
+				<DCC_READ 0x9681010 1 0>,
+				<DCC_READ 0x9681014 1 0>,
+				<DCC_READ 0x9681018 1 0>,
+				<DCC_READ 0x968101C 1 0>,
+				<DCC_READ 0x9681020 1 0>,
+				<DCC_READ 0x9681024 1 0>,
+				<DCC_READ 0x9681028 1 0>,
+				<DCC_READ 0x968102C 1 0>,
+				<DCC_READ 0x9681030 1 0>,
+				<DCC_READ 0x9681034 1 0>,
+				<DCC_READ 0x968103C 1 0>,
+				<DCC_READ 0x9698100 1 0>,
+				<DCC_READ 0x9698104 1 0>,
+				<DCC_READ 0x9698108 1 0>,
+				<DCC_READ 0x9698110 1 0>,
+				<DCC_READ 0x9698120 1 0>,
+				<DCC_READ 0x9698124 1 0>,
+				<DCC_READ 0x9698128 1 0>,
+				<DCC_READ 0x969812C 1 0>,
+				<DCC_READ 0x9698130 1 0>,
+				<DCC_READ 0x9698134 1 0>,
+				<DCC_READ 0x9698138 1 0>,
+				<DCC_READ 0x969813C 1 0>,
+				<DCC_READ 0x62BE2004 1 0>,
+				<DCC_READ 0x62BE2040 1 0>,
+				<DCC_READ 0x62BE2048 1 0>,
+				<DCC_READ 0x62BE2088 1 0>,
+				<DCC_READ 0x62BE2090 1 0>,
+				<DCC_READ 0x62BE2100 1 0>,
+				<DCC_READ 0x62BE2104 1 0>,
+				<DCC_READ 0x62BE2108 1 0>,
+				<DCC_READ 0x62BE210C 1 0>,
+				<DCC_READ 0x62BE2110 1 0>,
+				<DCC_READ 0x62BE2114 1 0>,
+				<DCC_READ 0x62BE2118 1 0>,
+				<DCC_READ 0x62BE0010 1 0>,
+				<DCC_READ 0x62BE0020 1 0>,
+				<DCC_READ 0x62BE0024 1 0>,
+				<DCC_READ 0x62BE0028 1 0>,
+				<DCC_READ 0x62BE002C 1 0>,
+				<DCC_READ 0x62BE0030 1 0>,
+				<DCC_READ 0x62BE0034 1 0>,
+				<DCC_READ 0x62BE0038 1 0>,
+				<DCC_READ 0x62BE003C 1 0>,
+				<DCC_READ 0x9160204 1 0>,
+				<DCC_READ 0x9160240 1 0>,
+				<DCC_READ 0x9160248 1 0>,
+				<DCC_READ 0x9160288 1 0>,
+				<DCC_READ 0x9160290 1 0>,
+				<DCC_READ 0x9160300 1 0>,
+				<DCC_READ 0x9160304 1 0>,
+				<DCC_READ 0x9160308 1 0>,
+				<DCC_READ 0x916030C 1 0>,
+				<DCC_READ 0x9160310 1 0>,
+				<DCC_READ 0x9160314 1 0>,
+				<DCC_READ 0x9160318 1 0>,
+				<DCC_READ 0x9160008 1 0>,
+				<DCC_READ 0x9160010 1 0>,
+				<DCC_READ 0x9160020 1 0>,
+				<DCC_READ 0x9160024 1 0>,
+				<DCC_READ 0x9160028 1 0>,
+				<DCC_READ 0x916002C 1 0>,
+				<DCC_READ 0x9160030 1 0>,
+				<DCC_READ 0x9160034 1 0>,
+				<DCC_READ 0x9160038 1 0>,
+				<DCC_READ 0x916003C 1 0>,
+				<DCC_READ 0x1620500 4 0>,
+				<DCC_READ 0x1620700 4 0>,
+				<DCC_READ 0x1620300 1 0>,
+				<DCC_READ 0x1620F00 2 0>,
+				<DCC_READ 0x1620B00 2 0>,
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+				<DCC_READ 0x00103000 1 0>,
+				<DCC_READ 0x00103004 1 0>,
+				<DCC_READ 0x00103008 1 0>,
+				<DCC_READ 0x0010300C 1 0>,
+				<DCC_READ 0x00103010 1 0>,
+				<DCC_READ 0x00103014 1 0>,
+				<DCC_READ 0x00103018 1 0>,
+				<DCC_READ 0x0010301C 1 0>,
+				<DCC_READ 0x00103020 1 0>,
+				<DCC_READ 0x00103024 1 0>,
+				<DCC_READ 0x00103028 1 0>,
+				<DCC_READ 0x0010302C 1 0>,
+				<DCC_READ 0x00103030 1 0>,
+				<DCC_READ 0x00103034 1 0>,
+				<DCC_READ 0x00113000 1 0>,
+				<DCC_READ 0x00113004 1 0>,
+				<DCC_READ 0x00113008 1 0>,
+				<DCC_READ 0x0011300C 1 0>,
+				<DCC_READ 0x00113010 1 0>,
+				<DCC_READ 0x00113014 1 0>,
+				<DCC_READ 0x00113018 1 0>,
+				<DCC_READ 0x0011301C 1 0>,
+				<DCC_READ 0x00113020 1 0>,
+				<DCC_READ 0x00113024 1 0>,
+				<DCC_READ 0x00113028 1 0>,
+				<DCC_READ 0x0011302C 1 0>,
+				<DCC_READ 0x00113030 1 0>,
+				<DCC_READ 0x00113034 1 0>,
+				<DCC_READ 0x0011A000 1 0>,
+				<DCC_READ 0x0011A004 1 0>,
+				<DCC_READ 0x0011A008 1 0>,
+				<DCC_READ 0x0011A00C 1 0>,
+				<DCC_READ 0x0011A010 1 0>,
+				<DCC_READ 0x0011A014 1 0>,
+				<DCC_READ 0x0011A018 1 0>,
+				<DCC_READ 0x0011A01C 1 0>,
+				<DCC_READ 0x0011A020 1 0>,
+				<DCC_READ 0x0011A024 1 0>,
+				<DCC_READ 0x0011A028 1 0>,
+				<DCC_READ 0x0011A02C 1 0>,
+				<DCC_READ 0x0011A030 1 0>,
+				<DCC_READ 0x0011A034 1 0>,
+				<DCC_READ 0x0011B000 1 0>,
+				<DCC_READ 0x0011B004 1 0>,
+				<DCC_READ 0x0011B008 1 0>,
+				<DCC_READ 0x0011B00C 1 0>,
+				<DCC_READ 0x0011B010 1 0>,
+				<DCC_READ 0x0011B014 1 0>,
+				<DCC_READ 0x0011B018 1 0>,
+				<DCC_READ 0x0011B01C 1 0>,
+				<DCC_READ 0x0011B020 1 0>,
+				<DCC_READ 0x0011B024 1 0>,
+				<DCC_READ 0x0011B028 1 0>,
+				<DCC_READ 0x0011B02C 1 0>,
+				<DCC_READ 0x0011B030 1 0>,
+				<DCC_READ 0x0011B034 1 0>,
+				<DCC_READ 0x00174000 1 0>,
+				<DCC_READ 0x00174004 1 0>,
+				<DCC_READ 0x00174008 1 0>,
+				<DCC_READ 0x0017400C 1 0>,
+				<DCC_READ 0x00174010 1 0>,
+				<DCC_READ 0x00174014 1 0>,
+				<DCC_READ 0x00174018 1 0>,
+				<DCC_READ 0x0017401C 1 0>,
+				<DCC_READ 0x00174020 1 0>,
+				<DCC_READ 0x00174024 1 0>,
+				<DCC_READ 0x00174028 1 0>,
+				<DCC_READ 0x0017402C 1 0>,
+				<DCC_READ 0x00174030 1 0>,
+				<DCC_READ 0x00174034 1 0>,
+				<DCC_READ 0x00176000 1 0>,
+				<DCC_READ 0x00176004 1 0>,
+				<DCC_READ 0x00176008 1 0>,
+				<DCC_READ 0x0017600C 1 0>,
+				<DCC_READ 0x00176010 1 0>,
+				<DCC_READ 0x00176014 1 0>,
+				<DCC_READ 0x00176018 1 0>,
+				<DCC_READ 0x0017601C 1 0>,
+				<DCC_READ 0x00176020 1 0>,
+				<DCC_READ 0x00176024 1 0>,
+				<DCC_READ 0x00176028 1 0>,
+				<DCC_READ 0x0017602C 1 0>,
+				<DCC_READ 0x00176030 1 0>,
+				<DCC_READ 0x00176034 1 0>,
+				<DCC_READ 0x0010401C 1 0>,
+				<DCC_READ 0x00183024 1 0>,
+				<DCC_READ 0x00144168 1 0>,
+				<DCC_READ 0x0011702C 1 0>,
+				<DCC_READ 0x0010904C 1 0>,
+				<DCC_READ 0x00189038 1 0>,
+				<DCC_READ 0x001443E8 1 0>,
+				<DCC_READ 0x001442B8 1 0>,
+				<DCC_READ 0x00105060 1 0>,
+				<DCC_READ 0x00141024 1 0>,
+				<DCC_READ 0x00145038 1 0>,
+				<DCC_READ 0x00109004 1 0>,
+				<DCC_READ 0x00189004 1 0>,
+				<DCC_READ 0x00190004 1 0>,
+				<DCC_READ 0x0C2A0000 1 0>,
+				<DCC_READ 0x0C2A0004 1 0>,
+				<DCC_READ 0x0C2A0008 1 0>,
+				<DCC_READ 0x0C2A000C 1 0>,
+				<DCC_READ 0x0C2A0010 1 0>,
+				<DCC_READ 0x0C2A0014 1 0>,
+				<DCC_READ 0x0C2A0018 1 0>,
+				<DCC_READ 0x0C2A001C 1 0>,
+				<DCC_READ 0x0C2A0020 1 0>,
+				<DCC_READ 0x0C2A0024 1 0>,
+				<DCC_READ 0x0C2A0028 1 0>,
+				<DCC_READ 0x0C2A002C 1 0>,
+				<DCC_READ 0x0C2A0030 1 0>,
+				<DCC_READ 0x0C2A0034 1 0>,
+				<DCC_READ 0x0C2A1000 1 0>,
+				<DCC_READ 0x0C2A1004 1 0>,
+				<DCC_READ 0x0C2A1008 1 0>,
+				<DCC_READ 0x0C2A100C 1 0>,
+				<DCC_READ 0x0C2A1010 1 0>,
+				<DCC_READ 0x0C2A1014 1 0>,
+				<DCC_READ 0x0C2A1018 1 0>,
+				<DCC_READ 0x0C2A101C 1 0>,
+				<DCC_READ 0x0C2A1020 1 0>,
+				<DCC_READ 0x0C2A1024 1 0>,
+				<DCC_READ 0x0C2A1028 1 0>,
+				<DCC_READ 0x0C2A102C 1 0>,
+				<DCC_READ 0x0C2A1030 1 0>,
+				<DCC_READ 0x0C2A2260 1 0>,
+				<DCC_READ 0x0C2A2264 1 0>,
+				<DCC_READ 0x0C2A3008 1 0>,
+				<DCC_READ 0x0C2A300C 1 0>,
+				<DCC_READ 0x0C2A3010 1 0>,
+				<DCC_READ 0x0C2A3014 1 0>,
+				<DCC_READ 0x0C2A3024 1 0>,
+				<DCC_READ 0x0C2A2034 1 0>,
+				<DCC_READ 0x0C2A214C 1 0>,
+				<DCC_READ 0x0C2A2150 1 0>,
+				<DCC_READ 0x0C2A2154 1 0>,
+				<DCC_READ 0x0C2630A0 4 0>,
+				<DCC_READ 0x0C2630B0 4 0>,
+				<DCC_READ 0x0C2630C0 4 0>,
+				<DCC_READ 0x0C2630D0 4 0>,
+				<DCC_READ 0x1800005C 1 0>,
+				<DCC_READ 0x1801005C 1 0>,
+				<DCC_READ 0x1802005C 1 0>,
+				<DCC_READ 0x1803005C 1 0>,
+				<DCC_READ 0x1804005C 1 0>,
+				<DCC_READ 0x1805005C 1 0>,
+				<DCC_READ 0x1806005C 1 0>,
+				<DCC_READ 0x1807005C 1 0>;
+		};
+	};
+
+	mem_dump {
+		compatible = "qcom,mem-dump";
+		memory-region = <&dump_mem>;
+
+		static_dump {
+			qcom,static-mem-dump;
+
+			c0_context {
+				qcom,dump-size = <0x800>;
+				qcom,dump-id = <0x0>;
+			};
+
+			c100_context {
+				qcom,dump-size = <0x800>;
+				qcom,dump-id = <0x1>;
+			};
+
+			c200_context {
+				qcom,dump-size = <0x800>;
+				qcom,dump-id = <0x2>;
+			};
+
+			c300_context {
+				qcom,dump-size = <0x800>;
+				qcom,dump-id = <0x3>;
+			};
+
+			c400_context {
+				qcom,dump-size = <0x800>;
+				qcom,dump-id = <0x4>;
+			};
+
+			c500_context {
+				qcom,dump-size = <0x800>;
+				qcom,dump-id = <0x5>;
+			};
+
+			c600_context {
+				qcom,dump-size = <0x800>;
+				qcom,dump-id = <0x6>;
+			};
+
+			c700_context {
+				qcom,dump-size = <0x800>;
+				qcom,dump-id = <0x7>;
+			};
+
+			rpmh {
+				qcom,dump-size = <0x2000000>;
+				qcom,dump-id = <0xec>;
+			};
+
+			rpm_sw {
+				qcom,dump-size = <0x28000>;
+				qcom,dump-id = <0xea>;
+			};
+
+			pmic {
+				qcom,dump-size = <0x10000>;
+				qcom,dump-id = <0xe4>;
+			};
+
+			fcm {
+				qcom,dump-size = <0x8400>;
+				qcom,dump-id = <0xee>;
+			};
+
+			tmc_etf {
+				qcom,dump-size = <0x8000>;
+				qcom,dump-id = <0xf0>;
+			};
+
+			etf_swao {
+				qcom,dump-size = <0x8000>;
+				qcom,dump-id = <0xf1>;
+			};
+
+			etr_reg {
+				qcom,dump-size = <0x1000>;
+				qcom,dump-id = <0x100>;
+			};
+
+			etf_reg {
+				qcom,dump-size = <0x1000>;
+				qcom,dump-id = <0x101>;
+			};
+
+			etfswao_reg {
+				qcom,dump-size = <0x1000>;
+				qcom,dump-id = <0x102>;
+			};
+
+			misc_data {
+				qcom,dump-size = <0x1000>;
+				qcom,dump-id = <0xe8>;
+			};
+
+			l1_icache0 {
+				qcom,dump-size = <0x8800>;
+				qcom,dump-id = <0x60>;
+			};
+
+			l1_icache100 {
+				qcom,dump-size = <0x8800>;
+				qcom,dump-id = <0x61>;
+			};
+
+			l1_icache200 {
+				qcom,dump-size = <0x8800>;
+				qcom,dump-id = <0x62>;
+			};
+
+			l1_icache300 {
+				qcom,dump-size = <0x8800>;
+				qcom,dump-id = <0x63>;
+			};
+
+			l1_icache400 {
+				qcom,dump-size = <0x8800>;
+				qcom,dump-id = <0x64>;
+			};
+
+			l1_icache500 {
+				qcom,dump-size = <0x8800>;
+				qcom,dump-id = <0x65>;
+			};
+
+			l1_icache600 {
+				qcom,dump-size = <0x11000>;
+				qcom,dump-id = <0x66>;
+			};
+
+			l1_icache700 {
+				qcom,dump-size = <0x11000>;
+				qcom,dump-id = <0x67>;
+			};
+
+			l1_dcache0 {
+				qcom,dump-size = <0x9000>;
+				qcom,dump-id = <0x80>;
+			};
+
+			l1_dcache100 {
+				qcom,dump-size = <0x9000>;
+				qcom,dump-id = <0x81>;
+			};
+
+			l1_dcache200 {
+				qcom,dump-size = <0x9000>;
+				qcom,dump-id = <0x82>;
+			};
+
+			l1_dcache300 {
+				qcom,dump-size = <0x9000>;
+				qcom,dump-id = <0x83>;
+			};
+
+			l1_dcache400 {
+				qcom,dump-size = <0x9000>;
+				qcom,dump-id = <0x84>;
+			};
+
+			l1_dcache500 {
+				qcom,dump-size = <0x9000>;
+				qcom,dump-id = <0x85>;
+			};
+
+			l1_dcache600 {
+				qcom,dump-size = <0x12000>;
+				qcom,dump-id = <0x86>;
+			};
+
+			l1_dcache700 {
+				qcom,dump-size = <0x12000>;
+				qcom,dump-id = <0x87>;
+			};
+
+			l1_itlb600 {
+				qcom,dump-size = <0x300>;
+				qcom,dump-id = <0x26>;
+			};
+
+			l1_itlb700 {
+				qcom,dump-size = <0x300>;
+				qcom,dump-id = <0x27>;
+			};
+
+			l1_dtlb600 {
+				qcom,dump-size = <0x480>;
+				qcom,dump-id = <0x46>;
+			};
+
+			l1_dtlb700 {
+				qcom,dump-size = <0x480>;
+				qcom,dump-id = <0x47>;
+			};
+
+			l2_cache600 {
+				qcom,dump-size = <0x48000>;
+				qcom,dump-id = <0xc6>;
+			};
+
+			l2_cache700 {
+				qcom,dump-size = <0x48000>;
+				qcom,dump-id = <0xc7>;
+			};
+
+			l2_tlb0 {
+				qcom,dump-size = <0x5000>;
+				qcom,dump-id = <0x120>;
+			};
+
+			l2_tlb100 {
+				qcom,dump-size = <0x5000>;
+				qcom,dump-id = <0x121>;
+			};
+
+			l2_tlb200 {
+				qcom,dump-size = <0x5000>;
+				qcom,dump-id = <0x122>;
+			};
+
+			l2_tlb300 {
+				qcom,dump-size = <0x5000>;
+				qcom,dump-id = <0x123>;
+			};
+
+			l2_tlb400 {
+				qcom,dump-size = <0x5000>;
+				qcom,dump-id = <0x124>;
+			};
+
+			l2_tlb500 {
+				qcom,dump-size = <0x5000>;
+				qcom,dump-id = <0x125>;
+			};
+
+			l2_tlb600 {
+				qcom,dump-size = <0x7800>;
+				qcom,dump-id = <0x126>;
+			};
+
+			l2_tlb700 {
+				qcom,dump-size = <0x7800>;
+				qcom,dump-id = <0x127>;
+			};
+
+			llcc1_d_cache {
+				qcom,dump-size = <0x6c000>;
+				qcom,dump-id = <0x140>;
+			};
+		};
+	};
+};
diff --git a/qcom/sm6150.dtsi b/qcom/sm6150.dtsi
index 82ce668f..5389f3eb 100644
--- a/qcom/sm6150.dtsi
+++ b/qcom/sm6150.dtsi
@@ -2370,6 +2370,8 @@
 #include "sm6150-usb.dtsi"
 #include "sm6150-dma-heaps.dtsi"
 #include "sm6150-walt.dtsi"
+#include "sm6150-coresight.dtsi"
+#include "sm6150-debug.dtsi"
 
 &tlmm {
 	status = "okay";