Files
Po-Kai Chi 8db3e3d631 [ALPS05072042] mt6885: platform driver migration
platform driver migration:
  - cache ecc
  - dfd
  - pmu
  - bus tracer
  - gic
  - systracker
  - usb2jtag

MTK-Commit-Id: da8affe470bc0c0ba8969a3775963de97f5f0b1e

Change-Id: Ia4ed9565ef094c90453eb1168368e39cbc6ae2a4
CR-Id: ALPS05072042
Feature: System Performance
Signed-off-by: Po-Kai Chi <pk.chi@mediatek.com>
2020-07-16 23:50:45 +08:00

56 lines
1.5 KiB
Plaintext

#
# Performance Monitor Drivers
#
menu "Performance monitor support"
depends on PERF_EVENTS
config ARM_PMU
depends on ARM || ARM64
bool "ARM PMU framework"
default y
help
Say y if you want to use CPU performance monitors on ARM-based
systems.
config ARM_PMU_ACPI
depends on ARM_PMU && ACPI
def_bool y
config ARM_DSU_PMU
tristate "ARM DynamIQ Shared Unit (DSU) PMU"
depends on ARM64 && PERF_EVENTS
help
Provides support for performance monitor unit in ARM DynamIQ Shared
Unit (DSU). The DSU integrates one or more cores with an L3 memory
system, control logic. The PMU allows counting various events related
to DSU.
config QCOM_L2_PMU
bool "Qualcomm Technologies L2-cache PMU"
depends on ARCH_QCOM && ARM64 && ACPI
help
Provides support for the L2 cache performance monitor unit (PMU)
in Qualcomm Technologies processors.
Adds the L2 cache PMU into the perf events subsystem for
monitoring L2 cache events.
config QCOM_L3_PMU
bool "Qualcomm Technologies L3-cache PMU"
depends on ARCH_QCOM && ARM64 && ACPI
select QCOM_IRQ_COMBINER
help
Provides support for the L3 cache performance monitor unit (PMU)
in Qualcomm Technologies processors.
Adds the L3 cache PMU into the perf events subsystem for
monitoring L3 cache events.
config XGENE_PMU
depends on ARCH_XGENE
bool "APM X-Gene SoC PMU"
default n
help
Say y if you want to use APM X-Gene SoC performance monitors.
endmenu