diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h index 29cb5f1e2e51..49bb9a020a09 100644 --- a/arch/arm64/include/asm/io.h +++ b/arch/arm64/include/asm/io.h @@ -30,35 +30,38 @@ #include #include #include -#include #include /* * Generic IO read/write. These perform native-endian accesses. - * that some architectures will want to re-define __raw_{read,write}w. */ -static inline void __raw_writeb_no_log(u8 val, volatile void __iomem *addr) +#define __raw_writeb __raw_writeb +static inline void __raw_writeb(u8 val, volatile void __iomem *addr) { asm volatile("strb %w0, [%1]" : : "rZ" (val), "r" (addr)); } -static inline void __raw_writew_no_log(u16 val, volatile void __iomem *addr) +#define __raw_writew __raw_writew +static inline void __raw_writew(u16 val, volatile void __iomem *addr) { asm volatile("strh %w0, [%1]" : : "rZ" (val), "r" (addr)); } -static inline void __raw_writel_no_log(u32 val, volatile void __iomem *addr) +#define __raw_writel __raw_writel +static inline void __raw_writel(u32 val, volatile void __iomem *addr) { asm volatile("str %w0, [%1]" : : "rZ" (val), "r" (addr)); } -static inline void __raw_writeq_no_log(u64 val, volatile void __iomem *addr) +#define __raw_writeq __raw_writeq +static inline void __raw_writeq(u64 val, volatile void __iomem *addr) { asm volatile("str %x0, [%1]" : : "rZ" (val), "r" (addr)); } -static inline u8 __raw_readb_no_log(const volatile void __iomem *addr) +#define __raw_readb __raw_readb +static inline u8 __raw_readb(const volatile void __iomem *addr) { u8 val; asm volatile(ALTERNATIVE("ldrb %w0, [%1]", @@ -68,7 +71,8 @@ static inline u8 __raw_readb_no_log(const volatile void __iomem *addr) return val; } -static inline u16 __raw_readw_no_log(const volatile void __iomem *addr) +#define __raw_readw __raw_readw +static inline u16 __raw_readw(const volatile void __iomem *addr) { u16 val; @@ -79,7 +83,8 @@ static inline u16 __raw_readw_no_log(const volatile void __iomem *addr) return val; } -static inline u32 __raw_readl_no_log(const volatile void __iomem *addr) +#define __raw_readl __raw_readl +static inline u32 __raw_readl(const volatile void __iomem *addr) { u32 val; asm volatile(ALTERNATIVE("ldr %w0, [%1]", @@ -89,7 +94,8 @@ static inline u32 __raw_readl_no_log(const volatile void __iomem *addr) return val; } -static inline u64 __raw_readq_no_log(const volatile void __iomem *addr) +#define __raw_readq __raw_readq +static inline u64 __raw_readq(const volatile void __iomem *addr) { u64 val; asm volatile(ALTERNATIVE("ldr %0, [%1]", @@ -99,48 +105,6 @@ static inline u64 __raw_readq_no_log(const volatile void __iomem *addr) return val; } -/* - * There may be cases when clients don't want to support or can't support the - * logging, The appropriate functions can be used but clinets should carefully - * consider why they can't support the logging - */ - -#define __raw_write_logged(v, a, _t) ({ \ - int _ret; \ - volatile void __iomem *_a = (a); \ - void *_addr = (void __force *)(_a); \ - _ret = uncached_logk(LOGK_WRITEL, _addr); \ - if (_ret) /* COFNIG_SEC_DEBUG */\ - ETB_WAYPOINT; \ - __raw_write##_t##_no_log((v), _a); \ - if (_ret) \ - LOG_BARRIER; \ - }) - -#define __raw_writeb(v, a) __raw_write_logged((v), a, b) -#define __raw_writew(v, a) __raw_write_logged((v), a, w) -#define __raw_writel(v, a) __raw_write_logged((v), a, l) -#define __raw_writeq(v, a) __raw_write_logged((v), a, q) - -#define __raw_read_logged(a, _l, _t) ({ \ - _t __a; \ - const volatile void __iomem *_a = (a); \ - void *_addr = (void __force *)(_a); \ - int _ret; \ - _ret = uncached_logk(LOGK_READL, _addr); \ - if (_ret) /* CONFIG_SEC_DEBUG */ \ - ETB_WAYPOINT; \ - __a = __raw_read##_l##_no_log(_a); \ - if (_ret) \ - LOG_BARRIER; \ - __a; \ - }) - -#define __raw_readb(a) __raw_read_logged((a), b, u8) -#define __raw_readw(a) __raw_read_logged((a), w, u16) -#define __raw_readl(a) __raw_read_logged((a), l, u32) -#define __raw_readq(a) __raw_read_logged((a), q, u64) - /* IO barriers */ #define __iormb(v) \ ({ \ @@ -178,22 +142,6 @@ static inline u64 __raw_readq_no_log(const volatile void __iomem *addr) #define writel_relaxed(v,c) ((void)__raw_writel((__force u32)cpu_to_le32(v),(c))) #define writeq_relaxed(v,c) ((void)__raw_writeq((__force u64)cpu_to_le64(v),(c))) -#define readb_relaxed_no_log(c) ({ u8 __v = __raw_readb_no_log(c); __v; }) -#define readw_relaxed_no_log(c) \ - ({ u16 __v = le16_to_cpu((__force __le16)__raw_readw_no_log(c)); __v; }) -#define readl_relaxed_no_log(c) \ - ({ u32 __v = le32_to_cpu((__force __le32)__raw_readl_no_log(c)); __v; }) -#define readq_relaxed_no_log(c) \ - ({ u64 __v = le64_to_cpu((__force __le64)__raw_readq_no_log(c)); __v; }) - -#define writeb_relaxed_no_log(v, c) ((void)__raw_writeb_no_log((v), (c))) -#define writew_relaxed_no_log(v, c) \ - ((void)__raw_writew_no_log((__force u16)cpu_to_le32(v), (c))) -#define writel_relaxed_no_log(v, c) \ - ((void)__raw_writel_no_log((__force u32)cpu_to_le32(v), (c))) -#define writeq_relaxed_no_log(v, c) \ - ((void)__raw_writeq_no_log((__force u64)cpu_to_le32(v), (c))) - /* * I/O memory access primitives. Reads are ordered relative to any * following Normal memory access. Writes are ordered relative to any prior @@ -209,24 +157,6 @@ static inline u64 __raw_readq_no_log(const volatile void __iomem *addr) #define writel(v,c) ({ __iowmb(); writel_relaxed((v),(c)); }) #define writeq(v,c) ({ __iowmb(); writeq_relaxed((v),(c)); }) -#define readb_no_log(c) \ - ({ u8 __v = readb_relaxed_no_log(c); __iormb(__v); __v; }) -#define readw_no_log(c) \ - ({ u16 __v = readw_relaxed_no_log(c); __iormb(__v); __v; }) -#define readl_no_log(c) \ - ({ u32 __v = readl_relaxed_no_log(c); __iormb(__v); __v; }) -#define readq_no_log(c) \ - ({ u64 __v = readq_relaxed_no_log(c); __iormb(__v); __v; }) - -#define writeb_no_log(v, c) \ - ({ __iowmb(); writeb_relaxed_no_log((v), (c)); }) -#define writew_no_log(v, c) \ - ({ __iowmb(); writew_relaxed_no_log((v), (c)); }) -#define writel_no_log(v, c) \ - ({ __iowmb(); writel_relaxed_no_log((v), (c)); }) -#define writeq_no_log(v, c) \ - ({ __iowmb(); writeq_relaxed_no_log((v), (c)); }) - /* * I/O port access primitives. */ diff --git a/lib/iomap.c b/lib/iomap.c index f45ea96c77a2..541d926da95e 100644 --- a/lib/iomap.c +++ b/lib/iomap.c @@ -6,7 +6,6 @@ */ #include #include -#include #include @@ -72,31 +71,26 @@ static void bad_io_access(unsigned long port, const char *access) unsigned int ioread8(void __iomem *addr) { - uncached_logk_pc(LOGK_READL, __builtin_return_address(0), addr); - IO_COND(addr, return inb(port), return readb_no_log(addr)); + IO_COND(addr, return inb(port), return readb(addr)); return 0xff; } unsigned int ioread16(void __iomem *addr) { - uncached_logk_pc(LOGK_READL, __builtin_return_address(0), addr); - IO_COND(addr, return inw(port), return readw_no_log(addr)); + IO_COND(addr, return inw(port), return readw(addr)); return 0xffff; } unsigned int ioread16be(void __iomem *addr) { - uncached_logk_pc(LOGK_READL, __builtin_return_address(0), addr); IO_COND(addr, return pio_read16be(port), return mmio_read16be(addr)); return 0xffff; } unsigned int ioread32(void __iomem *addr) { - uncached_logk_pc(LOGK_READL, __builtin_return_address(0), addr); - IO_COND(addr, return inl(port), return readl_no_log(addr)); + IO_COND(addr, return inl(port), return readl(addr)); return 0xffffffff; } unsigned int ioread32be(void __iomem *addr) { - uncached_logk_pc(LOGK_READL, __builtin_return_address(0), addr); IO_COND(addr, return pio_read32be(port), return mmio_read32be(addr)); return 0xffffffff; } @@ -118,27 +112,22 @@ EXPORT_SYMBOL(ioread32be); void iowrite8(u8 val, void __iomem *addr) { - uncached_logk_pc(LOGK_WRITEL, __builtin_return_address(0), addr); - IO_COND(addr, outb(val, port), writeb_no_log(val, addr)); + IO_COND(addr, outb(val,port), writeb(val, addr)); } void iowrite16(u16 val, void __iomem *addr) { - uncached_logk_pc(LOGK_WRITEL, __builtin_return_address(0), addr); - IO_COND(addr, outw(val, port), writew_no_log(val, addr)); + IO_COND(addr, outw(val,port), writew(val, addr)); } void iowrite16be(u16 val, void __iomem *addr) { - uncached_logk_pc(LOGK_WRITEL, __builtin_return_address(0), addr); IO_COND(addr, pio_write16be(val,port), mmio_write16be(val, addr)); } void iowrite32(u32 val, void __iomem *addr) { - uncached_logk_pc(LOGK_WRITEL, __builtin_return_address(0), addr); - IO_COND(addr, outl(val, port), writel_no_log(val, addr)); + IO_COND(addr, outl(val,port), writel(val, addr)); } void iowrite32be(u32 val, void __iomem *addr) { - uncached_logk_pc(LOGK_WRITEL, __builtin_return_address(0), addr); IO_COND(addr, pio_write32be(val,port), mmio_write32be(val, addr)); } EXPORT_SYMBOL(iowrite8);