diff --git a/arch/arm/kernel/io.c b/arch/arm/kernel/io.c index a20e48c50d85..c894fdddf592 100644 --- a/arch/arm/kernel/io.c +++ b/arch/arm/kernel/io.c @@ -46,21 +46,21 @@ EXPORT_SYMBOL(atomic_io_modify); void _memcpy_fromio(void *to, const volatile void __iomem *from, size_t count) { while (count && (!IO_CHECK_ALIGN(from, 8) || !IO_CHECK_ALIGN(to, 8))) { - *(u8 *)to = readb_relaxed_no_log(from); + *(u8 *)to = readb_relaxed(from); from++; to++; count--; } while (count >= 8) { - *(u64 *)to = readq_relaxed_no_log(from); + *(u64 *)to = readq_relaxed(from); from += 8; to += 8; count -= 8; } while (count) { - *(u8 *)to = readb_relaxed_no_log(from); + *(u8 *)to = readb_relaxed(from); from++; to++; count--; @@ -76,21 +76,21 @@ void _memcpy_toio(volatile void __iomem *to, const void *from, size_t count) void *p = (void __force *)to; while (count && (!IO_CHECK_ALIGN(p, 8) || !IO_CHECK_ALIGN(from, 8))) { - writeb_relaxed_no_log(*(volatile u8 *)from, p); + writeb_relaxed(*(volatile u8 *)from, p); from++; p++; count--; } while (count >= 8) { - writeq_relaxed_no_log(*(volatile u64 *)from, p); + writeq_relaxed(*(volatile u64 *)from, p); from += 8; p += 8; count -= 8; } while (count) { - writeb_relaxed_no_log(*(volatile u8 *)from, p); + writeb_relaxed(*(volatile u8 *)from, p); from++; p++; count--; @@ -111,19 +111,19 @@ void _memset_io(volatile void __iomem *dst, int c, size_t count) qc |= qc << 32; while (count && !IO_CHECK_ALIGN(p, 8)) { - writeb_relaxed_no_log(c, p); + writeb_relaxed(c, p); p++; count--; } while (count >= 8) { - writeq_relaxed_no_log(qc, p); + writeq_relaxed(qc, p); p += 8; count -= 8; } while (count) { - writeb_relaxed_no_log(c, p); + writeb_relaxed(c, p); p++; count--; } diff --git a/drivers/bus/mhi/core/mhi_internal.h b/drivers/bus/mhi/core/mhi_internal.h index 9743cf0043df..c568878c59d9 100644 --- a/drivers/bus/mhi/core/mhi_internal.h +++ b/drivers/bus/mhi/core/mhi_internal.h @@ -861,7 +861,7 @@ static inline void mhi_timesync_log(struct mhi_controller *mhi_cntrl) if (mhi_tsync && mhi_cntrl->tsync_log) mhi_cntrl->tsync_log(mhi_cntrl, - readq_no_log(mhi_tsync->time_reg)); + readq(mhi_tsync->time_reg)); } /* memory allocation methods */ diff --git a/drivers/bus/mhi/core/mhi_main.c b/drivers/bus/mhi/core/mhi_main.c index 3a4c2a47190c..127b91607cdd 100644 --- a/drivers/bus/mhi/core/mhi_main.c +++ b/drivers/bus/mhi/core/mhi_main.c @@ -2621,7 +2621,7 @@ int mhi_get_remote_time_sync(struct mhi_device *mhi_dev, local_irq_disable(); *t_host = mhi_cntrl->time_get(mhi_cntrl, mhi_cntrl->priv_data); - *t_dev = readq_relaxed_no_log(mhi_tsync->time_reg); + *t_dev = readq_relaxed(mhi_tsync->time_reg); local_irq_enable(); preempt_enable(); @@ -2726,7 +2726,7 @@ int mhi_get_remote_time(struct mhi_device *mhi_dev, mhi_tsync->local_time = mhi_cntrl->time_get(mhi_cntrl, mhi_cntrl->priv_data); - writel_relaxed_no_log(mhi_tsync->int_sequence, mhi_cntrl->tsync_db); + writel_relaxed(mhi_tsync->int_sequence, mhi_cntrl->tsync_db); /* write must go thru immediately */ wmb(); diff --git a/drivers/clk/qcom/clk-cpu-osm.c b/drivers/clk/qcom/clk-cpu-osm.c index fb3b748792d3..fa3b540c8975 100644 --- a/drivers/clk/qcom/clk-cpu-osm.c +++ b/drivers/clk/qcom/clk-cpu-osm.c @@ -110,14 +110,9 @@ static inline int clk_osm_read_reg(struct clk_osm *c, u32 offset) return readl_relaxed(c->vbase + offset); } -static inline int clk_osm_read_reg_no_log(struct clk_osm *c, u32 offset) -{ - return readl_relaxed_no_log(c->vbase + offset); -} - static inline int clk_osm_mb(struct clk_osm *c) { - return readl_relaxed_no_log(c->vbase + ENABLE_REG); + return readl_relaxed(c->vbase + ENABLE_REG); } static long clk_osm_list_rate(struct clk_hw *hw, unsigned int n, @@ -924,7 +919,7 @@ static u64 clk_osm_get_cpu_cycle_counter(int cpu) * core DCVS is disabled. */ core_num = parent->per_core_dcvs ? c->core_num : 0; - val = clk_osm_read_reg_no_log(parent, + val = clk_osm_read_reg(parent, OSM_CYCLE_COUNTER_STATUS_REG(core_num)); if (val < c->prev_cycle_counter) { diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index f7791e2c3b5a..2301b0327836 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -100,20 +100,20 @@ void arch_timer_reg_write(int access, enum arch_timer_reg reg, u32 val, struct arch_timer *timer = to_arch_timer(clk); switch (reg) { case ARCH_TIMER_REG_CTRL: - writel_relaxed_no_log(val, timer->base + CNTP_CTL); + writel_relaxed(val, timer->base + CNTP_CTL); break; case ARCH_TIMER_REG_TVAL: - writel_relaxed_no_log(val, timer->base + CNTP_TVAL); + writel_relaxed(val, timer->base + CNTP_TVAL); break; } } else if (access == ARCH_TIMER_MEM_VIRT_ACCESS) { struct arch_timer *timer = to_arch_timer(clk); switch (reg) { case ARCH_TIMER_REG_CTRL: - writel_relaxed_no_log(val, timer->base + CNTV_CTL); + writel_relaxed(val, timer->base + CNTV_CTL); break; case ARCH_TIMER_REG_TVAL: - writel_relaxed_no_log(val, timer->base + CNTV_TVAL); + writel_relaxed(val, timer->base + CNTV_TVAL); break; } } else { @@ -131,20 +131,20 @@ u32 arch_timer_reg_read(int access, enum arch_timer_reg reg, struct arch_timer *timer = to_arch_timer(clk); switch (reg) { case ARCH_TIMER_REG_CTRL: - val = readl_relaxed_no_log(timer->base + CNTP_CTL); + val = readl_relaxed(timer->base + CNTP_CTL); break; case ARCH_TIMER_REG_TVAL: - val = readl_relaxed_no_log(timer->base + CNTP_TVAL); + val = readl_relaxed(timer->base + CNTP_TVAL); break; } } else if (access == ARCH_TIMER_MEM_VIRT_ACCESS) { struct arch_timer *timer = to_arch_timer(clk); switch (reg) { case ARCH_TIMER_REG_CTRL: - val = readl_relaxed_no_log(timer->base + CNTV_CTL); + val = readl_relaxed(timer->base + CNTV_CTL); break; case ARCH_TIMER_REG_TVAL: - val = readl_relaxed_no_log(timer->base + CNTV_TVAL); + val = readl_relaxed(timer->base + CNTV_TVAL); break; } } else { @@ -900,11 +900,11 @@ void arch_timer_mem_get_cval(u32 *lo, u32 *hi) if (!arch_counter_base) return; - ctrl = readl_relaxed_no_log(arch_counter_base + CNTV_CTL); + ctrl = readl_relaxed(arch_counter_base + CNTV_CTL); if (ctrl & ARCH_TIMER_CTRL_ENABLE) { - *lo = readl_relaxed_no_log(arch_counter_base + CNTCVAL_LO); - *hi = readl_relaxed_no_log(arch_counter_base + CNTCVAL_HI); + *lo = readl_relaxed(arch_counter_base + CNTCVAL_LO); + *hi = readl_relaxed(arch_counter_base + CNTCVAL_HI); } } @@ -913,9 +913,9 @@ static u64 arch_counter_get_cntvct_mem(void) u32 vct_lo, vct_hi, tmp_hi; do { - vct_hi = readl_relaxed_no_log(arch_counter_base + CNTVCT_HI); - vct_lo = readl_relaxed_no_log(arch_counter_base + CNTVCT_LO); - tmp_hi = readl_relaxed_no_log(arch_counter_base + CNTVCT_HI); + vct_hi = readl_relaxed(arch_counter_base + CNTVCT_HI); + vct_lo = readl_relaxed(arch_counter_base + CNTVCT_LO); + tmp_hi = readl_relaxed(arch_counter_base + CNTVCT_HI); } while (vct_hi != tmp_hi); return ((u64) vct_hi << 32) | vct_lo; @@ -1285,7 +1285,7 @@ arch_timer_mem_find_best_frame(struct arch_timer_mem *timer_mem) return NULL; } - cnttidr = readl_relaxed_no_log(cntctlbase + CNTTIDR); + cnttidr = readl_relaxed(cntctlbase + CNTTIDR); /* * Try to find a virtual capable frame. Otherwise fall back to a diff --git a/drivers/hwtracing/coresight/coresight-ost.c b/drivers/hwtracing/coresight/coresight-ost.c index 4a277148196b..662196cb39b6 100644 --- a/drivers/hwtracing/coresight/coresight-ost.c +++ b/drivers/hwtracing/coresight/coresight-ost.c @@ -62,30 +62,30 @@ static int stm_ost_send(void __iomem *addr, const void *data, uint32_t size) uint32_t len = size; if (((unsigned long)data & 0x1) && (size >= 1)) { - writeb_relaxed_no_log(*(uint8_t *)data, addr); + writeb_relaxed(*(uint8_t *)data, addr); data++; size--; } if (((unsigned long)data & 0x2) && (size >= 2)) { - writew_relaxed_no_log(*(uint16_t *)data, addr); + writew_relaxed(*(uint16_t *)data, addr); data += 2; size -= 2; } /* now we are 32bit aligned */ while (size >= 4) { - writel_relaxed_no_log(*(uint32_t *)data, addr); + writel_relaxed(*(uint32_t *)data, addr); data += 4; size -= 4; } if (size >= 2) { - writew_relaxed_no_log(*(uint16_t *)data, addr); + writew_relaxed(*(uint16_t *)data, addr); data += 2; size -= 2; } if (size >= 1) { - writeb_relaxed_no_log(*(uint8_t *)data, addr); + writeb_relaxed(*(uint8_t *)data, addr); data++; size--; } diff --git a/drivers/media/platform/msm/ais/cam_utils/cam_io_util.c b/drivers/media/platform/msm/ais/cam_utils/cam_io_util.c index 8d5f96ac816f..13a7fdcfa718 100644 --- a/drivers/media/platform/msm/ais/cam_utils/cam_io_util.c +++ b/drivers/media/platform/msm/ais/cam_utils/cam_io_util.c @@ -23,7 +23,7 @@ int cam_io_w(uint32_t data, void __iomem *addr) return -EINVAL; CAM_DBG(CAM_UTIL, "0x%pK %08x", addr, data); - writel_relaxed_no_log(data, addr); + writel_relaxed(data, addr); return 0; } @@ -36,7 +36,7 @@ int cam_io_w_mb(uint32_t data, void __iomem *addr) CAM_DBG(CAM_UTIL, "0x%pK %08x", addr, data); /* Ensure previous writes are done */ wmb(); - writel_relaxed_no_log(data, addr); + writel_relaxed(data, addr); /* Ensure previous writes are done */ wmb(); diff --git a/drivers/media/platform/msm/camera/cam_utils/cam_io_util.c b/drivers/media/platform/msm/camera/cam_utils/cam_io_util.c index 34e309ff0055..d7af6a77aad9 100644 --- a/drivers/media/platform/msm/camera/cam_utils/cam_io_util.c +++ b/drivers/media/platform/msm/camera/cam_utils/cam_io_util.c @@ -23,7 +23,7 @@ int cam_io_w(uint32_t data, void __iomem *addr) return -EINVAL; CAM_DBG(CAM_UTIL, "0x%pK %08x", addr, data); - writel_relaxed_no_log(data, addr); + writel_relaxed(data, addr); return 0; } @@ -36,7 +36,7 @@ int cam_io_w_mb(uint32_t data, void __iomem *addr) CAM_DBG(CAM_UTIL, "0x%pK %08x", addr, data); /* Ensure previous writes are done */ wmb(); - writel_relaxed_no_log(data, addr); + writel_relaxed(data, addr); /* Ensure previous writes are done */ wmb(); diff --git a/drivers/media/platform/msm/sde/rotator/sde_rotator_r3.c b/drivers/media/platform/msm/sde/rotator/sde_rotator_r3.c index 88d0b2e76ff6..6af18bc61314 100644 --- a/drivers/media/platform/msm/sde/rotator/sde_rotator_r3.c +++ b/drivers/media/platform/msm/sde/rotator/sde_rotator_r3.c @@ -68,12 +68,12 @@ do { \ SDEROT_DBG("SDEREG.W:[%s:0x%X] <= 0x%X\n", #off, (off),\ (u32)(data));\ - writel_relaxed_no_log( \ + writel_relaxed( \ (REGDMA_OP_REGWRITE | \ ((off) & REGDMA_ADDR_OFFSET_MASK)), \ p); \ p += sizeof(u32); \ - writel_relaxed_no_log(data, p); \ + writel_relaxed(data, p); \ p += sizeof(u32); \ } while (0) @@ -81,14 +81,14 @@ do { \ SDEROT_DBG("SDEREG.M:[%s:0x%X] <= 0x%X\n", #off, (off),\ (u32)(data));\ - writel_relaxed_no_log( \ + writel_relaxed( \ (REGDMA_OP_REGMODIFY | \ ((off) & REGDMA_ADDR_OFFSET_MASK)), \ p); \ p += sizeof(u32); \ - writel_relaxed_no_log(mask, p); \ + writel_relaxed(mask, p); \ p += sizeof(u32); \ - writel_relaxed_no_log(data, p); \ + writel_relaxed(data, p); \ p += sizeof(u32); \ } while (0) @@ -96,25 +96,25 @@ do { \ SDEROT_DBG("SDEREG.B:[%s:0x%X:0x%X]\n", #off, (off),\ (u32)(len));\ - writel_relaxed_no_log( \ + writel_relaxed( \ (REGDMA_OP_BLKWRITE_INC | \ ((off) & REGDMA_ADDR_OFFSET_MASK)), \ p); \ p += sizeof(u32); \ - writel_relaxed_no_log(len, p); \ + writel_relaxed(len, p); \ p += sizeof(u32); \ } while (0) #define SDE_REGDMA_BLKWRITE_DATA(p, data) \ do { \ SDEROT_DBG("SDEREG.I:[:] <= 0x%X\n", (u32)(data));\ - writel_relaxed_no_log(data, p); \ + writel_relaxed(data, p); \ p += sizeof(u32); \ } while (0) #define SDE_REGDMA_READ(p, data) \ do { \ - data = readl_relaxed_no_log(p); \ + data = readl_relaxed(p); \ p += sizeof(u32); \ } while (0) @@ -2041,7 +2041,7 @@ static u32 sde_hw_rotator_start_no_regdma(struct sde_hw_rotator_context *ctx, /* Write all command stream to Rotator blocks */ /* Rotator will start right away after command stream finish writing */ while (mem_rdptr < wrptr) { - u32 op = REGDMA_OP_MASK & readl_relaxed_no_log(mem_rdptr); + u32 op = REGDMA_OP_MASK & readl_relaxed(mem_rdptr); switch (op) { case REGDMA_OP_NOP: diff --git a/drivers/platform/msm/qcom-geni-se.c b/drivers/platform/msm/qcom-geni-se.c index 279e45efefca..fc48851a5728 100644 --- a/drivers/platform/msm/qcom-geni-se.c +++ b/drivers/platform/msm/qcom-geni-se.c @@ -159,7 +159,7 @@ static int geni_se_iommu_map_and_attach(struct geni_se_device *geni_se_dev); */ unsigned int geni_read_reg_nolog(void __iomem *base, int offset) { - return readl_relaxed_no_log(base + offset); + return readl_relaxed(base + offset); } EXPORT_SYMBOL(geni_read_reg_nolog); @@ -171,7 +171,7 @@ EXPORT_SYMBOL(geni_read_reg_nolog); */ void geni_write_reg_nolog(unsigned int value, void __iomem *base, int offset) { - return writel_relaxed_no_log(value, (base + offset)); + return writel_relaxed(value, (base + offset)); } EXPORT_SYMBOL(geni_write_reg_nolog); diff --git a/drivers/soc/qcom/boot_stats.c b/drivers/soc/qcom/boot_stats.c index 86512038bd1a..7ca6961d9fba 100644 --- a/drivers/soc/qcom/boot_stats.c +++ b/drivers/soc/qcom/boot_stats.c @@ -127,11 +127,11 @@ unsigned long long int msm_timer_get_sclk_ticks(void) if (!sclk_tick) return -EINVAL; while (loop_zero_count--) { - t1 = __raw_readl_no_log(sclk_tick); + t1 = __raw_readl(sclk_tick); do { udelay(1); t2 = t1; - t1 = __raw_readl_no_log(sclk_tick); + t1 = __raw_readl(sclk_tick); } while ((t2 != t1) && --loop_count); if (!loop_count) { pr_err("boot_stats: SCLK did not stabilize\n"); diff --git a/drivers/soc/qcom/dcc_v2.c b/drivers/soc/qcom/dcc_v2.c index 4ce4eb0bddb3..b0df7ca34f3e 100644 --- a/drivers/soc/qcom/dcc_v2.c +++ b/drivers/soc/qcom/dcc_v2.c @@ -197,7 +197,7 @@ static void dcc_sram_memset(const struct device *dev, void __iomem *dst, } while (count >= 4) { - __raw_writel_no_log(qc, dst); + __raw_writel(qc, dst); dst += 4; count -= 4; } @@ -213,7 +213,7 @@ static int dcc_sram_memcpy(void *to, const void __iomem *from, } while (count >= 4) { - *(unsigned int *)to = __raw_readl_no_log(from); + *(unsigned int *)to = __raw_readl(from); to += 4; from += 4; count -= 4; @@ -1929,7 +1929,7 @@ static int dcc_v2_restore(struct device *dev) data = drvdata->sram_save_state; for (i = 0; i < drvdata->ram_size / 4; i++) - __raw_writel_no_log(data[i], + __raw_writel(data[i], drvdata->ram_base + (i * 4)); state = drvdata->reg_save_state; diff --git a/drivers/soc/qcom/jtagv8-etm.c b/drivers/soc/qcom/jtagv8-etm.c index e118e51e624e..a3080251aaf8 100644 --- a/drivers/soc/qcom/jtagv8-etm.c +++ b/drivers/soc/qcom/jtagv8-etm.c @@ -186,7 +186,7 @@ /* spread out etm register write */ #define etm_writel(etm, val, off) \ do { \ - writel_relaxed_no_log(val, etm->base + off); \ + writel_relaxed(val, etm->base + off); \ udelay(20); \ } while (0) @@ -194,13 +194,13 @@ do { \ __raw_writel(val, etm->base + off) #define etm_readl(etm, off) \ - readl_relaxed_no_log(etm->base + off) + readl_relaxed(etm->base + off) #define etm_writeq(etm, val, off) \ - writeq_relaxed_no_log(val, etm->base + off) + writeq_relaxed(val, etm->base + off) #define etm_readq(etm, off) \ - readq_relaxed_no_log(etm->base + off) + readq_relaxed(etm->base + off) #define ETM_LOCK(base) \ do { \ diff --git a/drivers/thermal/tsens2xxx.c b/drivers/thermal/tsens2xxx.c index 0f50a15ea931..15c7aee0b7ff 100644 --- a/drivers/thermal/tsens2xxx.c +++ b/drivers/thermal/tsens2xxx.c @@ -155,7 +155,7 @@ static int tsens2xxx_get_temp(struct tsens_sensor *sensor, int *temp) sensor_addr = TSENS_TM_SN_STATUS(tmdev->tsens_tm_addr); trdy = TSENS_TM_TRDY(tmdev->tsens_tm_addr); - code = readl_relaxed_no_log(trdy); + code = readl_relaxed(trdy); if (!((code & TSENS_TM_TRDY_FIRST_ROUND_COMPLETE) >> TSENS_TM_TRDY_FIRST_ROUND_COMPLETE_SHIFT)) { @@ -170,7 +170,7 @@ static int tsens2xxx_get_temp(struct tsens_sensor *sensor, int *temp) /* Wait for 2.5 ms for tsens controller to recover */ do { udelay(500); - code = readl_relaxed_no_log(trdy); + code = readl_relaxed(trdy); if (code & TSENS_TM_TRDY_FIRST_ROUND_COMPLETE) { TSENS_DUMP(tmdev, "%s", "tsens controller recovered\n"); @@ -296,7 +296,7 @@ sensor_read: tmdev->trdy_fail_ctr = 0; - code = readl_relaxed_no_log(sensor_addr + + code = readl_relaxed(sensor_addr + (sensor->hw_id << TSENS_STATUS_ADDR_OFFSET)); last_temp = code & TSENS_TM_SN_LAST_TEMP_MASK; @@ -305,7 +305,7 @@ sensor_read: goto dbg; } - code = readl_relaxed_no_log(sensor_addr + + code = readl_relaxed(sensor_addr + (sensor->hw_id << TSENS_STATUS_ADDR_OFFSET)); last_temp2 = code & TSENS_TM_SN_LAST_TEMP_MASK; if (code & TSENS_TM_SN_STATUS_VALID_BIT) { @@ -314,7 +314,7 @@ sensor_read: goto dbg; } - code = readl_relaxed_no_log(sensor_addr + + code = readl_relaxed(sensor_addr + (sensor->hw_id << TSENS_STATUS_ADDR_OFFSET)); last_temp3 = code & TSENS_TM_SN_LAST_TEMP_MASK;