Merge 4.9.212 into android-4.9-q
Changes in 4.9.212
xfs: Sanity check flags of Q_XQUOTARM call
powerpc/archrandom: fix arch_get_random_seed_int()
mt7601u: fix bbp version check in mt7601u_wait_bbp_ready
drm/sti: do not remove the drm_bridge that was never added
drm/virtio: fix bounds check in virtio_gpu_cmd_get_capset()
ALSA: hda: fix unused variable warning
IB/rxe: replace kvfree with vfree
ALSA: usb-audio: update quirk for B&W PX to remove microphone
staging: comedi: ni_mio_common: protect register write overflow
pwm: lpss: Release runtime-pm reference from the driver's remove callback
mlxsw: reg: QEEC: Add minimum shaper fields
pcrypt: use format specifier in kobject_add
exportfs: fix 'passing zero to ERR_PTR()' warning
drm/dp_mst: Skip validating ports during destruction, just ref
net: phy: Fix not to call phy_resume() if PHY is not attached
pinctrl: sh-pfc: r8a7740: Add missing REF125CK pin to gether_gmii group
pinctrl: sh-pfc: r8a7740: Add missing LCD0 marks to lcd0_data24_1 group
pinctrl: sh-pfc: r8a7791: Remove bogus ctrl marks from qspi_data4_b group
pinctrl: sh-pfc: r8a7791: Remove bogus marks from vin1_b_data18 group
pinctrl: sh-pfc: sh73a0: Add missing TO pin to tpu4_to3 group
pinctrl: sh-pfc: r8a7794: Remove bogus IPSR9 field
pinctrl: sh-pfc: sh7734: Add missing IPSR11 field
pinctrl: sh-pfc: sh7269: Add missing PCIOR0 field
pinctrl: sh-pfc: sh7734: Remove bogus IPSR10 value
Input: nomadik-ske-keypad - fix a loop timeout test
clk: highbank: fix refcount leak in hb_clk_init()
clk: qoriq: fix refcount leak in clockgen_init()
clk: socfpga: fix refcount leak
clk: samsung: exynos4: fix refcount leak in exynos4_get_xom()
clk: imx6q: fix refcount leak in imx6q_clocks_init()
clk: imx6sx: fix refcount leak in imx6sx_clocks_init()
clk: imx7d: fix refcount leak in imx7d_clocks_init()
clk: vf610: fix refcount leak in vf610_clocks_init()
clk: armada-370: fix refcount leak in a370_clk_init()
clk: kirkwood: fix refcount leak in kirkwood_clk_init()
clk: armada-xp: fix refcount leak in axp_clk_init()
clk: dove: fix refcount leak in dove_clk_init()
IB/usnic: Fix out of bounds index check in query pkey
RDMA/ocrdma: Fix out of bounds index check in query pkey
RDMA/qedr: Fix out of bounds index check in query pkey
arm64: dts: apq8016-sbc: Increase load on l11 for SDCARD
drm/etnaviv: NULL vs IS_ERR() buf in etnaviv_core_dump()
media: s5p-jpeg: Correct step and max values for V4L2_CID_JPEG_RESTART_INTERVAL
crypto: tgr192 - fix unaligned memory access
ASoC: imx-sgtl5000: put of nodes if finding codec fails
IB/iser: Pass the correct number of entries for dma mapped SGL
rtc: cmos: ignore bogus century byte
clk: sunxi-ng: sun8i-a23: Enable PLL-MIPI LDOs when ungating it
iwlwifi: mvm: fix A-MPDU reference assignment
tty: ipwireless: Fix potential NULL pointer dereference
crypto: crypto4xx - Fix wrong ppc4xx_trng_probe()/ppc4xx_trng_remove() arguments
ARM: dts: lpc32xx: add required clocks property to keypad device node
ARM: dts: lpc32xx: reparent keypad controller to SIC1
ARM: dts: lpc32xx: fix ARM PrimeCell LCD controller variant
ARM: dts: lpc32xx: fix ARM PrimeCell LCD controller clocks property
ARM: dts: lpc32xx: phy3250: fix SD card regulator voltage
iwlwifi: mvm: fix RSS config command
staging: most: cdev: add missing check for cdev_add failure
rtc: ds1672: fix unintended sign extension
thermal: mediatek: fix register index error
net: phy: fixed_phy: Fix fixed_phy not checking GPIO
rtc: 88pm860x: fix unintended sign extension
rtc: 88pm80x: fix unintended sign extension
rtc: pm8xxx: fix unintended sign extension
fbdev: chipsfb: remove set but not used variable 'size'
iw_cxgb4: use tos when importing the endpoint
iw_cxgb4: use tos when finding ipv6 routes
pinctrl: sh-pfc: emev2: Add missing pinmux functions
pinctrl: sh-pfc: r8a7791: Fix scifb2_data_c pin group
pinctrl: sh-pfc: r8a7792: Fix vin1_data18_b pin group
pinctrl: sh-pfc: sh73a0: Fix fsic_spdif pin groups
usb: phy: twl6030-usb: fix possible use-after-free on remove
block: don't use bio->bi_vcnt to figure out segment number
keys: Timestamp new keys
vfio_pci: Enable memory accesses before calling pci_map_rom
dmaengine: mv_xor: Use correct device for DMA API
cdc-wdm: pass return value of recover_from_urb_loss
regulator: pv88060: Fix array out-of-bounds access
regulator: pv88080: Fix array out-of-bounds access
regulator: pv88090: Fix array out-of-bounds access
net: dsa: qca8k: Enable delay for RGMII_ID mode
drm/nouveau/bios/ramcfg: fix missing parentheses when calculating RON
drm/nouveau/pmu: don't print reply values if exec is false
ASoC: qcom: Fix of-node refcount unbalance in apq8016_sbc_parse_of()
fs/nfs: Fix nfs_parse_devname to not modify it's argument
NFS: Fix a soft lockup in the delegation recovery code
clocksource/drivers/sun5i: Fail gracefully when clock rate is unavailable
clocksource/drivers/exynos_mct: Fix error path in timer resources initialization
mmc: sdhci-brcmstb: handle mmc_of_parse() errors during probe
ARM: 8847/1: pm: fix HYP/SVC mode mismatch when MCPM is used
ARM: 8848/1: virt: Align GIC version check with arm64 counterpart
regulator: wm831x-dcdc: Fix list of wm831x_dcdc_ilim from mA to uA
nios2: ksyms: Add missing symbol exports
scsi: megaraid_sas: reduce module load time
drivers/rapidio/rio_cm.c: fix potential oops in riocm_ch_listen()
xen, cpu_hotplug: Prevent an out of bounds access
net: sh_eth: fix a missing check of of_get_phy_mode
media: ivtv: update *pos correctly in ivtv_read_pos()
media: cx18: update *pos correctly in cx18_read_pos()
media: wl128x: Fix an error code in fm_download_firmware()
media: cx23885: check allocation return
regulator: tps65086: Fix tps65086_ldoa1_ranges for selector 0xB
jfs: fix bogus variable self-initialization
tipc: tipc clang warning
m68k: mac: Fix VIA timer counter accesses
ARM: OMAP2+: Fix potentially uninitialized return value for _setup_reset()
media: davinci-isif: avoid uninitialized variable use
media: tw5864: Fix possible NULL pointer dereference in tw5864_handle_frame
spi: tegra114: clear packed bit for unpacked mode
spi: tegra114: fix for unpacked mode transfers
soc/fsl/qe: Fix an error code in qe_pin_request()
spi: bcm2835aux: fix driver to not allow 65535 (=-1) cs-gpios
ehea: Fix a copy-paste err in ehea_init_port_res
scsi: qla2xxx: Unregister chrdev if module initialization fails
ARM: pxa: ssp: Fix "WARNING: invalid free of devm_ allocated data"
hwmon: (w83627hf) Use request_muxed_region for Super-IO accesses
tipc: set sysctl_tipc_rmem and named_timeout right range
powerpc: vdso: Make vdso32 installation conditional in vdso_install
ARM: dts: ls1021: Fix SGMII PCS link remaining down after PHY disconnect
media: ov2659: fix unbalanced mutex_lock/unlock
6lowpan: Off by one handling ->nexthdr
dmaengine: axi-dmac: Don't check the number of frames for alignment
ALSA: usb-audio: Handle the error from snd_usb_mixer_apply_create_quirk()
packet: in recvmsg msg_name return at least sizeof sockaddr_ll
ASoC: fix valid stream condition
usb: gadget: fsl: fix link error against usb-gadget module
IB/mlx5: Add missing XRC options to QP optional params mask
iommu/vt-d: Make kernel parameter igfx_off work with vIOMMU
net: ena: fix swapped parameters when calling ena_com_indirect_table_fill_entry
net: ena: fix: Free napi resources when ena_up() fails
net: ena: fix incorrect test of supported hash function
net: ena: fix ena_com_fill_hash_function() implementation
dmaengine: tegra210-adma: restore channel status
l2tp: Fix possible NULL pointer dereference
media: omap_vout: potential buffer overflow in vidioc_dqbuf()
media: davinci/vpbe: array underflow in vpbe_enum_outputs()
platform/x86: alienware-wmi: printing the wrong error code
netfilter: ebtables: CONFIG_COMPAT: reject trailing data after last rule
pwm: meson: Don't disable PWM when setting duty repeatedly
ARM: riscpc: fix lack of keyboard interrupts after irq conversion
kdb: do a sanity check on the cpu in kdb_per_cpu()
backlight: lm3630a: Return 0 on success in update_status functions
thermal: cpu_cooling: Actually trace CPU load in thermal_power_cpu_get_power
dmaengine: tegra210-adma: Fix crash during probe
spi: spi-fsl-spi: call spi_finalize_current_message() at the end
crypto: ccp - fix AES CFB error exposed by new test vectors
serial: stm32: fix transmit_chars when tx is stopped
misc: sgi-xp: Properly initialize buf in xpc_get_rsvd_page_pa
iommu: Use right function to get group for device
signal/cifs: Fix cifs_put_tcp_session to call send_sig instead of force_sig
inet: frags: call inet_frags_fini() after unregister_pernet_subsys()
media: vivid: fix incorrect assignment operation when setting video mode
powerpc/cacheinfo: add cacheinfo_teardown, cacheinfo_rebuild
drm/msm/mdp5: Fix mdp5_cfg_init error return
net: netem: fix backlog accounting for corrupted GSO frames
net/af_iucv: always register net_device notifier
ASoC: ti: davinci-mcasp: Fix slot mask settings when using multiple AXRs
rtc: pcf8563: Clear event flags and disable interrupts before requesting irq
drm/msm/a3xx: remove TPL1 regs from snapshot
perf/ioctl: Add check for the sample_period value
dmaengine: hsu: Revert "set HSU_CH_MTSR to memory width"
clk: qcom: Fix -Wunused-const-variable
iommu/amd: Make iommu_disable safer
mfd: intel-lpss: Release IDA resources
rxrpc: Fix uninitialized error code in rxrpc_send_data_packet()
devres: allow const resource arguments
RDMA/hns: Fixs hw access invalid dma memory error
net: pasemi: fix an use-after-free in pasemi_mac_phy_init()
scsi: libfc: fix null pointer dereference on a null lport
libertas_tf: Use correct channel range in lbtf_geo_init
qed: reduce maximum stack frame size
usb: host: xhci-hub: fix extra endianness conversion
mic: avoid statically declaring a 'struct device'.
x86/kgbd: Use NMI_VECTOR not APIC_DM_NMI
ALSA: aoa: onyx: always initialize register read value
net/mlx5: Fix mlx5_ifc_query_lag_out_bits
cifs: fix rmmod regression in cifs.ko caused by force_sig changes
crypto: caam - free resources in case caam_rng registration failed
ext4: set error return correctly when ext4_htree_store_dirent fails
ASoC: es8328: Fix copy-paste error in es8328_right_line_controls
ASoC: cs4349: Use PM ops 'cs4349_runtime_pm'
ASoC: wm8737: Fix copy-paste error in wm8737_snd_controls
signal: Allow cifs and drbd to receive their terminating signals
ASoC: sun4i-i2s: RX and TX counter registers are swapped
dmaengine: dw: platform: Switch to acpi_dma_controller_register()
mac80211: minstrel_ht: fix per-group max throughput rate initialization
mips: avoid explicit UB in assignment of mips_io_port_base
ahci: Do not export local variable ahci_em_messages
Partially revert "kfifo: fix kfifo_alloc() and kfifo_init()"
hwmon: (lm75) Fix write operations for negative temperatures
power: supply: Init device wakeup after device_add()
x86, perf: Fix the dependency of the x86 insn decoder selftest
staging: greybus: light: fix a couple double frees
bcma: fix incorrect update of BCMA_CORE_PCI_MDIO_DATA
iio: dac: ad5380: fix incorrect assignment to val
ath9k: dynack: fix possible deadlock in ath_dynack_node_{de}init
net: sonic: return NETDEV_TX_OK if failed to map buffer
Btrfs: fix hang when loading existing inode cache off disk
hwmon: (shtc1) fix shtc1 and shtw1 id mask
net: sonic: replace dev_kfree_skb in sonic_send_packet
net/rds: Fix 'ib_evt_handler_call' element in 'rds_ib_stat_names'
iommu/amd: Wait for completion of IOTLB flush in attach_device
net: hisilicon: Fix signedness bug in hix5hd2_dev_probe()
net: broadcom/bcmsysport: Fix signedness in bcm_sysport_probe()
net: stmmac: dwmac-meson8b: Fix signedness bug in probe
of: mdio: Fix a signedness bug in of_phy_get_and_connect()
net: ethernet: stmmac: Fix signedness bug in ipq806x_gmac_of_parse()
nvme: retain split access workaround for capability reads
net: stmmac: gmac4+: Not all Unicast addresses may be available
mac80211: accept deauth frames in IBSS mode
llc: fix another potential sk_buff leak in llc_ui_sendmsg()
llc: fix sk_buff refcounting in llc_conn_state_process()
net: stmmac: fix length of PTP clock's name string
act_mirred: Fix mirred_init_module error handling
drm/msm/dsi: Implement reset correctly
dmaengine: imx-sdma: fix size check for sdma script_number
net: netem: fix error path for corrupted GSO frames
net: netem: correct the parent's backlog when corrupted packet was dropped
net: qca_spi: Move reset_count to struct qcaspi
afs: Fix large file support
media: ov6650: Fix incorrect use of JPEG colorspace
media: ov6650: Fix some format attributes not under control
media: ov6650: Fix .get_fmt() V4L2_SUBDEV_FORMAT_TRY support
MIPS: Loongson: Fix return value of loongson_hwmon_init
net: neigh: use long type to store jiffies delta
packet: fix data-race in fanout_flow_is_huge()
dmaengine: ti: edma: fix missed failure handling
drm/radeon: fix bad DMA from INTERRUPT_CNTL2
arm64: dts: juno: Fix UART frequency
IB/iser: Fix dma_nents type definition
m68k: Call timer_interrupt() with interrupts disabled
net: ethtool: Add back transceiver type
net: phy: Keep reporting transceiver type
can, slip: Protect tty->disc_data in write_wakeup and close with RCU
firestream: fix memory leaks
net: cxgb3_main: Add CAP_NET_ADMIN check to CHELSIO_GET_MEM
net, ip6_tunnel: fix namespaces move
net, ip_tunnel: fix namespaces move
net_sched: fix datalen for ematch
tcp_bbr: improve arithmetic division in bbr_update_bw()
net: usb: lan78xx: Add .ndo_features_check
gtp: make sure only SOCK_DGRAM UDP sockets are accepted
hwmon: (adt7475) Make volt2reg return same reg as reg2volt input
hwmon: (core) Simplify sysfs attribute name allocation
hwmon: Deal with errors from the thermal subsystem
hwmon: (core) Fix double-free in __hwmon_device_register()
hwmon: (core) Do not use device managed functions for memory allocations
Input: keyspan-remote - fix control-message timeouts
ARM: 8950/1: ftrace/recordmcount: filter relocation types
mmc: tegra: fix SDR50 tuning override
mmc: sdhci: fix minimum clock rate for v3 controller
Input: sur40 - fix interface sanity checks
Input: gtco - fix endpoint sanity check
Input: aiptek - fix endpoint sanity check
Input: pegasus_notetaker - fix endpoint sanity check
Input: sun4i-ts - add a check for devm_thermal_zone_of_sensor_register
hwmon: (nct7802) Fix voltage limits to wrong registers
scsi: RDMA/isert: Fix a recently introduced regression related to logout
tracing: xen: Ordered comparison of function pointers
do_last(): fetch directory ->i_mode and ->i_uid before it's too late
Documentation: Document arm64 kpti control
arm64: kpti: Whitelist Cortex-A CPUs that don't implement the CSV3 field
coresight: etb10: Do not call smp_processor_id from preemptible
coresight: tmc-etf: Do not call smp_processor_id from preemptible
libertas: Fix two buffer overflows at parsing bss descriptor
bcache: silence static checker warning
scsi: iscsi: Avoid potential deadlock in iscsi_if_rx func
md: Avoid namespace collision with bitmap API
bitmap: Add bitmap_alloc(), bitmap_zalloc() and bitmap_free()
netfilter: ipset: use bitmap infrastructure completely
net/x25: fix nonblocking connect
Linux 4.9.212
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
Change-Id: I2e83a05c5f119a7467a4d6984045d45d0c06b764
This commit is contained in:
Greg Kroah-Hartman
@@ -1977,6 +1977,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
||||
kmemcheck=2 (one-shot mode)
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Default: 2 (one-shot mode)
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||||
|
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kpti= [ARM64] Control page table isolation of user
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and kernel address spaces.
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Default: enabled on cores which need mitigation.
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0: force disabled
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1: force enabled
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kstack=N [X86] Print N words from the kernel stack
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in oops dumps.
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2
Makefile
2
Makefile
@@ -1,6 +1,6 @@
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VERSION = 4
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||||
PATCHLEVEL = 9
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||||
SUBLEVEL = 211
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SUBLEVEL = 212
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EXTRAVERSION =
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NAME = Roaring Lionus
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@@ -49,8 +49,8 @@
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sd_reg: regulator@2 {
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compatible = "regulator-fixed";
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regulator-name = "sd_reg";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio 5 5 0>;
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enable-active-high;
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};
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@@ -139,11 +139,11 @@
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};
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clcd: clcd@31040000 {
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compatible = "arm,pl110", "arm,primecell";
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compatible = "arm,pl111", "arm,primecell";
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reg = <0x31040000 0x1000>;
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interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk LPC32XX_CLK_LCD>;
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clock-names = "apb_pclk";
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clocks = <&clk LPC32XX_CLK_LCD>, <&clk LPC32XX_CLK_LCD>;
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clock-names = "clcdclk", "apb_pclk";
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status = "disabled";
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};
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@@ -462,7 +462,9 @@
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key: key@40050000 {
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compatible = "nxp,lpc3220-key";
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reg = <0x40050000 0x1000>;
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interrupts = <54 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk LPC32XX_CLK_KEY>;
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interrupt-parent = <&sic1>;
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interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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@@ -143,7 +143,7 @@
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};
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&enet0 {
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tbi-handle = <&tbi1>;
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tbi-handle = <&tbi0>;
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phy-handle = <&sgmii_phy2>;
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phy-connection-type = "sgmii";
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status = "okay";
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@@ -222,6 +222,13 @@
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sgmii_phy2: ethernet-phy@2 {
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reg = <0x2>;
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};
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tbi0: tbi-phy@1f {
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reg = <0x1f>;
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device_type = "tbi-phy";
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};
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};
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&mdio1 {
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tbi1: tbi-phy@1f {
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reg = <0x1f>;
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device_type = "tbi-phy";
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@@ -505,13 +505,22 @@
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};
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mdio0: mdio@2d24000 {
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compatible = "gianfar";
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compatible = "fsl,etsec2-mdio";
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device_type = "mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x0 0x2d24000 0x0 0x4000>;
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};
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mdio1: mdio@2d64000 {
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compatible = "fsl,etsec2-mdio";
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device_type = "mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x0 0x2d64000 0x0 0x4000>,
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<0x0 0x2d50030 0x0 0x4>;
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||||
};
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ptp_clock@2d10e00 {
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compatible = "fsl,etsec-ptp";
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reg = <0x0 0x2d10e00 0x0 0xb0>;
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@@ -379,7 +379,7 @@ static int __init nocache_trampoline(unsigned long _arg)
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unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
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phys_reset_t phys_reset;
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mcpm_set_entry_vector(cpu, cluster, cpu_resume);
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mcpm_set_entry_vector(cpu, cluster, cpu_resume_no_hyp);
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setup_mm_for_reboot();
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__mcpm_cpu_going_down(cpu, cluster);
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@@ -7,6 +7,7 @@ struct sleep_save_sp {
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};
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extern void cpu_resume(void);
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extern void cpu_resume_no_hyp(void);
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extern void cpu_resume_arm(void);
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extern int cpu_suspend(unsigned long, int (*)(unsigned long));
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|
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|
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@@ -179,8 +179,8 @@ ARM_BE8(orr r7, r7, #(1 << 25)) @ HSCTLR.EE
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@ Check whether GICv3 system registers are available
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mrc p15, 0, r7, c0, c1, 1 @ ID_PFR1
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ubfx r7, r7, #28, #4
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cmp r7, #1
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bne 2f
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teq r7, #0
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beq 2f
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|
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@ Enable system register accesses
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mrc p15, 4, r7, c12, c9, 5 @ ICC_HSRE
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@@ -119,6 +119,14 @@ ENDPROC(cpu_resume_after_mmu)
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||||
.text
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||||
.align
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||||
|
||||
#ifdef CONFIG_MCPM
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.arm
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THUMB( .thumb )
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ENTRY(cpu_resume_no_hyp)
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ARM_BE8(setend be) @ ensure we are in BE mode
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b no_hyp
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#endif
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#ifdef CONFIG_MMU
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.arm
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ENTRY(cpu_resume_arm)
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@@ -134,6 +142,7 @@ ARM_BE8(setend be) @ ensure we are in BE mode
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bl __hyp_stub_install_secondary
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#endif
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safe_svcmode_maskall r1
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no_hyp:
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mov r1, #0
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ALT_SMP(mrc p15, 0, r0, c0, c0, 5)
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ALT_UP_B(1f)
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@@ -162,6 +171,9 @@ ENDPROC(cpu_resume)
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#ifdef CONFIG_MMU
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ENDPROC(cpu_resume_arm)
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#endif
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#ifdef CONFIG_MCPM
|
||||
ENDPROC(cpu_resume_no_hyp)
|
||||
#endif
|
||||
|
||||
.align 2
|
||||
|
||||
@@ -2588,7 +2588,7 @@ static void _setup_iclk_autoidle(struct omap_hwmod *oh)
|
||||
*/
|
||||
static int _setup_reset(struct omap_hwmod *oh)
|
||||
{
|
||||
int r;
|
||||
int r = 0;
|
||||
|
||||
if (oh->_state != _HWMOD_STATE_INITIALIZED)
|
||||
return -EINVAL;
|
||||
|
||||
@@ -117,7 +117,7 @@ extern unsigned char rpc_default_fiq_start, rpc_default_fiq_end;
|
||||
|
||||
void __init rpc_init_irq(void)
|
||||
{
|
||||
unsigned int irq, clr, set = 0;
|
||||
unsigned int irq, clr, set;
|
||||
|
||||
iomd_writeb(0, IOMD_IRQMASKA);
|
||||
iomd_writeb(0, IOMD_IRQMASKB);
|
||||
@@ -129,6 +129,7 @@ void __init rpc_init_irq(void)
|
||||
|
||||
for (irq = 0; irq < NR_IRQS; irq++) {
|
||||
clr = IRQ_NOREQUEST;
|
||||
set = 0;
|
||||
|
||||
if (irq <= 6 || (irq >= 9 && irq <= 15))
|
||||
clr |= IRQ_NOPROBE;
|
||||
|
||||
@@ -230,18 +230,12 @@ static int pxa_ssp_probe(struct platform_device *pdev)
|
||||
|
||||
static int pxa_ssp_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct resource *res;
|
||||
struct ssp_device *ssp;
|
||||
|
||||
ssp = platform_get_drvdata(pdev);
|
||||
if (ssp == NULL)
|
||||
return -ENODEV;
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
release_mem_region(res->start, resource_size(res));
|
||||
|
||||
clk_put(ssp->clk);
|
||||
|
||||
mutex_lock(&ssp_lock);
|
||||
list_del(&ssp->node);
|
||||
mutex_unlock(&ssp_lock);
|
||||
|
||||
@@ -8,10 +8,10 @@
|
||||
*/
|
||||
|
||||
/* SoC fixed clocks */
|
||||
soc_uartclk: refclk7273800hz {
|
||||
soc_uartclk: refclk7372800hz {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <7273800>;
|
||||
clock-frequency = <7372800>;
|
||||
clock-output-names = "juno:uartclk";
|
||||
};
|
||||
|
||||
|
||||
@@ -355,6 +355,8 @@
|
||||
l11 {
|
||||
regulator-min-microvolt = <1750000>;
|
||||
regulator-max-microvolt = <3337000>;
|
||||
regulator-allow-set-load;
|
||||
regulator-system-load = <200000>;
|
||||
};
|
||||
|
||||
l12 {
|
||||
|
||||
@@ -793,6 +793,11 @@ static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry,
|
||||
switch (read_cpuid_id() & MIDR_CPU_MODEL_MASK) {
|
||||
case MIDR_CAVIUM_THUNDERX2:
|
||||
case MIDR_BRCM_VULCAN:
|
||||
case MIDR_CORTEX_A53:
|
||||
case MIDR_CORTEX_A55:
|
||||
case MIDR_CORTEX_A57:
|
||||
case MIDR_CORTEX_A72:
|
||||
case MIDR_CORTEX_A73:
|
||||
return false;
|
||||
}
|
||||
|
||||
|
||||
@@ -88,10 +88,19 @@ static irqreturn_t cia_handler(int irq, void *dev_id)
|
||||
struct ciabase *base = dev_id;
|
||||
int mach_irq;
|
||||
unsigned char ints;
|
||||
unsigned long flags;
|
||||
|
||||
/* Interrupts get disabled while the timer irq flag is cleared and
|
||||
* the timer interrupt serviced.
|
||||
*/
|
||||
mach_irq = base->cia_irq;
|
||||
local_irq_save(flags);
|
||||
ints = cia_set_irq(base, CIA_ICR_ALL);
|
||||
amiga_custom.intreq = base->int_mask;
|
||||
if (ints & 1)
|
||||
generic_handle_irq(mach_irq);
|
||||
local_irq_restore(flags);
|
||||
mach_irq++, ints >>= 1;
|
||||
for (; ints; mach_irq++, ints >>= 1) {
|
||||
if (ints & 1)
|
||||
generic_handle_irq(mach_irq);
|
||||
|
||||
@@ -142,7 +142,7 @@ struct mfptimerbase {
|
||||
.name = "MFP Timer D"
|
||||
};
|
||||
|
||||
static irqreturn_t mfptimer_handler(int irq, void *dev_id)
|
||||
static irqreturn_t mfp_timer_d_handler(int irq, void *dev_id)
|
||||
{
|
||||
struct mfptimerbase *base = dev_id;
|
||||
int mach_irq;
|
||||
@@ -344,7 +344,7 @@ void __init atari_init_IRQ(void)
|
||||
st_mfp.tim_ct_cd = (st_mfp.tim_ct_cd & 0xf0) | 0x6;
|
||||
|
||||
/* request timer D dispatch handler */
|
||||
if (request_irq(IRQ_MFP_TIMD, mfptimer_handler, IRQF_SHARED,
|
||||
if (request_irq(IRQ_MFP_TIMD, mfp_timer_d_handler, IRQF_SHARED,
|
||||
stmfp_base.name, &stmfp_base))
|
||||
pr_err("Couldn't register %s interrupt\n", stmfp_base.name);
|
||||
|
||||
|
||||
@@ -24,6 +24,18 @@
|
||||
DEFINE_SPINLOCK(rtc_lock);
|
||||
EXPORT_SYMBOL_GPL(rtc_lock);
|
||||
|
||||
static irqreturn_t mfp_timer_c_handler(int irq, void *dev_id)
|
||||
{
|
||||
irq_handler_t timer_routine = dev_id;
|
||||
unsigned long flags;
|
||||
|
||||
local_irq_save(flags);
|
||||
timer_routine(0, NULL);
|
||||
local_irq_restore(flags);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
void __init
|
||||
atari_sched_init(irq_handler_t timer_routine)
|
||||
{
|
||||
@@ -32,7 +44,8 @@ atari_sched_init(irq_handler_t timer_routine)
|
||||
/* start timer C, div = 1:100 */
|
||||
st_mfp.tim_ct_cd = (st_mfp.tim_ct_cd & 15) | 0x60;
|
||||
/* install interrupt service routine for MFP Timer C */
|
||||
if (request_irq(IRQ_MFP_TIMC, timer_routine, 0, "timer", timer_routine))
|
||||
if (request_irq(IRQ_MFP_TIMC, mfp_timer_c_handler, 0, "timer",
|
||||
timer_routine))
|
||||
pr_err("Couldn't register timer interrupt\n");
|
||||
}
|
||||
|
||||
|
||||
@@ -45,11 +45,6 @@ extern int bvme6000_set_clock_mmss (unsigned long);
|
||||
extern void bvme6000_reset (void);
|
||||
void bvme6000_set_vectors (void);
|
||||
|
||||
/* Save tick handler routine pointer, will point to xtime_update() in
|
||||
* kernel/timer/timekeeping.c, called via bvme6000_process_int() */
|
||||
|
||||
static irq_handler_t tick_handler;
|
||||
|
||||
|
||||
int __init bvme6000_parse_bootinfo(const struct bi_record *bi)
|
||||
{
|
||||
@@ -159,12 +154,18 @@ irqreturn_t bvme6000_abort_int (int irq, void *dev_id)
|
||||
|
||||
static irqreturn_t bvme6000_timer_int (int irq, void *dev_id)
|
||||
{
|
||||
irq_handler_t timer_routine = dev_id;
|
||||
unsigned long flags;
|
||||
volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
|
||||
unsigned char msr = rtc->msr & 0xc0;
|
||||
unsigned char msr;
|
||||
|
||||
local_irq_save(flags);
|
||||
msr = rtc->msr & 0xc0;
|
||||
rtc->msr = msr | 0x20; /* Ack the interrupt */
|
||||
timer_routine(0, NULL);
|
||||
local_irq_restore(flags);
|
||||
|
||||
return tick_handler(irq, dev_id);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -183,9 +184,8 @@ void bvme6000_sched_init (irq_handler_t timer_routine)
|
||||
|
||||
rtc->msr = 0; /* Ensure timer registers accessible */
|
||||
|
||||
tick_handler = timer_routine;
|
||||
if (request_irq(BVME_IRQ_RTC, bvme6000_timer_int, 0,
|
||||
"timer", bvme6000_timer_int))
|
||||
if (request_irq(BVME_IRQ_RTC, bvme6000_timer_int, 0, "timer",
|
||||
timer_routine))
|
||||
panic ("Couldn't register timer int");
|
||||
|
||||
rtc->t1cr_omr = 0x04; /* Mode 2, ext clk */
|
||||
|
||||
@@ -37,13 +37,19 @@
|
||||
|
||||
static irqreturn_t hp300_tick(int irq, void *dev_id)
|
||||
{
|
||||
irq_handler_t timer_routine = dev_id;
|
||||
unsigned long flags;
|
||||
unsigned long tmp;
|
||||
irq_handler_t vector = dev_id;
|
||||
|
||||
local_irq_save(flags);
|
||||
in_8(CLOCKBASE + CLKSR);
|
||||
asm volatile ("movpw %1@(5),%0" : "=d" (tmp) : "a" (CLOCKBASE));
|
||||
timer_routine(0, NULL);
|
||||
local_irq_restore(flags);
|
||||
|
||||
/* Turn off the network and SCSI leds */
|
||||
blinken_leds(0, 0xe0);
|
||||
return vector(irq, NULL);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
u32 hp300_gettimeoffset(void)
|
||||
|
||||
@@ -53,16 +53,6 @@ static __u8 rbv_clear;
|
||||
|
||||
static int gIER,gIFR,gBufA,gBufB;
|
||||
|
||||
/*
|
||||
* Timer defs.
|
||||
*/
|
||||
|
||||
#define TICK_SIZE 10000
|
||||
#define MAC_CLOCK_TICK (783300/HZ) /* ticks per HZ */
|
||||
#define MAC_CLOCK_LOW (MAC_CLOCK_TICK&0xFF)
|
||||
#define MAC_CLOCK_HIGH (MAC_CLOCK_TICK>>8)
|
||||
|
||||
|
||||
/*
|
||||
* On Macs with a genuine VIA chip there is no way to mask an individual slot
|
||||
* interrupt. This limitation also seems to apply to VIA clone logic cores in
|
||||
@@ -277,22 +267,6 @@ void __init via_init(void)
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Start the 100 Hz clock
|
||||
*/
|
||||
|
||||
void __init via_init_clock(irq_handler_t func)
|
||||
{
|
||||
via1[vACR] |= 0x40;
|
||||
via1[vT1LL] = MAC_CLOCK_LOW;
|
||||
via1[vT1LH] = MAC_CLOCK_HIGH;
|
||||
via1[vT1CL] = MAC_CLOCK_LOW;
|
||||
via1[vT1CH] = MAC_CLOCK_HIGH;
|
||||
|
||||
if (request_irq(IRQ_MAC_TIMER_1, func, 0, "timer", func))
|
||||
pr_err("Couldn't register %s interrupt\n", "timer");
|
||||
}
|
||||
|
||||
/*
|
||||
* Debugging dump, used in various places to see what's going on.
|
||||
*/
|
||||
@@ -320,29 +294,6 @@ void via_debug_dump(void)
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* This is always executed with interrupts disabled.
|
||||
*
|
||||
* TBI: get time offset between scheduling timer ticks
|
||||
*/
|
||||
|
||||
u32 mac_gettimeoffset(void)
|
||||
{
|
||||
unsigned long ticks, offset = 0;
|
||||
|
||||
/* read VIA1 timer 2 current value */
|
||||
ticks = via1[vT1CL] | (via1[vT1CH] << 8);
|
||||
/* The probability of underflow is less than 2% */
|
||||
if (ticks > MAC_CLOCK_TICK - MAC_CLOCK_TICK / 50)
|
||||
/* Check for pending timer interrupt in VIA1 IFR */
|
||||
if (via1[vIFR] & 0x40) offset = TICK_SIZE;
|
||||
|
||||
ticks = MAC_CLOCK_TICK - ticks;
|
||||
ticks = ticks * 10000L / MAC_CLOCK_TICK;
|
||||
|
||||
return (ticks + offset) * 1000;
|
||||
}
|
||||
|
||||
/*
|
||||
* Flush the L2 cache on Macs that have it by flipping
|
||||
* the system into 24-bit mode for an instant.
|
||||
@@ -446,6 +397,8 @@ void via_nubus_irq_shutdown(int irq)
|
||||
* via6522.c :-), disable/pending masks added.
|
||||
*/
|
||||
|
||||
#define VIA_TIMER_1_INT BIT(6)
|
||||
|
||||
void via1_irq(struct irq_desc *desc)
|
||||
{
|
||||
int irq_num;
|
||||
@@ -455,6 +408,21 @@ void via1_irq(struct irq_desc *desc)
|
||||
if (!events)
|
||||
return;
|
||||
|
||||
irq_num = IRQ_MAC_TIMER_1;
|
||||
irq_bit = VIA_TIMER_1_INT;
|
||||
if (events & irq_bit) {
|
||||
unsigned long flags;
|
||||
|
||||
local_irq_save(flags);
|
||||
via1[vIFR] = irq_bit;
|
||||
generic_handle_irq(irq_num);
|
||||
local_irq_restore(flags);
|
||||
|
||||
events &= ~irq_bit;
|
||||
if (!events)
|
||||
return;
|
||||
}
|
||||
|
||||
irq_num = VIA1_SOURCE_BASE;
|
||||
irq_bit = 1;
|
||||
do {
|
||||
@@ -619,3 +587,56 @@ int via2_scsi_drq_pending(void)
|
||||
return via2[gIFR] & (1 << IRQ_IDX(IRQ_MAC_SCSIDRQ));
|
||||
}
|
||||
EXPORT_SYMBOL(via2_scsi_drq_pending);
|
||||
|
||||
/* timer and clock source */
|
||||
|
||||
#define VIA_CLOCK_FREQ 783360 /* VIA "phase 2" clock in Hz */
|
||||
#define VIA_TIMER_INTERVAL (1000000 / HZ) /* microseconds per jiffy */
|
||||
#define VIA_TIMER_CYCLES (VIA_CLOCK_FREQ / HZ) /* clock cycles per jiffy */
|
||||
|
||||
#define VIA_TC (VIA_TIMER_CYCLES - 2) /* including 0 and -1 */
|
||||
#define VIA_TC_LOW (VIA_TC & 0xFF)
|
||||
#define VIA_TC_HIGH (VIA_TC >> 8)
|
||||
|
||||
void __init via_init_clock(irq_handler_t timer_routine)
|
||||
{
|
||||
if (request_irq(IRQ_MAC_TIMER_1, timer_routine, 0, "timer", NULL)) {
|
||||
pr_err("Couldn't register %s interrupt\n", "timer");
|
||||
return;
|
||||
}
|
||||
|
||||
via1[vT1LL] = VIA_TC_LOW;
|
||||
via1[vT1LH] = VIA_TC_HIGH;
|
||||
via1[vT1CL] = VIA_TC_LOW;
|
||||
via1[vT1CH] = VIA_TC_HIGH;
|
||||
via1[vACR] |= 0x40;
|
||||
}
|
||||
|
||||
u32 mac_gettimeoffset(void)
|
||||
{
|
||||
unsigned long flags;
|
||||
u8 count_high;
|
||||
u16 count, offset = 0;
|
||||
|
||||
/*
|
||||
* Timer counter wrap-around is detected with the timer interrupt flag
|
||||
* but reading the counter low byte (vT1CL) would reset the flag.
|
||||
* Also, accessing both counter registers is essentially a data race.
|
||||
* These problems are avoided by ignoring the low byte. Clock accuracy
|
||||
* is 256 times worse (error can reach 0.327 ms) but CPU overhead is
|
||||
* reduced by avoiding slow VIA register accesses.
|
||||
*/
|
||||
|
||||
local_irq_save(flags);
|
||||
count_high = via1[vT1CH];
|
||||
if (count_high == 0xFF)
|
||||
count_high = 0;
|
||||
if (count_high > 0 && (via1[vIFR] & VIA_TIMER_1_INT))
|
||||
offset = VIA_TIMER_CYCLES;
|
||||
local_irq_restore(flags);
|
||||
|
||||
count = count_high << 8;
|
||||
count = VIA_TIMER_CYCLES - count + offset;
|
||||
|
||||
return ((count * VIA_TIMER_INTERVAL) / VIA_TIMER_CYCLES) * 1000;
|
||||
}
|
||||
|
||||
@@ -46,11 +46,6 @@ extern void mvme147_reset (void);
|
||||
|
||||
static int bcd2int (unsigned char b);
|
||||
|
||||
/* Save tick handler routine pointer, will point to xtime_update() in
|
||||
* kernel/time/timekeeping.c, called via mvme147_process_int() */
|
||||
|
||||
irq_handler_t tick_handler;
|
||||
|
||||
|
||||
int __init mvme147_parse_bootinfo(const struct bi_record *bi)
|
||||
{
|
||||
@@ -106,16 +101,23 @@ void __init config_mvme147(void)
|
||||
|
||||
static irqreturn_t mvme147_timer_int (int irq, void *dev_id)
|
||||
{
|
||||
irq_handler_t timer_routine = dev_id;
|
||||
unsigned long flags;
|
||||
|
||||
local_irq_save(flags);
|
||||
m147_pcc->t1_int_cntrl = PCC_TIMER_INT_CLR;
|
||||
m147_pcc->t1_int_cntrl = PCC_INT_ENAB|PCC_LEVEL_TIMER1;
|
||||
return tick_handler(irq, dev_id);
|
||||
timer_routine(0, NULL);
|
||||
local_irq_restore(flags);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
|
||||
void mvme147_sched_init (irq_handler_t timer_routine)
|
||||
{
|
||||
tick_handler = timer_routine;
|
||||
if (request_irq(PCC_IRQ_TIMER1, mvme147_timer_int, 0, "timer 1", NULL))
|
||||
if (request_irq(PCC_IRQ_TIMER1, mvme147_timer_int, 0, "timer 1",
|
||||
timer_routine))
|
||||
pr_err("Couldn't register timer interrupt\n");
|
||||
|
||||
/* Init the clock with a value */
|
||||
|
||||
@@ -51,11 +51,6 @@ extern void mvme16x_reset (void);
|
||||
|
||||
int bcd2int (unsigned char b);
|
||||
|
||||
/* Save tick handler routine pointer, will point to xtime_update() in
|
||||
* kernel/time/timekeeping.c, called via mvme16x_process_int() */
|
||||
|
||||
static irq_handler_t tick_handler;
|
||||
|
||||
|
||||
unsigned short mvme16x_config;
|
||||
EXPORT_SYMBOL(mvme16x_config);
|
||||
@@ -354,8 +349,15 @@ static irqreturn_t mvme16x_abort_int (int irq, void *dev_id)
|
||||
|
||||
static irqreturn_t mvme16x_timer_int (int irq, void *dev_id)
|
||||
{
|
||||
*(volatile unsigned char *)0xfff4201b |= 8;
|
||||
return tick_handler(irq, dev_id);
|
||||
irq_handler_t timer_routine = dev_id;
|
||||
unsigned long flags;
|
||||
|
||||
local_irq_save(flags);
|
||||
*(volatile unsigned char *)0xfff4201b |= 8;
|
||||
timer_routine(0, NULL);
|
||||
local_irq_restore(flags);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
void mvme16x_sched_init (irq_handler_t timer_routine)
|
||||
@@ -363,14 +365,13 @@ void mvme16x_sched_init (irq_handler_t timer_routine)
|
||||
uint16_t brdno = be16_to_cpu(mvme_bdid.brdno);
|
||||
int irq;
|
||||
|
||||
tick_handler = timer_routine;
|
||||
/* Using PCCchip2 or MC2 chip tick timer 1 */
|
||||
*(volatile unsigned long *)0xfff42008 = 0;
|
||||
*(volatile unsigned long *)0xfff42004 = 10000; /* 10ms */
|
||||
*(volatile unsigned char *)0xfff42017 |= 3;
|
||||
*(volatile unsigned char *)0xfff4201b = 0x16;
|
||||
if (request_irq(MVME16x_IRQ_TIMER, mvme16x_timer_int, 0,
|
||||
"timer", mvme16x_timer_int))
|
||||
if (request_irq(MVME16x_IRQ_TIMER, mvme16x_timer_int, 0, "timer",
|
||||
timer_routine))
|
||||
panic ("Couldn't register timer int");
|
||||
|
||||
if (brdno == 0x0162 || brdno == 0x172)
|
||||
|
||||
@@ -126,10 +126,10 @@ void q40_mksound(unsigned int hz, unsigned int ticks)
|
||||
sound_ticks = ticks << 1;
|
||||
}
|
||||
|
||||
static irq_handler_t q40_timer_routine;
|
||||
|
||||
static irqreturn_t q40_timer_int (int irq, void * dev)
|
||||
static irqreturn_t q40_timer_int(int irq, void *dev_id)
|
||||
{
|
||||
irq_handler_t timer_routine = dev_id;
|
||||
|
||||
ql_ticks = ql_ticks ? 0 : 1;
|
||||
if (sound_ticks) {
|
||||
unsigned char sval=(sound_ticks & 1) ? 128-SVOL : 128+SVOL;
|
||||
@@ -138,8 +138,13 @@ static irqreturn_t q40_timer_int (int irq, void * dev)
|
||||
*DAC_RIGHT=sval;
|
||||
}
|
||||
|
||||
if (!ql_ticks)
|
||||
q40_timer_routine(irq, dev);
|
||||
if (!ql_ticks) {
|
||||
unsigned long flags;
|
||||
|
||||
local_irq_save(flags);
|
||||
timer_routine(0, NULL);
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
@@ -147,11 +152,9 @@ void q40_sched_init (irq_handler_t timer_routine)
|
||||
{
|
||||
int timer_irq;
|
||||
|
||||
q40_timer_routine = timer_routine;
|
||||
timer_irq = Q40_IRQ_FRAME;
|
||||
|
||||
if (request_irq(timer_irq, q40_timer_int, 0,
|
||||
"timer", q40_timer_int))
|
||||
if (request_irq(timer_irq, q40_timer_int, 0, "timer", timer_routine))
|
||||
panic("Couldn't register timer int");
|
||||
|
||||
master_outb(-1, FRAME_CLEAR_REG);
|
||||
|
||||
@@ -61,8 +61,10 @@ static irqreturn_t sun3_int7(int irq, void *dev_id)
|
||||
|
||||
static irqreturn_t sun3_int5(int irq, void *dev_id)
|
||||
{
|
||||
unsigned long flags;
|
||||
unsigned int cnt;
|
||||
|
||||
local_irq_save(flags);
|
||||
#ifdef CONFIG_SUN3
|
||||
intersil_clear();
|
||||
#endif
|
||||
@@ -76,6 +78,7 @@ static irqreturn_t sun3_int5(int irq, void *dev_id)
|
||||
cnt = kstat_irqs_cpu(irq, 0);
|
||||
if (!(cnt % 20))
|
||||
sun3_leds(led_pattern[cnt % 160 / 20]);
|
||||
local_irq_restore(flags);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
|
||||
@@ -77,15 +77,19 @@ u32 sun3x_gettimeoffset(void)
|
||||
}
|
||||
|
||||
#if 0
|
||||
static void sun3x_timer_tick(int irq, void *dev_id, struct pt_regs *regs)
|
||||
static irqreturn_t sun3x_timer_tick(int irq, void *dev_id)
|
||||
{
|
||||
void (*vector)(int, void *, struct pt_regs *) = dev_id;
|
||||
irq_handler_t timer_routine = dev_id;
|
||||
unsigned long flags;
|
||||
|
||||
/* Clear the pending interrupt - pulse the enable line low */
|
||||
disable_irq(5);
|
||||
enable_irq(5);
|
||||
local_irq_save(flags);
|
||||
/* Clear the pending interrupt - pulse the enable line low */
|
||||
disable_irq(5);
|
||||
enable_irq(5);
|
||||
timer_routine(0, NULL);
|
||||
local_irq_restore(flags);
|
||||
|
||||
vector(irq, NULL, regs);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
@@ -60,21 +60,11 @@
|
||||
* instruction, so the lower 16 bits must be zero. Should be true on
|
||||
* on any sane architecture; generic code does not use this assumption.
|
||||
*/
|
||||
extern const unsigned long mips_io_port_base;
|
||||
extern unsigned long mips_io_port_base;
|
||||
|
||||
/*
|
||||
* Gcc will generate code to load the value of mips_io_port_base after each
|
||||
* function call which may be fairly wasteful in some cases. So we don't
|
||||
* play quite by the book. We tell gcc mips_io_port_base is a long variable
|
||||
* which solves the code generation issue. Now we need to violate the
|
||||
* aliasing rules a little to make initialization possible and finally we
|
||||
* will need the barrier() to fight side effects of the aliasing chat.
|
||||
* This trickery will eventually collapse under gcc's optimizer. Oh well.
|
||||
*/
|
||||
static inline void set_io_port_base(unsigned long base)
|
||||
{
|
||||
* (unsigned long *) &mips_io_port_base = base;
|
||||
barrier();
|
||||
mips_io_port_base = base;
|
||||
}
|
||||
|
||||
/*
|
||||
|
||||
@@ -74,7 +74,7 @@ static char __initdata builtin_cmdline[COMMAND_LINE_SIZE] = CONFIG_CMDLINE;
|
||||
* mips_io_port_base is the begin of the address space to which x86 style
|
||||
* I/O ports are mapped.
|
||||
*/
|
||||
const unsigned long mips_io_port_base = -1;
|
||||
unsigned long mips_io_port_base = -1;
|
||||
EXPORT_SYMBOL(mips_io_port_base);
|
||||
|
||||
static struct resource code_resource = { .name = "Kernel code", };
|
||||
|
||||
@@ -9,12 +9,20 @@
|
||||
#include <linux/export.h>
|
||||
#include <linux/string.h>
|
||||
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/pgtable.h>
|
||||
|
||||
/* string functions */
|
||||
|
||||
EXPORT_SYMBOL(memcpy);
|
||||
EXPORT_SYMBOL(memset);
|
||||
EXPORT_SYMBOL(memmove);
|
||||
|
||||
/* memory management */
|
||||
|
||||
EXPORT_SYMBOL(empty_zero_page);
|
||||
EXPORT_SYMBOL(flush_icache_range);
|
||||
|
||||
/*
|
||||
* libgcc functions - functions that are used internally by the
|
||||
* compiler... (prototypes are not correct though, but that
|
||||
@@ -31,3 +39,7 @@ DECLARE_EXPORT(__udivsi3);
|
||||
DECLARE_EXPORT(__umoddi3);
|
||||
DECLARE_EXPORT(__umodsi3);
|
||||
DECLARE_EXPORT(__muldi3);
|
||||
DECLARE_EXPORT(__ucmpdi2);
|
||||
DECLARE_EXPORT(__lshrdi3);
|
||||
DECLARE_EXPORT(__ashldi3);
|
||||
DECLARE_EXPORT(__ashrdi3);
|
||||
|
||||
@@ -373,7 +373,9 @@ vdso_install:
|
||||
ifeq ($(CONFIG_PPC64),y)
|
||||
$(Q)$(MAKE) $(build)=arch/$(ARCH)/kernel/vdso64 $@
|
||||
endif
|
||||
ifdef CONFIG_VDSO32
|
||||
$(Q)$(MAKE) $(build)=arch/$(ARCH)/kernel/vdso32 $@
|
||||
endif
|
||||
|
||||
archclean:
|
||||
$(Q)$(MAKE) $(clean)=$(boot)
|
||||
|
||||
@@ -27,7 +27,7 @@ static inline int arch_get_random_seed_int(unsigned int *v)
|
||||
unsigned long val;
|
||||
int rc;
|
||||
|
||||
rc = arch_get_random_long(&val);
|
||||
rc = arch_get_random_seed_long(&val);
|
||||
if (rc)
|
||||
*v = val;
|
||||
|
||||
|
||||
@@ -867,4 +867,21 @@ void cacheinfo_cpu_offline(unsigned int cpu_id)
|
||||
if (cache)
|
||||
cache_cpu_clear(cache, cpu_id);
|
||||
}
|
||||
|
||||
void cacheinfo_teardown(void)
|
||||
{
|
||||
unsigned int cpu;
|
||||
|
||||
for_each_online_cpu(cpu)
|
||||
cacheinfo_cpu_offline(cpu);
|
||||
}
|
||||
|
||||
void cacheinfo_rebuild(void)
|
||||
{
|
||||
unsigned int cpu;
|
||||
|
||||
for_each_online_cpu(cpu)
|
||||
cacheinfo_cpu_online(cpu);
|
||||
}
|
||||
|
||||
#endif /* (CONFIG_PPC_PSERIES && CONFIG_SUSPEND) || CONFIG_HOTPLUG_CPU */
|
||||
|
||||
@@ -5,4 +5,8 @@
|
||||
extern void cacheinfo_cpu_online(unsigned int cpu_id);
|
||||
extern void cacheinfo_cpu_offline(unsigned int cpu_id);
|
||||
|
||||
/* Allow migration/suspend to tear down and rebuild the hierarchy. */
|
||||
extern void cacheinfo_teardown(void);
|
||||
extern void cacheinfo_rebuild(void);
|
||||
|
||||
#endif /* _PPC_CACHEINFO_H */
|
||||
|
||||
@@ -192,7 +192,7 @@ config HAVE_MMIOTRACE_SUPPORT
|
||||
|
||||
config X86_DECODER_SELFTEST
|
||||
bool "x86 instruction decoder selftest"
|
||||
depends on DEBUG_KERNEL && KPROBES
|
||||
depends on DEBUG_KERNEL && INSTRUCTION_DECODER
|
||||
depends on !COMPILE_TEST
|
||||
---help---
|
||||
Perform x86 instruction decoder selftests at build time.
|
||||
|
||||
@@ -438,7 +438,7 @@ static void kgdb_disable_hw_debug(struct pt_regs *regs)
|
||||
*/
|
||||
void kgdb_roundup_cpus(unsigned long flags)
|
||||
{
|
||||
apic->send_IPI_allbutself(APIC_DM_NMI);
|
||||
apic->send_IPI_allbutself(NMI_VECTOR);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
@@ -305,13 +305,7 @@ void blk_recalc_rq_segments(struct request *rq)
|
||||
|
||||
void blk_recount_segments(struct request_queue *q, struct bio *bio)
|
||||
{
|
||||
unsigned short seg_cnt;
|
||||
|
||||
/* estimate segment number by bi_vcnt for non-cloned bio */
|
||||
if (bio_flagged(bio, BIO_CLONED))
|
||||
seg_cnt = bio_segments(bio);
|
||||
else
|
||||
seg_cnt = bio->bi_vcnt;
|
||||
unsigned short seg_cnt = bio_segments(bio);
|
||||
|
||||
if (test_bit(QUEUE_FLAG_NO_SG_MERGE, &q->queue_flags) &&
|
||||
(seg_cnt < queue_max_segments(q)))
|
||||
|
||||
@@ -394,7 +394,7 @@ static int pcrypt_sysfs_add(struct padata_instance *pinst, const char *name)
|
||||
int ret;
|
||||
|
||||
pinst->kobj.kset = pcrypt_kset;
|
||||
ret = kobject_add(&pinst->kobj, NULL, name);
|
||||
ret = kobject_add(&pinst->kobj, NULL, "%s", name);
|
||||
if (!ret)
|
||||
kobject_uevent(&pinst->kobj, KOBJ_ADD);
|
||||
|
||||
|
||||
@@ -25,8 +25,9 @@
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/mm.h>
|
||||
#include <asm/byteorder.h>
|
||||
#include <linux/types.h>
|
||||
#include <asm/byteorder.h>
|
||||
#include <asm/unaligned.h>
|
||||
|
||||
#define TGR192_DIGEST_SIZE 24
|
||||
#define TGR160_DIGEST_SIZE 20
|
||||
@@ -468,10 +469,9 @@ static void tgr192_transform(struct tgr192_ctx *tctx, const u8 * data)
|
||||
u64 a, b, c, aa, bb, cc;
|
||||
u64 x[8];
|
||||
int i;
|
||||
const __le64 *ptr = (const __le64 *)data;
|
||||
|
||||
for (i = 0; i < 8; i++)
|
||||
x[i] = le64_to_cpu(ptr[i]);
|
||||
x[i] = get_unaligned_le64(data + i * sizeof(__le64));
|
||||
|
||||
/* save */
|
||||
a = aa = tctx->a;
|
||||
|
||||
@@ -190,7 +190,6 @@ struct ata_port_operations ahci_pmp_retry_srst_ops = {
|
||||
EXPORT_SYMBOL_GPL(ahci_pmp_retry_srst_ops);
|
||||
|
||||
static bool ahci_em_messages __read_mostly = true;
|
||||
EXPORT_SYMBOL_GPL(ahci_em_messages);
|
||||
module_param(ahci_em_messages, bool, 0444);
|
||||
/* add other LED protocol types when they become supported */
|
||||
MODULE_PARM_DESC(ahci_em_messages,
|
||||
|
||||
@@ -927,6 +927,7 @@ static int fs_open(struct atm_vcc *atm_vcc)
|
||||
}
|
||||
if (!to) {
|
||||
printk ("No more free channels for FS50..\n");
|
||||
kfree(vcc);
|
||||
return -EBUSY;
|
||||
}
|
||||
vcc->channo = dev->channo;
|
||||
@@ -937,6 +938,7 @@ static int fs_open(struct atm_vcc *atm_vcc)
|
||||
if (((DO_DIRECTION(rxtp) && dev->atm_vccs[vcc->channo])) ||
|
||||
( DO_DIRECTION(txtp) && test_bit (vcc->channo, dev->tx_inuse))) {
|
||||
printk ("Channel is in use for FS155.\n");
|
||||
kfree(vcc);
|
||||
return -EBUSY;
|
||||
}
|
||||
}
|
||||
@@ -950,6 +952,7 @@ static int fs_open(struct atm_vcc *atm_vcc)
|
||||
tc, sizeof (struct fs_transmit_config));
|
||||
if (!tc) {
|
||||
fs_dprintk (FS_DEBUG_OPEN, "fs: can't alloc transmit_config.\n");
|
||||
kfree(vcc);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
|
||||
@@ -78,7 +78,7 @@ static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u16 device, u8 address)
|
||||
v |= (address << BCMA_CORE_PCI_MDIODATA_REGADDR_SHF_OLD);
|
||||
}
|
||||
|
||||
v = BCMA_CORE_PCI_MDIODATA_START;
|
||||
v |= BCMA_CORE_PCI_MDIODATA_START;
|
||||
v |= BCMA_CORE_PCI_MDIODATA_READ;
|
||||
v |= BCMA_CORE_PCI_MDIODATA_TA;
|
||||
|
||||
@@ -121,7 +121,7 @@ static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u16 device,
|
||||
v |= (address << BCMA_CORE_PCI_MDIODATA_REGADDR_SHF_OLD);
|
||||
}
|
||||
|
||||
v = BCMA_CORE_PCI_MDIODATA_START;
|
||||
v |= BCMA_CORE_PCI_MDIODATA_START;
|
||||
v |= BCMA_CORE_PCI_MDIODATA_WRITE;
|
||||
v |= BCMA_CORE_PCI_MDIODATA_TA;
|
||||
v |= data;
|
||||
|
||||
@@ -332,6 +332,8 @@ static int drbd_thread_setup(void *arg)
|
||||
thi->name[0],
|
||||
resource->name);
|
||||
|
||||
allow_kernel_signal(DRBD_SIGKILL);
|
||||
allow_kernel_signal(SIGXCPU);
|
||||
restart:
|
||||
retval = thi->function(thi);
|
||||
|
||||
|
||||
@@ -293,6 +293,7 @@ static __init struct clk *hb_clk_init(struct device_node *node, const struct clk
|
||||
/* Map system registers */
|
||||
srnp = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs");
|
||||
hb_clk->reg = of_iomap(srnp, 0);
|
||||
of_node_put(srnp);
|
||||
BUG_ON(!hb_clk->reg);
|
||||
hb_clk->reg += reg;
|
||||
|
||||
|
||||
@@ -1245,6 +1245,7 @@ static void __init clockgen_init(struct device_node *np)
|
||||
pr_err("%s: Couldn't map %s regs\n", __func__,
|
||||
guts->full_name);
|
||||
}
|
||||
of_node_put(guts);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
@@ -174,6 +174,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
|
||||
np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop");
|
||||
base = of_iomap(np, 0);
|
||||
WARN_ON(!base);
|
||||
of_node_put(np);
|
||||
|
||||
/* Audio/video PLL post dividers do not work on i.MX6q revision 1.0 */
|
||||
if (clk_on_imx6q() && imx_get_soc_revision() == IMX_CHIP_REVISION_1_0) {
|
||||
|
||||
@@ -164,6 +164,7 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
|
||||
np = of_find_compatible_node(NULL, NULL, "fsl,imx6sx-anatop");
|
||||
base = of_iomap(np, 0);
|
||||
WARN_ON(!base);
|
||||
of_node_put(np);
|
||||
|
||||
clks[IMX6SX_PLL1_BYPASS_SRC] = imx_clk_mux("pll1_bypass_src", base + 0x00, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
|
||||
clks[IMX6SX_PLL2_BYPASS_SRC] = imx_clk_mux("pll2_bypass_src", base + 0x30, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
|
||||
|
||||
@@ -415,6 +415,7 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node)
|
||||
np = of_find_compatible_node(NULL, NULL, "fsl,imx7d-anatop");
|
||||
base = of_iomap(np, 0);
|
||||
WARN_ON(!base);
|
||||
of_node_put(np);
|
||||
|
||||
clks[IMX7D_PLL_ARM_MAIN_SRC] = imx_clk_mux("pll_arm_main_src", base + 0x60, 14, 2, pll_bypass_src_sel, ARRAY_SIZE(pll_bypass_src_sel));
|
||||
clks[IMX7D_PLL_DRAM_MAIN_SRC] = imx_clk_mux("pll_dram_main_src", base + 0x70, 14, 2, pll_bypass_src_sel, ARRAY_SIZE(pll_bypass_src_sel));
|
||||
|
||||
@@ -203,6 +203,7 @@ static void __init vf610_clocks_init(struct device_node *ccm_node)
|
||||
np = of_find_compatible_node(NULL, NULL, "fsl,vf610-anatop");
|
||||
anatop_base = of_iomap(np, 0);
|
||||
BUG_ON(!anatop_base);
|
||||
of_node_put(np);
|
||||
|
||||
np = ccm_node;
|
||||
ccm_base = of_iomap(np, 0);
|
||||
|
||||
@@ -177,8 +177,10 @@ static void __init a370_clk_init(struct device_node *np)
|
||||
|
||||
mvebu_coreclk_setup(np, &a370_coreclks);
|
||||
|
||||
if (cgnp)
|
||||
if (cgnp) {
|
||||
mvebu_clk_gating_setup(cgnp, a370_gating_desc);
|
||||
of_node_put(cgnp);
|
||||
}
|
||||
}
|
||||
CLK_OF_DECLARE(a370_clk, "marvell,armada-370-core-clock", a370_clk_init);
|
||||
|
||||
|
||||
@@ -202,7 +202,9 @@ static void __init axp_clk_init(struct device_node *np)
|
||||
|
||||
mvebu_coreclk_setup(np, &axp_coreclks);
|
||||
|
||||
if (cgnp)
|
||||
if (cgnp) {
|
||||
mvebu_clk_gating_setup(cgnp, axp_gating_desc);
|
||||
of_node_put(cgnp);
|
||||
}
|
||||
}
|
||||
CLK_OF_DECLARE(axp_clk, "marvell,armada-xp-core-clock", axp_clk_init);
|
||||
|
||||
@@ -190,10 +190,14 @@ static void __init dove_clk_init(struct device_node *np)
|
||||
|
||||
mvebu_coreclk_setup(np, &dove_coreclks);
|
||||
|
||||
if (ddnp)
|
||||
if (ddnp) {
|
||||
dove_divider_clk_init(ddnp);
|
||||
of_node_put(ddnp);
|
||||
}
|
||||
|
||||
if (cgnp)
|
||||
if (cgnp) {
|
||||
mvebu_clk_gating_setup(cgnp, dove_gating_desc);
|
||||
of_node_put(cgnp);
|
||||
}
|
||||
}
|
||||
CLK_OF_DECLARE(dove_clk, "marvell,dove-core-clock", dove_clk_init);
|
||||
|
||||
@@ -333,6 +333,8 @@ static void __init kirkwood_clk_init(struct device_node *np)
|
||||
if (cgnp) {
|
||||
mvebu_clk_gating_setup(cgnp, kirkwood_gating_desc);
|
||||
kirkwood_clk_muxing_setup(cgnp, kirkwood_mux_desc);
|
||||
|
||||
of_node_put(cgnp);
|
||||
}
|
||||
}
|
||||
CLK_OF_DECLARE(kirkwood_clk, "marvell,kirkwood-core-clock",
|
||||
|
||||
@@ -140,22 +140,6 @@ static const char * const gcc_xo_gpll0_gpll4_gpll0_early_div[] = {
|
||||
"gpll0_early_div"
|
||||
};
|
||||
|
||||
static const struct parent_map gcc_xo_gpll0_gpll2_gpll3_gpll0_early_div_map[] = {
|
||||
{ P_XO, 0 },
|
||||
{ P_GPLL0, 1 },
|
||||
{ P_GPLL2, 2 },
|
||||
{ P_GPLL3, 3 },
|
||||
{ P_GPLL0_EARLY_DIV, 6 }
|
||||
};
|
||||
|
||||
static const char * const gcc_xo_gpll0_gpll2_gpll3_gpll0_early_div[] = {
|
||||
"xo",
|
||||
"gpll0",
|
||||
"gpll2",
|
||||
"gpll3",
|
||||
"gpll0_early_div"
|
||||
};
|
||||
|
||||
static const struct parent_map gcc_xo_gpll0_gpll1_early_div_gpll1_gpll4_gpll0_early_div_map[] = {
|
||||
{ P_XO, 0 },
|
||||
{ P_GPLL0, 1 },
|
||||
@@ -194,26 +178,6 @@ static const char * const gcc_xo_gpll0_gpll2_gpll3_gpll1_gpll2_early_gpll0_early
|
||||
"gpll0_early_div"
|
||||
};
|
||||
|
||||
static const struct parent_map gcc_xo_gpll0_gpll2_gpll3_gpll1_gpll4_gpll0_early_div_map[] = {
|
||||
{ P_XO, 0 },
|
||||
{ P_GPLL0, 1 },
|
||||
{ P_GPLL2, 2 },
|
||||
{ P_GPLL3, 3 },
|
||||
{ P_GPLL1, 4 },
|
||||
{ P_GPLL4, 5 },
|
||||
{ P_GPLL0_EARLY_DIV, 6 }
|
||||
};
|
||||
|
||||
static const char * const gcc_xo_gpll0_gpll2_gpll3_gpll1_gpll4_gpll0_early_div[] = {
|
||||
"xo",
|
||||
"gpll0",
|
||||
"gpll2",
|
||||
"gpll3",
|
||||
"gpll1",
|
||||
"gpll4",
|
||||
"gpll0_early_div"
|
||||
};
|
||||
|
||||
static struct clk_fixed_factor xo = {
|
||||
.mult = 1,
|
||||
.div = 1,
|
||||
|
||||
@@ -1225,6 +1225,7 @@ static unsigned long __init exynos4_get_xom(void)
|
||||
xom = readl(chipid_base + 8);
|
||||
|
||||
iounmap(chipid_base);
|
||||
of_node_put(np);
|
||||
}
|
||||
|
||||
return xom;
|
||||
|
||||
@@ -95,6 +95,7 @@ static struct clk * __init __socfpga_pll_init(struct device_node *node,
|
||||
|
||||
clkmgr_np = of_find_compatible_node(NULL, NULL, "altr,clk-mgr");
|
||||
clk_mgr_a10_base_addr = of_iomap(clkmgr_np, 0);
|
||||
of_node_put(clkmgr_np);
|
||||
BUG_ON(!clk_mgr_a10_base_addr);
|
||||
pll_clk->hw.reg = clk_mgr_a10_base_addr + reg;
|
||||
|
||||
|
||||
@@ -100,6 +100,7 @@ static __init struct clk *__socfpga_pll_init(struct device_node *node,
|
||||
|
||||
clkmgr_np = of_find_compatible_node(NULL, NULL, "altr,clk-mgr");
|
||||
clk_mgr_base_addr = of_iomap(clkmgr_np, 0);
|
||||
of_node_put(clkmgr_np);
|
||||
BUG_ON(!clk_mgr_base_addr);
|
||||
pll_clk->hw.reg = clk_mgr_base_addr + reg;
|
||||
|
||||
|
||||
@@ -132,7 +132,7 @@ static SUNXI_CCU_NKM_WITH_GATE_LOCK(pll_mipi_clk, "pll-mipi",
|
||||
8, 4, /* N */
|
||||
4, 2, /* K */
|
||||
0, 4, /* M */
|
||||
BIT(31), /* gate */
|
||||
BIT(31) | BIT(23) | BIT(22), /* gate */
|
||||
BIT(28), /* lock */
|
||||
CLK_SET_RATE_UNGATE);
|
||||
|
||||
|
||||
@@ -563,7 +563,19 @@ static int __init exynos4_timer_resources(struct device_node *np, void __iomem *
|
||||
return 0;
|
||||
|
||||
out_irq:
|
||||
free_percpu_irq(mct_irqs[MCT_L0_IRQ], &percpu_mct_tick);
|
||||
if (mct_int_type == MCT_INT_PPI) {
|
||||
free_percpu_irq(mct_irqs[MCT_L0_IRQ], &percpu_mct_tick);
|
||||
} else {
|
||||
for_each_possible_cpu(cpu) {
|
||||
struct mct_clock_event_device *pcpu_mevt =
|
||||
per_cpu_ptr(&percpu_mct_tick, cpu);
|
||||
|
||||
if (pcpu_mevt->evt.irq != -1) {
|
||||
free_irq(pcpu_mevt->evt.irq, pcpu_mevt);
|
||||
pcpu_mevt->evt.irq = -1;
|
||||
}
|
||||
}
|
||||
}
|
||||
return err;
|
||||
}
|
||||
|
||||
|
||||
@@ -201,6 +201,11 @@ static int __init sun5i_setup_clocksource(struct device_node *node,
|
||||
}
|
||||
|
||||
rate = clk_get_rate(clk);
|
||||
if (!rate) {
|
||||
pr_err("Couldn't get parent clock rate\n");
|
||||
ret = -EINVAL;
|
||||
goto err_disable_clk;
|
||||
}
|
||||
|
||||
cs->timer.base = base;
|
||||
cs->timer.clk = clk;
|
||||
@@ -274,6 +279,11 @@ static int __init sun5i_setup_clockevent(struct device_node *node, void __iomem
|
||||
}
|
||||
|
||||
rate = clk_get_rate(clk);
|
||||
if (!rate) {
|
||||
pr_err("Couldn't get parent clock rate\n");
|
||||
ret = -EINVAL;
|
||||
goto err_disable_clk;
|
||||
}
|
||||
|
||||
ce->timer.base = base;
|
||||
ce->timer.ticks_per_jiffy = DIV_ROUND_UP(rate, HZ);
|
||||
|
||||
@@ -26,9 +26,9 @@ void ppc4xx_trng_probe(struct crypto4xx_core_device *core_dev);
|
||||
void ppc4xx_trng_remove(struct crypto4xx_core_device *core_dev);
|
||||
#else
|
||||
static inline void ppc4xx_trng_probe(
|
||||
struct crypto4xx_device *dev __maybe_unused) { }
|
||||
struct crypto4xx_core_device *dev __maybe_unused) { }
|
||||
static inline void ppc4xx_trng_remove(
|
||||
struct crypto4xx_device *dev __maybe_unused) { }
|
||||
struct crypto4xx_core_device *dev __maybe_unused) { }
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -361,7 +361,10 @@ static int __init caam_rng_init(void)
|
||||
goto free_rng_ctx;
|
||||
|
||||
dev_info(dev, "registering rng-caam\n");
|
||||
return hwrng_register(&caam_rng);
|
||||
|
||||
err = hwrng_register(&caam_rng);
|
||||
if (!err)
|
||||
return err;
|
||||
|
||||
free_rng_ctx:
|
||||
kfree(rng_ctx);
|
||||
|
||||
@@ -1,7 +1,8 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* AMD Cryptographic Coprocessor (CCP) AES crypto API support
|
||||
*
|
||||
* Copyright (C) 2013,2016 Advanced Micro Devices, Inc.
|
||||
* Copyright (C) 2013-2019 Advanced Micro Devices, Inc.
|
||||
*
|
||||
* Author: Tom Lendacky <thomas.lendacky@amd.com>
|
||||
*
|
||||
@@ -79,8 +80,7 @@ static int ccp_aes_crypt(struct ablkcipher_request *req, bool encrypt)
|
||||
return -EINVAL;
|
||||
|
||||
if (((ctx->u.aes.mode == CCP_AES_MODE_ECB) ||
|
||||
(ctx->u.aes.mode == CCP_AES_MODE_CBC) ||
|
||||
(ctx->u.aes.mode == CCP_AES_MODE_CFB)) &&
|
||||
(ctx->u.aes.mode == CCP_AES_MODE_CBC)) &&
|
||||
(req->nbytes & (AES_BLOCK_SIZE - 1)))
|
||||
return -EINVAL;
|
||||
|
||||
@@ -291,7 +291,7 @@ static struct ccp_aes_def aes_algs[] = {
|
||||
.version = CCP_VERSION(3, 0),
|
||||
.name = "cfb(aes)",
|
||||
.driver_name = "cfb-aes-ccp",
|
||||
.blocksize = AES_BLOCK_SIZE,
|
||||
.blocksize = 1,
|
||||
.ivsize = AES_BLOCK_SIZE,
|
||||
.alg_defaults = &ccp_aes_defaults,
|
||||
},
|
||||
|
||||
@@ -451,7 +451,7 @@ static struct dma_async_tx_descriptor *axi_dmac_prep_interleaved(
|
||||
|
||||
if (chan->hw_2d) {
|
||||
if (!axi_dmac_check_len(chan, xt->sgl[0].size) ||
|
||||
!axi_dmac_check_len(chan, xt->numf))
|
||||
xt->numf == 0)
|
||||
return NULL;
|
||||
if (xt->sgl[0].size + dst_icg > chan->max_length ||
|
||||
xt->sgl[0].size + src_icg > chan->max_length)
|
||||
|
||||
@@ -87,13 +87,20 @@ static void dw_dma_acpi_controller_register(struct dw_dma *dw)
|
||||
dma_cap_set(DMA_SLAVE, info->dma_cap);
|
||||
info->filter_fn = dw_dma_acpi_filter;
|
||||
|
||||
ret = devm_acpi_dma_controller_register(dev, acpi_dma_simple_xlate,
|
||||
info);
|
||||
ret = acpi_dma_controller_register(dev, acpi_dma_simple_xlate, info);
|
||||
if (ret)
|
||||
dev_err(dev, "could not register acpi_dma_controller\n");
|
||||
}
|
||||
|
||||
static void dw_dma_acpi_controller_free(struct dw_dma *dw)
|
||||
{
|
||||
struct device *dev = dw->dma.dev;
|
||||
|
||||
acpi_dma_controller_free(dev);
|
||||
}
|
||||
#else /* !CONFIG_ACPI */
|
||||
static inline void dw_dma_acpi_controller_register(struct dw_dma *dw) {}
|
||||
static inline void dw_dma_acpi_controller_free(struct dw_dma *dw) {}
|
||||
#endif /* !CONFIG_ACPI */
|
||||
|
||||
#ifdef CONFIG_OF
|
||||
@@ -226,6 +233,9 @@ static int dw_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct dw_dma_chip *chip = platform_get_drvdata(pdev);
|
||||
|
||||
if (ACPI_HANDLE(&pdev->dev))
|
||||
dw_dma_acpi_controller_free(chip->dw);
|
||||
|
||||
if (pdev->dev.of_node)
|
||||
of_dma_controller_free(pdev->dev.of_node);
|
||||
|
||||
|
||||
@@ -2340,8 +2340,10 @@ static int edma_probe(struct platform_device *pdev)
|
||||
|
||||
ecc->tc_list = devm_kcalloc(dev, ecc->num_tc,
|
||||
sizeof(*ecc->tc_list), GFP_KERNEL);
|
||||
if (!ecc->tc_list)
|
||||
return -ENOMEM;
|
||||
if (!ecc->tc_list) {
|
||||
ret = -ENOMEM;
|
||||
goto err_reg1;
|
||||
}
|
||||
|
||||
for (i = 0;; i++) {
|
||||
ret = of_parse_phandle_with_fixed_args(node, "ti,tptcs",
|
||||
|
||||
@@ -64,10 +64,10 @@ static void hsu_dma_chan_start(struct hsu_dma_chan *hsuc)
|
||||
|
||||
if (hsuc->direction == DMA_MEM_TO_DEV) {
|
||||
bsr = config->dst_maxburst;
|
||||
mtsr = config->src_addr_width;
|
||||
mtsr = config->dst_addr_width;
|
||||
} else if (hsuc->direction == DMA_DEV_TO_MEM) {
|
||||
bsr = config->src_maxburst;
|
||||
mtsr = config->dst_addr_width;
|
||||
mtsr = config->src_addr_width;
|
||||
}
|
||||
|
||||
hsu_chan_disable(hsuc);
|
||||
|
||||
@@ -1441,6 +1441,14 @@ static void sdma_add_scripts(struct sdma_engine *sdma,
|
||||
if (!sdma->script_number)
|
||||
sdma->script_number = SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V1;
|
||||
|
||||
if (sdma->script_number > sizeof(struct sdma_script_start_addrs)
|
||||
/ sizeof(s32)) {
|
||||
dev_err(sdma->dev,
|
||||
"SDMA script number %d not match with firmware.\n",
|
||||
sdma->script_number);
|
||||
return;
|
||||
}
|
||||
|
||||
for (i = 0; i < sdma->script_number; i++)
|
||||
if (addr_arr[i] > 0)
|
||||
saddr_arr[i] = addr_arr[i];
|
||||
|
||||
@@ -1044,6 +1044,7 @@ mv_xor_channel_add(struct mv_xor_device *xordev,
|
||||
mv_chan->op_in_desc = XOR_MODE_IN_DESC;
|
||||
|
||||
dma_dev = &mv_chan->dmadev;
|
||||
dma_dev->dev = &pdev->dev;
|
||||
mv_chan->xordev = xordev;
|
||||
|
||||
/*
|
||||
@@ -1076,7 +1077,6 @@ mv_xor_channel_add(struct mv_xor_device *xordev,
|
||||
dma_dev->device_free_chan_resources = mv_xor_free_chan_resources;
|
||||
dma_dev->device_tx_status = mv_xor_status;
|
||||
dma_dev->device_issue_pending = mv_xor_issue_pending;
|
||||
dma_dev->dev = &pdev->dev;
|
||||
|
||||
/* set prep routines based on capability */
|
||||
if (dma_has_cap(DMA_INTERRUPT, dma_dev->cap_mask))
|
||||
|
||||
@@ -98,6 +98,7 @@ struct tegra_adma_chan_regs {
|
||||
unsigned int src_addr;
|
||||
unsigned int trg_addr;
|
||||
unsigned int fifo_ctrl;
|
||||
unsigned int cmd;
|
||||
unsigned int tc;
|
||||
};
|
||||
|
||||
@@ -127,6 +128,7 @@ struct tegra_adma_chan {
|
||||
enum dma_transfer_direction sreq_dir;
|
||||
unsigned int sreq_index;
|
||||
bool sreq_reserved;
|
||||
struct tegra_adma_chan_regs ch_regs;
|
||||
|
||||
/* Transfer count and position info */
|
||||
unsigned int tx_buf_count;
|
||||
@@ -635,8 +637,30 @@ static struct dma_chan *tegra_dma_of_xlate(struct of_phandle_args *dma_spec,
|
||||
static int tegra_adma_runtime_suspend(struct device *dev)
|
||||
{
|
||||
struct tegra_adma *tdma = dev_get_drvdata(dev);
|
||||
struct tegra_adma_chan_regs *ch_reg;
|
||||
struct tegra_adma_chan *tdc;
|
||||
int i;
|
||||
|
||||
tdma->global_cmd = tdma_read(tdma, ADMA_GLOBAL_CMD);
|
||||
if (!tdma->global_cmd)
|
||||
goto clk_disable;
|
||||
|
||||
for (i = 0; i < tdma->nr_channels; i++) {
|
||||
tdc = &tdma->channels[i];
|
||||
ch_reg = &tdc->ch_regs;
|
||||
ch_reg->cmd = tdma_ch_read(tdc, ADMA_CH_CMD);
|
||||
/* skip if channel is not active */
|
||||
if (!ch_reg->cmd)
|
||||
continue;
|
||||
ch_reg->tc = tdma_ch_read(tdc, ADMA_CH_TC);
|
||||
ch_reg->src_addr = tdma_ch_read(tdc, ADMA_CH_LOWER_SRC_ADDR);
|
||||
ch_reg->trg_addr = tdma_ch_read(tdc, ADMA_CH_LOWER_TRG_ADDR);
|
||||
ch_reg->ctrl = tdma_ch_read(tdc, ADMA_CH_CTRL);
|
||||
ch_reg->fifo_ctrl = tdma_ch_read(tdc, ADMA_CH_FIFO_CTRL);
|
||||
ch_reg->config = tdma_ch_read(tdc, ADMA_CH_CONFIG);
|
||||
}
|
||||
|
||||
clk_disable:
|
||||
clk_disable_unprepare(tdma->ahub_clk);
|
||||
|
||||
return 0;
|
||||
@@ -645,7 +669,9 @@ static int tegra_adma_runtime_suspend(struct device *dev)
|
||||
static int tegra_adma_runtime_resume(struct device *dev)
|
||||
{
|
||||
struct tegra_adma *tdma = dev_get_drvdata(dev);
|
||||
int ret;
|
||||
struct tegra_adma_chan_regs *ch_reg;
|
||||
struct tegra_adma_chan *tdc;
|
||||
int ret, i;
|
||||
|
||||
ret = clk_prepare_enable(tdma->ahub_clk);
|
||||
if (ret) {
|
||||
@@ -654,6 +680,24 @@ static int tegra_adma_runtime_resume(struct device *dev)
|
||||
}
|
||||
tdma_write(tdma, ADMA_GLOBAL_CMD, tdma->global_cmd);
|
||||
|
||||
if (!tdma->global_cmd)
|
||||
return 0;
|
||||
|
||||
for (i = 0; i < tdma->nr_channels; i++) {
|
||||
tdc = &tdma->channels[i];
|
||||
ch_reg = &tdc->ch_regs;
|
||||
/* skip if channel was not active earlier */
|
||||
if (!ch_reg->cmd)
|
||||
continue;
|
||||
tdma_ch_write(tdc, ADMA_CH_TC, ch_reg->tc);
|
||||
tdma_ch_write(tdc, ADMA_CH_LOWER_SRC_ADDR, ch_reg->src_addr);
|
||||
tdma_ch_write(tdc, ADMA_CH_LOWER_TRG_ADDR, ch_reg->trg_addr);
|
||||
tdma_ch_write(tdc, ADMA_CH_CTRL, ch_reg->ctrl);
|
||||
tdma_ch_write(tdc, ADMA_CH_FIFO_CTRL, ch_reg->fifo_ctrl);
|
||||
tdma_ch_write(tdc, ADMA_CH_CONFIG, ch_reg->config);
|
||||
tdma_ch_write(tdc, ADMA_CH_CMD, ch_reg->cmd);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -700,16 +744,6 @@ static int tegra_adma_probe(struct platform_device *pdev)
|
||||
return PTR_ERR(tdma->ahub_clk);
|
||||
}
|
||||
|
||||
pm_runtime_enable(&pdev->dev);
|
||||
|
||||
ret = pm_runtime_get_sync(&pdev->dev);
|
||||
if (ret < 0)
|
||||
goto rpm_disable;
|
||||
|
||||
ret = tegra_adma_init(tdma);
|
||||
if (ret)
|
||||
goto rpm_put;
|
||||
|
||||
INIT_LIST_HEAD(&tdma->dma_dev.channels);
|
||||
for (i = 0; i < tdma->nr_channels; i++) {
|
||||
struct tegra_adma_chan *tdc = &tdma->channels[i];
|
||||
@@ -727,6 +761,16 @@ static int tegra_adma_probe(struct platform_device *pdev)
|
||||
tdc->tdma = tdma;
|
||||
}
|
||||
|
||||
pm_runtime_enable(&pdev->dev);
|
||||
|
||||
ret = pm_runtime_get_sync(&pdev->dev);
|
||||
if (ret < 0)
|
||||
goto rpm_disable;
|
||||
|
||||
ret = tegra_adma_init(tdma);
|
||||
if (ret)
|
||||
goto rpm_put;
|
||||
|
||||
dma_cap_set(DMA_SLAVE, tdma->dma_dev.cap_mask);
|
||||
dma_cap_set(DMA_PRIVATE, tdma->dma_dev.cap_mask);
|
||||
dma_cap_set(DMA_CYCLIC, tdma->dma_dev.cap_mask);
|
||||
@@ -768,13 +812,13 @@ static int tegra_adma_probe(struct platform_device *pdev)
|
||||
|
||||
dma_remove:
|
||||
dma_async_device_unregister(&tdma->dma_dev);
|
||||
irq_dispose:
|
||||
while (--i >= 0)
|
||||
irq_dispose_mapping(tdma->channels[i].irq);
|
||||
rpm_put:
|
||||
pm_runtime_put_sync(&pdev->dev);
|
||||
rpm_disable:
|
||||
pm_runtime_disable(&pdev->dev);
|
||||
irq_dispose:
|
||||
while (--i >= 0)
|
||||
irq_dispose_mapping(tdma->channels[i].irq);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -980,9 +980,20 @@ static struct drm_dp_mst_port *drm_dp_mst_get_port_ref_locked(struct drm_dp_mst_
|
||||
static struct drm_dp_mst_port *drm_dp_get_validated_port_ref(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)
|
||||
{
|
||||
struct drm_dp_mst_port *rport = NULL;
|
||||
|
||||
mutex_lock(&mgr->lock);
|
||||
if (mgr->mst_primary)
|
||||
rport = drm_dp_mst_get_port_ref_locked(mgr->mst_primary, port);
|
||||
/*
|
||||
* Port may or may not be 'valid' but we don't care about that when
|
||||
* destroying the port and we are guaranteed that the port pointer
|
||||
* will be valid until we've finished
|
||||
*/
|
||||
if (current_work() == &mgr->destroy_connector_work) {
|
||||
kref_get(&port->kref);
|
||||
rport = port;
|
||||
} else if (mgr->mst_primary) {
|
||||
rport = drm_dp_mst_get_port_ref_locked(mgr->mst_primary,
|
||||
port);
|
||||
}
|
||||
mutex_unlock(&mgr->lock);
|
||||
return rport;
|
||||
}
|
||||
|
||||
@@ -206,7 +206,7 @@ void etnaviv_core_dump(struct etnaviv_gpu *gpu)
|
||||
mutex_lock(&obj->lock);
|
||||
pages = etnaviv_gem_get_pages(obj);
|
||||
mutex_unlock(&obj->lock);
|
||||
if (pages) {
|
||||
if (!IS_ERR(pages)) {
|
||||
int j;
|
||||
|
||||
iter.hdr->data[0] = bomap - bomap_start;
|
||||
|
||||
@@ -383,19 +383,17 @@ static const unsigned int a3xx_registers[] = {
|
||||
0x2200, 0x2212, 0x2214, 0x2217, 0x221a, 0x221a, 0x2240, 0x227e,
|
||||
0x2280, 0x228b, 0x22c0, 0x22c0, 0x22c4, 0x22ce, 0x22d0, 0x22d8,
|
||||
0x22df, 0x22e6, 0x22e8, 0x22e9, 0x22ec, 0x22ec, 0x22f0, 0x22f7,
|
||||
0x22ff, 0x22ff, 0x2340, 0x2343, 0x2348, 0x2349, 0x2350, 0x2356,
|
||||
0x2360, 0x2360, 0x2440, 0x2440, 0x2444, 0x2444, 0x2448, 0x244d,
|
||||
0x2468, 0x2469, 0x246c, 0x246d, 0x2470, 0x2470, 0x2472, 0x2472,
|
||||
0x2474, 0x2475, 0x2479, 0x247a, 0x24c0, 0x24d3, 0x24e4, 0x24ef,
|
||||
0x2500, 0x2509, 0x250c, 0x250c, 0x250e, 0x250e, 0x2510, 0x2511,
|
||||
0x2514, 0x2515, 0x25e4, 0x25e4, 0x25ea, 0x25ea, 0x25ec, 0x25ed,
|
||||
0x25f0, 0x25f0, 0x2600, 0x2612, 0x2614, 0x2617, 0x261a, 0x261a,
|
||||
0x2640, 0x267e, 0x2680, 0x268b, 0x26c0, 0x26c0, 0x26c4, 0x26ce,
|
||||
0x26d0, 0x26d8, 0x26df, 0x26e6, 0x26e8, 0x26e9, 0x26ec, 0x26ec,
|
||||
0x26f0, 0x26f7, 0x26ff, 0x26ff, 0x2740, 0x2743, 0x2748, 0x2749,
|
||||
0x2750, 0x2756, 0x2760, 0x2760, 0x300c, 0x300e, 0x301c, 0x301d,
|
||||
0x302a, 0x302a, 0x302c, 0x302d, 0x3030, 0x3031, 0x3034, 0x3036,
|
||||
0x303c, 0x303c, 0x305e, 0x305f,
|
||||
0x22ff, 0x22ff, 0x2340, 0x2343, 0x2440, 0x2440, 0x2444, 0x2444,
|
||||
0x2448, 0x244d, 0x2468, 0x2469, 0x246c, 0x246d, 0x2470, 0x2470,
|
||||
0x2472, 0x2472, 0x2474, 0x2475, 0x2479, 0x247a, 0x24c0, 0x24d3,
|
||||
0x24e4, 0x24ef, 0x2500, 0x2509, 0x250c, 0x250c, 0x250e, 0x250e,
|
||||
0x2510, 0x2511, 0x2514, 0x2515, 0x25e4, 0x25e4, 0x25ea, 0x25ea,
|
||||
0x25ec, 0x25ed, 0x25f0, 0x25f0, 0x2600, 0x2612, 0x2614, 0x2617,
|
||||
0x261a, 0x261a, 0x2640, 0x267e, 0x2680, 0x268b, 0x26c0, 0x26c0,
|
||||
0x26c4, 0x26ce, 0x26d0, 0x26d8, 0x26df, 0x26e6, 0x26e8, 0x26e9,
|
||||
0x26ec, 0x26ec, 0x26f0, 0x26f7, 0x26ff, 0x26ff, 0x2740, 0x2743,
|
||||
0x300c, 0x300e, 0x301c, 0x301d, 0x302a, 0x302a, 0x302c, 0x302d,
|
||||
0x3030, 0x3031, 0x3034, 0x3036, 0x303c, 0x303c, 0x305e, 0x305f,
|
||||
~0 /* sentinel */
|
||||
};
|
||||
|
||||
|
||||
@@ -33,6 +33,8 @@
|
||||
#include "sfpb.xml.h"
|
||||
#include "dsi_cfg.h"
|
||||
|
||||
#define DSI_RESET_TOGGLE_DELAY_MS 20
|
||||
|
||||
static int dsi_get_version(const void __iomem *base, u32 *major, u32 *minor)
|
||||
{
|
||||
u32 ver;
|
||||
@@ -909,7 +911,7 @@ static void dsi_sw_reset(struct msm_dsi_host *msm_host)
|
||||
wmb(); /* clocks need to be enabled before reset */
|
||||
|
||||
dsi_write(msm_host, REG_DSI_RESET, 1);
|
||||
wmb(); /* make sure reset happen */
|
||||
msleep(DSI_RESET_TOGGLE_DELAY_MS); /* make sure reset happen */
|
||||
dsi_write(msm_host, REG_DSI_RESET, 0);
|
||||
}
|
||||
|
||||
@@ -1288,7 +1290,7 @@ static void dsi_sw_reset_restore(struct msm_dsi_host *msm_host)
|
||||
|
||||
/* dsi controller can only be reset while clocks are running */
|
||||
dsi_write(msm_host, REG_DSI_RESET, 1);
|
||||
wmb(); /* make sure reset happen */
|
||||
msleep(DSI_RESET_TOGGLE_DELAY_MS); /* make sure reset happen */
|
||||
dsi_write(msm_host, REG_DSI_RESET, 0);
|
||||
wmb(); /* controller out of reset */
|
||||
dsi_write(msm_host, REG_DSI_CTRL, data0);
|
||||
|
||||
@@ -542,7 +542,7 @@ fail:
|
||||
if (cfg_handler)
|
||||
mdp5_cfg_destroy(cfg_handler);
|
||||
|
||||
return NULL;
|
||||
return ERR_PTR(ret);
|
||||
}
|
||||
|
||||
static struct mdp5_cfg_platform *mdp5_get_config(struct platform_device *dev)
|
||||
|
||||
@@ -87,7 +87,7 @@ nvkm_gddr3_calc(struct nvkm_ram *ram)
|
||||
WR = (ram->next->bios.timing[2] & 0x007f0000) >> 16;
|
||||
/* XXX: Get these values from the VBIOS instead */
|
||||
DLL = !(ram->mr[1] & 0x1);
|
||||
RON = !(ram->mr[1] & 0x300) >> 8;
|
||||
RON = !((ram->mr[1] & 0x300) >> 8);
|
||||
break;
|
||||
default:
|
||||
return -ENOSYS;
|
||||
|
||||
@@ -87,10 +87,10 @@ nvkm_memx_fini(struct nvkm_memx **pmemx, bool exec)
|
||||
if (exec) {
|
||||
nvkm_pmu_send(pmu, reply, PROC_MEMX, MEMX_MSG_EXEC,
|
||||
memx->base, finish);
|
||||
nvkm_debug(subdev, "Exec took %uns, PMU_IN %08x\n",
|
||||
reply[0], reply[1]);
|
||||
}
|
||||
|
||||
nvkm_debug(subdev, "Exec took %uns, PMU_IN %08x\n",
|
||||
reply[0], reply[1]);
|
||||
kfree(memx);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -7026,8 +7026,8 @@ static int cik_irq_init(struct radeon_device *rdev)
|
||||
}
|
||||
|
||||
/* setup interrupt control */
|
||||
/* XXX this should actually be a bus address, not an MC address. same on older asics */
|
||||
WREG32(INTERRUPT_CNTL2, rdev->ih.gpu_addr >> 8);
|
||||
/* set dummy read address to dummy page address */
|
||||
WREG32(INTERRUPT_CNTL2, rdev->dummy_page.addr >> 8);
|
||||
interrupt_cntl = RREG32(INTERRUPT_CNTL);
|
||||
/* IH_DUMMY_RD_OVERRIDE=0 - dummy read disabled with msi, enabled without msi
|
||||
* IH_DUMMY_RD_OVERRIDE=1 - dummy read controlled by IH_DUMMY_RD_EN
|
||||
|
||||
@@ -3697,8 +3697,8 @@ int r600_irq_init(struct radeon_device *rdev)
|
||||
}
|
||||
|
||||
/* setup interrupt control */
|
||||
/* set dummy read address to ring address */
|
||||
WREG32(INTERRUPT_CNTL2, rdev->ih.gpu_addr >> 8);
|
||||
/* set dummy read address to dummy page address */
|
||||
WREG32(INTERRUPT_CNTL2, rdev->dummy_page.addr >> 8);
|
||||
interrupt_cntl = RREG32(INTERRUPT_CNTL);
|
||||
/* IH_DUMMY_RD_OVERRIDE=0 - dummy read disabled with msi, enabled without msi
|
||||
* IH_DUMMY_RD_OVERRIDE=1 - dummy read controlled by IH_DUMMY_RD_EN
|
||||
|
||||
@@ -6018,8 +6018,8 @@ static int si_irq_init(struct radeon_device *rdev)
|
||||
}
|
||||
|
||||
/* setup interrupt control */
|
||||
/* set dummy read address to ring address */
|
||||
WREG32(INTERRUPT_CNTL2, rdev->ih.gpu_addr >> 8);
|
||||
/* set dummy read address to dummy page address */
|
||||
WREG32(INTERRUPT_CNTL2, rdev->dummy_page.addr >> 8);
|
||||
interrupt_cntl = RREG32(INTERRUPT_CNTL);
|
||||
/* IH_DUMMY_RD_OVERRIDE=0 - dummy read disabled with msi, enabled without msi
|
||||
* IH_DUMMY_RD_OVERRIDE=1 - dummy read controlled by IH_DUMMY_RD_EN
|
||||
|
||||
@@ -740,7 +740,6 @@ static int sti_hda_bind(struct device *dev, struct device *master, void *data)
|
||||
return 0;
|
||||
|
||||
err_sysfs:
|
||||
drm_bridge_remove(bridge);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
||||
@@ -1352,7 +1352,6 @@ static int sti_hdmi_bind(struct device *dev, struct device *master, void *data)
|
||||
return 0;
|
||||
|
||||
err_sysfs:
|
||||
drm_bridge_remove(bridge);
|
||||
hdmi->drm_connector = NULL;
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
@@ -681,11 +681,11 @@ int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev,
|
||||
{
|
||||
struct virtio_gpu_get_capset *cmd_p;
|
||||
struct virtio_gpu_vbuffer *vbuf;
|
||||
int max_size = vgdev->capsets[idx].max_size;
|
||||
int max_size;
|
||||
struct virtio_gpu_drv_cap_cache *cache_ent;
|
||||
void *resp_buf;
|
||||
|
||||
if (idx > vgdev->num_capsets)
|
||||
if (idx >= vgdev->num_capsets)
|
||||
return -EINVAL;
|
||||
|
||||
if (version > vgdev->capsets[idx].max_version)
|
||||
@@ -695,6 +695,7 @@ int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev,
|
||||
if (!cache_ent)
|
||||
return -ENOMEM;
|
||||
|
||||
max_size = vgdev->capsets[idx].max_size;
|
||||
cache_ent->caps_cache = kmalloc(max_size, GFP_KERNEL);
|
||||
if (!cache_ent->caps_cache) {
|
||||
kfree(cache_ent);
|
||||
|
||||
@@ -268,9 +268,10 @@ static inline u16 volt2reg(int channel, long volt, u8 bypass_attn)
|
||||
long reg;
|
||||
|
||||
if (bypass_attn & (1 << channel))
|
||||
reg = (volt * 1024) / 2250;
|
||||
reg = DIV_ROUND_CLOSEST(volt * 1024, 2250);
|
||||
else
|
||||
reg = (volt * r[1] * 1024) / ((r[0] + r[1]) * 2250);
|
||||
reg = DIV_ROUND_CLOSEST(volt * r[1] * 1024,
|
||||
(r[0] + r[1]) * 2250);
|
||||
return clamp_val(reg, 0, 1023) & (0xff << 2);
|
||||
}
|
||||
|
||||
|
||||
@@ -38,16 +38,20 @@ struct hwmon_device {
|
||||
|
||||
#define to_hwmon_device(d) container_of(d, struct hwmon_device, dev)
|
||||
|
||||
#define MAX_SYSFS_ATTR_NAME_LENGTH 32
|
||||
|
||||
struct hwmon_device_attribute {
|
||||
struct device_attribute dev_attr;
|
||||
const struct hwmon_ops *ops;
|
||||
enum hwmon_sensor_types type;
|
||||
u32 attr;
|
||||
int index;
|
||||
char name[MAX_SYSFS_ATTR_NAME_LENGTH];
|
||||
};
|
||||
|
||||
#define to_hwmon_attr(d) \
|
||||
container_of(d, struct hwmon_device_attribute, dev_attr)
|
||||
#define to_dev_attr(a) container_of(a, struct device_attribute, attr)
|
||||
|
||||
/*
|
||||
* Thermal zone information
|
||||
@@ -55,7 +59,7 @@ struct hwmon_device_attribute {
|
||||
* also provides the sensor index.
|
||||
*/
|
||||
struct hwmon_thermal_data {
|
||||
struct hwmon_device *hwdev; /* Reference to hwmon device */
|
||||
struct device *dev; /* Reference to hwmon device */
|
||||
int index; /* sensor index */
|
||||
};
|
||||
|
||||
@@ -92,9 +96,27 @@ static const struct attribute_group *hwmon_dev_attr_groups[] = {
|
||||
NULL
|
||||
};
|
||||
|
||||
static void hwmon_free_attrs(struct attribute **attrs)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; attrs[i]; i++) {
|
||||
struct device_attribute *dattr = to_dev_attr(attrs[i]);
|
||||
struct hwmon_device_attribute *hattr = to_hwmon_attr(dattr);
|
||||
|
||||
kfree(hattr);
|
||||
}
|
||||
kfree(attrs);
|
||||
}
|
||||
|
||||
static void hwmon_dev_release(struct device *dev)
|
||||
{
|
||||
kfree(to_hwmon_device(dev));
|
||||
struct hwmon_device *hwdev = to_hwmon_device(dev);
|
||||
|
||||
if (hwdev->group.attrs)
|
||||
hwmon_free_attrs(hwdev->group.attrs);
|
||||
kfree(hwdev->groups);
|
||||
kfree(hwdev);
|
||||
}
|
||||
|
||||
static struct class hwmon_class = {
|
||||
@@ -118,11 +140,11 @@ static DEFINE_IDA(hwmon_ida);
|
||||
static int hwmon_thermal_get_temp(void *data, int *temp)
|
||||
{
|
||||
struct hwmon_thermal_data *tdata = data;
|
||||
struct hwmon_device *hwdev = tdata->hwdev;
|
||||
struct hwmon_device *hwdev = to_hwmon_device(tdata->dev);
|
||||
int ret;
|
||||
long t;
|
||||
|
||||
ret = hwdev->chip->ops->read(&hwdev->dev, hwmon_temp, hwmon_temp_input,
|
||||
ret = hwdev->chip->ops->read(tdata->dev, hwmon_temp, hwmon_temp_input,
|
||||
tdata->index, &t);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
@@ -136,26 +158,31 @@ static struct thermal_zone_of_device_ops hwmon_thermal_ops = {
|
||||
.get_temp = hwmon_thermal_get_temp,
|
||||
};
|
||||
|
||||
static int hwmon_thermal_add_sensor(struct device *dev,
|
||||
struct hwmon_device *hwdev, int index)
|
||||
static int hwmon_thermal_add_sensor(struct device *dev, int index)
|
||||
{
|
||||
struct hwmon_thermal_data *tdata;
|
||||
struct thermal_zone_device *tzd;
|
||||
|
||||
tdata = devm_kzalloc(dev, sizeof(*tdata), GFP_KERNEL);
|
||||
if (!tdata)
|
||||
return -ENOMEM;
|
||||
|
||||
tdata->hwdev = hwdev;
|
||||
tdata->dev = dev;
|
||||
tdata->index = index;
|
||||
|
||||
devm_thermal_zone_of_sensor_register(&hwdev->dev, index, tdata,
|
||||
&hwmon_thermal_ops);
|
||||
tzd = devm_thermal_zone_of_sensor_register(dev, index, tdata,
|
||||
&hwmon_thermal_ops);
|
||||
/*
|
||||
* If CONFIG_THERMAL_OF is disabled, this returns -ENODEV,
|
||||
* so ignore that error but forward any other error.
|
||||
*/
|
||||
if (IS_ERR(tzd) && (PTR_ERR(tzd) != -ENODEV))
|
||||
return PTR_ERR(tzd);
|
||||
|
||||
return 0;
|
||||
}
|
||||
#else
|
||||
static int hwmon_thermal_add_sensor(struct device *dev,
|
||||
struct hwmon_device *hwdev, int index)
|
||||
static int hwmon_thermal_add_sensor(struct device *dev, int index)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
@@ -205,8 +232,7 @@ static int hwmon_attr_base(enum hwmon_sensor_types type)
|
||||
return 1;
|
||||
}
|
||||
|
||||
static struct attribute *hwmon_genattr(struct device *dev,
|
||||
const void *drvdata,
|
||||
static struct attribute *hwmon_genattr(const void *drvdata,
|
||||
enum hwmon_sensor_types type,
|
||||
u32 attr,
|
||||
int index,
|
||||
@@ -232,20 +258,18 @@ static struct attribute *hwmon_genattr(struct device *dev,
|
||||
if ((mode & S_IWUGO) && !ops->write)
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
hattr = kzalloc(sizeof(*hattr), GFP_KERNEL);
|
||||
if (!hattr)
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
if (type == hwmon_chip) {
|
||||
name = (char *)template;
|
||||
} else {
|
||||
name = devm_kzalloc(dev, strlen(template) + 16, GFP_KERNEL);
|
||||
if (!name)
|
||||
return ERR_PTR(-ENOMEM);
|
||||
scnprintf(name, strlen(template) + 16, template,
|
||||
scnprintf(hattr->name, sizeof(hattr->name), template,
|
||||
index + hwmon_attr_base(type));
|
||||
name = hattr->name;
|
||||
}
|
||||
|
||||
hattr = devm_kzalloc(dev, sizeof(*hattr), GFP_KERNEL);
|
||||
if (!hattr)
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
hattr->type = type;
|
||||
hattr->attr = attr;
|
||||
hattr->index = index;
|
||||
@@ -433,8 +457,7 @@ static int hwmon_num_channel_attrs(const struct hwmon_channel_info *info)
|
||||
return n;
|
||||
}
|
||||
|
||||
static int hwmon_genattrs(struct device *dev,
|
||||
const void *drvdata,
|
||||
static int hwmon_genattrs(const void *drvdata,
|
||||
struct attribute **attrs,
|
||||
const struct hwmon_ops *ops,
|
||||
const struct hwmon_channel_info *info)
|
||||
@@ -460,7 +483,7 @@ static int hwmon_genattrs(struct device *dev,
|
||||
attr_mask &= ~BIT(attr);
|
||||
if (attr >= template_size)
|
||||
return -EINVAL;
|
||||
a = hwmon_genattr(dev, drvdata, info->type, attr, i,
|
||||
a = hwmon_genattr(drvdata, info->type, attr, i,
|
||||
templates[attr], ops);
|
||||
if (IS_ERR(a)) {
|
||||
if (PTR_ERR(a) != -ENOENT)
|
||||
@@ -474,8 +497,7 @@ static int hwmon_genattrs(struct device *dev,
|
||||
}
|
||||
|
||||
static struct attribute **
|
||||
__hwmon_create_attrs(struct device *dev, const void *drvdata,
|
||||
const struct hwmon_chip_info *chip)
|
||||
__hwmon_create_attrs(const void *drvdata, const struct hwmon_chip_info *chip)
|
||||
{
|
||||
int ret, i, aindex = 0, nattrs = 0;
|
||||
struct attribute **attrs;
|
||||
@@ -486,15 +508,17 @@ __hwmon_create_attrs(struct device *dev, const void *drvdata,
|
||||
if (nattrs == 0)
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
attrs = devm_kcalloc(dev, nattrs + 1, sizeof(*attrs), GFP_KERNEL);
|
||||
attrs = kcalloc(nattrs + 1, sizeof(*attrs), GFP_KERNEL);
|
||||
if (!attrs)
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
for (i = 0; chip->info[i]; i++) {
|
||||
ret = hwmon_genattrs(dev, drvdata, &attrs[aindex], chip->ops,
|
||||
ret = hwmon_genattrs(drvdata, &attrs[aindex], chip->ops,
|
||||
chip->info[i]);
|
||||
if (ret < 0)
|
||||
if (ret < 0) {
|
||||
hwmon_free_attrs(attrs);
|
||||
return ERR_PTR(ret);
|
||||
}
|
||||
aindex += ret;
|
||||
}
|
||||
|
||||
@@ -534,14 +558,13 @@ __hwmon_device_register(struct device *dev, const char *name, void *drvdata,
|
||||
for (i = 0; groups[i]; i++)
|
||||
ngroups++;
|
||||
|
||||
hwdev->groups = devm_kcalloc(dev, ngroups, sizeof(*groups),
|
||||
GFP_KERNEL);
|
||||
hwdev->groups = kcalloc(ngroups, sizeof(*groups), GFP_KERNEL);
|
||||
if (!hwdev->groups) {
|
||||
err = -ENOMEM;
|
||||
goto free_hwmon;
|
||||
}
|
||||
|
||||
attrs = __hwmon_create_attrs(dev, drvdata, chip);
|
||||
attrs = __hwmon_create_attrs(drvdata, chip);
|
||||
if (IS_ERR(attrs)) {
|
||||
err = PTR_ERR(attrs);
|
||||
goto free_hwmon;
|
||||
@@ -585,8 +608,13 @@ __hwmon_device_register(struct device *dev, const char *name, void *drvdata,
|
||||
if (!chip->ops->is_visible(drvdata, hwmon_temp,
|
||||
hwmon_temp_input, j))
|
||||
continue;
|
||||
if (info[i]->config[j] & HWMON_T_INPUT)
|
||||
hwmon_thermal_add_sensor(dev, hwdev, j);
|
||||
if (info[i]->config[j] & HWMON_T_INPUT) {
|
||||
err = hwmon_thermal_add_sensor(hdev, j);
|
||||
if (err) {
|
||||
device_unregister(hdev);
|
||||
goto ida_remove;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -594,7 +622,7 @@ __hwmon_device_register(struct device *dev, const char *name, void *drvdata,
|
||||
return hdev;
|
||||
|
||||
free_hwmon:
|
||||
kfree(hwdev);
|
||||
hwmon_dev_release(hdev);
|
||||
ida_remove:
|
||||
ida_simple_remove(&hwmon_ida, id);
|
||||
return ERR_PTR(err);
|
||||
|
||||
@@ -164,7 +164,7 @@ static int lm75_write(struct device *dev, enum hwmon_sensor_types type,
|
||||
temp = DIV_ROUND_CLOSEST(temp << (resolution - 8),
|
||||
1000) << (16 - resolution);
|
||||
|
||||
return regmap_write(data->regmap, reg, temp);
|
||||
return regmap_write(data->regmap, reg, (u16)temp);
|
||||
}
|
||||
|
||||
static umode_t lm75_is_visible(const void *data, enum hwmon_sensor_types type,
|
||||
|
||||
@@ -32,8 +32,8 @@
|
||||
static const u8 REG_VOLTAGE[5] = { 0x09, 0x0a, 0x0c, 0x0d, 0x0e };
|
||||
|
||||
static const u8 REG_VOLTAGE_LIMIT_LSB[2][5] = {
|
||||
{ 0x40, 0x00, 0x42, 0x44, 0x46 },
|
||||
{ 0x3f, 0x00, 0x41, 0x43, 0x45 },
|
||||
{ 0x46, 0x00, 0x40, 0x42, 0x44 },
|
||||
{ 0x45, 0x00, 0x3f, 0x41, 0x43 },
|
||||
};
|
||||
|
||||
static const u8 REG_VOLTAGE_LIMIT_MSB[5] = { 0x48, 0x00, 0x47, 0x47, 0x48 };
|
||||
|
||||
@@ -38,7 +38,7 @@ static const unsigned char shtc1_cmd_read_id_reg[] = { 0xef, 0xc8 };
|
||||
|
||||
/* constants for reading the ID register */
|
||||
#define SHTC1_ID 0x07
|
||||
#define SHTC1_ID_REG_MASK 0x1f
|
||||
#define SHTC1_ID_REG_MASK 0x3f
|
||||
|
||||
/* delays for non-blocking i2c commands, both in us */
|
||||
#define SHTC1_NONBLOCKING_WAIT_TIME_HPM 14400
|
||||
|
||||
@@ -130,17 +130,23 @@ superio_select(struct w83627hf_sio_data *sio, int ld)
|
||||
outb(ld, sio->sioaddr + 1);
|
||||
}
|
||||
|
||||
static inline void
|
||||
static inline int
|
||||
superio_enter(struct w83627hf_sio_data *sio)
|
||||
{
|
||||
if (!request_muxed_region(sio->sioaddr, 2, DRVNAME))
|
||||
return -EBUSY;
|
||||
|
||||
outb(0x87, sio->sioaddr);
|
||||
outb(0x87, sio->sioaddr);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void
|
||||
superio_exit(struct w83627hf_sio_data *sio)
|
||||
{
|
||||
outb(0xAA, sio->sioaddr);
|
||||
release_region(sio->sioaddr, 2);
|
||||
}
|
||||
|
||||
#define W627_DEVID 0x52
|
||||
@@ -1275,7 +1281,7 @@ static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
|
||||
static int __init w83627hf_find(int sioaddr, unsigned short *addr,
|
||||
struct w83627hf_sio_data *sio_data)
|
||||
{
|
||||
int err = -ENODEV;
|
||||
int err;
|
||||
u16 val;
|
||||
|
||||
static __initconst char *const names[] = {
|
||||
@@ -1287,7 +1293,11 @@ static int __init w83627hf_find(int sioaddr, unsigned short *addr,
|
||||
};
|
||||
|
||||
sio_data->sioaddr = sioaddr;
|
||||
superio_enter(sio_data);
|
||||
err = superio_enter(sio_data);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
err = -ENODEV;
|
||||
val = force_id ? force_id : superio_inb(sio_data, DEVID);
|
||||
switch (val) {
|
||||
case W627_DEVID:
|
||||
@@ -1641,9 +1651,21 @@ static int w83627thf_read_gpio5(struct platform_device *pdev)
|
||||
struct w83627hf_sio_data *sio_data = dev_get_platdata(&pdev->dev);
|
||||
int res = 0xff, sel;
|
||||
|
||||
superio_enter(sio_data);
|
||||
if (superio_enter(sio_data)) {
|
||||
/*
|
||||
* Some other driver reserved the address space for itself.
|
||||
* We don't want to fail driver instantiation because of that,
|
||||
* so display a warning and keep going.
|
||||
*/
|
||||
dev_warn(&pdev->dev,
|
||||
"Can not read VID data: Failed to enable SuperIO access\n");
|
||||
return res;
|
||||
}
|
||||
|
||||
superio_select(sio_data, W83627HF_LD_GPIO5);
|
||||
|
||||
res = 0xff;
|
||||
|
||||
/* Make sure these GPIO pins are enabled */
|
||||
if (!(superio_inb(sio_data, W83627THF_GPIO5_EN) & (1<<3))) {
|
||||
dev_dbg(&pdev->dev, "GPIO5 disabled, no VID function\n");
|
||||
@@ -1674,7 +1696,17 @@ static int w83687thf_read_vid(struct platform_device *pdev)
|
||||
struct w83627hf_sio_data *sio_data = dev_get_platdata(&pdev->dev);
|
||||
int res = 0xff;
|
||||
|
||||
superio_enter(sio_data);
|
||||
if (superio_enter(sio_data)) {
|
||||
/*
|
||||
* Some other driver reserved the address space for itself.
|
||||
* We don't want to fail driver instantiation because of that,
|
||||
* so display a warning and keep going.
|
||||
*/
|
||||
dev_warn(&pdev->dev,
|
||||
"Can not read VID data: Failed to enable SuperIO access\n");
|
||||
return res;
|
||||
}
|
||||
|
||||
superio_select(sio_data, W83627HF_LD_HWM);
|
||||
|
||||
/* Make sure these GPIO pins are enabled */
|
||||
|
||||
@@ -279,9 +279,7 @@ static void *etb_alloc_buffer(struct coresight_device *csdev, int cpu,
|
||||
int node;
|
||||
struct cs_buffers *buf;
|
||||
|
||||
if (cpu == -1)
|
||||
cpu = smp_processor_id();
|
||||
node = cpu_to_node(cpu);
|
||||
node = (cpu == -1) ? NUMA_NO_NODE : cpu_to_node(cpu);
|
||||
|
||||
buf = kzalloc_node(sizeof(struct cs_buffers), GFP_KERNEL, node);
|
||||
if (!buf)
|
||||
|
||||
@@ -282,9 +282,7 @@ static void *tmc_alloc_etf_buffer(struct coresight_device *csdev, int cpu,
|
||||
int node;
|
||||
struct cs_buffers *buf;
|
||||
|
||||
if (cpu == -1)
|
||||
cpu = smp_processor_id();
|
||||
node = cpu_to_node(cpu);
|
||||
node = (cpu == -1) ? NUMA_NO_NODE : cpu_to_node(cpu);
|
||||
|
||||
/* Allocate memory structure for interaction with Perf */
|
||||
buf = kzalloc_node(sizeof(struct cs_buffers), GFP_KERNEL, node);
|
||||
|
||||
@@ -221,7 +221,7 @@ static int ad5380_read_raw(struct iio_dev *indio_dev,
|
||||
if (ret)
|
||||
return ret;
|
||||
*val >>= chan->scan_type.shift;
|
||||
val -= (1 << chan->scan_type.realbits) / 2;
|
||||
*val -= (1 << chan->scan_type.realbits) / 2;
|
||||
return IIO_VAL_INT;
|
||||
case IIO_CHAN_INFO_SCALE:
|
||||
*val = 2 * st->vref;
|
||||
|
||||
@@ -2044,7 +2044,7 @@ static int import_ep(struct c4iw_ep *ep, int iptype, __u8 *peer_ip,
|
||||
} else {
|
||||
pdev = get_real_dev(n->dev);
|
||||
ep->l2t = cxgb4_l2t_get(cdev->rdev.lldi.l2t,
|
||||
n, pdev, 0);
|
||||
n, pdev, rt_tos2priority(tos));
|
||||
if (!ep->l2t)
|
||||
goto out;
|
||||
ep->mtu = dst_mtu(dst);
|
||||
@@ -2135,7 +2135,8 @@ static int c4iw_reconnect(struct c4iw_ep *ep)
|
||||
laddr6->sin6_addr.s6_addr,
|
||||
raddr6->sin6_addr.s6_addr,
|
||||
laddr6->sin6_port,
|
||||
raddr6->sin6_port, 0,
|
||||
raddr6->sin6_port,
|
||||
ep->com.cm_id->tos,
|
||||
raddr6->sin6_scope_id);
|
||||
iptype = 6;
|
||||
ra = (__u8 *)&raddr6->sin6_addr;
|
||||
@@ -3278,7 +3279,7 @@ int c4iw_connect(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param)
|
||||
laddr6->sin6_addr.s6_addr,
|
||||
raddr6->sin6_addr.s6_addr,
|
||||
laddr6->sin6_port,
|
||||
raddr6->sin6_port, 0,
|
||||
raddr6->sin6_port, cm_id->tos,
|
||||
raddr6->sin6_scope_id);
|
||||
}
|
||||
if (!ep->dst) {
|
||||
|
||||
@@ -241,7 +241,6 @@ void hns_roce_qp_free(struct hns_roce_dev *hr_dev, struct hns_roce_qp *hr_qp)
|
||||
|
||||
if ((hr_qp->ibqp.qp_type) != IB_QPT_GSI) {
|
||||
hns_roce_table_put(hr_dev, &qp_table->irrl_table, hr_qp->qpn);
|
||||
hns_roce_table_put(hr_dev, &qp_table->qp_table, hr_qp->qpn);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -2324,6 +2324,11 @@ static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_Q
|
||||
[MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX |
|
||||
MLX5_QP_OPTPAR_Q_KEY |
|
||||
MLX5_QP_OPTPAR_PRI_PORT,
|
||||
[MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_RRE |
|
||||
MLX5_QP_OPTPAR_RAE |
|
||||
MLX5_QP_OPTPAR_RWE |
|
||||
MLX5_QP_OPTPAR_PKEY_INDEX |
|
||||
MLX5_QP_OPTPAR_PRI_PORT,
|
||||
},
|
||||
[MLX5_QP_STATE_RTR] = {
|
||||
[MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH |
|
||||
@@ -2357,6 +2362,12 @@ static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_Q
|
||||
MLX5_QP_OPTPAR_RWE |
|
||||
MLX5_QP_OPTPAR_PM_STATE,
|
||||
[MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY,
|
||||
[MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH |
|
||||
MLX5_QP_OPTPAR_RRE |
|
||||
MLX5_QP_OPTPAR_RAE |
|
||||
MLX5_QP_OPTPAR_RWE |
|
||||
MLX5_QP_OPTPAR_PM_STATE |
|
||||
MLX5_QP_OPTPAR_RNR_TIMEOUT,
|
||||
},
|
||||
},
|
||||
[MLX5_QP_STATE_RTS] = {
|
||||
@@ -2373,6 +2384,12 @@ static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_Q
|
||||
[MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY |
|
||||
MLX5_QP_OPTPAR_SRQN |
|
||||
MLX5_QP_OPTPAR_CQN_RCV,
|
||||
[MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_RRE |
|
||||
MLX5_QP_OPTPAR_RAE |
|
||||
MLX5_QP_OPTPAR_RWE |
|
||||
MLX5_QP_OPTPAR_RNR_TIMEOUT |
|
||||
MLX5_QP_OPTPAR_PM_STATE |
|
||||
MLX5_QP_OPTPAR_ALT_ADDR_PATH,
|
||||
},
|
||||
},
|
||||
[MLX5_QP_STATE_SQER] = {
|
||||
@@ -2384,6 +2401,10 @@ static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_Q
|
||||
MLX5_QP_OPTPAR_RWE |
|
||||
MLX5_QP_OPTPAR_RAE |
|
||||
MLX5_QP_OPTPAR_RRE,
|
||||
[MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_RNR_TIMEOUT |
|
||||
MLX5_QP_OPTPAR_RWE |
|
||||
MLX5_QP_OPTPAR_RAE |
|
||||
MLX5_QP_OPTPAR_RRE,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
@@ -55,7 +55,7 @@
|
||||
|
||||
int ocrdma_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
|
||||
{
|
||||
if (index > 1)
|
||||
if (index > 0)
|
||||
return -EINVAL;
|
||||
|
||||
*pkey = 0xffff;
|
||||
|
||||
@@ -54,7 +54,7 @@
|
||||
|
||||
int qedr_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
|
||||
{
|
||||
if (index > QEDR_ROCE_PKEY_TABLE_LEN)
|
||||
if (index >= QEDR_ROCE_PKEY_TABLE_LEN)
|
||||
return -EINVAL;
|
||||
|
||||
*pkey = QEDR_ROCE_PKEY_DEFAULT;
|
||||
|
||||
@@ -425,7 +425,7 @@ int usnic_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
|
||||
int usnic_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
|
||||
u16 *pkey)
|
||||
{
|
||||
if (index > 1)
|
||||
if (index > 0)
|
||||
return -EINVAL;
|
||||
|
||||
*pkey = 0xffff;
|
||||
|
||||
@@ -30,7 +30,7 @@
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*/
|
||||
|
||||
#include <linux/vmalloc.h>
|
||||
#include "rxe.h"
|
||||
#include "rxe_loc.h"
|
||||
#include "rxe_queue.h"
|
||||
@@ -89,7 +89,7 @@ int rxe_cq_from_init(struct rxe_dev *rxe, struct rxe_cq *cq, int cqe,
|
||||
err = do_mmap_info(rxe, udata, false, context, cq->queue->buf,
|
||||
cq->queue->buf_size, &cq->queue->ip);
|
||||
if (err) {
|
||||
kvfree(cq->queue->buf);
|
||||
vfree(cq->queue->buf);
|
||||
kfree(cq->queue);
|
||||
return err;
|
||||
}
|
||||
|
||||
@@ -34,6 +34,7 @@
|
||||
#include <linux/skbuff.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/vmalloc.h>
|
||||
|
||||
#include "rxe.h"
|
||||
#include "rxe_loc.h"
|
||||
@@ -255,7 +256,7 @@ static int rxe_qp_init_req(struct rxe_dev *rxe, struct rxe_qp *qp,
|
||||
qp->sq.queue->buf_size, &qp->sq.queue->ip);
|
||||
|
||||
if (err) {
|
||||
kvfree(qp->sq.queue->buf);
|
||||
vfree(qp->sq.queue->buf);
|
||||
kfree(qp->sq.queue);
|
||||
return err;
|
||||
}
|
||||
@@ -312,7 +313,7 @@ static int rxe_qp_init_resp(struct rxe_dev *rxe, struct rxe_qp *qp,
|
||||
qp->rq.queue->buf_size,
|
||||
&qp->rq.queue->ip);
|
||||
if (err) {
|
||||
kvfree(qp->rq.queue->buf);
|
||||
vfree(qp->rq.queue->buf);
|
||||
kfree(qp->rq.queue);
|
||||
return err;
|
||||
}
|
||||
|
||||
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Reference in New Issue
Block a user