a540a07e17
Expose map and unmap ioctls to userspace. These ioctls can be used by userspace clients to map ion memory and get virtual address to be consumed by the Crypto hardware. CRs-Fixed: 1072414 Change-Id: I141b984a65aefcfc676685dffe19e6c8d022f2e1 Signed-off-by: Sonal Gupta <sonalg@codeaurora.org>
285 lines
8.8 KiB
C
285 lines
8.8 KiB
C
#ifndef _UAPI_QCEDEV__H
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#define _UAPI_QCEDEV__H
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#include <linux/types.h>
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#include <linux/ioctl.h>
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#include "fips_status.h"
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#define QCEDEV_MAX_SHA_BLOCK_SIZE 64
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#define QCEDEV_MAX_BEARER 31
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#define QCEDEV_MAX_KEY_SIZE 64
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#define QCEDEV_MAX_IV_SIZE 32
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#define QCEDEV_MAX_BUFFERS 16
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#define QCEDEV_MAX_SHA_DIGEST 32
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#define QCEDEV_USE_PMEM 1
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#define QCEDEV_NO_PMEM 0
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#define QCEDEV_AES_KEY_128 16
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#define QCEDEV_AES_KEY_192 24
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#define QCEDEV_AES_KEY_256 32
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/**
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*qcedev_oper_enum: Operation types
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* @QCEDEV_OPER_ENC: Encrypt
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* @QCEDEV_OPER_DEC: Decrypt
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* @QCEDEV_OPER_ENC_NO_KEY: Encrypt. Do not need key to be specified by
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* user. Key already set by an external processor.
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* @QCEDEV_OPER_DEC_NO_KEY: Decrypt. Do not need the key to be specified by
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* user. Key already set by an external processor.
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*/
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enum qcedev_oper_enum {
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QCEDEV_OPER_DEC = 0,
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QCEDEV_OPER_ENC = 1,
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QCEDEV_OPER_DEC_NO_KEY = 2,
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QCEDEV_OPER_ENC_NO_KEY = 3,
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QCEDEV_OPER_LAST
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};
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/**
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*qcedev_oper_enum: Cipher algorithm types
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* @QCEDEV_ALG_DES: DES
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* @QCEDEV_ALG_3DES: 3DES
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* @QCEDEV_ALG_AES: AES
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*/
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enum qcedev_cipher_alg_enum {
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QCEDEV_ALG_DES = 0,
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QCEDEV_ALG_3DES = 1,
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QCEDEV_ALG_AES = 2,
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QCEDEV_ALG_LAST
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};
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/**
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*qcedev_cipher_mode_enum : AES mode
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* @QCEDEV_AES_MODE_CBC: CBC
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* @QCEDEV_AES_MODE_ECB: ECB
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* @QCEDEV_AES_MODE_CTR: CTR
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* @QCEDEV_AES_MODE_XTS: XTS
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* @QCEDEV_AES_MODE_CCM: CCM
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* @QCEDEV_DES_MODE_CBC: CBC
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* @QCEDEV_DES_MODE_ECB: ECB
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*/
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enum qcedev_cipher_mode_enum {
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QCEDEV_AES_MODE_CBC = 0,
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QCEDEV_AES_MODE_ECB = 1,
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QCEDEV_AES_MODE_CTR = 2,
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QCEDEV_AES_MODE_XTS = 3,
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QCEDEV_AES_MODE_CCM = 4,
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QCEDEV_DES_MODE_CBC = 5,
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QCEDEV_DES_MODE_ECB = 6,
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QCEDEV_AES_DES_MODE_LAST
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};
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/**
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*enum qcedev_sha_alg_enum : Secure Hashing Algorithm
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* @QCEDEV_ALG_SHA1: Digest returned: 20 bytes (160 bits)
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* @QCEDEV_ALG_SHA256: Digest returned: 32 bytes (256 bit)
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* @QCEDEV_ALG_SHA1_HMAC: HMAC returned 20 bytes (160 bits)
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* @QCEDEV_ALG_SHA256_HMAC: HMAC returned 32 bytes (256 bit)
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* @QCEDEV_ALG_AES_CMAC: Configurable MAC size
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*/
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enum qcedev_sha_alg_enum {
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QCEDEV_ALG_SHA1 = 0,
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QCEDEV_ALG_SHA256 = 1,
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QCEDEV_ALG_SHA1_HMAC = 2,
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QCEDEV_ALG_SHA256_HMAC = 3,
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QCEDEV_ALG_AES_CMAC = 4,
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QCEDEV_ALG_SHA_ALG_LAST
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};
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/**
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* struct buf_info - Buffer information
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* @offset: Offset from the base address of the buffer
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* (Used when buffer is allocated using PMEM)
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* @vaddr: Virtual buffer address pointer
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* @len: Size of the buffer
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*/
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struct buf_info {
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union {
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uint32_t offset;
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uint8_t *vaddr;
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};
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uint32_t len;
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};
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/**
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* struct qcedev_vbuf_info - Source and destination Buffer information
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* @src: Array of buf_info for input/source
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* @dst: Array of buf_info for output/destination
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*/
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struct qcedev_vbuf_info {
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struct buf_info src[QCEDEV_MAX_BUFFERS];
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struct buf_info dst[QCEDEV_MAX_BUFFERS];
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};
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/**
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* struct qcedev_pmem_info - Stores PMEM buffer information
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* @fd_src: Handle to /dev/adsp_pmem used to allocate
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* memory for input/src buffer
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* @src: Array of buf_info for input/source
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* @fd_dst: Handle to /dev/adsp_pmem used to allocate
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* memory for output/dst buffer
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* @dst: Array of buf_info for output/destination
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* @pmem_src_offset: The offset from input/src buffer
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* (allocated by PMEM)
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*/
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struct qcedev_pmem_info {
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int fd_src;
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struct buf_info src[QCEDEV_MAX_BUFFERS];
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int fd_dst;
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struct buf_info dst[QCEDEV_MAX_BUFFERS];
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};
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/**
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* struct qcedev_cipher_op_req - Holds the ciphering request information
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* @use_pmem (IN): Flag to indicate if buffer source is PMEM
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* QCEDEV_USE_PMEM/QCEDEV_NO_PMEM
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* @pmem (IN): Stores PMEM buffer information.
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* Refer struct qcedev_pmem_info
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* @vbuf (IN/OUT): Stores Source and destination Buffer information
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* Refer to struct qcedev_vbuf_info
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* @data_len (IN): Total Length of input/src and output/dst in bytes
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* @in_place_op (IN): Indicates whether the operation is inplace where
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* source == destination
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* When using PMEM allocated memory, must set this to 1
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* @enckey (IN): 128 bits of confidentiality key
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* enckey[0] bit 127-120, enckey[1] bit 119-112,..
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* enckey[15] bit 7-0
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* @encklen (IN): Length of the encryption key(set to 128 bits/16
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* bytes in the driver)
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* @iv (IN/OUT): Initialisation vector data
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* This is updated by the driver, incremented by
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* number of blocks encrypted/decrypted.
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* @ivlen (IN): Length of the IV
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* @byteoffset (IN): Offset in the Cipher BLOCK (applicable and to be set
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* for AES-128 CTR mode only)
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* @alg (IN): Type of ciphering algorithm: AES/DES/3DES
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* @mode (IN): Mode use when using AES algorithm: ECB/CBC/CTR
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* Apllicabel when using AES algorithm only
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* @op (IN): Type of operation: QCEDEV_OPER_DEC/QCEDEV_OPER_ENC or
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* QCEDEV_OPER_ENC_NO_KEY/QCEDEV_OPER_DEC_NO_KEY
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*
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*If use_pmem is set to 0, the driver assumes that memory was not allocated
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* via PMEM, and kernel will need to allocate memory and copy data from user
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* space buffer (data_src/dta_dst) and process accordingly and copy data back
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* to the user space buffer
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*
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* If use_pmem is set to 1, the driver assumes that memory was allocated via
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* PMEM.
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* The kernel driver will use the fd_src to determine the kernel virtual address
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* base that maps to the user space virtual address base for the buffer
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* allocated in user space.
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* The final input/src and output/dst buffer pointer will be determined
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* by adding the offsets to the kernel virtual addr.
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*
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* If use of hardware key is supported in the target, user can configure the
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* key parameters (encklen, enckey) to use the hardware key.
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* In order to use the hardware key, set encklen to 0 and set the enckey
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* data array to 0.
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*/
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struct qcedev_cipher_op_req {
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uint8_t use_pmem;
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union {
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struct qcedev_pmem_info pmem;
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struct qcedev_vbuf_info vbuf;
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};
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uint32_t entries;
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uint32_t data_len;
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uint8_t in_place_op;
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uint8_t enckey[QCEDEV_MAX_KEY_SIZE];
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uint32_t encklen;
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uint8_t iv[QCEDEV_MAX_IV_SIZE];
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uint32_t ivlen;
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uint32_t byteoffset;
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enum qcedev_cipher_alg_enum alg;
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enum qcedev_cipher_mode_enum mode;
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enum qcedev_oper_enum op;
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};
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/**
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* struct qcedev_sha_op_req - Holds the hashing request information
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* @data (IN): Array of pointers to the data to be hashed
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* @entries (IN): Number of buf_info entries in the data array
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* @data_len (IN): Length of data to be hashed
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* @digest (IN/OUT): Returns the hashed data information
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* @diglen (OUT): Size of the hashed/digest data
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* @authkey (IN): Pointer to authentication key for HMAC
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* @authklen (IN): Size of the authentication key
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* @alg (IN): Secure Hash algorithm
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*/
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struct qcedev_sha_op_req {
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struct buf_info data[QCEDEV_MAX_BUFFERS];
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uint32_t entries;
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uint32_t data_len;
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uint8_t digest[QCEDEV_MAX_SHA_DIGEST];
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uint32_t diglen;
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uint8_t *authkey;
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uint32_t authklen;
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enum qcedev_sha_alg_enum alg;
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};
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/**
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* struct qfips_verify_t - Holds data for FIPS Integrity test
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* @kernel_size (IN): Size of kernel Image
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* @kernel (IN): pointer to buffer containing the kernel Image
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*/
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struct qfips_verify_t {
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unsigned int kernel_size;
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void *kernel;
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};
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/**
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* struct qcedev_map_buf_req - Holds the mapping request information
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* fd (IN): Array of fds.
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* num_fds (IN): Number of fds in fd[].
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* fd_size (IN): Array of sizes corresponding to each fd in fd[].
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* fd_offset (IN): Array of offset corresponding to each fd in fd[].
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* vaddr (OUT): Array of mapped virtual address corresponding to
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* each fd in fd[].
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*/
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struct qcedev_map_buf_req {
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int32_t fd[QCEDEV_MAX_BUFFERS];
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uint32_t num_fds;
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uint32_t fd_size[QCEDEV_MAX_BUFFERS];
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uint32_t fd_offset[QCEDEV_MAX_BUFFERS];
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uint64_t buf_vaddr[QCEDEV_MAX_BUFFERS];
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};
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/**
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* struct qcedev_unmap_buf_req - Holds the hashing request information
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* fd (IN): Array of fds to unmap
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* num_fds (IN): Number of fds in fd[].
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*/
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struct qcedev_unmap_buf_req {
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int32_t fd[QCEDEV_MAX_BUFFERS];
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uint32_t num_fds;
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};
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struct file;
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#define QCEDEV_IOC_MAGIC 0x87
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#define QCEDEV_IOCTL_ENC_REQ \
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_IOWR(QCEDEV_IOC_MAGIC, 1, struct qcedev_cipher_op_req)
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#define QCEDEV_IOCTL_DEC_REQ \
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_IOWR(QCEDEV_IOC_MAGIC, 2, struct qcedev_cipher_op_req)
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#define QCEDEV_IOCTL_SHA_INIT_REQ \
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_IOWR(QCEDEV_IOC_MAGIC, 3, struct qcedev_sha_op_req)
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#define QCEDEV_IOCTL_SHA_UPDATE_REQ \
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_IOWR(QCEDEV_IOC_MAGIC, 4, struct qcedev_sha_op_req)
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#define QCEDEV_IOCTL_SHA_FINAL_REQ \
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_IOWR(QCEDEV_IOC_MAGIC, 5, struct qcedev_sha_op_req)
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#define QCEDEV_IOCTL_GET_SHA_REQ \
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_IOWR(QCEDEV_IOC_MAGIC, 6, struct qcedev_sha_op_req)
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#define QCEDEV_IOCTL_LOCK_CE \
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_IO(QCEDEV_IOC_MAGIC, 7)
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#define QCEDEV_IOCTL_UNLOCK_CE \
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_IO(QCEDEV_IOC_MAGIC, 8)
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#define QCEDEV_IOCTL_GET_CMAC_REQ \
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_IOWR(QCEDEV_IOC_MAGIC, 9, struct qcedev_sha_op_req)
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#define QCEDEV_IOCTL_MAP_BUF_REQ \
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_IOWR(QCEDEV_IOC_MAGIC, 10, struct qcedev_map_buf_req)
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#define QCEDEV_IOCTL_UNMAP_BUF_REQ \
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_IOWR(QCEDEV_IOC_MAGIC, 11, struct qcedev_unmap_buf_req)
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#endif /* _UAPI_QCEDEV__H */
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