Merge tag 'android12-5.10.239_r00' into android12-5.10

This merges the android12-5.10.239_r00 tag into the android12-5.10 branch,
catching it up with the latest LTS releases.

It contains the following commits:

* dffa1748d2 UPSTREAM: rtc: lib_test: add MODULE_LICENSE
*   50582c0538 Merge 5.10.239 into android12-5.10-lts
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| * ecbc622e0f Linux 5.10.239
| * 85d7a81b96 scsi: qedf: Use designated initializer for struct qed_fcoe_cb_ops
| * 973c7a0d8a bpf: fix precision backtracking instruction iteration
| * 67abac27d8 arm64/ptrace: Fix stack-out-of-bounds read in regs_get_kernel_stack_nth()
| * 507c9a595b perf: Fix sample vs do_exit()
| * 8974bfb5c9 s390/pci: Fix __pcilg_mio_inuser() inline assembly
| * 4428b0c3b7 rtc: test: Fix invalid format specifier.
| * 747b57f6be hwmon: (occ) Fix P10 VRM temp sensors
| * 9468afbda3 mm/huge_memory: fix dereferencing invalid pmd migration entry
| * 7d62ded97d net_sched: sch_sfq: move the limit validation
| * 9896b3ad44 net_sched: sch_sfq: use a temporary work area for validating configuration
| * 1e6d9d8762 net_sched: sch_sfq: don't allow 1 packet limit
| * 4919649699 net_sched: sch_sfq: handle bigger packets
| * b010c36371 net_sched: sch_sfq: annotate data-races around q->perturb_period
| * 458b8e2d6a rtc: Make rtc_time64_to_tm() support dates before 1970
| * a442ce05b6 rtc: Improve performance of rtc_time64_to_tm(). Add tests.
| * 7474e42a12 bpf: Fix L4 csum update on IPv6 in CHECKSUM_COMPLETE
| * 841a821a49 net: Fix checksum update for ILA adj-transport
* | 0fc8abaf7c Merge 051170d38a ("net/ipv4: fix type mismatch in inet_ehash_locks_alloc() causing build failure") into android12-5.10-lts
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| * 051170d38a net/ipv4: fix type mismatch in inet_ehash_locks_alloc() causing build failure
* | 6200a3734e Merge 9202c71e95 ("arm64: proton-pack: Add new CPUs 'k' values for branch mitigation") into android12-5.10-lts
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| * 9202c71e95 arm64: proton-pack: Add new CPUs 'k' values for branch mitigation
| * 038866e01e arm64: bpf: Only mitigate cBPF programs loaded by unprivileged users
| * c6a8735d84 arm64: bpf: Add BHB mitigation to the epilogue for cBPF programs
| * d38941ee87 arm64: spectre: increase parameters that can be used to turn off bhb mitigation individually
| * 86ca67653d arm64: proton-pack: Expose whether the branchy loop k value
| * e68da90ac0 arm64: errata: Add missing sentinels to Spectre-BHB MIDR arrays
| * 4a2f3d8260 arm64: errata: Add newer ARM cores to the spectre_bhb_loop_affected() lists
| * 777f973a91 arm64: errata: Add KRYO 2XX/3XX/4XX silver cores to Spectre BHB safe list
| * 1c24e2af30 arm64: errata: Assume that unknown CPUs _are_ vulnerable to Spectre BHB
| * cde8ad8a7a arm64: proton-pack: Expose whether the platform is mitigated by firmware
* | 1da2cbb952 Merge 47072cbab1 ("arm64: insn: Add support for encoding DSB") into android12-5.10-lts
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| * 47072cbab1 arm64: insn: Add support for encoding DSB
| * 70ee0e99ba arm64: insn: add encoders for atomic operations
| * 7888964338 arm64: move AARCH64_BREAK_FAULT into insn-def.h
| * e4d9e6bbb8 arm64: insn: Add barrier encodings
* | 3ee89b93ef Merge 9c839c682f ("serial: sh-sci: Increment the runtime usage counter for the earlycon device") into android12-5.10-lts
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| * 9c839c682f serial: sh-sci: Increment the runtime usage counter for the earlycon device
| * 6a579b0a4c ARM: dts: am335x-bone-common: Increase MDIO reset deassert delay to 50ms
| * 8f53372487 ARM: dts: am335x-bone-common: Increase MDIO reset deassert time
| * 433d4dbb6a ARM: dts: am335x-bone-common: Add GPIO PHY reset on revision C3 board
| * f2d1443b18 net: atm: fix /proc/net/atm/lec handling
| * a7a713dfb5 net: atm: add lec_mutex
| * f4ae0f61dd calipso: Fix null-ptr-deref in calipso_req_{set,del}attr().
| * c2e1798475 tipc: fix null-ptr-deref when acquiring remote ip of ethernet bearer
| * 2845b35648 tcp: fix tcp_packet_delayed() for tcp_is_non_sack_preventing_reopen() behavior
| * a4b0fd8c25 atm: atmtcp: Free invalid length skb in atmtcp_c_send().
| * 36af82f25f mpls: Use rcu_dereference_rtnl() in mpls_route_input_rcu().
| * 8a3734a6f4 wifi: carl9170: do not ping device which has failed to load firmware
| * fbe9ca9f5d net: ice: Perform accurate aRFS flow match
| * 64fc0bad62 aoe: clean device rq_list in aoedev_downdev()
| * 9aea0a0009 pldmfw: Select CRC32 when PLDMFW is selected
| * 2ce859f13d hwmon: (occ) fix unaligned accesses
| * def21b619e hwmon: (occ) Rework attribute registration for stack usage
| * 2680c27453 hwmon: (occ) Add soft minimum power cap attribute
| * 7674e7cb00 hwmon: (occ) Add new temperature sensor type
| * 2b04ca321e drm/nouveau/bl: increase buffer size to avoid truncate warning
| * 58936454c7 erofs: remove unused trace event erofs_destroy_inode
* | 8466774364 Merge 952596b08c ("mm/hugetlb: fix huge_pmd_unshare() vs GUP-fast race") into android12-5.10-lts
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| * 952596b08c mm/hugetlb: fix huge_pmd_unshare() vs GUP-fast race
* | 38afe12e2e Revert "mm: hugetlb: independent PMD page table shared count"
* | da18f01fe5 Merge 94b4b41d0c ("mm: hugetlb: independent PMD page table shared count") into android12-5.10-lts
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| * 94b4b41d0c mm: hugetlb: independent PMD page table shared count
* | 2ce75034fc Merge e8847d18cd ("mm/hugetlb: unshare page tables during VMA split, not before") into android12-5.10-lts
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| * e8847d18cd mm/hugetlb: unshare page tables during VMA split, not before
* | ee288aaf55 Merge f1082f5f3d ("hugetlb: unshare some PMDs when splitting VMAs") into android12-5.10-lts
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| * f1082f5f3d hugetlb: unshare some PMDs when splitting VMAs
* | a2222bb72b Merge 8e56a792eb ("ALSA: hda/realtek: enable headset mic on Latitude 5420 Rugged") into android12-5.10-lts
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| * 8e56a792eb ALSA: hda/realtek: enable headset mic on Latitude 5420 Rugged
| * 2228379d53 ALSA: hda/intel: Add Thinkpad E15 to PM deny list
| * 8edfc3f3dd ALSA: usb-audio: Rename ALSA kcontrol PCM and PCM1 for the KTMicro sound card
| * 93e1a6f86d Input: sparcspkr - avoid unannotated fall-through
| * 41827a2dbd HID: usbhid: Eliminate recurrent out-of-bounds bug in usbhid_parse()
| * c12430edd9 atm: Revert atm_account_tx() if copy_from_iter_full() fails.
| * e825daf0b2 selinux: fix selinux_xfrm_alloc_user() to set correct ctx_len
| * 996c27b974 udmabuf: use sgtable-based scatterlist wrappers
| * 0d52528f79 scsi: s390: zfcp: Ensure synchronous unit_add
| * cff97b938e scsi: storvsc: Increase the timeouts to storvsc_timeout
| * d96e6451a8 jffs2: check jffs2_prealloc_raw_node_refs() result in few other places
| * 8ce46dc5b1 jffs2: check that raw node were preallocated before writing summary
| * c03ddc1832 drivers/rapidio/rio_cm.c: prevent possible heap overwrite
| * 85cc64310b Revert "x86/bugs: Make spectre user default depend on MITIGATION_SPECTRE_V2" on v6.6 and older
| * 638940427a powerpc/eeh: Fix missing PE bridge reconfiguration during VFIO EEH recovery
| * 1c201517e6 platform/x86: dell_rbu: Stop overwriting data buffer
| * 5e8c658acd platform/x86: dell_rbu: Fix list usage
| * 27edaa72b9 platform: Add Surface platform directory
| * 264522037c Revert "bus: ti-sysc: Probe for l4_wkup and l4_cfg interconnect devices first"
| * 37ae6fce73 tee: Prevent size calculation wraparound on 32-bit kernels
| * 1e7094b424 ARM: OMAP2+: Fix l4ls clk domain handling in STANDBY
| * 17f1fe7286 bus: fsl-mc: increase MC_CMD_COMPLETION_TIMEOUT_MS value
| * 46cb1321c5 watchdog: da9052_wdt: respect TWDMIN
| * 5e75c90829 i40e: fix MMIO write access to an invalid page in i40e_clear_hw
| * 5c26b32306 sock: Correct error checking condition for (assign|release)_proto_idx()
| * b699bda5db scsi: lpfc: Use memcpy() for BIOS version
| * 142acd739e software node: Correct a OOB check in software_node_get_reference_args()
| * a2e70d62a7 vxlan: Do not treat dst cache initialization errors as fatal
| * 0b56bb8990 iommu/amd: Ensure GA log notifier callbacks finish running before module unload
| * f3bfbf87c3 scsi: lpfc: Fix lpfc_check_sli_ndlp() handling for GEN_REQUEST64 commands
| * 107cb95370 clk: rockchip: rk3036: mark ddrphy as critical
| * 4a5aa65527 wifi: mac80211: do not offer a mesh path if forwarding is disabled
| * 3dc18b8137 net: mlx4: add SOF_TIMESTAMPING_TX_SOFTWARE flag when getting ts info
| * 1af73500ce pinctrl: armada-37xx: propagate error from armada_37xx_gpio_get()
| * 35e8533518 pinctrl: armada-37xx: propagate error from armada_37xx_pmx_gpio_set_direction()
| * 3f25e2d17f pinctrl: armada-37xx: propagate error from armada_37xx_gpio_get_direction()
| * b3d75c1ab6 pinctrl: armada-37xx: propagate error from armada_37xx_pmx_set_by_name()
| * f324bf7c67 net: atlantic: generate software timestamp just before the doorbell
| * d3c2e7dfe2 ipv4/route: Use this_cpu_inc() for stats on PREEMPT_RT
| * 614c8e008b tcp: fix initial tp->rcvq_space.space value for passive TS enabled flows
| * 36d4b41fd2 tcp: always seek for minimal rtt in tcp_rcv_rtt_update()
| * e3ed0995be net: dlink: add synchronization for stats update
| * 3b7e191227 i2c: npcm: Add clock toggle recovery
| * 747eef5f01 sctp: Do not wake readers in __sctp_write_space()
| * 99eec40d34 wifi: mt76: mt76x2: Add support for LiteOn WN4516R,WN4519R
| * 9842cd48e1 emulex/benet: correct command version selection in be_cmd_get_stats()
| * 04902931fa i2c: designware: Invoke runtime suspend on quick slave re-registration
| * cb4e303cc7 tipc: use kfree_sensitive() for aead cleanup
| * eb3a714961 net: macb: Check return value of dma_set_mask_and_coherent()
| * c2afa93655 cpufreq: Force sync policy boost with global boost on sysfs update
| * 87c09d6cd3 thermal/drivers/qcom/tsens: Update conditions to strictly evaluate for IP v2+
| * de74a76e5a nios2: force update_mmu_cache on spurious tlb-permission--related pagefaults
| * e4077a10a2 media: platform: exynos4-is: Add hardware sync wait to fimc_is_hw_change_mode()
| * c4333b6bd1 media: tc358743: ignore video while HPD is low
| * 438383fc2b drm/amdkfd: Set SDMA_RLCx_IB_CNTL/SWITCH_INSIDE_IB
| * 58df2f3fed drm/msm/dpu: don't select single flush for active CTL blocks
| * a9d41c9250 jfs: Fix null-ptr-deref in jfs_ioc_trim
| * b0957acb27 drm/amdgpu/gfx9: fix CSIB handling
| * 159b513cdc drm/amdgpu/gfx8: fix CSIB handling
| * 7bf45d596b ext4: prevent stale extent cache entries caused by concurrent get es_cache
| * ce33edfb2f sunrpc: fix race in cache cleanup causing stale nextcheck time
| * 887908f1ac media: rkvdec: Initialize the m2m context before the controls
| * bfa4655d28 jfs: fix array-index-out-of-bounds read in add_missing_indices
| * 3e3c8b50c0 ext4: ext4: unify EXT4_EX_NOCACHE|NOFAIL flags in ext4_ext_remove_space()
* | 7f7c970412 Merge 0ef6153de6 ("drm/amdgpu/gfx7: fix CSIB handling") into android12-5.10-lts
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| * 0ef6153de6 drm/amdgpu/gfx7: fix CSIB handling
| * a048f06d85 media: uapi: v4l: Change V4L2_TYPE_IS_CAPTURE condition
| * 3e37d82ab1 drm/amdgpu/gfx10: fix CSIB handling
| * d60dd3b429 drm/msm/a6xx: Increase HFI response timeout
| * 420bb9ef41 drm/amd/display: Add NULL pointer checks in dm_force_atomic_commit()
| * 35662a6ec6 media: uapi: v4l: Fix V4L2_TYPE_IS_OUTPUT condition
| * 75195e6cc6 drm/msm/hdmi: add runtime PM calls to DDC transfer function
| * 13d8de1b65 exfat: fix double free in delayed_free
| * 9c26758b3f drm/bridge: analogix_dp: Add irq flag IRQF_NO_AUTOEN instead of calling disable_irq()
| * c87fcbe9a5 sunrpc: update nextcheck time when adding new cache entries
| * d506aac161 drm/amdgpu/gfx6: fix CSIB handling
| * e7dd5c40e9 ACPI: battery: negate current when discharging
| * 800a4b142d PM: runtime: fix denying of auto suspend in pm_suspend_timer_fn()
| * e4c4d1121d ASoC: tegra210_ahub: Add check to of_device_get_match_data()
| * b2c18ee50b ACPICA: utilities: Fix overflow check in vsnprintf()
| * cb38a1efa5 power: supply: bq27xxx: Retrieve again when busy
| * 41afebc9a0 ACPICA: fix acpi parse and parseext cache leaks
| * 1b2c48b652 ASoC: tas2770: Power cycle amp on ISENSE/VSENSE change
| * e49263daf0 ACPICA: Avoid sequence overread in call to strncmp()
| * 36e61683f6 clocksource: Fix the CPUs' choice in the watchdog per CPU verification
| * 1c0d9115a0 ACPICA: fix acpi operand cache leak in dswstate.c
| * 650446714b iio: adc: ad7606_spi: fix reg write value mask
| * 66749e4c68 iio: imu: inv_icm42600: Fix temperature calculation
| * 8a7c483d53 PCI: Fix lock symmetry in pci_slot_unlock()
| * bffdf9b64f PCI: Add ACS quirk for Loongson PCIe
| * 6180c8f191 uio_hv_generic: Use correct size for interrupt and monitor pages
| * 4d53640880 regulator: max14577: Add error check for max14577_read_reg()
| * a5ade81fc6 mips: Add -std= flag specified in KBUILD_CFLAGS to vdso CFLAGS
| * 438d615c3c staging: iio: ad5933: Correct settling cycles encoding per datasheet
| * 33163c68d2 net: ch9200: fix uninitialised access during mii_nway_restart
| * 8690cd3258 ftrace: Fix UAF when lookup kallsym after ftrace disabled
| * a905f3e9d6 dm-mirror: fix a tiny race condition
| * cd70e29f45 mtd: nand: sunxi: Add randomizer configuration before randomizer enable
| * ce1c0125ec mtd: rawnand: sunxi: Add randomizer configuration in sunxi_nfc_hw_ecc_write_chunk
| * 02e35f9b9e mm: fix ratelimit_pages update error in dirty_ratio_handler()
| * b968ba8bfd ipc: fix to protect IPCS lookups using RCU
| * ffec4c870c clk: meson-g12a: add missing fclk_div2 to spicc
| * a7ce68b2da parisc: fix building with gcc-15
| * 843de5fbfe vgacon: Add check for vc_origin address range in vgacon_scroll()
| * fab201d72f fbdev: Fix fb_set_var to prevent null-ptr-deref in fb_videomode_to_var
| * 9d052a1165 EDAC/altera: Use correct write width with the INTTEST register
| * 000bfbc6bc NFC: nci: uart: Set tty->disc_data only in success path
| * 82f51bff39 f2fs: fix to do sanity check on sit_bitmap_size
| * 1f63328723 f2fs: prevent kernel warning due to negative i_nlink from corrupted image
| * d63706d9f7 Input: ims-pcu - check record size in ims_pcu_flash_firmware()
| * c79aa03fc3 ext4: ensure i_size is smaller than maxbytes
| * 0c2a1ee988 ext4: factor out ext4_get_maxbytes()
| * 35d7493011 ext4: fix calculation of credits for extent tree modification
| * 717414a8c0 ext4: inline: fix len overflow in ext4_prepare_inline_data
| * 29f665681f bus: fsl-mc: do not add a device-link for the UAPI used DPMCP device
| * 0d9a48dfa9 ata: pata_via: Force PIO for ATAPI devices on VT6415/VT6330
* | 3e616adec6 Revert "net: Rename ->stream_memory_read to ->sock_is_readable"
* | 4c6e1c7bf0 Revert "net: Fix TOCTOU issue in sk_is_readable()"
* | 3d9d456ab7 Merge 9ba18e400d ("bus: mhi: host: Fix conflict between power_up and SYSERR") into android12-5.10-lts
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| * 9ba18e400d bus: mhi: host: Fix conflict between power_up and SYSERR
| * f1dd8e5baa ARM: omap: pmic-cpcap: do not mess around without CPCAP or OMAP4
| * 33182a72e6 ARM: 9447/1: arm/memremap: fix arch_memremap_can_ram_remap()
| * 635cea4f44 media: vivid: Change the siize of the composing
| * e1d72ff111 media: vidtv: Terminating the subsequent process of initialization failure
| * 7c43d87021 media: videobuf2: use sgtable-based scatterlist wrappers
| * 43835e1842 media: venus: Fix probe error handling
| * e5c8e62ae5 media: v4l2-dev: fix error handling in __video_register_device()
| * bd49dc06b2 media: gspca: Add error handling for stv06xx_read_sensor()
| * 390b864e32 media: cxusb: no longer judge rbuf when the write fails
| * 3ac59ee477 media: ov8856: suppress probe deferral errors
| * fed9fa9c90 wifi: rtlwifi: disable ASPM for RTL8723BE with subsystem ID 11ad:1723
| * ec669e5bf4 jbd2: fix data-race and null-ptr-deref in jbd2_journal_dirty_metadata()
| * deaeb74ae9 nfsd: Initialize ssc before laundromat_work to prevent NULL dereference
| * b1d0323a09 nfsd: nfsd4_spo_must_allow() must check this is a v4 compound request
| * 9701f84203 wifi: p54: prevent buffer-overflow in p54_rx_eeprom_readback()
| * ab4d950589 net/mlx5: Add error handling in mlx5_query_nic_vport_node_guid()
| * b72c5777b6 net/mlx5_core: Add error handling inmlx5_query_nic_vport_qkey_viol_cntr()
| * b0214a7750 ASoC: meson: meson-card-utils: use of_property_present() for DT parsing
| * ee4ea251c1 ASoC: qcom: sdm845: Add error handling in sdm845_slim_snd_hw_params()
| * 9d0a0fe3d2 gfs2: move msleep to sleepable context
| * c8052a523f crypto: marvell/cesa - Do not chain submitted requests
| * 1fa73fd17f configfs: Do not override creating attribute file failure in populate_attrs()
| * 9cb3144045 tcp: tcp_data_ready() must look at SOCK_DONE
| * 775d9a08c4 kbuild: hdrcheck: fix cross build with clang
| * 875afc75d2 kbuild: userprogs: fix bitsize and target detection on clang
| * bb998f21a5 net: usb: aqc111: debug info before sanitation
| * 4cd0967f5e calipso: unlock rcu before returning -EAFNOSUPPORT
| * d64b7b05a8 x86/iopl: Cure TIF_IO_BITMAP inconsistencies
| * d3d4f36d0b xen/arm: call uaccess_ttbr0_enable for dm_op hypercall
| * 31de1d9d40 usb: Flush altsetting 0 endpoints before reinitializating them after reset.
| * 0c3939b002 drm/amd/display: Do not add '-mhard-float' to dcn2{1,0}_resource.o for clang
| * 79a4fba715 kbuild: Add KBUILD_CPPFLAGS to as-option invocation
| * 951dfb0bdc kbuild: add $(CLANG_FLAGS) to KBUILD_CPPFLAGS
| * 58c2cac0e7 kbuild: Add CLANG_FLAGS to as-instr
| * 9562b9f708 mips: Include KBUILD_CPPFLAGS in CHECKFLAGS invocation
| * 80ecbebebf drm/amd/display: Do not add '-mhard-float' to dml_ccflags for clang
| * 7fa1764188 kbuild: Update assembler calls to use proper flags and language target
| * 329bb2c101 MIPS: Prefer cc-option for additions to cflags
| * c4b6ada0ec MIPS: Move '-Wa,-msoft-float' check from as-option to cc-option
| * 27b1d3fa1e x86/boot/compressed: prefer cc-option for CFLAGS additions
| * c076635b3a posix-cpu-timers: fix race between handle_posix_cpu_timers() and posix_cpu_timer_del()
| * 9adb8e98c2 fs/filesystems: Fix potential unsigned integer underflow in fs_name()
| * eb7b74e975 net_sched: ets: fix a race in ets_qdisc_change()
| * c05a1bc689 sch_ets: make est_qlen_notify() idempotent
| * b894aab65c net_sched: tbf: fix a race in tbf_change()
| * a1bf6a4e92 net_sched: red: fix a race in __red_change()
| * 4483d8b912 net_sched: prio: fix a race in prio_tune()
| * ba89243bfc net/mlx5: Fix return value when searching for existing flow group
| * d96aa502a3 net/mlx5: Ensure fw pages are always allocated on same NUMA
| * 19c5875e26 net/mdiobus: Fix potential out-of-bounds read/write access
| * 72e9c8aa59 net: mdio: C22 is now optional, EOPNOTSUPP if not provided
| * c415856d62 macsec: MACsec SCI assignment for ES = 0
| * c2b2663847 net: Fix TOCTOU issue in sk_is_readable()
| * c83455d7de net: Rename ->stream_memory_read to ->sock_is_readable
| * 1b2347f3c5 bpf: Clean up sockmap related Kconfigs
| * 6b9dee829e tcp: factorize logic into tcp_epollin_ready()
| * b82ac74a39 i40e: retry VFLR handling if there is ongoing VF reset
| * 86b36a54f0 i40e: return false from i40e_reset_vf if reset is in progress
| * 98dc262f34 powerpc/vas: Return -EINVAL if the offset is non-zero in mmap()
| * bd53773795 powerpc/vas: Move VAS API to book3s common platform
| * b44f791f27 net_sched: sch_sfq: fix a potential crash on gso_skb handling
| * 5692209c5b scsi: iscsi: Fix incorrect error path labels for flashnode operations
* | d169a168a0 Merge 5f87b6f8d8 ("ath10k: snoc: fix unbalanced IRQ enable in crash recovery") into android12-5.10-lts
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| * 5f87b6f8d8 ath10k: snoc: fix unbalanced IRQ enable in crash recovery
| * 9977994824 ath10k: prevent deinitializing NAPI twice
| * b021241ca3 ath10k: add atomic protection for device recovery
| * 3f0aef1a4b serial: sh-sci: Clean sci_ports[0] after at earlycon exit
| * ae1db755ad serial: sh-sci: Move runtime PM enable to sci_probe_single()
| * e78653343f serial: sh-sci: Check if TX data was written to device in .tx_empty()
| * adb07d5a47 arm64: dts: ti: k3-am65-main: Add missing taps to sdhci0
| * ea1beea9ee arm64: dts: ti: k3-am65-main: Fix sdhci node properties
| * 7f42270487 arm64: dts: ti: k3-am65-main: Drop deprecated ti,otap-del-sel property
| * d3c9347a53 Input: synaptics-rmi - fix crash with unsupported versions of F34
| * 423b127d35 Input: synaptics-rmi4 - convert to use sysfs_emit() APIs
| * 4690f04c8a pmdomain: core: Fix error checking in genpd_dev_pm_attach_by_id()
| * c7d11fdf8e do_change_type(): refuse to operate on unmounted/not ours mounts
| * 9eba557c5b PM: sleep: Fix power.is_suspended cleanup for direct-complete devices
| * c5a344fc13 vmxnet3: correctly report gso type for UDP tunnels
| * 6b5858413d ice: create new Tx scheduler nodes for new queues only
| * a1104b6ba6 Bluetooth: L2CAP: Fix not responding with L2CAP_CR_LE_ENCRYPTION
| * 86ad2ce26f spi: bcm63xx-hsspi: fix shared reset
| * de695cd877 spi: bcm63xx-spi: fix shared reset
| * 61e3a3cab9 net/mlx4_en: Prevent potential integer overflow calculating Hz
| * f4c0fa9931 driver: net: ethernet: mtk_star_emac: fix suspend/resume issue
| * 445d59025d net: tipc: fix refcount warning in tipc_aead_encrypt
| * 641bbd221e gve: Fix RX_BUFFERS_POSTED stat to report per-queue fill_cnt
| * 68efdab16d net: stmmac: platform: guarantee uniqueness of bus_id
| * 4328c6e7d4 vt: remove VT_RESIZE and VT_RESIZEX from vt_compat_ioctl()
| * 74104b54e2 MIPS: Loongson64: Add missing '#interrupt-cells' for loongson64c_ls7a
| * f7ded85a6b iio: adc: ad7124: Fix 3dB filter frequency reading
| * 81159a6b06 serial: Fix potential null-ptr-deref in mlb_usio_probe()
| * 155453ada5 usb: renesas_usbhs: Reorder clock handling and power management in probe
| * 7482120ffd rtc: Fix offset calculation for .start_secs < 0
| * da2ca28629 PCI/DPC: Initialize aer_err_info before using it
| * ec1ea394c4 dmaengine: ti: Add NULL check in udma_probe()
| * a5ce634321 PCI: cadence: Fix runtime atomic count underflow
| * c04df25a25 rtc: sh: assign correct interrupts with DT
| * 291c6f5258 nfs: ignore SB_RDONLY when remounting nfs
| * 332e227fef nfs: clear SB_RDONLY before getting superblock
| * 61679b3028 perf record: Fix incorrect --user-regs comments
| * c7fcf9e0ed perf tests switch-tracking: Fix timestamp comparison
| * 1a583ad86b mfd: stmpe-spi: Correct the name used in MODULE_DEVICE_TABLE
| * c143396ff0 mfd: exynos-lpass: Avoid calling exynos_lpass_disable() twice in exynos_lpass_remove()
| * 7b628065fc rpmsg: qcom_smd: Fix uninitialized return variable in __qcom_smd_send()
| * 2c650229c5 perf scripts python: exported-sql-viewer.py: Fix pattern matching with Python 3
| * 6a56446595 backlight: pm8941: Add NULL check in wled_configure()
| * 3371fb1350 perf ui browser hists: Set actions->thread before calling do_zoom_thread()
| * 3bc34f0eec perf build: Warn when libdebuginfod devel files are not available
| * 610f247f27 fbdev: core: fbcvt: avoid division by 0 in fb_cvt_hperiod()
| * c550999f93 soc: aspeed: Add NULL check in aspeed_lpc_enable_snoop()
| * 40001599f8 soc: aspeed: lpc: Fix impossible judgment condition
| * 5e55095b55 arm64: dts: rockchip: disable unrouted USB controllers and PHY on RK3399 Puma with Haikou
| * 4feede4f15 ARM: dts: qcom: apq8064 merge hw splinlock into corresponding syscon device
| * 3135e03a92 bus: fsl-mc: fix double-free on mc_dev
| * a00d639d74 nilfs2: do not propagate ENOENT error from nilfs_btree_propagate()
| * 46f0103dd4 nilfs2: add pointer check for nilfs_direct_propagate()
| * 549f9e3d7b Squashfs: check return result of sb_min_blocksize
| * 3e11667967 arm64: dts: imx8mm-beacon: Fix RTC capacitive load
| * 1f869b5e74 ARM: dts: at91: at91sam9263: fix NAND chip selects
| * 28aebb0541 ARM: dts: at91: usb_a9263: fix GPIO for Dataflash chip select
| * 8e14d10d40 f2fs: fix to correct check conditions in f2fs_cross_rename
| * 3d623c886d f2fs: use d_inode(dentry) cleanup dentry->d_inode
| * a1e2c76f2b net: phy: mscc: Stop clearing the the UDPv4 checksum for L2 frames
| * 4b9a086eed net: openvswitch: Fix the dead loop of MPLS parse
* | de5b0fcd99 Merge 0c813dbc85 ("calipso: Don't call calipso functions for AF_INET sk.") into android12-5.10-lts
|\|
| * 0c813dbc85 calipso: Don't call calipso functions for AF_INET sk.
| * 8c9b40fe70 net: lan743x: rename lan743x_reset_phy to lan743x_hw_reset_phy
| * 1127327901 net: usb: aqc111: fix error handling of usbnet read calls
| * 005392dd29 netfilter: nft_tunnel: fix geneve_opt dump
| * 09f0961bb0 vfio/type1: Fix error unwind in migration dirty bitmap allocation
| * ba2d46b78c netfilter: nf_tables: nft_fib_ipv6: fix VRF ipv4/ipv6 result discrepancy
| * 0281c19074 wifi: ath9k_htc: Abort software beacon handling if disabled
| * e40131cc85 s390/bpf: Store backchain even for leaf progs
| * 4514a74518 clk: qcom: gcc-msm8939: Fix mclk0 & mclk1 for 24 MHz
| * 147ea936fc bpf: Fix WARN() in get_bpf_raw_tp_regs
| * db5665cbfd pinctrl: at91: Fix possible out-of-boundary access
| * ce1da22526 libbpf: Use proper errno value in nlattr
| * 8baf7abe25 ktls, sockmap: Fix missing uncharge operation
| * 938f625bd3 clk: bcm: rpi: Add NULL check in raspberrypi_clk_register()
| * 26d2f662d3 RDMA/mlx5: Fix error flow upon firmware failure for RQ destruction
| * ccb30b2aa3 netfilter: bridge: Move specific fragmented packet to slow_path instead of dropping it
| * a78a8d86fe f2fs: clean up w/ fscrypt_is_bounce_page()
| * 03a4c0d03e RDMA/hns: Include hnae3.h in hns_roce_hw_v2.h
| * bda3cab478 wifi: rtw88: do not ignore hardware read error during DPK
| * b60d73afc3 net: ncsi: Fix GCPS 64-bit member variables
| * f1b743c195 f2fs: fix to do sanity check on sbi->total_valid_block_count
| * 6c139015b5 wifi: ath11k: fix node corruption in ar->arvifs list
| * cf987b2155 firmware: SDEI: Allow sdei initialization without ACPI_APEI_GHES
| * fb434c9879 drm/tegra: rgb: Fix the unbound reference count
| * 054a65f52f drm/vkms: Adjust vkms_state->active_planes allocation type
| * d75f1d7e5d drm: rcar-du: Fix memory leak in rcar_du_vsps_init()
| * a129d79220 selftests/seccomp: fix syscall_restart test for arm compat
| * e66e522e3e firmware: psci: Fix refcount leak in psci_dt_init
| * 5c3f455dd8 m68k: mac: Fix macintosh_config for Mac II
| * 122df1f227 media: rkvdec: Fix frame size enumeration
| * 7db6c88bb5 drm/vmwgfx: Add seqno waiter for sync_files
| * 4c26a36648 spi: sh-msiof: Fix maximum DMA transfer size
| * 461a495af0 ACPI: OSI: Stop advertising support for "3.0 _SCP Extensions"
| * e5866eb88d x86/mtrr: Check if fixed-range MTRRs exist in mtrr_save_fixed_ranges()
| * c5d675eeba PM: wakeup: Delete space in the end of string shown by pm_show_wakelocks()
| * 3b46ca9182 power: reset: at91-reset: Optimize at91_reset()
| * a6ed3a6edf EDAC/skx_common: Fix general protection fault
| * 58a4cb91ad crypto: sun8i-ce - move fallback ahash_request to the end of the struct
| * 3edeae490b crypto: xts - Only add ecb if it is not already there
| * fee92b8dfa crypto: lrw - Only add ecb if it is not already there
| * b4ee85c074 crypto: marvell/cesa - Avoid empty transfer descriptor
| * c064ae2881 crypto: marvell/cesa - Handle zero-length skcipher requests
| * e94aa1aa6a x86/cpu: Sanitize CPUID(0x80000000) output
| * ee20b48732 crypto: sun8i-ss - do not use sg_dma_len before calling DMA functions
| * 71730eca78 perf/core: Fix broken throttling when max_samples_per_tick=1
| * 15200ea0ff gfs2: gfs2_create_inode error handling fix
| * 6572440f78 netfilter: nft_socket: fix sk refcount leaks
| * 0a3011d47d thunderbolt: Do not double dequeue a configuration request
| * bde4a168f6 usb: usbtmc: Fix timeout value in get_stb
| * ad2259013a usb: storage: Ignore UAS driver for SanDisk 3.2 Gen2 storage device
| * 9a5e02fc07 usb: quirks: Add NO_LPM quirk for SanDisk Extreme 55AE
| * 89b8ff640a acpi-cpufreq: Fix nominal_freq units to KHz in get_max_boost_ratio()
| * 9659656b22 pinctrl: armada-37xx: set GPIO output value before setting direction
| * eb8c443525 pinctrl: armada-37xx: use correct OUTPUT_VAL register for GPIOs > 31
| * 3c735c4470 tracing: Fix compilation warning on arm32
* 0d430a2950 Merge android12-5.10 into android12-5.10-lts

Change-Id: I4fbec7164cea906b132b386f9489b1c320111bfe
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
Greg Kroah-Hartman
2025-07-16 06:42:47 +00:00
354 changed files with 2787 additions and 1279 deletions

View File

@@ -5224,8 +5224,6 @@
Selecting 'on' will also enable the mitigation
against user space to user space task attacks.
Selecting specific mitigation does not force enable
user mitigations.
Selecting 'off' will disable both the kernel and
the user space protections.

View File

@@ -11658,6 +11658,15 @@ F: drivers/scsi/smartpqi/smartpqi*.[ch]
F: include/linux/cciss*.h
F: include/uapi/linux/cciss*.h
MICROSOFT SURFACE HARDWARE PLATFORM SUPPORT
M: Hans de Goede <hdegoede@redhat.com>
M: Mark Gross <mgross@linux.intel.com>
M: Maximilian Luz <luzmaximilian@gmail.com>
L: platform-driver-x86@vger.kernel.org
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86.git
F: drivers/platform/surface/
MICROSOFT SURFACE PRO 3 BUTTON DRIVER
M: Chen Yu <yu.c.chen@intel.com>
L: platform-driver-x86@vger.kernel.org

View File

@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 5
PATCHLEVEL = 10
SUBLEVEL = 238
SUBLEVEL = 239
EXTRAVERSION =
NAME = Dare mighty things
@@ -602,8 +602,7 @@ else
CLANG_FLAGS += -fno-integrated-as
endif
CLANG_FLAGS += -Werror=unknown-warning-option
KBUILD_CFLAGS += $(CLANG_FLAGS)
KBUILD_AFLAGS += $(CLANG_FLAGS)
KBUILD_CPPFLAGS += $(CLANG_FLAGS)
export CLANG_FLAGS
endif
@@ -1099,8 +1098,8 @@ LDFLAGS_vmlinux += --orphan-handling=warn
endif
# Align the bit size of userspace programs with the kernel
KBUILD_USERCFLAGS += $(filter -m32 -m64 --target=%, $(KBUILD_CFLAGS))
KBUILD_USERLDFLAGS += $(filter -m32 -m64 --target=%, $(KBUILD_CFLAGS))
KBUILD_USERCFLAGS += $(filter -m32 -m64 --target=%, $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS))
KBUILD_USERLDFLAGS += $(filter -m32 -m64 --target=%, $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS))
# userspace programs are linked via the compiler, use the correct linker
ifeq ($(CONFIG_CC_IS_CLANG)$(CONFIG_LD_IS_LLD),yy)

View File

@@ -145,6 +145,8 @@
/* MDIO */
AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
/* Added to support GPIO controlled PHY reset */
AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT_PULLUP, MUX_MODE7)
>;
};
@@ -153,6 +155,8 @@
/* MDIO reset value */
AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
/* Added to support GPIO controlled PHY reset */
AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE7)
>;
};
@@ -374,6 +378,10 @@
ethphy0: ethernet-phy@0 {
reg = <0>;
/* Support GPIO reset on revision C3 boards */
reset-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
reset-assert-us = <300>;
reset-deassert-us = <50000>;
};
};

View File

@@ -148,7 +148,7 @@
nand@3 {
reg = <0x3 0x0 0x800000>;
rb-gpios = <&pioA 22 GPIO_ACTIVE_HIGH>;
cs-gpios = <&pioA 15 GPIO_ACTIVE_HIGH>;
cs-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
nand-bus-width = <8>;
nand-ecc-mode = "soft";
nand-on-flash-bbt;

View File

@@ -211,12 +211,6 @@
};
};
sfpb_mutex: hwmutex {
compatible = "qcom,sfpb-mutex";
syscon = <&sfpb_wrapper_mutex 0x604 0x4>;
#hwlock-cells = <1>;
};
smem {
compatible = "qcom,smem";
memory-region = <&smem_region>;
@@ -360,9 +354,10 @@
pinctrl-0 = <&ps_hold>;
};
sfpb_wrapper_mutex: syscon@1200000 {
compatible = "syscon";
reg = <0x01200000 0x8000>;
sfpb_mutex: hwmutex@1200600 {
compatible = "qcom,sfpb-mutex";
reg = <0x01200600 0x100>;
#hwlock-cells = <1>;
};
intc: interrupt-controller@2000000 {

View File

@@ -64,7 +64,7 @@
nand@3 {
reg = <0x3 0x0 0x800000>;
rb-gpios = <&pioA 22 GPIO_ACTIVE_HIGH>;
cs-gpios = <&pioA 15 GPIO_ACTIVE_HIGH>;
cs-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
nand-bus-width = <8>;
nand-ecc-mode = "soft";
nand-on-flash-bbt;

View File

@@ -58,7 +58,7 @@
};
spi0: spi@fffa4000 {
cs-gpios = <&pioB 15 GPIO_ACTIVE_HIGH>;
cs-gpios = <&pioA 5 GPIO_ACTIVE_LOW>;
status = "okay";
mtd_dataflash@0 {
compatible = "atmel,at45", "atmel,dataflash";
@@ -84,7 +84,7 @@
nand@3 {
reg = <0x3 0x0 0x800000>;
rb-gpios = <&pioA 22 GPIO_ACTIVE_HIGH>;
cs-gpios = <&pioA 15 GPIO_ACTIVE_HIGH>;
cs-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
nand-bus-width = <8>;
nand-ecc-mode = "soft";
nand-on-flash-bbt;

View File

@@ -48,6 +48,7 @@
#define CLKDM_NO_AUTODEPS (1 << 4)
#define CLKDM_ACTIVE_WITH_MPU (1 << 5)
#define CLKDM_MISSING_IDLE_REPORTING (1 << 6)
#define CLKDM_STANDBY_FORCE_WAKEUP BIT(7)
#define CLKDM_CAN_HWSUP (CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_DISABLE_AUTO)
#define CLKDM_CAN_SWSUP (CLKDM_CAN_FORCE_SLEEP | CLKDM_CAN_FORCE_WAKEUP)

View File

@@ -27,7 +27,7 @@ static struct clockdomain l4ls_am33xx_clkdm = {
.pwrdm = { .name = "per_pwrdm" },
.cm_inst = AM33XX_CM_PER_MOD,
.clkdm_offs = AM33XX_CM_PER_L4LS_CLKSTCTRL_OFFSET,
.flags = CLKDM_CAN_SWSUP,
.flags = CLKDM_CAN_SWSUP | CLKDM_STANDBY_FORCE_WAKEUP,
};
static struct clockdomain l3s_am33xx_clkdm = {

View File

@@ -28,6 +28,9 @@
#include "cm-regbits-34xx.h"
#include "cm-regbits-33xx.h"
#include "prm33xx.h"
#if IS_ENABLED(CONFIG_SUSPEND)
#include <linux/suspend.h>
#endif
/*
* CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield:
@@ -336,8 +339,17 @@ static int am33xx_clkdm_clk_disable(struct clockdomain *clkdm)
{
bool hwsup = false;
#if IS_ENABLED(CONFIG_SUSPEND)
/*
* In case of standby, Don't put the l4ls clk domain to sleep.
* Since CM3 PM FW doesn't wake-up/enable the l4ls clk domain
* upon wake-up, CM3 PM FW fails to wake-up th MPU.
*/
if (pm_suspend_target_state == PM_SUSPEND_STANDBY &&
(clkdm->flags & CLKDM_STANDBY_FORCE_WAKEUP))
return 0;
#endif
hwsup = am33xx_cm_is_clkdm_in_hwsup(clkdm->cm_inst, clkdm->clkdm_offs);
if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP))
am33xx_clkdm_sleep(clkdm);

View File

@@ -264,7 +264,11 @@ int __init omap4_cpcap_init(void)
static int __init cpcap_late_init(void)
{
omap4_vc_set_pmic_signaling(PWRDM_POWER_RET);
if (!of_find_compatible_node(NULL, NULL, "motorola,cpcap"))
return 0;
if (soc_is_omap443x() || soc_is_omap446x() || soc_is_omap447x())
omap4_vc_set_pmic_signaling(PWRDM_POWER_RET);
return 0;
}

View File

@@ -483,7 +483,5 @@ void __init early_ioremap_init(void)
bool arch_memremap_can_ram_remap(resource_size_t offset, size_t size,
unsigned long flags)
{
unsigned long pfn = PHYS_PFN(offset);
return memblock_is_map_memory(pfn);
return memblock_is_map_memory(offset);
}

View File

@@ -194,6 +194,7 @@
rtc@51 {
compatible = "nxp,pcf85263";
reg = <0x51>;
quartz-load-femtofarads = <12500>;
};
};

View File

@@ -246,14 +246,6 @@
status = "okay";
};
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};
&vopb {
status = "okay";
};

View File

@@ -268,6 +268,8 @@
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
ti,clkbuf-sel = <0x7>;
ti,trm-icp = <0x8>;
ti,otap-del-sel-legacy = <0x0>;
ti,otap-del-sel-mmc-hs = <0x0>;
ti,otap-del-sel-sd-hs = <0x0>;
@@ -278,8 +280,9 @@
ti,otap-del-sel-ddr50 = <0x5>;
ti,otap-del-sel-ddr52 = <0x5>;
ti,otap-del-sel-hs200 = <0x5>;
ti,otap-del-sel-hs400 = <0x0>;
ti,trm-icp = <0x8>;
ti,itap-del-sel-legacy = <0xa>;
ti,itap-del-sel-mmc-hs = <0x1>;
ti,itap-del-sel-ddr52 = <0x0>;
dma-coherent;
};
@@ -290,19 +293,22 @@
clocks = <&k3_clks 48 0>, <&k3_clks 48 1>;
clock-names = "clk_ahb", "clk_xin";
interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
ti,clkbuf-sel = <0x7>;
ti,trm-icp = <0x8>;
ti,otap-del-sel-legacy = <0x0>;
ti,otap-del-sel-mmc-hs = <0x0>;
ti,otap-del-sel-sd-hs = <0x0>;
ti,otap-del-sel-sdr12 = <0x0>;
ti,otap-del-sel-sdr25 = <0x0>;
ti,otap-del-sel-sdr12 = <0xf>;
ti,otap-del-sel-sdr25 = <0xf>;
ti,otap-del-sel-sdr50 = <0x8>;
ti,otap-del-sel-sdr104 = <0x7>;
ti,otap-del-sel-ddr50 = <0x4>;
ti,otap-del-sel-ddr52 = <0x4>;
ti,otap-del-sel-hs200 = <0x7>;
ti,clkbuf-sel = <0x7>;
ti,otap-del-sel = <0x2>;
ti,trm-icp = <0x8>;
ti,itap-del-sel-legacy = <0xa>;
ti,itap-del-sel-sd-hs = <0x1>;
ti,itap-del-sel-sdr12 = <0xa>;
ti,itap-del-sel-sdr25 = <0x1>;
dma-coherent;
no-1-8-v;
};

View File

@@ -34,18 +34,6 @@
*/
#define BREAK_INSTR_SIZE AARCH64_INSN_SIZE
/*
* BRK instruction encoding
* The #imm16 value should be placed at bits[20:5] within BRK ins
*/
#define AARCH64_BREAK_MON 0xd4200000
/*
* BRK instruction for provoking a fault on purpose
* Unlike kgdb, #imm16 value with unallocated handler is used for faulting.
*/
#define AARCH64_BREAK_FAULT (AARCH64_BREAK_MON | (FAULT_BRK_IMM << 5))
#define AARCH64_BREAK_KGDB_DYN_DBG \
(AARCH64_BREAK_MON | (KGDB_DYN_DBG_BRK_IMM << 5))

View File

@@ -9,9 +9,22 @@
#define __ASM_INSN_H
#include <linux/build_bug.h>
#include <linux/types.h>
#include <asm/brk-imm.h>
#include <asm/alternative.h>
/*
* BRK instruction encoding
* The #imm16 value should be placed at bits[20:5] within BRK ins
*/
#define AARCH64_BREAK_MON 0xd4200000
/*
* BRK instruction for provoking a fault on purpose
* Unlike kgdb, #imm16 value with unallocated handler is used for faulting.
*/
#define AARCH64_BREAK_FAULT (AARCH64_BREAK_MON | (FAULT_BRK_IMM << 5))
#ifndef __ASSEMBLY__
/*
* ARM Architecture Reference Manual for ARMv8 Profile-A, Issue A.a
@@ -205,7 +218,9 @@ enum aarch64_insn_ldst_type {
AARCH64_INSN_LDST_LOAD_PAIR_POST_INDEX,
AARCH64_INSN_LDST_STORE_PAIR_POST_INDEX,
AARCH64_INSN_LDST_LOAD_EX,
AARCH64_INSN_LDST_LOAD_ACQ_EX,
AARCH64_INSN_LDST_STORE_EX,
AARCH64_INSN_LDST_STORE_REL_EX,
};
enum aarch64_insn_adsb_type {
@@ -280,6 +295,36 @@ enum aarch64_insn_adr_type {
AARCH64_INSN_ADR_TYPE_ADR,
};
enum aarch64_insn_mem_atomic_op {
AARCH64_INSN_MEM_ATOMIC_ADD,
AARCH64_INSN_MEM_ATOMIC_CLR,
AARCH64_INSN_MEM_ATOMIC_EOR,
AARCH64_INSN_MEM_ATOMIC_SET,
AARCH64_INSN_MEM_ATOMIC_SWP,
};
enum aarch64_insn_mem_order_type {
AARCH64_INSN_MEM_ORDER_NONE,
AARCH64_INSN_MEM_ORDER_ACQ,
AARCH64_INSN_MEM_ORDER_REL,
AARCH64_INSN_MEM_ORDER_ACQREL,
};
enum aarch64_insn_mb_type {
AARCH64_INSN_MB_SY,
AARCH64_INSN_MB_ST,
AARCH64_INSN_MB_LD,
AARCH64_INSN_MB_ISH,
AARCH64_INSN_MB_ISHST,
AARCH64_INSN_MB_ISHLD,
AARCH64_INSN_MB_NSH,
AARCH64_INSN_MB_NSHST,
AARCH64_INSN_MB_NSHLD,
AARCH64_INSN_MB_OSH,
AARCH64_INSN_MB_OSHST,
AARCH64_INSN_MB_OSHLD,
};
#define __AARCH64_INSN_FUNCS(abbr, mask, val) \
static __always_inline bool aarch64_insn_is_##abbr(u32 code) \
{ \
@@ -297,6 +342,11 @@ __AARCH64_INSN_FUNCS(prfm, 0x3FC00000, 0x39800000)
__AARCH64_INSN_FUNCS(prfm_lit, 0xFF000000, 0xD8000000)
__AARCH64_INSN_FUNCS(str_reg, 0x3FE0EC00, 0x38206800)
__AARCH64_INSN_FUNCS(ldadd, 0x3F20FC00, 0x38200000)
__AARCH64_INSN_FUNCS(ldclr, 0x3F20FC00, 0x38201000)
__AARCH64_INSN_FUNCS(ldeor, 0x3F20FC00, 0x38202000)
__AARCH64_INSN_FUNCS(ldset, 0x3F20FC00, 0x38203000)
__AARCH64_INSN_FUNCS(swp, 0x3F20FC00, 0x38208000)
__AARCH64_INSN_FUNCS(cas, 0x3FA07C00, 0x08A07C00)
__AARCH64_INSN_FUNCS(ldr_reg, 0x3FE0EC00, 0x38606800)
__AARCH64_INSN_FUNCS(ldr_lit, 0xBF000000, 0x18000000)
__AARCH64_INSN_FUNCS(ldrsw_lit, 0xFF000000, 0x98000000)
@@ -369,6 +419,14 @@ __AARCH64_INSN_FUNCS(eret_auth, 0xFFFFFBFF, 0xD69F0BFF)
__AARCH64_INSN_FUNCS(mrs, 0xFFF00000, 0xD5300000)
__AARCH64_INSN_FUNCS(msr_imm, 0xFFF8F01F, 0xD500401F)
__AARCH64_INSN_FUNCS(msr_reg, 0xFFF00000, 0xD5100000)
__AARCH64_INSN_FUNCS(dmb, 0xFFFFF0FF, 0xD50330BF)
__AARCH64_INSN_FUNCS(dsb_base, 0xFFFFF0FF, 0xD503309F)
__AARCH64_INSN_FUNCS(dsb_nxs, 0xFFFFF3FF, 0xD503323F)
__AARCH64_INSN_FUNCS(isb, 0xFFFFF0FF, 0xD50330DF)
__AARCH64_INSN_FUNCS(sb, 0xFFFFFFFF, 0xD50330FF)
__AARCH64_INSN_FUNCS(clrex, 0xFFFFF0FF, 0xD503305F)
__AARCH64_INSN_FUNCS(ssbb, 0xFFFFFFFF, 0xD503309F)
__AARCH64_INSN_FUNCS(pssbb, 0xFFFFFFFF, 0xD503349F)
#undef __AARCH64_INSN_FUNCS
@@ -380,6 +438,19 @@ static inline bool aarch64_insn_is_adr_adrp(u32 insn)
return aarch64_insn_is_adr(insn) || aarch64_insn_is_adrp(insn);
}
static inline bool aarch64_insn_is_dsb(u32 insn)
{
return aarch64_insn_is_dsb_base(insn) || aarch64_insn_is_dsb_nxs(insn);
}
static inline bool aarch64_insn_is_barrier(u32 insn)
{
return aarch64_insn_is_dmb(insn) || aarch64_insn_is_dsb(insn) ||
aarch64_insn_is_isb(insn) || aarch64_insn_is_sb(insn) ||
aarch64_insn_is_clrex(insn) || aarch64_insn_is_ssbb(insn) ||
aarch64_insn_is_pssbb(insn);
}
int aarch64_insn_read(void *addr, u32 *insnp);
int aarch64_insn_write(void *addr, u32 insn);
enum aarch64_insn_encoding_class aarch64_get_insn_class(u32 insn);
@@ -418,13 +489,6 @@ u32 aarch64_insn_gen_load_store_ex(enum aarch64_insn_register reg,
enum aarch64_insn_register state,
enum aarch64_insn_size_type size,
enum aarch64_insn_ldst_type type);
u32 aarch64_insn_gen_ldadd(enum aarch64_insn_register result,
enum aarch64_insn_register address,
enum aarch64_insn_register value,
enum aarch64_insn_size_type size);
u32 aarch64_insn_gen_stadd(enum aarch64_insn_register address,
enum aarch64_insn_register value,
enum aarch64_insn_size_type size);
u32 aarch64_insn_gen_add_sub_imm(enum aarch64_insn_register dst,
enum aarch64_insn_register src,
int imm, enum aarch64_insn_variant variant,
@@ -485,6 +549,43 @@ u32 aarch64_insn_gen_prefetch(enum aarch64_insn_register base,
enum aarch64_insn_prfm_type type,
enum aarch64_insn_prfm_target target,
enum aarch64_insn_prfm_policy policy);
#ifdef CONFIG_ARM64_LSE_ATOMICS
u32 aarch64_insn_gen_atomic_ld_op(enum aarch64_insn_register result,
enum aarch64_insn_register address,
enum aarch64_insn_register value,
enum aarch64_insn_size_type size,
enum aarch64_insn_mem_atomic_op op,
enum aarch64_insn_mem_order_type order);
u32 aarch64_insn_gen_cas(enum aarch64_insn_register result,
enum aarch64_insn_register address,
enum aarch64_insn_register value,
enum aarch64_insn_size_type size,
enum aarch64_insn_mem_order_type order);
#else
static inline
u32 aarch64_insn_gen_atomic_ld_op(enum aarch64_insn_register result,
enum aarch64_insn_register address,
enum aarch64_insn_register value,
enum aarch64_insn_size_type size,
enum aarch64_insn_mem_atomic_op op,
enum aarch64_insn_mem_order_type order)
{
return AARCH64_BREAK_FAULT;
}
static inline
u32 aarch64_insn_gen_cas(enum aarch64_insn_register result,
enum aarch64_insn_register address,
enum aarch64_insn_register value,
enum aarch64_insn_size_type size,
enum aarch64_insn_mem_order_type order)
{
return AARCH64_BREAK_FAULT;
}
#endif
u32 aarch64_insn_gen_dmb(enum aarch64_insn_mb_type type);
u32 aarch64_insn_gen_dsb(enum aarch64_insn_mb_type type);
s32 aarch64_get_branch_offset(u32 insn);
u32 aarch64_set_branch_offset(u32 insn, s32 offset);

View File

@@ -5,6 +5,7 @@
*
* Copyright (C) 2014-2016 Zi Shen Lim <zlim.lnx@gmail.com>
*/
#include <linux/bitfield.h>
#include <linux/bitops.h>
#include <linux/bug.h>
#include <linux/compiler.h>
@@ -721,10 +722,16 @@ u32 aarch64_insn_gen_load_store_ex(enum aarch64_insn_register reg,
switch (type) {
case AARCH64_INSN_LDST_LOAD_EX:
case AARCH64_INSN_LDST_LOAD_ACQ_EX:
insn = aarch64_insn_get_load_ex_value();
if (type == AARCH64_INSN_LDST_LOAD_ACQ_EX)
insn |= BIT(15);
break;
case AARCH64_INSN_LDST_STORE_EX:
case AARCH64_INSN_LDST_STORE_REL_EX:
insn = aarch64_insn_get_store_ex_value();
if (type == AARCH64_INSN_LDST_STORE_REL_EX)
insn |= BIT(15);
break;
default:
pr_err("%s: unknown load/store exclusive encoding %d\n", __func__, type);
@@ -746,12 +753,65 @@ u32 aarch64_insn_gen_load_store_ex(enum aarch64_insn_register reg,
state);
}
u32 aarch64_insn_gen_ldadd(enum aarch64_insn_register result,
enum aarch64_insn_register address,
enum aarch64_insn_register value,
enum aarch64_insn_size_type size)
#ifdef CONFIG_ARM64_LSE_ATOMICS
static u32 aarch64_insn_encode_ldst_order(enum aarch64_insn_mem_order_type type,
u32 insn)
{
u32 insn = aarch64_insn_get_ldadd_value();
u32 order;
switch (type) {
case AARCH64_INSN_MEM_ORDER_NONE:
order = 0;
break;
case AARCH64_INSN_MEM_ORDER_ACQ:
order = 2;
break;
case AARCH64_INSN_MEM_ORDER_REL:
order = 1;
break;
case AARCH64_INSN_MEM_ORDER_ACQREL:
order = 3;
break;
default:
pr_err("%s: unknown mem order %d\n", __func__, type);
return AARCH64_BREAK_FAULT;
}
insn &= ~GENMASK(23, 22);
insn |= order << 22;
return insn;
}
u32 aarch64_insn_gen_atomic_ld_op(enum aarch64_insn_register result,
enum aarch64_insn_register address,
enum aarch64_insn_register value,
enum aarch64_insn_size_type size,
enum aarch64_insn_mem_atomic_op op,
enum aarch64_insn_mem_order_type order)
{
u32 insn;
switch (op) {
case AARCH64_INSN_MEM_ATOMIC_ADD:
insn = aarch64_insn_get_ldadd_value();
break;
case AARCH64_INSN_MEM_ATOMIC_CLR:
insn = aarch64_insn_get_ldclr_value();
break;
case AARCH64_INSN_MEM_ATOMIC_EOR:
insn = aarch64_insn_get_ldeor_value();
break;
case AARCH64_INSN_MEM_ATOMIC_SET:
insn = aarch64_insn_get_ldset_value();
break;
case AARCH64_INSN_MEM_ATOMIC_SWP:
insn = aarch64_insn_get_swp_value();
break;
default:
pr_err("%s: unimplemented mem atomic op %d\n", __func__, op);
return AARCH64_BREAK_FAULT;
}
switch (size) {
case AARCH64_INSN_SIZE_32:
@@ -764,6 +824,8 @@ u32 aarch64_insn_gen_ldadd(enum aarch64_insn_register result,
insn = aarch64_insn_encode_ldst_size(size, insn);
insn = aarch64_insn_encode_ldst_order(order, insn);
insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RT, insn,
result);
@@ -774,18 +836,69 @@ u32 aarch64_insn_gen_ldadd(enum aarch64_insn_register result,
value);
}
u32 aarch64_insn_gen_stadd(enum aarch64_insn_register address,
enum aarch64_insn_register value,
enum aarch64_insn_size_type size)
static u32 aarch64_insn_encode_cas_order(enum aarch64_insn_mem_order_type type,
u32 insn)
{
/*
* STADD is simply encoded as an alias for LDADD with XZR as
* the destination register.
*/
return aarch64_insn_gen_ldadd(AARCH64_INSN_REG_ZR, address,
value, size);
u32 order;
switch (type) {
case AARCH64_INSN_MEM_ORDER_NONE:
order = 0;
break;
case AARCH64_INSN_MEM_ORDER_ACQ:
order = BIT(22);
break;
case AARCH64_INSN_MEM_ORDER_REL:
order = BIT(15);
break;
case AARCH64_INSN_MEM_ORDER_ACQREL:
order = BIT(15) | BIT(22);
break;
default:
pr_err("%s: unknown mem order %d\n", __func__, type);
return AARCH64_BREAK_FAULT;
}
insn &= ~(BIT(15) | BIT(22));
insn |= order;
return insn;
}
u32 aarch64_insn_gen_cas(enum aarch64_insn_register result,
enum aarch64_insn_register address,
enum aarch64_insn_register value,
enum aarch64_insn_size_type size,
enum aarch64_insn_mem_order_type order)
{
u32 insn;
switch (size) {
case AARCH64_INSN_SIZE_32:
case AARCH64_INSN_SIZE_64:
break;
default:
pr_err("%s: unimplemented size encoding %d\n", __func__, size);
return AARCH64_BREAK_FAULT;
}
insn = aarch64_insn_get_cas_value();
insn = aarch64_insn_encode_ldst_size(size, insn);
insn = aarch64_insn_encode_cas_order(order, insn);
insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RT, insn,
result);
insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RN, insn,
address);
return aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RS, insn,
value);
}
#endif
static u32 aarch64_insn_encode_prfm_imm(enum aarch64_insn_prfm_type type,
enum aarch64_insn_prfm_target target,
enum aarch64_insn_prfm_policy policy,
@@ -1697,3 +1810,61 @@ u32 aarch64_insn_gen_extr(enum aarch64_insn_variant variant,
insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RN, insn, Rn);
return aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RM, insn, Rm);
}
static u32 __get_barrier_crm_val(enum aarch64_insn_mb_type type)
{
switch (type) {
case AARCH64_INSN_MB_SY:
return 0xf;
case AARCH64_INSN_MB_ST:
return 0xe;
case AARCH64_INSN_MB_LD:
return 0xd;
case AARCH64_INSN_MB_ISH:
return 0xb;
case AARCH64_INSN_MB_ISHST:
return 0xa;
case AARCH64_INSN_MB_ISHLD:
return 0x9;
case AARCH64_INSN_MB_NSH:
return 0x7;
case AARCH64_INSN_MB_NSHST:
return 0x6;
case AARCH64_INSN_MB_NSHLD:
return 0x5;
default:
pr_err("%s: unknown barrier type %d\n", __func__, type);
return AARCH64_BREAK_FAULT;
}
}
u32 aarch64_insn_gen_dmb(enum aarch64_insn_mb_type type)
{
u32 opt;
u32 insn;
opt = __get_barrier_crm_val(type);
if (opt == AARCH64_BREAK_FAULT)
return AARCH64_BREAK_FAULT;
insn = aarch64_insn_get_dmb_value();
insn &= ~GENMASK(11, 8);
insn |= (opt << 8);
return insn;
}
u32 aarch64_insn_gen_dsb(enum aarch64_insn_mb_type type)
{
u32 opt, insn;
opt = __get_barrier_crm_val(type);
if (opt == AARCH64_BREAK_FAULT)
return AARCH64_BREAK_FAULT;
insn = aarch64_insn_get_dsb_base_value();
insn &= ~GENMASK(11, 8);
insn |= (opt << 8);
return insn;
}

View File

@@ -142,7 +142,7 @@ unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n)
addr += n;
if (regs_within_kernel_stack(regs, (unsigned long)addr))
return *addr;
return READ_ONCE_NOCHECK(*addr);
else
return 0;
}

View File

@@ -89,9 +89,16 @@
#define A64_STXR(sf, Rt, Rn, Rs) \
A64_LSX(sf, Rt, Rn, Rs, STORE_EX)
/* LSE atomics */
/*
* LSE atomics
*
* STADD is simply encoded as an alias for LDADD with XZR as
* the destination register.
*/
#define A64_STADD(sf, Rn, Rs) \
aarch64_insn_gen_stadd(Rn, Rs, A64_SIZE(sf))
aarch64_insn_gen_atomic_ld_op(A64_ZR, Rn, Rs, \
A64_SIZE(sf), AARCH64_INSN_MEM_ATOMIC_ADD, \
AARCH64_INSN_MEM_ORDER_NONE)
/* Add/subtract (immediate) */
#define A64_ADDSUB_IMM(sf, Rd, Rn, imm12, type) \

View File

@@ -84,7 +84,26 @@ HYPERCALL1(tmem_op);
HYPERCALL1(platform_op_raw);
HYPERCALL2(multicall);
HYPERCALL2(vm_assist);
HYPERCALL3(dm_op);
SYM_FUNC_START(HYPERVISOR_dm_op)
mov x16, #__HYPERVISOR_dm_op; \
/*
* dm_op hypercalls are issued by the userspace. The kernel needs to
* enable access to TTBR0_EL1 as the hypervisor would issue stage 1
* translations to user memory via AT instructions. Since AT
* instructions are not affected by the PAN bit (ARMv8.1), we only
* need the explicit uaccess_enable/disable if the TTBR0 PAN emulation
* is enabled (it implies that hardware UAO and PAN disabled).
*/
uaccess_ttbr0_enable x6, x7, x8
hvc XEN_IMM
/*
* Disable userspace access from kernel once the hyp call completed.
*/
uaccess_ttbr0_disable x6, x7
ret
SYM_FUNC_END(HYPERVISOR_dm_op);
SYM_FUNC_START(privcmd_call)
mov x16, x0

View File

@@ -800,7 +800,7 @@ static void __init mac_identify(void)
}
macintosh_config = mac_data_table;
for (m = macintosh_config; m->ident != -1; m++) {
for (m = &mac_data_table[1]; m->ident != -1; m++) {
if (m->ident == model) {
macintosh_config = m;
break;

View File

@@ -110,7 +110,7 @@ endif
# (specifically newer than 2.24.51.20140728) we then also need to explicitly
# set ".set hardfloat" in all files which manipulate floating point registers.
#
ifneq ($(call as-option,-Wa$(comma)-msoft-float,),)
ifneq ($(call cc-option,$(cflags-y) -Wa$(comma)-msoft-float,),)
cflags-y += -DGAS_HAS_SET_HARDFLOAT -Wa,-msoft-float
endif
@@ -153,7 +153,7 @@ cflags-y += -fno-stack-check
#
# Avoid this by explicitly disabling that assembler behaviour.
#
cflags-y += $(call as-option,-Wa$(comma)-mno-fix-loongson3-llsc,)
cflags-y += $(call cc-option,-Wa$(comma)-mno-fix-loongson3-llsc,)
#
# CPU-dependent compiler/assembler options for optimization.
@@ -319,7 +319,7 @@ KBUILD_CFLAGS += -fno-asynchronous-unwind-tables
KBUILD_LDFLAGS += -m $(ld-emul)
ifdef CONFIG_MIPS
CHECKFLAGS += $(shell $(CC) $(KBUILD_CFLAGS) -dM -E -x c /dev/null | \
CHECKFLAGS += $(shell $(CC) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) -dM -E -x c /dev/null | \
egrep -vw '__GNUC_(MINOR_|PATCHLEVEL_)?_' | \
sed -e "s/^\#define /-D'/" -e "s/ /'='/" -e "s/$$/'/" -e 's/\$$/&&/g')
endif

View File

@@ -29,6 +29,7 @@
compatible = "loongson,pch-msi-1.0";
reg = <0 0x2ff00000 0 0x8>;
interrupt-controller;
#interrupt-cells = <1>;
msi-controller;
loongson,msi-base-vec = <64>;
loongson,msi-num-vecs = <64>;

View File

@@ -28,7 +28,7 @@ cflags-$(CONFIG_CPU_LOONGSON2F) += \
# binutils does not merge support for the flag then we can revisit & remove
# this later - for now it ensures vendor toolchains don't cause problems.
#
cflags-$(CONFIG_CPU_LOONGSON2EF) += $(call as-option,-Wa$(comma)-mno-fix-loongson3-llsc,)
cflags-$(CONFIG_CPU_LOONGSON2EF) += $(call cc-option,-Wa$(comma)-mno-fix-loongson3-llsc,)
# Enable the workarounds for Loongson2f
ifdef CONFIG_CPU_LOONGSON2F_WORKAROUNDS

View File

@@ -29,6 +29,7 @@ endif
# offsets.
cflags-vdso := $(ccflags-vdso) \
$(filter -W%,$(filter-out -Wa$(comma)%,$(KBUILD_CFLAGS))) \
$(filter -std=%,$(KBUILD_CFLAGS)) \
-O3 -g -fPIC -fno-strict-aliasing -fno-common -fno-builtin -G 0 \
-mrelax-pic-calls $(call cc-option, -mexplicit-relocs) \
-fno-stack-protector -fno-jump-tables -DDISABLE_BRANCH_PROFILING \

View File

@@ -277,4 +277,20 @@ extern void __init mmu_init(void);
extern void update_mmu_cache(struct vm_area_struct *vma,
unsigned long address, pte_t *pte);
static inline int pte_same(pte_t pte_a, pte_t pte_b);
#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
static inline int ptep_set_access_flags(struct vm_area_struct *vma,
unsigned long address, pte_t *ptep,
pte_t entry, int dirty)
{
if (!pte_same(*ptep, entry))
set_ptes(vma->vm_mm, address, ptep, entry, 1);
/*
* update_mmu_cache will unconditionally execute, handling both
* the case that the PTE changed and the spurious fault case.
*/
return true;
}
#endif /* _ASM_NIOS2_PGTABLE_H */

View File

@@ -22,6 +22,7 @@ KBUILD_CFLAGS += -fno-PIE -mno-space-regs -mdisable-fpregs -Os
ifndef CONFIG_64BIT
KBUILD_CFLAGS += -mfast-indirect-calls
endif
KBUILD_CFLAGS += -std=gnu11
OBJECTS += $(obj)/head.o $(obj)/real2.o $(obj)/firmware.o $(obj)/misc.o $(obj)/piggy.o

View File

@@ -162,6 +162,9 @@ int vas_copy_crb(void *crb, int offset);
*/
int vas_paste_crb(struct vas_window *win, int offset, bool re);
void vas_win_paste_addr(struct vas_window *window, u64 *addr,
int *len);
/*
* Register / unregister coprocessor type to VAS API which will be exported
* to user space. Applications can use this API to open / close window

View File

@@ -1525,6 +1525,8 @@ int eeh_pe_configure(struct eeh_pe *pe)
/* Invalid PE ? */
if (!pe)
return -ENODEV;
else
ret = eeh_ops->configure_bridge(pe);
return ret;
}

View File

@@ -20,6 +20,7 @@ source "arch/powerpc/platforms/embedded6xx/Kconfig"
source "arch/powerpc/platforms/44x/Kconfig"
source "arch/powerpc/platforms/40x/Kconfig"
source "arch/powerpc/platforms/amigaone/Kconfig"
source "arch/powerpc/platforms/book3s/Kconfig"
config KVM_GUEST
bool "KVM Guest support"

View File

@@ -22,3 +22,4 @@ obj-$(CONFIG_PPC_CELL) += cell/
obj-$(CONFIG_PPC_PS3) += ps3/
obj-$(CONFIG_EMBEDDED6xx) += embedded6xx/
obj-$(CONFIG_AMIGAONE) += amigaone/
obj-$(CONFIG_PPC_BOOK3S) += book3s/

View File

@@ -0,0 +1,15 @@
# SPDX-License-Identifier: GPL-2.0
config PPC_VAS
bool "IBM Virtual Accelerator Switchboard (VAS)"
depends on (PPC_POWERNV || PPC_PSERIES) && PPC_64K_PAGES
default y
help
This enables support for IBM Virtual Accelerator Switchboard (VAS).
VAS devices are found in POWER9-based and later systems, they
provide access to accelerator coprocessors such as NX-GZIP and
NX-842. This config allows the kernel to use NX-842 accelerators,
and user-mode APIs for the NX-GZIP accelerator on POWER9 PowerNV
and POWER10 PowerVM platforms.
If unsure, say "N".

View File

@@ -0,0 +1,2 @@
# SPDX-License-Identifier: GPL-2.0-only
obj-$(CONFIG_PPC_VAS) += vas-api.o

View File

@@ -10,9 +10,9 @@
#include <linux/fs.h>
#include <linux/slab.h>
#include <linux/uaccess.h>
#include <linux/io.h>
#include <asm/vas.h>
#include <uapi/asm/vas-api.h>
#include "vas.h"
/*
* The driver creates the device node that can be used as follows:
@@ -162,6 +162,15 @@ static int coproc_mmap(struct file *fp, struct vm_area_struct *vma)
return -EINVAL;
}
/*
* Map complete page to the paste address. So the user
* space should pass 0ULL to the offset parameter.
*/
if (vma->vm_pgoff) {
pr_debug("Page offset unsupported to map paste address\n");
return -EINVAL;
}
/* Ensure instance has an open send window */
if (!txwin) {
pr_err("%s(): No send window open?\n", __func__);

View File

@@ -33,20 +33,6 @@ config PPC_MEMTRACE
Enabling this option allows for the removal of memory (RAM)
from the kernel mappings to be used for hardware tracing.
config PPC_VAS
bool "IBM Virtual Accelerator Switchboard (VAS)"
depends on PPC_POWERNV && PPC_64K_PAGES
default y
help
This enables support for IBM Virtual Accelerator Switchboard (VAS).
VAS allows accelerators in co-processors like NX-GZIP and NX-842
to be accessible to kernel subsystems and user processes.
VAS adapters are found in POWER9 based systems.
If unsure, say N.
config SCOM_DEBUGFS
bool "Expose SCOM controllers via debugfs"
depends on DEBUG_FS

View File

@@ -18,7 +18,7 @@ obj-$(CONFIG_MEMORY_FAILURE) += opal-memory-errors.o
obj-$(CONFIG_OPAL_PRD) += opal-prd.o
obj-$(CONFIG_PERF_EVENTS) += opal-imc.o
obj-$(CONFIG_PPC_MEMTRACE) += memtrace.o
obj-$(CONFIG_PPC_VAS) += vas.o vas-window.o vas-debug.o vas-fault.o vas-api.o
obj-$(CONFIG_PPC_VAS) += vas.o vas-window.o vas-debug.o vas-fault.o
obj-$(CONFIG_OCXL_BASE) += ocxl.o
obj-$(CONFIG_SCOM_DEBUGFS) += opal-xscom.o
obj-$(CONFIG_PPC_SECURE_BOOT) += opal-secvar.o

View File

@@ -437,8 +437,6 @@ extern irqreturn_t vas_fault_handler(int irq, void *dev_id);
extern void vas_return_credit(struct vas_window *window, bool tx);
extern struct vas_window *vas_pswid_to_window(struct vas_instance *vinst,
uint32_t pswid);
extern void vas_win_paste_addr(struct vas_window *window, u64 *addr,
int *len);
static inline int vas_window_pid(struct vas_window *window)
{

View File

@@ -543,17 +543,15 @@ static void bpf_jit_prologue(struct bpf_jit *jit, u32 stack_depth)
}
/* Setup stack and backchain */
if (is_first_pass(jit) || (jit->seen & SEEN_STACK)) {
if (is_first_pass(jit) || (jit->seen & SEEN_FUNC))
/* lgr %w1,%r15 (backchain) */
EMIT4(0xb9040000, REG_W1, REG_15);
/* lgr %w1,%r15 (backchain) */
EMIT4(0xb9040000, REG_W1, REG_15);
/* la %bfp,STK_160_UNUSED(%r15) (BPF frame pointer) */
EMIT4_DISP(0x41000000, BPF_REG_FP, REG_15, STK_160_UNUSED);
/* aghi %r15,-STK_OFF */
EMIT4_IMM(0xa70b0000, REG_15, -(STK_OFF + stack_depth));
if (is_first_pass(jit) || (jit->seen & SEEN_FUNC))
/* stg %w1,152(%r15) (backchain) */
EMIT6_DISP_LH(0xe3000000, 0x0024, REG_W1, REG_0,
REG_15, 152);
/* stg %w1,152(%r15) (backchain) */
EMIT6_DISP_LH(0xe3000000, 0x0024, REG_W1, REG_0,
REG_15, 152);
}
}

View File

@@ -229,7 +229,7 @@ static inline int __pcilg_mio_inuser(
:
[cc] "+d" (cc), [val] "=d" (val), [len] "+d" (len),
[dst] "+a" (dst), [cnt] "+d" (cnt), [tmp] "=d" (tmp),
[shift] "+d" (shift)
[shift] "+a" (shift)
:
[ioaddr] "a" (addr)
: "cc", "memory");

View File

@@ -49,7 +49,7 @@ KBUILD_CFLAGS += $(call cc-option,-fmacro-prefix-map=$(srctree)/=)
KBUILD_CFLAGS += -fno-asynchronous-unwind-tables
KBUILD_CFLAGS += -D__DISABLE_EXPORTS
# Disable relocation relaxation in case the link is not PIE.
KBUILD_CFLAGS += $(call as-option,-Wa$(comma)-mrelax-relocations=no)
KBUILD_CFLAGS += $(call cc-option,-Wa$(comma)-mrelax-relocations=no)
KBUILD_CFLAGS += -include $(srctree)/include/linux/hidden.h
# sev-es.c indirectly inludes inat-table.h which is generated during

View File

@@ -1231,13 +1231,9 @@ static __ro_after_init enum spectre_v2_mitigation_cmd spectre_v2_cmd;
static enum spectre_v2_user_cmd __init
spectre_v2_parse_user_cmdline(void)
{
enum spectre_v2_user_cmd mode;
char arg[20];
int ret, i;
mode = IS_ENABLED(CONFIG_MITIGATION_SPECTRE_V2) ?
SPECTRE_V2_USER_CMD_AUTO : SPECTRE_V2_USER_CMD_NONE;
switch (spectre_v2_cmd) {
case SPECTRE_V2_CMD_NONE:
return SPECTRE_V2_USER_CMD_NONE;
@@ -1250,7 +1246,7 @@ spectre_v2_parse_user_cmdline(void)
ret = cmdline_find_option(boot_command_line, "spectre_v2_user",
arg, sizeof(arg));
if (ret < 0)
return mode;
return SPECTRE_V2_USER_CMD_AUTO;
for (i = 0; i < ARRAY_SIZE(v2_user_options); i++) {
if (match_option(arg, ret, v2_user_options[i].option)) {
@@ -1260,8 +1256,8 @@ spectre_v2_parse_user_cmdline(void)
}
}
pr_err("Unknown user space protection option (%s). Switching to default\n", arg);
return mode;
pr_err("Unknown user space protection option (%s). Switching to AUTO select\n", arg);
return SPECTRE_V2_USER_CMD_AUTO;
}
static inline bool spectre_v2_in_eibrs_mode(enum spectre_v2_mitigation mode)

View File

@@ -931,17 +931,18 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
c->x86_capability[CPUID_D_1_EAX] = eax;
}
/* AMD-defined flags: level 0x80000001 */
/*
* Check if extended CPUID leaves are implemented: Max extended
* CPUID leaf must be in the 0x80000001-0x8000ffff range.
*/
eax = cpuid_eax(0x80000000);
c->extended_cpuid_level = eax;
c->extended_cpuid_level = ((eax & 0xffff0000) == 0x80000000) ? eax : 0;
if ((eax & 0xffff0000) == 0x80000000) {
if (eax >= 0x80000001) {
cpuid(0x80000001, &eax, &ebx, &ecx, &edx);
if (c->extended_cpuid_level >= 0x80000001) {
cpuid(0x80000001, &eax, &ebx, &ecx, &edx);
c->x86_capability[CPUID_8000_0001_ECX] = ecx;
c->x86_capability[CPUID_8000_0001_EDX] = edx;
}
c->x86_capability[CPUID_8000_0001_ECX] = ecx;
c->x86_capability[CPUID_8000_0001_EDX] = edx;
}
if (c->extended_cpuid_level >= 0x80000007) {

View File

@@ -350,7 +350,7 @@ static void get_fixed_ranges(mtrr_type *frs)
void mtrr_save_fixed_ranges(void *info)
{
if (boot_cpu_has(X86_FEATURE_MTRR))
if (mtrr_state.have_fixed)
get_fixed_ranges(mtrr_state.fixed_ranges);
}

View File

@@ -33,8 +33,9 @@ void io_bitmap_share(struct task_struct *tsk)
set_tsk_thread_flag(tsk, TIF_IO_BITMAP);
}
static void task_update_io_bitmap(struct task_struct *tsk)
static void task_update_io_bitmap(void)
{
struct task_struct *tsk = current;
struct thread_struct *t = &tsk->thread;
if (t->iopl_emul == 3 || t->io_bitmap) {
@@ -54,7 +55,12 @@ void io_bitmap_exit(struct task_struct *tsk)
struct io_bitmap *iobm = tsk->thread.io_bitmap;
tsk->thread.io_bitmap = NULL;
task_update_io_bitmap(tsk);
/*
* Don't touch the TSS when invoked on a failed fork(). TSS
* reflects the state of @current and not the state of @tsk.
*/
if (tsk == current)
task_update_io_bitmap();
if (iobm && refcount_dec_and_test(&iobm->refcnt))
kfree(iobm);
}
@@ -192,8 +198,7 @@ SYSCALL_DEFINE1(iopl, unsigned int, level)
}
t->iopl_emul = level;
task_update_io_bitmap(current);
task_update_io_bitmap();
return 0;
}

View File

@@ -143,6 +143,7 @@ int copy_thread(unsigned long clone_flags, unsigned long sp, unsigned long arg,
frame->ret_addr = (unsigned long) ret_from_fork;
p->thread.sp = (unsigned long) fork_frame;
p->thread.io_bitmap = NULL;
clear_tsk_thread_flag(p, TIF_IO_BITMAP);
p->thread.iopl_warn = 0;
memset(p->thread.ptrace_bps, 0, sizeof(p->thread.ptrace_bps));
@@ -401,6 +402,11 @@ void native_tss_update_io_bitmap(void)
} else {
struct io_bitmap *iobm = t->io_bitmap;
if (WARN_ON_ONCE(!iobm)) {
clear_thread_flag(TIF_IO_BITMAP);
native_tss_invalidate_io_bitmap();
}
/*
* Only copy bitmap data when the sequence number differs. The
* update time is accounted to the incoming task.

View File

@@ -322,7 +322,7 @@ static int lrw_create(struct crypto_template *tmpl, struct rtattr **tb)
err = crypto_grab_skcipher(spawn, skcipher_crypto_instance(inst),
cipher_name, 0, mask);
if (err == -ENOENT) {
if (err == -ENOENT && memcmp(cipher_name, "ecb(", 4)) {
err = -ENAMETOOLONG;
if (snprintf(ecb_name, CRYPTO_MAX_ALG_NAME, "ecb(%s)",
cipher_name) >= CRYPTO_MAX_ALG_NAME)
@@ -356,7 +356,7 @@ static int lrw_create(struct crypto_template *tmpl, struct rtattr **tb)
/* Alas we screwed up the naming so we have to mangle the
* cipher name.
*/
if (!strncmp(cipher_name, "ecb(", 4)) {
if (!memcmp(cipher_name, "ecb(", 4)) {
int len;
len = strscpy(ecb_name, cipher_name + 4, sizeof(ecb_name));

View File

@@ -361,7 +361,7 @@ static int xts_create(struct crypto_template *tmpl, struct rtattr **tb)
err = crypto_grab_skcipher(&ctx->spawn, skcipher_crypto_instance(inst),
cipher_name, 0, mask);
if (err == -ENOENT) {
if (err == -ENOENT && memcmp(cipher_name, "ecb(", 4)) {
err = -ENAMETOOLONG;
if (snprintf(ctx->name, CRYPTO_MAX_ALG_NAME, "ecb(%s)",
cipher_name) >= CRYPTO_MAX_ALG_NAME)
@@ -395,7 +395,7 @@ static int xts_create(struct crypto_template *tmpl, struct rtattr **tb)
/* Alas we screwed up the naming so we have to mangle the
* cipher name.
*/
if (!strncmp(cipher_name, "ecb(", 4)) {
if (!memcmp(cipher_name, "ecb(", 4)) {
int len;
len = strscpy(ctx->name, cipher_name + 4, sizeof(ctx->name));

View File

@@ -668,6 +668,8 @@ acpi_ds_create_operands(struct acpi_walk_state *walk_state,
union acpi_parse_object *arguments[ACPI_OBJ_NUM_OPERANDS];
u32 arg_count = 0;
u32 index = walk_state->num_operands;
u32 prev_num_operands = walk_state->num_operands;
u32 new_num_operands;
u32 i;
ACPI_FUNCTION_TRACE_PTR(ds_create_operands, first_arg);
@@ -696,6 +698,7 @@ acpi_ds_create_operands(struct acpi_walk_state *walk_state,
/* Create the interpreter arguments, in reverse order */
new_num_operands = index;
index--;
for (i = 0; i < arg_count; i++) {
arg = arguments[index];
@@ -720,7 +723,11 @@ cleanup:
* pop everything off of the operand stack and delete those
* objects
*/
acpi_ds_obj_stack_pop_and_delete(arg_count, walk_state);
walk_state->num_operands = i;
acpi_ds_obj_stack_pop_and_delete(new_num_operands, walk_state);
/* Restore operand count */
walk_state->num_operands = prev_num_operands;
ACPI_EXCEPTION((AE_INFO, status, "While creating Arg %u", index));
return_ACPI_STATUS(status);

View File

@@ -636,7 +636,8 @@ acpi_status
acpi_ps_complete_final_op(struct acpi_walk_state *walk_state,
union acpi_parse_object *op, acpi_status status)
{
acpi_status status2;
acpi_status return_status = status;
u8 ascending = TRUE;
ACPI_FUNCTION_TRACE_PTR(ps_complete_final_op, walk_state);
@@ -650,7 +651,7 @@ acpi_ps_complete_final_op(struct acpi_walk_state *walk_state,
op));
do {
if (op) {
if (walk_state->ascending_callback != NULL) {
if (ascending && walk_state->ascending_callback != NULL) {
walk_state->op = op;
walk_state->op_info =
acpi_ps_get_opcode_info(op->common.
@@ -672,49 +673,26 @@ acpi_ps_complete_final_op(struct acpi_walk_state *walk_state,
}
if (status == AE_CTRL_TERMINATE) {
status = AE_OK;
/* Clean up */
do {
if (op) {
status2 =
acpi_ps_complete_this_op
(walk_state, op);
if (ACPI_FAILURE
(status2)) {
return_ACPI_STATUS
(status2);
}
}
acpi_ps_pop_scope(&
(walk_state->
parser_state),
&op,
&walk_state->
arg_types,
&walk_state->
arg_count);
} while (op);
return_ACPI_STATUS(status);
ascending = FALSE;
return_status = AE_CTRL_TERMINATE;
}
else if (ACPI_FAILURE(status)) {
/* First error is most important */
(void)
acpi_ps_complete_this_op(walk_state,
op);
return_ACPI_STATUS(status);
ascending = FALSE;
return_status = status;
}
}
status2 = acpi_ps_complete_this_op(walk_state, op);
if (ACPI_FAILURE(status2)) {
return_ACPI_STATUS(status2);
status = acpi_ps_complete_this_op(walk_state, op);
if (ACPI_FAILURE(status)) {
ascending = FALSE;
if (ACPI_SUCCESS(return_status) ||
return_status == AE_CTRL_TERMINATE) {
return_status = status;
}
}
}
@@ -724,5 +702,5 @@ acpi_ps_complete_final_op(struct acpi_walk_state *walk_state,
} while (op);
return_ACPI_STATUS(status);
return_ACPI_STATUS(return_status);
}

View File

@@ -333,11 +333,8 @@ int vsnprintf(char *string, acpi_size size, const char *format, va_list args)
pos = string;
if (size != ACPI_UINT32_MAX) {
end = string + size;
} else {
end = ACPI_CAST_PTR(char, ACPI_UINT32_MAX);
}
size = ACPI_MIN(size, ACPI_PTR_DIFF(ACPI_MAX_PTR, string));
end = string + size;
for (; *format; ++format) {
if (*format != '%') {

View File

@@ -23,6 +23,7 @@ config ACPI_APEI_GHES
select ACPI_HED
select IRQ_WORK
select GENERIC_ALLOCATOR
select ARM_SDE_INTERFACE if ARM64
help
Generic Hardware Error Source provides a way to report
platform hardware errors (such as that from chipset). It

View File

@@ -1478,7 +1478,7 @@ void __init ghes_init(void)
{
int rc;
sdei_init();
acpi_sdei_init();
if (acpi_disabled)
return;

View File

@@ -255,10 +255,23 @@ static int acpi_battery_get_property(struct power_supply *psy,
break;
case POWER_SUPPLY_PROP_CURRENT_NOW:
case POWER_SUPPLY_PROP_POWER_NOW:
if (battery->rate_now == ACPI_BATTERY_VALUE_UNKNOWN)
if (battery->rate_now == ACPI_BATTERY_VALUE_UNKNOWN) {
ret = -ENODEV;
else
val->intval = battery->rate_now * 1000;
break;
}
val->intval = battery->rate_now * 1000;
/*
* When discharging, the current should be reported as a
* negative number as per the power supply class interface
* definition.
*/
if (psp == POWER_SUPPLY_PROP_CURRENT_NOW &&
(battery->state & ACPI_BATTERY_STATE_DISCHARGING) &&
acpi_battery_handle_discharging(battery)
== POWER_SUPPLY_STATUS_DISCHARGING)
val->intval = -val->intval;
break;
case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
case POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN:

View File

@@ -42,7 +42,6 @@ static struct acpi_osi_entry
osi_setup_entries[OSI_STRING_ENTRIES_MAX] __initdata = {
{"Module Device", true},
{"Processor Device", true},
{"3.0 _SCP Extensions", true},
{"Processor Aggregator Device", true},
/*
* Linux-Dell-Video is used by BIOS to disable RTD3 for NVidia graphics

View File

@@ -368,7 +368,8 @@ static unsigned long via_mode_filter(struct ata_device *dev, unsigned long mask)
}
if (dev->class == ATA_DEV_ATAPI &&
dmi_check_system(no_atapi_dma_dmi_table)) {
(dmi_check_system(no_atapi_dma_dmi_table) ||
config->id == PCI_DEVICE_ID_VIA_6415)) {
ata_dev_warn(dev, "controller locks up on ATAPI DMA, forcing PIO\n");
mask &= ATA_MASK_PIO;
}

View File

@@ -288,7 +288,9 @@ static int atmtcp_c_send(struct atm_vcc *vcc,struct sk_buff *skb)
struct sk_buff *new_skb;
int result = 0;
if (!skb->len) return 0;
if (skb->len < sizeof(struct atmtcp_hdr))
goto done;
dev = vcc->dev_data;
hdr = (struct atmtcp_hdr *) skb->data;
if (hdr->length == ATMTCP_HDR_MAGIC) {

View File

@@ -2748,7 +2748,7 @@ struct device *genpd_dev_pm_attach_by_id(struct device *dev,
/* Verify that the index is within a valid range. */
num_domains = of_count_phandle_with_args(dev->of_node, "power-domains",
"#power-domain-cells");
if (index >= num_domains)
if (num_domains < 0 || index >= num_domains)
return NULL;
/* Allocate and register device on the genpd bus. */

View File

@@ -904,6 +904,8 @@ static void __device_resume(struct device *dev, pm_message_t state, bool async)
if (!dev->power.is_suspended)
goto Complete;
dev->power.is_suspended = false;
if (dev->power.direct_complete) {
/* Match the pm_runtime_disable() in __device_suspend(). */
pm_runtime_enable(dev);
@@ -959,7 +961,6 @@ static void __device_resume(struct device *dev, pm_message_t state, bool async)
End:
error = dpm_run_callback(callback, dev, state, info);
dev->power.is_suspended = false;
device_unlock(dev);
dpm_watchdog_clear(&wd);

View File

@@ -998,7 +998,7 @@ static enum hrtimer_restart pm_suspend_timer_fn(struct hrtimer *timer)
* If 'expires' is after the current time, we've been called
* too early.
*/
if (expires > 0 && expires < ktime_get_mono_fast_ns()) {
if (expires > 0 && expires <= ktime_get_mono_fast_ns()) {
dev->power.timer_expires = 0;
rpm_suspend(dev, dev->power.timer_autosuspends ?
(RPM_ASYNC | RPM_AUTO) : RPM_ASYNC);

View File

@@ -521,7 +521,7 @@ software_node_get_reference_args(const struct fwnode_handle *fwnode,
if (prop->is_inline)
return -EINVAL;
if (index * sizeof(*ref) >= prop->length)
if ((index + 1) * sizeof(*ref) > prop->length)
return -ENOENT;
ref_array = prop->pointer;

View File

@@ -198,6 +198,7 @@ aoedev_downdev(struct aoedev *d)
{
struct aoetgt *t, **tt, **te;
struct list_head *head, *pos, *nx;
struct request *rq, *rqnext;
int i;
d->flags &= ~DEVFL_UP;
@@ -223,6 +224,13 @@ aoedev_downdev(struct aoedev *d)
/* clean out the in-process request (if any) */
aoe_failip(d);
/* clean out any queued block requests */
list_for_each_entry_safe(rq, rqnext, &d->rq_list, queuelist) {
list_del_init(&rq->queuelist);
blk_mq_start_request(rq);
blk_mq_end_request(rq, BLK_STS_IOERR);
}
/* fast fail all pending I/O */
if (d->blkq) {
/* UP is cleared, freeze+quiesce to insure all are errored */

View File

@@ -800,8 +800,10 @@ int fsl_mc_device_add(struct fsl_mc_obj_desc *obj_desc,
error_cleanup_dev:
kfree(mc_dev->regions);
kfree(mc_bus);
kfree(mc_dev);
if (mc_bus)
kfree(mc_bus);
else
kfree(mc_dev);
return error;
}

View File

@@ -214,12 +214,19 @@ int __must_check fsl_mc_portal_allocate(struct fsl_mc_device *mc_dev,
if (error < 0)
goto error_cleanup_resource;
dpmcp_dev->consumer_link = device_link_add(&mc_dev->dev,
&dpmcp_dev->dev,
DL_FLAG_AUTOREMOVE_CONSUMER);
if (!dpmcp_dev->consumer_link) {
error = -EINVAL;
goto error_cleanup_mc_io;
/* If the DPRC device itself tries to allocate a portal (usually for
* UAPI interaction), don't add a device link between them since the
* DPMCP device is an actual child device of the DPRC and a reverse
* dependency is not allowed.
*/
if (mc_dev != mc_bus_dev) {
dpmcp_dev->consumer_link = device_link_add(&mc_dev->dev,
&dpmcp_dev->dev,
DL_FLAG_AUTOREMOVE_CONSUMER);
if (!dpmcp_dev->consumer_link) {
error = -EINVAL;
goto error_cleanup_mc_io;
}
}
*new_mc_io = mc_io;

View File

@@ -19,7 +19,7 @@
/**
* Timeout in milliseconds to wait for the completion of an MC command
*/
#define MC_CMD_COMPLETION_TIMEOUT_MS 500
#define MC_CMD_COMPLETION_TIMEOUT_MS 15000
/*
* usleep_range() min and max values used to throttle down polling

View File

@@ -454,6 +454,7 @@ static void mhi_pm_disable_transition(struct mhi_controller *mhi_cntrl,
struct mhi_cmd *mhi_cmd;
struct mhi_event_ctxt *er_ctxt;
struct device *dev = &mhi_cntrl->mhi_dev->dev;
bool reset_device = false;
int ret, i;
dev_dbg(dev, "Transitioning from PM state: %s to: %s\n",
@@ -485,8 +486,23 @@ static void mhi_pm_disable_transition(struct mhi_controller *mhi_cntrl,
return;
}
/* Trigger MHI RESET so that the device will not access host memory */
if (MHI_REG_ACCESS_VALID(prev_state)) {
/*
* If the device is in PBL or SBL, it will only respond to
* RESET if the device is in SYSERR state. SYSERR might
* already be cleared at this point.
*/
enum mhi_state cur_state = mhi_get_mhi_state(mhi_cntrl);
enum mhi_ee_type cur_ee = mhi_get_exec_env(mhi_cntrl);
if (cur_state == MHI_STATE_SYS_ERR)
reset_device = true;
else if (cur_ee != MHI_EE_PBL && cur_ee != MHI_EE_SBL)
reset_device = true;
}
/* Trigger MHI RESET so that the device will not access host memory */
if (reset_device) {
u32 in_reset = -1;
unsigned long timeout = msecs_to_jiffies(mhi_cntrl->timeout_ms);

View File

@@ -687,51 +687,6 @@ static int sysc_parse_and_check_child_range(struct sysc *ddata)
return 0;
}
/* Interconnect instances to probe before l4_per instances */
static struct resource early_bus_ranges[] = {
/* am3/4 l4_wkup */
{ .start = 0x44c00000, .end = 0x44c00000 + 0x300000, },
/* omap4/5 and dra7 l4_cfg */
{ .start = 0x4a000000, .end = 0x4a000000 + 0x300000, },
/* omap4 l4_wkup */
{ .start = 0x4a300000, .end = 0x4a300000 + 0x30000, },
/* omap5 and dra7 l4_wkup without dra7 dcan segment */
{ .start = 0x4ae00000, .end = 0x4ae00000 + 0x30000, },
};
static atomic_t sysc_defer = ATOMIC_INIT(10);
/**
* sysc_defer_non_critical - defer non_critical interconnect probing
* @ddata: device driver data
*
* We want to probe l4_cfg and l4_wkup interconnect instances before any
* l4_per instances as l4_per instances depend on resources on l4_cfg and
* l4_wkup interconnects.
*/
static int sysc_defer_non_critical(struct sysc *ddata)
{
struct resource *res;
int i;
if (!atomic_read(&sysc_defer))
return 0;
for (i = 0; i < ARRAY_SIZE(early_bus_ranges); i++) {
res = &early_bus_ranges[i];
if (ddata->module_pa >= res->start &&
ddata->module_pa <= res->end) {
atomic_set(&sysc_defer, 0);
return 0;
}
}
atomic_dec_if_positive(&sysc_defer);
return -EPROBE_DEFER;
}
static struct device_node *stdout_path;
static void sysc_init_stdout_path(struct sysc *ddata)
@@ -956,10 +911,6 @@ static int sysc_map_and_check_registers(struct sysc *ddata)
if (error)
return error;
error = sysc_defer_non_critical(ddata);
if (error)
return error;
sysc_check_children(ddata);
error = sysc_parse_registers(ddata);

View File

@@ -199,6 +199,8 @@ static struct clk_hw *raspberrypi_clk_register(struct raspberrypi_clk *rpi,
init.name = devm_kasprintf(rpi->dev, GFP_KERNEL,
"fw-clk-%s",
rpi_firmware_clk_names[id]);
if (!init.name)
return ERR_PTR(-ENOMEM);
init.ops = &raspberrypi_firmware_clk_ops;
init.flags = CLK_GET_RATE_NOCACHE;

View File

@@ -3907,6 +3907,7 @@ static const struct clk_parent_data spicc_sclk_parent_data[] = {
{ .hw = &g12a_clk81.hw },
{ .hw = &g12a_fclk_div4.hw },
{ .hw = &g12a_fclk_div3.hw },
{ .hw = &g12a_fclk_div2.hw },
{ .hw = &g12a_fclk_div5.hw },
{ .hw = &g12a_fclk_div7.hw },
};

View File

@@ -433,7 +433,7 @@ static const struct parent_map gcc_xo_gpll0_gpll1a_gpll6_sleep_map[] = {
{ P_XO, 0 },
{ P_GPLL0, 1 },
{ P_GPLL1_AUX, 2 },
{ P_GPLL6, 2 },
{ P_GPLL6, 3 },
{ P_SLEEP_CLK, 6 },
};
@@ -1075,7 +1075,7 @@ static struct clk_rcg2 jpeg0_clk_src = {
};
static const struct freq_tbl ftbl_gcc_camss_mclk0_1_clk[] = {
F(24000000, P_GPLL0, 1, 1, 45),
F(24000000, P_GPLL6, 1, 1, 45),
F(66670000, P_GPLL0, 12, 0, 0),
{ }
};

View File

@@ -429,6 +429,7 @@ static const char *const rk3036_critical_clocks[] __initconst = {
"hclk_peri",
"pclk_peri",
"pclk_ddrupctl",
"ddrphy",
};
static void __init rk3036_clk_init(struct device_node *np)

View File

@@ -657,7 +657,7 @@ static u64 get_max_boost_ratio(unsigned int cpu, u64 *nominal_freq)
nominal_perf = perf_caps.nominal_perf;
if (nominal_freq)
*nominal_freq = perf_caps.nominal_freq;
*nominal_freq = perf_caps.nominal_freq * 1000;
if (!highest_perf || !nominal_perf) {
pr_debug("CPU%d: highest or nominal performance missing\n", cpu);

View File

@@ -2658,8 +2658,10 @@ int cpufreq_boost_trigger_state(int state)
unsigned long flags;
int ret = 0;
if (cpufreq_driver->boost_enabled == state)
return 0;
/*
* Don't compare 'cpufreq_driver->boost_enabled' with 'state' here to
* make sure all policies are in sync with global boost flag.
*/
write_lock_irqsave(&cpufreq_driver_lock, flags);
cpufreq_driver->boost_enabled = state;

View File

@@ -295,8 +295,8 @@ struct sun8i_ce_hash_tfm_ctx {
* @flow: the flow to use for this request
*/
struct sun8i_ce_hash_reqctx {
struct ahash_request fallback_req;
int flow;
struct ahash_request fallback_req; // keep at the end
};
/*

View File

@@ -117,7 +117,7 @@ static int sun8i_ss_setup_ivs(struct skcipher_request *areq)
/* we need to copy all IVs from source in case DMA is bi-directionnal */
while (sg && len) {
if (sg_dma_len(sg) == 0) {
if (sg->length == 0) {
sg = sg_next(sg);
continue;
}

View File

@@ -94,7 +94,7 @@ static int mv_cesa_std_process(struct mv_cesa_engine *engine, u32 status)
static int mv_cesa_int_process(struct mv_cesa_engine *engine, u32 status)
{
if (engine->chain.first && engine->chain.last)
if (engine->chain_hw.first && engine->chain_hw.last)
return mv_cesa_tdma_process(engine, status);
return mv_cesa_std_process(engine, status);

View File

@@ -439,8 +439,10 @@ struct mv_cesa_dev {
* SRAM
* @queue: fifo of the pending crypto requests
* @load: engine load counter, useful for load balancing
* @chain: list of the current tdma descriptors being processed
* by this engine.
* @chain_hw: list of the current tdma descriptors being processed
* by the hardware.
* @chain_sw: list of the current tdma descriptors that will be
* submitted to the hardware.
* @complete_queue: fifo of the processed requests by the engine
*
* Structure storing CESA engine information.
@@ -459,7 +461,8 @@ struct mv_cesa_engine {
struct gen_pool *pool;
struct crypto_queue queue;
atomic_t load;
struct mv_cesa_tdma_chain chain;
struct mv_cesa_tdma_chain chain_hw;
struct mv_cesa_tdma_chain chain_sw;
struct list_head complete_queue;
int irq;
};

View File

@@ -449,6 +449,9 @@ static int mv_cesa_skcipher_queue_req(struct skcipher_request *req,
struct mv_cesa_skcipher_req *creq = skcipher_request_ctx(req);
struct mv_cesa_engine *engine;
if (!req->cryptlen)
return 0;
ret = mv_cesa_skcipher_req_init(req, tmpl);
if (ret)
return ret;

View File

@@ -639,7 +639,7 @@ static int mv_cesa_ahash_dma_req_init(struct ahash_request *req)
if (ret)
goto err_free_tdma;
if (iter.src.sg) {
if (iter.base.len > iter.src.op_offset) {
/*
* Add all the new data, inserting an operation block and
* launch command between each full SRAM block-worth of

View File

@@ -38,6 +38,15 @@ void mv_cesa_dma_step(struct mv_cesa_req *dreq)
{
struct mv_cesa_engine *engine = dreq->engine;
spin_lock_bh(&engine->lock);
if (engine->chain_sw.first == dreq->chain.first) {
engine->chain_sw.first = NULL;
engine->chain_sw.last = NULL;
}
engine->chain_hw.first = dreq->chain.first;
engine->chain_hw.last = dreq->chain.last;
spin_unlock_bh(&engine->lock);
writel_relaxed(0, engine->regs + CESA_SA_CFG);
mv_cesa_set_int_mask(engine, CESA_SA_INT_ACC0_IDMA_DONE);
@@ -96,25 +105,27 @@ void mv_cesa_dma_prepare(struct mv_cesa_req *dreq,
void mv_cesa_tdma_chain(struct mv_cesa_engine *engine,
struct mv_cesa_req *dreq)
{
if (engine->chain.first == NULL && engine->chain.last == NULL) {
engine->chain.first = dreq->chain.first;
engine->chain.last = dreq->chain.last;
} else {
struct mv_cesa_tdma_desc *last;
struct mv_cesa_tdma_desc *last = engine->chain_sw.last;
last = engine->chain.last;
/*
* Break the DMA chain if the request being queued needs the IV
* regs to be set before lauching the request.
*/
if (!last || dreq->chain.first->flags & CESA_TDMA_SET_STATE)
engine->chain_sw.first = dreq->chain.first;
else {
last->next = dreq->chain.first;
engine->chain.last = dreq->chain.last;
/*
* Break the DMA chain if the CESA_TDMA_BREAK_CHAIN is set on
* the last element of the current chain, or if the request
* being queued needs the IV regs to be set before lauching
* the request.
*/
if (!(last->flags & CESA_TDMA_BREAK_CHAIN) &&
!(dreq->chain.first->flags & CESA_TDMA_SET_STATE))
last->next_dma = cpu_to_le32(dreq->chain.first->cur_dma);
last->next_dma = cpu_to_le32(dreq->chain.first->cur_dma);
}
last = dreq->chain.last;
engine->chain_sw.last = last;
/*
* Break the DMA chain if the CESA_TDMA_BREAK_CHAIN is set on
* the last element of the current chain.
*/
if (last->flags & CESA_TDMA_BREAK_CHAIN) {
engine->chain_sw.first = NULL;
engine->chain_sw.last = NULL;
}
}
@@ -127,7 +138,7 @@ int mv_cesa_tdma_process(struct mv_cesa_engine *engine, u32 status)
tdma_cur = readl(engine->regs + CESA_TDMA_CUR);
for (tdma = engine->chain.first; tdma; tdma = next) {
for (tdma = engine->chain_hw.first; tdma; tdma = next) {
spin_lock_bh(&engine->lock);
next = tdma->next;
spin_unlock_bh(&engine->lock);
@@ -149,12 +160,12 @@ int mv_cesa_tdma_process(struct mv_cesa_engine *engine, u32 status)
&backlog);
/* Re-chaining to the next request */
engine->chain.first = tdma->next;
engine->chain_hw.first = tdma->next;
tdma->next = NULL;
/* If this is the last request, clear the chain */
if (engine->chain.first == NULL)
engine->chain.last = NULL;
if (engine->chain_hw.first == NULL)
engine->chain_hw.last = NULL;
spin_unlock_bh(&engine->lock);
ctx = crypto_tfm_ctx(req->tfm);

View File

@@ -127,8 +127,7 @@ static int begin_cpu_udmabuf(struct dma_buf *buf,
ubuf->sg = NULL;
}
} else {
dma_sync_sg_for_cpu(dev, ubuf->sg->sgl, ubuf->sg->nents,
direction);
dma_sync_sgtable_for_cpu(dev, ubuf->sg, direction);
}
return ret;
@@ -143,7 +142,7 @@ static int end_cpu_udmabuf(struct dma_buf *buf,
if (!ubuf->sg)
return -EINVAL;
dma_sync_sg_for_device(dev, ubuf->sg->sgl, ubuf->sg->nents, direction);
dma_sync_sgtable_for_device(dev, ubuf->sg, direction);
return 0;
}

View File

@@ -3672,7 +3672,8 @@ static int udma_probe(struct platform_device *pdev)
uc->config.dir = DMA_MEM_TO_MEM;
uc->name = devm_kasprintf(dev, GFP_KERNEL, "%s chan%d",
dev_name(dev), i);
if (!uc->name)
return -ENOMEM;
vchan_init(&uc->vc, &ud->ddev);
/* Use custom vchan completion handling */
tasklet_setup(&uc->vc.task, udma_vchan_complete);

View File

@@ -1704,9 +1704,9 @@ static ssize_t altr_edac_a10_device_trig(struct file *file,
local_irq_save(flags);
if (trig_type == ALTR_UE_TRIGGER_CHAR)
writel(priv->ue_set_mask, set_addr);
writew(priv->ue_set_mask, set_addr);
else
writel(priv->ce_set_mask, set_addr);
writew(priv->ce_set_mask, set_addr);
/* Ensure the interrupt test bits are set */
wmb();
@@ -1736,7 +1736,7 @@ static ssize_t altr_edac_a10_device_trig2(struct file *file,
local_irq_save(flags);
if (trig_type == ALTR_UE_TRIGGER_CHAR) {
writel(priv->ue_set_mask, set_addr);
writew(priv->ue_set_mask, set_addr);
} else {
/* Setup read/write of 4 bytes */
writel(ECC_WORD_WRITE, drvdata->base + ECC_BLK_DBYTECTRL_OFST);

View File

@@ -112,6 +112,7 @@ EXPORT_SYMBOL_GPL(skx_adxl_get);
void skx_adxl_put(void)
{
adxl_component_count = 0;
kfree(adxl_values);
kfree(adxl_msg);
}

View File

@@ -72,7 +72,6 @@ config ARM_SCPI_POWER_DOMAIN
config ARM_SDE_INTERFACE
bool "ARM Software Delegated Exception Interface (SDEI)"
depends on ARM64
depends on ACPI_APEI_GHES
help
The Software Delegated Exception Interface (SDEI) is an ARM
standard for registering callbacks from the platform firmware

View File

@@ -1060,13 +1060,12 @@ static bool __init sdei_present_acpi(void)
return true;
}
void __init sdei_init(void)
void __init acpi_sdei_init(void)
{
struct platform_device *pdev;
int ret;
ret = platform_driver_register(&sdei_driver);
if (ret || !sdei_present_acpi())
if (!sdei_present_acpi())
return;
pdev = platform_device_register_simple(sdei_driver.driver.name,
@@ -1079,6 +1078,12 @@ void __init sdei_init(void)
}
}
static int __init sdei_init(void)
{
return platform_driver_register(&sdei_driver);
}
arch_initcall(sdei_init);
int sdei_event_handler(struct pt_regs *regs,
struct sdei_registered_event *arg)
{

View File

@@ -609,8 +609,10 @@ int __init psci_dt_init(void)
np = of_find_matching_node_and_match(NULL, psci_of_match, &matched_np);
if (!np || !of_device_is_available(np))
if (!np || !of_device_is_available(np)) {
of_node_put(np);
return -ENODEV;
}
init_fn = (psci_initcall_t)matched_np->data;
ret = init_fn(np);

View File

@@ -4002,8 +4002,6 @@ static void gfx_v10_0_get_csb_buffer(struct amdgpu_device *adev,
PACKET3_SET_CONTEXT_REG_START);
for (i = 0; i < ext->reg_count; i++)
buffer[count++] = cpu_to_le32(ext->extent[i]);
} else {
return;
}
}
}

View File

@@ -2896,8 +2896,6 @@ static void gfx_v6_0_get_csb_buffer(struct amdgpu_device *adev,
buffer[count++] = cpu_to_le32(ext->reg_index - 0xa000);
for (i = 0; i < ext->reg_count; i++)
buffer[count++] = cpu_to_le32(ext->extent[i]);
} else {
return;
}
}
}

View File

@@ -4000,8 +4000,6 @@ static void gfx_v7_0_get_csb_buffer(struct amdgpu_device *adev,
buffer[count++] = cpu_to_le32(ext->reg_index - PACKET3_SET_CONTEXT_REG_START);
for (i = 0; i < ext->reg_count; i++)
buffer[count++] = cpu_to_le32(ext->extent[i]);
} else {
return;
}
}
}

View File

@@ -1268,8 +1268,6 @@ static void gfx_v8_0_get_csb_buffer(struct amdgpu_device *adev,
PACKET3_SET_CONTEXT_REG_START);
for (i = 0; i < ext->reg_count; i++)
buffer[count++] = cpu_to_le32(ext->extent[i]);
} else {
return;
}
}
}

View File

@@ -1741,8 +1741,6 @@ static void gfx_v9_0_get_csb_buffer(struct amdgpu_device *adev,
PACKET3_SET_CONTEXT_REG_START);
for (i = 0; i < ext->reg_count; i++)
buffer[count++] = cpu_to_le32(ext->extent[i]);
} else {
return;
}
}
}

View File

@@ -396,6 +396,10 @@ static void update_mqd_sdma(struct mqd_manager *mm, void *mqd,
m->sdma_engine_id = q->sdma_engine_id;
m->sdma_queue_id = q->sdma_queue_id;
m->sdmax_rlcx_dummy_reg = SDMA_RLC_DUMMY_DEFAULT;
/* Allow context switch so we don't cross-process starve with a massive
* command buffer of long-running SDMA commands
*/
m->sdmax_rlcx_ib_cntl |= SDMA0_GFX_IB_CNTL__SWITCH_INSIDE_IB_MASK;
q->is_active = QUEUE_IS_ACTIVE(*q);
}

View File

@@ -8098,16 +8098,20 @@ static int dm_force_atomic_commit(struct drm_connector *connector)
*/
conn_state = drm_atomic_get_connector_state(state, connector);
ret = PTR_ERR_OR_ZERO(conn_state);
if (ret)
/* Check for error in getting connector state */
if (IS_ERR(conn_state)) {
ret = PTR_ERR(conn_state);
goto out;
}
/* Attach crtc to drm_atomic_state*/
crtc_state = drm_atomic_get_crtc_state(state, &disconnected_acrtc->base);
ret = PTR_ERR_OR_ZERO(crtc_state);
if (ret)
/* Check for error in getting crtc state */
if (IS_ERR(crtc_state)) {
ret = PTR_ERR(crtc_state);
goto out;
}
/* force a restore */
crtc_state->mode_changed = true;
@@ -8115,9 +8119,11 @@ static int dm_force_atomic_commit(struct drm_connector *connector)
/* Attach plane to drm_atomic_state */
plane_state = drm_atomic_get_plane_state(state, plane);
ret = PTR_ERR_OR_ZERO(plane_state);
if (ret)
/* Check for error in getting plane state */
if (IS_ERR(plane_state)) {
ret = PTR_ERR(plane_state);
goto out;
}
/* Call commit internally with the state we just constructed */
ret = drm_atomic_commit(state);

View File

@@ -10,7 +10,7 @@ DCN20 = dcn20_resource.o dcn20_init.o dcn20_hwseq.o dcn20_dpp.o dcn20_dpp_cm.o d
DCN20 += dcn20_dsc.o
ifdef CONFIG_X86
CFLAGS_$(AMDDALPATH)/dc/dcn20/dcn20_resource.o := -mhard-float -msse
CFLAGS_$(AMDDALPATH)/dc/dcn20/dcn20_resource.o := $(if $(CONFIG_CC_IS_GCC), -mhard-float) -msse
endif
ifdef CONFIG_PPC64

View File

@@ -6,7 +6,7 @@ DCN21 = dcn21_init.o dcn21_hubp.o dcn21_hubbub.o dcn21_resource.o \
dcn21_hwseq.o dcn21_link_encoder.o
ifdef CONFIG_X86
CFLAGS_$(AMDDALPATH)/dc/dcn21/dcn21_resource.o := -mhard-float -msse
CFLAGS_$(AMDDALPATH)/dc/dcn21/dcn21_resource.o := $(if $(CONFIG_CC_IS_GCC), -mhard-float) -msse
endif
ifdef CONFIG_PPC64

View File

@@ -26,7 +26,8 @@
# subcomponents.
ifdef CONFIG_X86
dml_ccflags := -mhard-float -msse
dml_ccflags-$(CONFIG_CC_IS_GCC) := -mhard-float
dml_ccflags := $(dml_ccflags-y) -msse
endif
ifdef CONFIG_PPC64

View File

@@ -1778,10 +1778,10 @@ analogix_dp_probe(struct device *dev, struct analogix_dp_plat_data *plat_data)
* that we can get the current state of the GPIO.
*/
dp->irq = gpiod_to_irq(dp->hpd_gpiod);
irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING;
irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | IRQF_NO_AUTOEN;
} else {
dp->irq = platform_get_irq(pdev, 0);
irq_flags = 0;
irq_flags = IRQF_NO_AUTOEN;
}
if (dp->irq == -ENXIO) {
@@ -1798,7 +1798,6 @@ analogix_dp_probe(struct device *dev, struct analogix_dp_plat_data *plat_data)
dev_err(&pdev->dev, "failed to request irq\n");
goto err_disable_clk;
}
disable_irq(dp->irq);
return dp;

View File

@@ -102,7 +102,7 @@ static int a6xx_hfi_wait_for_ack(struct a6xx_gmu *gmu, u32 id, u32 seqnum,
/* Wait for a response */
ret = gmu_poll_timeout(gmu, REG_A6XX_GMU_GMU2HOST_INTR_INFO, val,
val & A6XX_GMU_GMU2HOST_INTR_INFO_MSGQ, 100, 5000);
val & A6XX_GMU_GMU2HOST_INTR_INFO_MSGQ, 100, 1000000);
if (ret) {
DRM_DEV_ERROR(gmu->dev,

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