drm/amd/display: Find first CRTC and its line time in dce110_fill_display_configs
commit 669f73a26f6112eedbadac53a2f2707ac6d0b9c8 upstream. dce110_fill_display_configs is shared between DCE 6-11, and finding the first CRTC and its line time is relevant to DCE 6 too. Move the code to find it from DCE 11 specific code. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Rodrigo Siqueira <siqueira@igalia.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 4ab09785f8d5d03df052827af073d5c508ff5f63) Cc: stable@vger.kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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committed by
Greg Kroah-Hartman
parent
dd97e72805
commit
837b6ea4e0
@@ -120,9 +120,12 @@ void dce110_fill_display_configs(
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const struct dc_state *context,
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struct dm_pp_display_configuration *pp_display_cfg)
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{
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struct dc *dc = context->clk_mgr->ctx->dc;
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int j;
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int num_cfgs = 0;
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pp_display_cfg->crtc_index = dc->res_pool->res_cap->num_timing_generator;
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for (j = 0; j < context->stream_count; j++) {
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int k;
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@@ -164,6 +167,23 @@ void dce110_fill_display_configs(
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cfg->v_refresh /= stream->timing.h_total;
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cfg->v_refresh = (cfg->v_refresh + stream->timing.v_total / 2)
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/ stream->timing.v_total;
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/* Find first CRTC index and calculate its line time.
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* This is necessary for DPM on SI GPUs.
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*/
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if (cfg->pipe_idx < pp_display_cfg->crtc_index) {
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const struct dc_crtc_timing *timing =
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&context->streams[0]->timing;
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pp_display_cfg->crtc_index = cfg->pipe_idx;
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pp_display_cfg->line_time_in_us =
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timing->h_total * 10000 / timing->pix_clk_100hz;
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}
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}
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if (!num_cfgs) {
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pp_display_cfg->crtc_index = 0;
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pp_display_cfg->line_time_in_us = 0;
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}
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pp_display_cfg->display_count = num_cfgs;
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@@ -231,16 +251,6 @@ void dce11_pplib_apply_display_requirements(
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dce110_fill_display_configs(context, pp_display_cfg);
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/* TODO: is this still applicable?*/
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if (pp_display_cfg->display_count == 1) {
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const struct dc_crtc_timing *timing =
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&context->streams[0]->timing;
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pp_display_cfg->crtc_index =
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pp_display_cfg->disp_configs[0].pipe_idx;
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pp_display_cfg->line_time_in_us = timing->h_total * 10000 / timing->pix_clk_100hz;
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}
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if (memcmp(&dc->current_state->pp_display_cfg, pp_display_cfg, sizeof(*pp_display_cfg)) != 0)
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dm_pp_apply_display_requirements(dc->ctx, pp_display_cfg);
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}
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