diff --git a/Documentation/devicetree/bindings/input/qpnp-power-on.txt b/Documentation/devicetree/bindings/input/qpnp-power-on.txt index a78f088b7e0e..e13669a6acbd 100644 --- a/Documentation/devicetree/bindings/input/qpnp-power-on.txt +++ b/Documentation/devicetree/bindings/input/qpnp-power-on.txt @@ -116,6 +116,9 @@ Optional properties: configured to support TWM modes. - qcom,pbs-client: Phandle of the PBS client node. Should be defined if 'qcom,support-twm-config' is present. +- qcom,use-legacy-hard-reset-offset Boolean property to support legacy + hard-reset offset of the PON_RB_SPARE register for + some (PON gen2) platforms. Optional Sub-nodes: - qcom,pon_1 ... qcom,pon_n: These PON child nodes correspond to features diff --git a/Documentation/devicetree/bindings/pci/msm_ep_pcie.txt b/Documentation/devicetree/bindings/pci/msm_ep_pcie.txt index 8883f779bcd6..c364f472cc0b 100644 --- a/Documentation/devicetree/bindings/pci/msm_ep_pcie.txt +++ b/Documentation/devicetree/bindings/pci/msm_ep_pcie.txt @@ -48,6 +48,8 @@ Optional Properties: - qcom,phy-init: The initialization sequence to bring up the PCIe PHY. Should be specified in groups (offset, value, delay, direction). - qcom,phy-status-reg: Register offset for PHY status. + - qcom,phy-status-reg2: For sdxprairie and above use only + qcom,phy-status-reg2 as register offset for PHY status. - qcom,dbi-base-reg: Register offset for DBI base address. - qcom,slv-space-reg: Register offset for slave address space size. - qcom,pcie-vendor-id: Vendor id to be written to the Vendor ID register. diff --git a/Documentation/devicetree/bindings/sound/qcom-audio-dev.txt b/Documentation/devicetree/bindings/sound/qcom-audio-dev.txt index 715855b3fa5a..e7fef3bdc4fa 100644 --- a/Documentation/devicetree/bindings/sound/qcom-audio-dev.txt +++ b/Documentation/devicetree/bindings/sound/qcom-audio-dev.txt @@ -349,6 +349,49 @@ Optional properties: This child device is added after lpass is up to invoke deferred probe devices. +* gpr + +Required properties: + + - compatible : "qcom,gpr" + This device is added to represent GPR module. + + - qcom,glink-channels: Indicates glink channel to be used. + - qcom,intents: Indicates the number of intents to be allocated. + - reg: This value provides the subsytem ID to be communicated with. + +* gecko-core-platform + +Required properties: + + - compatible : "qcom,gecko-core-platform" + This device is added to represent Gecko platform driver module. + +* gecko_core + +Required properties: + + - compatible : "qcom,gecko_core" + This device is added to represent Gecko core driver module. + - reg: Represents the service to be communicated with. + +* audio-pkt + +Required properties: + + - compatible : "qcom,audio-pkt" + This device is added to represent Audio packet driver module. + - qcom,audiopkt-ch-name: Glink channel name to be used. + - reg: Represents the service to be communicated with. + +* q6prm + +Required properties: + + - compatible : "qcom,q6prm" + This device is added to represent Q6 PRM driver module. + - reg: Represents the service to be communicated with. + * msm-ocmem-audio Required properties: @@ -1880,6 +1923,124 @@ Example: qcom,msm_audio_ssr_devs = <&audio_apr>, <&q6core>; }; +* SA8155 Gecko ASoC Machine driver + +Required properties: +- compatible : "qcom,sa8155-gecko-asoc-snd-adp-star" for auto machine driver. +- qcom,model : The user-visible name of this sound card. +- asoc-platform: This is phandle list containing the references to platform device + nodes that are used as part of the sound card dai-links. +- asoc-platform-names: This property contains list of platform names. The order of + the platform names should match to that of the phandle order + given in "asoc-platform". +- asoc-cpu: This is phandle list containing the references to cpu dai device nodes + that are used as part of the sound card dai-links. +- asoc-cpu-names: This property contains list of cpu dai names. The order of the + cpu dai names should match to that of the phandle order given + in "asoc-cpu". The cpu names are in the form of "%s.%d" form, + where the id (%d) field represents the back-end AFE port id that + this CPU dai is associated with. +- asoc-codec: This is phandle list containing the references to codec dai device + nodes that are used as part of the sound card dai-links. +- asoc-codec-names: This property contains list of codec dai names. The order of the + codec dai names should match to that of the phandle order given + in "asoc-codec". +Optional properties: +- qcom,mi2s-audio-intf : Property to specify if MI2S interface is used for the target +- qcom,auxpcm-audio-intf : Property to specify if AUX PCM interface is used for the target +- qcom,msm-mi2s-master : List of master/slave configuration for MI2S interfaces +- qcom,msm_audio_ssr_devs: List the snd event framework clients + +Example: + + sound-adp-star { + compatible = "qcom,sa8155-gecko-asoc-snd-adp-star"; + qcom,model = "sa8155-gecko-adp-star-snd-card"; + qcom,mi2s-audio-intf; + qcom,auxpcm-audio-intf; + qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>; + + asoc-platform = <&pcm0>, <&pcm1>, <&pcm2>, <&voip>, <&voice>, + <&loopback>, <&compress>, <&hostless>, + <&afe>, <&lsm>, <&routing>, <&compr>, + <&pcm_noirq>, <&loopback1>, <&pcm_dtmf>; + asoc-platform-names = "msm-pcm-dsp.0", "msm-pcm-dsp.1", + "msm-pcm-dsp.2", "msm-voip-dsp", + "msm-pcm-voice", "msm-pcm-loopback", + "msm-compress-dsp", "msm-pcm-hostless", + "msm-pcm-afe", "msm-lsm-client", + "msm-pcm-routing", "msm-compr-dsp", + "msm-pcm-dsp-noirq", "msm-pcm-loopback.1", + "msm-pcm-dtmf"; + asoc-cpu = <&dai_hdmi>, <&dai_dp>, + <&dai_mi2s0>, <&dai_mi2s1>, + <&dai_mi2s2>, <&dai_mi2s3>, + <&dai_mi2s4>, <&dai_pri_auxpcm>, + <&dai_sec_auxpcm>, <&dai_tert_auxpcm>, + <&dai_quat_auxpcm>, <&dai_quin_auxpcm>, + <&afe_pcm_rx>, <&afe_pcm_tx>, <&afe_proxy_rx>, + <&afe_proxy_tx>, <&incall_record_rx>, + <&incall_record_tx>, <&incall_music_rx>, + <&incall_music_2_rx>, + <&usb_audio_rx>, <&usb_audio_tx>, + <&dai_pri_tdm_rx_0>, <&dai_pri_tdm_rx_1>, + <&dai_pri_tdm_rx_2>, <&dai_pri_tdm_rx_3>, + <&dai_pri_tdm_tx_0>, <&dai_pri_tdm_tx_1>, + <&dai_pri_tdm_tx_2>, <&dai_pri_tdm_tx_3>, + <&dai_sec_tdm_rx_0>, <&dai_sec_tdm_rx_1>, + <&dai_sec_tdm_rx_2>, <&dai_sec_tdm_rx_3>, + <&dai_sec_tdm_tx_0>, <&dai_sec_tdm_tx_1>, + <&dai_sec_tdm_tx_2>, <&dai_sec_tdm_tx_3>, + <&dai_tert_tdm_rx_0>, <&dai_tert_tdm_rx_1>, + <&dai_tert_tdm_rx_2>, <&dai_tert_tdm_rx_3>, + <&dai_tert_tdm_rx_4>, <&dai_tert_tdm_tx_0>, + <&dai_tert_tdm_tx_1>, <&dai_tert_tdm_tx_2>, + <&dai_tert_tdm_tx_3>, <&dai_quat_tdm_rx_0>, + <&dai_quat_tdm_rx_1>, <&dai_quat_tdm_rx_2>, + <&dai_quat_tdm_rx_3>, <&dai_quat_tdm_tx_0>, + <&dai_quat_tdm_tx_1>, <&dai_quat_tdm_tx_2>, + <&dai_quat_tdm_tx_3>, <&dai_quin_tdm_rx_0>, + <&dai_quin_tdm_rx_1>, <&dai_quin_tdm_rx_2>, + <&dai_quin_tdm_rx_3>, <&dai_quin_tdm_tx_0>, + <&dai_quin_tdm_tx_1>, <&dai_quin_tdm_tx_2>, + <&dai_quin_tdm_tx_3>; + asoc-cpu-names = "msm-dai-q6-hdmi.8", "msm-dai-q6-dp.24608", + "msm-dai-q6-mi2s.0", "msm-dai-q6-mi2s.1", + "msm-dai-q6-mi2s.2", "msm-dai-q6-mi2s.3", + "msm-dai-q6-mi2s.4", "msm-dai-q6-auxpcm.1", + "msm-dai-q6-auxpcm.2", "msm-dai-q6-auxpcm.3", + "msm-dai-q6-auxpcm.4", "msm-dai-q6-auxpcm.5", + "msm-dai-q6-dev.224", "msm-dai-q6-dev.225", + "msm-dai-q6-dev.241", "msm-dai-q6-dev.240", + "msm-dai-q6-dev.32771", "msm-dai-q6-dev.32772", + "msm-dai-q6-dev.32773", "msm-dai-q6-dev.32770", + "msm-dai-q6-dev.28672", "msm-dai-q6-dev.28673", + "msm-dai-q6-tdm.36864", "msm-dai-q6-tdm.36866", + "msm-dai-q6-tdm.36868", "msm-dai-q6-tdm.36870", + "msm-dai-q6-tdm.36865", "msm-dai-q6-tdm.36867", + "msm-dai-q6-tdm.36869", "msm-dai-q6-tdm.36871", + "msm-dai-q6-tdm.36880", "msm-dai-q6-tdm.36882", + "msm-dai-q6-tdm.36884", "msm-dai-q6-tdm.36886", + "msm-dai-q6-tdm.36881", "msm-dai-q6-tdm.36883", + "msm-dai-q6-tdm.36885", "msm-dai-q6-tdm.36887", + "msm-dai-q6-tdm.36896", "msm-dai-q6-tdm.36898", + "msm-dai-q6-tdm.36900", "msm-dai-q6-tdm.36902", + "msm-dai-q6-tdm.36904", "msm-dai-q6-tdm.36897", + "msm-dai-q6-tdm.36899", "msm-dai-q6-tdm.36901", + "msm-dai-q6-tdm.36903", "msm-dai-q6-tdm.36912", + "msm-dai-q6-tdm.36914", "msm-dai-q6-tdm.36916", + "msm-dai-q6-tdm.36918", "msm-dai-q6-tdm.36913", + "msm-dai-q6-tdm.36915", "msm-dai-q6-tdm.36917", + "msm-dai-q6-tdm.36919", "msm-dai-q6-tdm.36928", + "msm-dai-q6-tdm.36930", "msm-dai-q6-tdm.36932", + "msm-dai-q6-tdm.36934", "msm-dai-q6-tdm.36929", + "msm-dai-q6-tdm.36931", "msm-dai-q6-tdm.36933", + "msm-dai-q6-tdm.36935"; + asoc-codec = <&stub_codec>; + asoc-codec-names = "msm-stub-codec.1"; + qcom,msm_audio_ssr_devs = <&audio_apr>, <&q6core>; + }; + * SDX ASoC Machine driver Required properties: diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 7f1d8b0ac49d..240aa2d58244 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1467,6 +1467,12 @@ config PAGE_OFFSET default 0xB0000000 if VMSPLIT_3G_OPT default 0xC0000000 +config COMMAND_LINE_SIZE + int "Maximum size of the command line." + default "1024" + help + This is the per architecture maximum command line size. + config NR_CPUS int "Maximum number of CPUs (2-32)" range 2 32 diff --git a/arch/arm/configs/vendor/sdm429-bg-perf_defconfig b/arch/arm/configs/vendor/sdm429-bg-perf_defconfig index 9f9ae39a6056..5cc7ceccabe6 100644 --- a/arch/arm/configs/vendor/sdm429-bg-perf_defconfig +++ b/arch/arm/configs/vendor/sdm429-bg-perf_defconfig @@ -59,6 +59,7 @@ CONFIG_ARCH_SDM429W=y CONFIG_PCI_MSM=y CONFIG_SMP=y CONFIG_SCHED_MC=y +CONFIG_COMMAND_LINE_SIZE=2048 CONFIG_NR_CPUS=8 CONFIG_ARM_PSCI=y CONFIG_PREEMPT=y diff --git a/arch/arm/configs/vendor/sdm429-bg_defconfig b/arch/arm/configs/vendor/sdm429-bg_defconfig index d8a9b3b30704..1260c94b7cf8 100644 --- a/arch/arm/configs/vendor/sdm429-bg_defconfig +++ b/arch/arm/configs/vendor/sdm429-bg_defconfig @@ -59,6 +59,7 @@ CONFIG_ARCH_SDM429W=y # CONFIG_VDSO is not set CONFIG_SMP=y CONFIG_SCHED_MC=y +CONFIG_COMMAND_LINE_SIZE=2048 CONFIG_NR_CPUS=8 CONFIG_ARM_PSCI=y CONFIG_PREEMPT=y diff --git a/arch/arm/include/uapi/asm/setup.h b/arch/arm/include/uapi/asm/setup.h index 6b335a9ff8c8..977373fa9992 100644 --- a/arch/arm/include/uapi/asm/setup.h +++ b/arch/arm/include/uapi/asm/setup.h @@ -17,7 +17,9 @@ #include -#define COMMAND_LINE_SIZE 1024 +#ifdef CONFIG_COMMAND_LINE_SIZE +#define COMMAND_LINE_SIZE CONFIG_COMMAND_LINE_SIZE +#endif /* The list ends with an ATAG_NONE node. */ #define ATAG_NONE 0x00000000 diff --git a/arch/arm64/boot/dts/qcom/pm6155.dtsi b/arch/arm64/boot/dts/qcom/pm6155.dtsi index e96b5638ff3d..c5714d8a93a0 100644 --- a/arch/arm64/boot/dts/qcom/pm6155.dtsi +++ b/arch/arm64/boot/dts/qcom/pm6155.dtsi @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018, The Linux Foundation. All rights reserved. + * Copyright (c) 2018, 2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -173,3 +173,33 @@ #size-cells = <1>; }; }; + +&thermal_zones { + pm6155-1-tz { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-governor = "step_wise"; + thermal-sensors = <&pm6155_1_tz>; + wake-capable-sensor; + + trips { + pm6155_trip0: trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + pm6155_trip1: trip1 { + temperature = <115000>; + hysteresis = <0>; + type = "passive"; + }; + + trip2 { + temperature = <145000>; + hysteresis = <0>; + type = "passive"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/qcs405-pcie.dtsi b/arch/arm64/boot/dts/qcom/qcs405-pcie.dtsi index f0dcd69670c9..d6d5dde8eaa0 100644 --- a/arch/arm64/boot/dts/qcom/qcs405-pcie.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs405-pcie.dtsi @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019, The Linux Foundation. All rights reserved. + * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -116,8 +116,14 @@ <0>, <0>, <0>, <0>; clock-output-names = "pcie_0_pipe_clk"; - resets = <&clock_gcc GCC_PCIEPHY_0_PHY_BCR>; - reset-names = "pcie_0_phy_reset"; + + resets = <&clock_gcc GCC_PCIEPHY_0_PHY_BCR>, + <&clock_gcc GCC_PCIE_0_BCR>, + <&clock_gcc GCC_PCIE_0_PHY_BCR>; + + reset-names = "pcie_0_phy_reset", + "pcie_0_core_reset", + "pcie_phy_reset"; pcie_rc0: pcie_rc0 { #address-cells = <5>; diff --git a/arch/arm64/boot/dts/qcom/qcs405.dtsi b/arch/arm64/boot/dts/qcom/qcs405.dtsi index 67e3ed1fd95f..e405bf8a6226 100644 --- a/arch/arm64/boot/dts/qcom/qcs405.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs405.dtsi @@ -1548,6 +1548,152 @@ < 1401600 MHZ_TO_MBPS( 710, 8) >; }; + mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use = <4>; + snps,rx-sched-sp; + + queue0 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x0>; + snps,route-up; + snps,priority = <0x1>; + }; + + queue1 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x1>; + snps,route-ptp; + }; + + queue2 { + snps,avb-algorithm; + snps,map-to-dma-channel = <0x2>; + snps,route-avcp; + }; + + queue3 { + snps,avb-algorithm; + snps,map-to-dma-channel = <0x3>; + snps,priority = <0xC>; + }; + }; + + mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use = <5>; + snps,tx-sched-sp; + queue0 { + snps,dcb-algorithm; + }; + + queue1 { + snps,dcb-algorithm; + }; + + queue2 { + snps,avb-algorithm; + snps,send_slope = <0x1000>; + snps,idle_slope = <0x1000>; + snps,high_credit = <0x3E800>; + snps,low_credit = <0xFFC18000>; + }; + + queue3 { + snps,avb-algorithm; + snps,send_slope = <0x1000>; + snps,idle_slope = <0x1000>; + snps,high_credit = <0x3E800>; + snps,low_credit = <0xFFC18000>; + }; + }; + + ethqos_hw: qcom,ethernet@00020000 { + compatible = "qcom,stmmac-ethqos"; + reg = <0x07A80000 0x10000>, + <0x7A96000 0x100>; + qcom,arm-smmu; + reg-names = "stmmaceth", "rgmii"; + dma-bit-mask = <32>; + emac-core-version = <0x20030000>; + interrupts-extended = <&wakegic 0 56 4>, <&wakegic 0 55 4>, + <&tlmm 61 2>, <&wakegic 0 300 4>, + <&wakegic 0 301 4>, <&wakegic 0 302 4>, + <&wakegic 0 303 4>, <&wakegic 0 304 4>, + <&wakegic 0 305 4>, <&wakegic 0 306 4>, + <&wakegic 0 307 4>, <&wakegic 0 308 4>; + interrupt-names = "macirq", "eth_lpi", + "phy-intr", "tx-ch0-intr", + "tx-ch1-intr", "tx-ch2-intr", + "tx-ch3-intr", "tx-ch4-intr", + "rx-ch0-intr", "rx-ch1-intr", + "rx-ch2-intr", "rx-ch3-intr"; + qcom,msm-bus,name = "emac"; + qcom,msm-bus,num-cases = <4>; + qcom,msm-bus,num-paths = <2>; + qcom,msm-bus,vectors-KBps = + <98 512 0 0>, <1 781 0 0>, /* No vote */ + <98 512 2500 0>, <1 781 0 40000>, /* 10Mbps vote */ + <98 512 25000 0>, <1 781 0 40000>, /* 100Mbps vote */ + <98 512 250000 0>, <1 781 0 40000>; /* 1000Mbps vote */ + qcom,bus-vector-names = "0", "10", "100", "1000"; + snps,tso; + snps,pbl = <32>; + mac-address = [00 55 7B B5 7D f7]; + clocks = <&clock_gcc GCC_ETH_AXI_CLK>, + <&clock_gcc GCC_ETH_SLAVE_AHB_CLK>, + <&clock_gcc GCC_ETH_PTP_CLK>, + <&clock_gcc GCC_ETH_RGMII_CLK>; + clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii"; + snps,ptp-ref-clk-rate = <230400000>; + snps,ptp-req-clk-rate = <57600000>; + snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_HIGH>; + qcom,phy-intr-redirect = <&tlmm 61 GPIO_ACTIVE_LOW>; + /*gdsc_emac-supply = <&emac_gdsc>;*/ + rx-fifo-depth = <16384>; + tx-fifo-depth = <20480>; + snps,mtl-rx-config = <&mtl_rx_setup>; + snps,mtl-tx-config = <&mtl_tx_setup>; + + pinctrl-names = "dev-emac-mdc", "dev-emac-mdio", + "dev-emac-rgmii_txd0_state", "dev-emac-rgmii_txd1_state", + "dev-emac-rgmii_txd2_state", "dev-emac-rgmii_txd3_state", + "dev-emac-rgmii_txc_state", "dev-emac-rgmii_tx_ctl_state", + "dev-emac-rgmii_rxd0_state", "dev-emac-rgmii_rxd1_state", + "dev-emac-rgmii_rxd2_state", "dev-emac-rgmii_rxd3_state", + "dev-emac-rgmii_rxc_state", "dev-emac-rgmii_rx_ctl_state", + "dev-emac-phy_intr"; + + pinctrl-0 = <&emac_mdc>; + pinctrl-1 = <&emac_mdio>; + pinctrl-2 = <&emac_rgmii_txd0>; + pinctrl-3 = <&emac_rgmii_txd1>; + pinctrl-4 = <&emac_rgmii_txd2>; + pinctrl-5 = <&emac_rgmii_txd3>; + pinctrl-6 = <&emac_rgmii_txc>; + pinctrl-7 = <&emac_rgmii_tx_ctl>; + pinctrl-8 = <&emac_rgmii_rxd0>; + pinctrl-9 = <&emac_rgmii_rxd1>; + pinctrl-10 = <&emac_rgmii_rxd2>; + pinctrl-11 = <&emac_rgmii_rxd3>; + pinctrl-12 = <&emac_rgmii_rxc>; + pinctrl-13 = <&emac_rgmii_rx_ctl>; + pinctrl-14 = <&emac_phy_intr>; + + snps,reset-active-low; + snps,reset-delays-us = <0 10000 100000>; + phy-mode = "rgmii"; + + io-macro-info { + io-macro-bypass-mode = <0>; + io-interface = "rgmii"; + }; + + ethqos_emb_smmu: ethqos_emb_smmu { + compatible = "qcom,emac-smmu-embedded"; + iommus = <&apps_smmu 0x1400 0x0>; + qcom,iova-mapping = <0x80000000 0x40000000>; + }; + }; + emac_hw: qcom,emac@07A80000 { compatible = "qcom,emac-dwc-eqos"; reg = <0x07A80000 0x10000>, diff --git a/arch/arm64/boot/dts/qcom/qcs410-iot.dtsi b/arch/arm64/boot/dts/qcom/qcs410-iot.dtsi index 3144838fcefc..cda7be55677b 100644 --- a/arch/arm64/boot/dts/qcom/qcs410-iot.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs410-iot.dtsi @@ -1,4 +1,4 @@ -/* Copyright (c) 2020, The Linux Foundation. All rights reserved. +/* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -186,6 +186,34 @@ reg = <0 0x8fd00000 0 0x3100000>; }; +&pil_video_mem { + reg = <0 0x92e00000 0 0x500000>; +}; + +&wlan_msa_mem { + reg = <0 0x93300000 0 0x200000>; +}; + +&pil_cdsp_mem { + reg = <0 0x93500000 0 0x1e00000>; +}; + +&pil_adsp_mem { + reg = <0 0x95300000 0 0x1e00000>; +}; + +&pil_ipa_fw_mem { + reg = <0 0x97100000 0 0x10000>; +}; + +&pil_ipa_gsi_mem { + reg = <0 0x97110000 0 0x5000>; +}; + +&pil_gpu_mem { + reg = <0 0x97115000 0 0x2000>; +}; + &L16A { regulator-max-microvolt = <3304000>; }; diff --git a/arch/arm64/boot/dts/qcom/qcs610-iot.dtsi b/arch/arm64/boot/dts/qcom/qcs610-iot.dtsi index 6c1d8c88de2a..733d9335b4fd 100644 --- a/arch/arm64/boot/dts/qcom/qcs610-iot.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs610-iot.dtsi @@ -296,6 +296,34 @@ reg = <0 0x8fd00000 0 0x3100000>; }; +&pil_video_mem { + reg = <0 0x92e00000 0 0x500000>; +}; + +&wlan_msa_mem { + reg = <0 0x93300000 0 0x200000>; +}; + +&pil_cdsp_mem { + reg = <0 0x93500000 0 0x1e00000>; +}; + +&pil_adsp_mem { + reg = <0 0x95300000 0 0x1e00000>; +}; + +&pil_ipa_fw_mem { + reg = <0 0x97100000 0 0x10000>; +}; + +&pil_ipa_gsi_mem { + reg = <0 0x97110000 0 0x5000>; +}; + +&pil_gpu_mem { + reg = <0 0x97115000 0 0x2000>; +}; + &sdhc_1 { vdd-supply = <&pm6150l_l11>; qcom,vdd-voltage-level = <2950000 2950000>; diff --git a/arch/arm64/boot/dts/qcom/sa2150p-ccard.dtsi b/arch/arm64/boot/dts/qcom/sa2150p-ccard.dtsi index accae59b393a..304357a3195e 100644 --- a/arch/arm64/boot/dts/qcom/sa2150p-ccard.dtsi +++ b/arch/arm64/boot/dts/qcom/sa2150p-ccard.dtsi @@ -192,6 +192,23 @@ extcon = <&usb2_extcon>; }; +ðqos_hw { + status = "okay"; + vreg_emac_phy-supply = <&vreg_emac_phy>; + vreg_rgmii_io_pads-supply = <&vreg_rgmii_io_pads>; + rxc-skew-ps = <0>; + + pinctrl-names = "dev-emac-mdc", "dev-emac-mdio", + "dev-emac-rgmii_txd0_state", "dev-emac-rgmii_txd1_state", + "dev-emac-rgmii_txd2_state", "dev-emac-rgmii_txd3_state", + "dev-emac-rgmii_txc_state", "dev-emac-rgmii_tx_ctl_state", + "dev-emac-rgmii_rxd0_state", "dev-emac-rgmii_rxd1_state", + "dev-emac-rgmii_rxd2_state", "dev-emac-rgmii_rxd3_state", + "dev-emac-rgmii_rxc_state", "dev-emac-rgmii_rx_ctl_state", + "dev-emac-phy_intr", "dev-emac-phy_reset_state"; + pinctrl-15 = <&emac_phy_reset_state>; +}; + &emac_hw { status = "okay"; vreg_emac_phy-supply = <&vreg_emac_phy>; diff --git a/arch/arm64/boot/dts/qcom/sa515m-ccard.dtsi b/arch/arm64/boot/dts/qcom/sa515m-ccard.dtsi index e4f9672cf792..bd661d1b1ef4 100644 --- a/arch/arm64/boot/dts/qcom/sa515m-ccard.dtsi +++ b/arch/arm64/boot/dts/qcom/sa515m-ccard.dtsi @@ -247,6 +247,8 @@ pinctrl-1 = <&emac_pin_pps_0>; pinctrl-2 = <&emac_pin_pps_1>; qcom,phy-reset-delay-msecs = <10>; + ipa-dma-rx-desc-cnt = <512>; + ipa-dma-tx-desc-cnt = <512>; }; &vreg_rgmii_io_pads { diff --git a/arch/arm64/boot/dts/qcom/sa515m-v2-ccard-pcie-ep.dts b/arch/arm64/boot/dts/qcom/sa515m-v2-ccard-pcie-ep.dts index 076abf9d0d78..bb1f2ae1b5f2 100644 --- a/arch/arm64/boot/dts/qcom/sa515m-v2-ccard-pcie-ep.dts +++ b/arch/arm64/boot/dts/qcom/sa515m-v2-ccard-pcie-ep.dts @@ -54,6 +54,7 @@ &pcie_ep { status = "ok"; + qcom,pcie-perst-enum; }; &mhi_device { diff --git a/arch/arm64/boot/dts/qcom/sa515m-v2-ttp.dtsi b/arch/arm64/boot/dts/qcom/sa515m-v2-ttp.dtsi index 8fac0f31e969..ff584090a004 100644 --- a/arch/arm64/boot/dts/qcom/sa515m-v2-ttp.dtsi +++ b/arch/arm64/boot/dts/qcom/sa515m-v2-ttp.dtsi @@ -59,6 +59,11 @@ status = "disabled"; }; +ðqos_hw { + ipa-dma-rx-desc-cnt = <512>; + ipa-dma-tx-desc-cnt = <512>; +}; + &soc { bluetooth: bt_qca6390 { compatible = "qca,qca6390"; diff --git a/arch/arm64/boot/dts/qcom/sa6155-pmic.dtsi b/arch/arm64/boot/dts/qcom/sa6155-pmic.dtsi index fb96af75665d..ccef59f575bc 100644 --- a/arch/arm64/boot/dts/qcom/sa6155-pmic.dtsi +++ b/arch/arm64/boot/dts/qcom/sa6155-pmic.dtsi @@ -335,4 +335,64 @@ }; }; }; + + pm6155-1-tz { + cooling-maps { + trip1_cpu0 { + trip = <&pm6155_trip1>; + cooling-device = + <&CPU0 (THERMAL_MAX_LIMIT-1) + (THERMAL_MAX_LIMIT-1)>; + }; + + trip1_cpu1 { + trip = <&pm6155_trip1>; + cooling-device = + <&CPU1 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu2 { + trip = <&pm6155_trip1>; + cooling-device = + <&CPU2 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu3 { + trip = <&pm6155_trip1>; + cooling-device = + <&CPU3 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu4 { + trip = <&pm6155_trip1>; + cooling-device = + <&CPU4 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu5 { + trip = <&pm6155_trip1>; + cooling-device = + <&CPU5 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu6 { + trip = <&pm6155_trip1>; + cooling-device = + <&CPU6 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu7 { + trip = <&pm6155_trip1>; + cooling-device = + <&CPU7 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + }; + }; }; diff --git a/arch/arm64/boot/dts/qcom/sa6155p-vm-la.dts b/arch/arm64/boot/dts/qcom/sa6155p-vm-la.dts index 8a2835a735dc..ba1dc8d7dc83 100644 --- a/arch/arm64/boot/dts/qcom/sa6155p-vm-la.dts +++ b/arch/arm64/boot/dts/qcom/sa6155p-vm-la.dts @@ -19,5 +19,5 @@ model = "Qualcomm Technologies, Inc. SA6155P Virtual Machine"; compatible = "qcom,sa6155p"; qcom,pmic-name = "PM6150"; - qcom,board-id = <0 0>; + qcom,board-id = <0x1000001 0>; }; diff --git a/arch/arm64/boot/dts/qcom/sa8155-pmic-overlay.dtsi b/arch/arm64/boot/dts/qcom/sa8155-pmic-overlay.dtsi index fd0725339f20..41df55dbe659 100644 --- a/arch/arm64/boot/dts/qcom/sa8155-pmic-overlay.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8155-pmic-overlay.dtsi @@ -164,6 +164,8 @@ pm8150_1_gpios: &pm8150_gpios { }; }; +#include + &thermal_zones { pm8150_2_temp_alarm: pm8150_2_tz { polling-delay-passive = <100>; @@ -189,5 +191,123 @@ pm8150_1_gpios: &pm8150_gpios { type = "passive"; }; }; + + cooling-maps { + trip1_cpu0 { + trip = <&pm8150_2_trip1>; + cooling-device = + <&CPU0 (THERMAL_MAX_LIMIT-1) + (THERMAL_MAX_LIMIT-1)>; + }; + + trip1_cpu1 { + trip = <&pm8150_2_trip1>; + cooling-device = + <&CPU1 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu2 { + trip = <&pm8150_2_trip1>; + cooling-device = + <&CPU2 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu3 { + trip = <&pm8150_2_trip1>; + cooling-device = + <&CPU3 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu4 { + trip = <&pm8150_2_trip1>; + cooling-device = + <&CPU4 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu5 { + trip = <&pm8150_2_trip1>; + cooling-device = + <&CPU5 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu6 { + trip = <&pm8150_2_trip1>; + cooling-device = + <&CPU6 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu7 { + trip = <&pm8150_2_trip1>; + cooling-device = + <&CPU7 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + }; + }; + + pm8150_tz { + cooling-maps { + trip1_cpu0 { + trip = <&pm8150_trip1>; + cooling-device = + <&CPU0 (THERMAL_MAX_LIMIT-1) + (THERMAL_MAX_LIMIT-1)>; + }; + + trip1_cpu1 { + trip = <&pm8150_trip1>; + cooling-device = + <&CPU1 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu2 { + trip = <&pm8150_trip1>; + cooling-device = + <&CPU2 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu3 { + trip = <&pm8150_trip1>; + cooling-device = + <&CPU3 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu4 { + trip = <&pm8150_trip1>; + cooling-device = + <&CPU4 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu5 { + trip = <&pm8150_trip1>; + cooling-device = + <&CPU5 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu6 { + trip = <&pm8150_trip1>; + cooling-device = + <&CPU6 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu7 { + trip = <&pm8150_trip1>; + cooling-device = + <&CPU7 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + }; }; }; diff --git a/arch/arm64/boot/dts/qcom/sa8155-regulator.dtsi b/arch/arm64/boot/dts/qcom/sa8155-regulator.dtsi index 33e45516d62d..994c4bf4eb71 100644 --- a/arch/arm64/boot/dts/qcom/sa8155-regulator.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8155-regulator.dtsi @@ -1,4 +1,4 @@ -/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. +/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -459,13 +459,6 @@ = ; qcom,min-dropout-voltage-level = <(-1)>; }; - - cx_cdev: regulator-cdev { - compatible = "qcom,rpmh-reg-cdev"; - mboxes = <&qmp_aop 0>; - qcom,reg-resource-name = "cx"; - #cooling-cells = <2>; - }; }; /* PM8150_2 S10 = VDD_MX supply */ @@ -497,14 +490,6 @@ qcom,init-voltage-level = ; }; - - mx_cdev: mx-cdev-lvl { - compatible = "qcom,regulator-cooling-device"; - regulator-cdev-supply = <&VDD_MX_LEVEL>; - regulator-levels = ; - #cooling-cells = <2>; - }; }; rpmh-regulator-ldoc1 { @@ -617,13 +602,6 @@ qcom,init-voltage-level = ; }; - - ebi_cdev: regulator-cdev { - compatible = "qcom,rpmh-reg-cdev"; - mboxes = <&qmp_aop 0>; - qcom,reg-resource-name = "ebi"; - #cooling-cells = <2>; - }; }; rpmh-regulator-ldoc12 { diff --git a/arch/arm64/boot/dts/qcom/sa8155-vm-la-mt.dts b/arch/arm64/boot/dts/qcom/sa8155-vm-la-mt.dts index d544cb066f2f..0e2e5d138d32 100644 --- a/arch/arm64/boot/dts/qcom/sa8155-vm-la-mt.dts +++ b/arch/arm64/boot/dts/qcom/sa8155-vm-la-mt.dts @@ -19,5 +19,5 @@ model = "Qualcomm Technologies, Inc. SA8155 Multi LA Virtual Machine"; compatible = "qcom,sa8155"; qcom,pmic-name = "PM8150"; - qcom,board-id = <0 0>; + qcom,board-id = <0x2000001 0>; }; diff --git a/arch/arm64/boot/dts/qcom/sa8155-vm-la.dts b/arch/arm64/boot/dts/qcom/sa8155-vm-la.dts index ae614ef9b5f7..30cffa4f8ea3 100644 --- a/arch/arm64/boot/dts/qcom/sa8155-vm-la.dts +++ b/arch/arm64/boot/dts/qcom/sa8155-vm-la.dts @@ -20,5 +20,5 @@ model = "Qualcomm Technologies, Inc. SA8155 Single LA Virtual Machine"; compatible = "qcom,sa8155"; qcom,pmic-name = "PM8150"; - qcom,board-id = <0 0>; + qcom,board-id = <0x1000001 0>; }; diff --git a/arch/arm64/boot/dts/qcom/sa8155-vm-la.dtsi b/arch/arm64/boot/dts/qcom/sa8155-vm-la.dtsi index 8a4394d75675..9c965a0fe57b 100644 --- a/arch/arm64/boot/dts/qcom/sa8155-vm-la.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8155-vm-la.dtsi @@ -30,7 +30,7 @@ pil_ipa_fw_mem: pil_ipa_fw_region { compatible = "removed-dma-pool"; no-map; - reg = <0x0 0x99700000 0x0 0x10000>; + reg = <0x0 0x98700000 0x0 0x10000>; }; pil_ipa_gsi_mem: pil_ipa_gsi_region { diff --git a/arch/arm64/boot/dts/qcom/sa8155-vm-lv-mt.dts b/arch/arm64/boot/dts/qcom/sa8155-vm-lv-mt.dts index aefc080f6b71..7c5562bf00f4 100644 --- a/arch/arm64/boot/dts/qcom/sa8155-vm-lv-mt.dts +++ b/arch/arm64/boot/dts/qcom/sa8155-vm-lv-mt.dts @@ -19,5 +19,5 @@ model = "Qualcomm Technologies, Inc. SA8155 Multi LV Virtual Machine"; compatible = "qcom,sa8155"; qcom,pmic-name = "PM8150"; - qcom,board-id = <0 0>; + qcom,board-id = <0x2000002 0>; }; diff --git a/arch/arm64/boot/dts/qcom/sa8155-vm-lv.dts b/arch/arm64/boot/dts/qcom/sa8155-vm-lv.dts index 7eec6fa776fd..46b3281f8716 100644 --- a/arch/arm64/boot/dts/qcom/sa8155-vm-lv.dts +++ b/arch/arm64/boot/dts/qcom/sa8155-vm-lv.dts @@ -19,6 +19,6 @@ model = "Qualcomm Technologies, Inc. SA8155 Single LV Virtual Machine"; compatible = "qcom,sa8155"; qcom,pmic-name = "PM8150"; - qcom,board-id = <0 0>; + qcom,board-id = <0x1000002 0>; }; diff --git a/arch/arm64/boot/dts/qcom/sa8155.dtsi b/arch/arm64/boot/dts/qcom/sa8155.dtsi index c41c5e788f1a..18f6d27a9d83 100644 --- a/arch/arm64/boot/dts/qcom/sa8155.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8155.dtsi @@ -221,26 +221,10 @@ }; &thermal_zones { - cpu-1-7-lowf { - cooling-maps { - /delete-node/ mmcx_vdd_cdev; - }; - }; - gpuss-0-lowf { - cooling-maps { - /delete-node/ mmcx_vdd_cdev; - }; - }; - camera-lowf { - cooling-maps { - /delete-node/ mmcx_vdd_cdev; - }; - }; - mdm-scl-lowf { - cooling-maps { - /delete-node/ mmcx_vdd_cdev; - }; - }; + /delete-node/ cpu-1-7-lowf; + /delete-node/ gpuss-0-lowf; + /delete-node/ camera-lowf; + /delete-node/ mdm-scl-lowf; lmh-dcvs-01 { trips { @@ -263,7 +247,7 @@ gpuss-max-step { trips { gpu-trip0 { - temperature = <100000>; + temperature = <105000>; }; }; }; diff --git a/arch/arm64/boot/dts/qcom/sa8195-pmic.dtsi b/arch/arm64/boot/dts/qcom/sa8195-pmic.dtsi index 5236ff4aa086..ebeac6853f38 100644 --- a/arch/arm64/boot/dts/qcom/sa8195-pmic.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8195-pmic.dtsi @@ -120,6 +120,64 @@ type = "passive"; }; }; + + cooling-maps { + trip1_cpu0 { + trip = <&pm8195_1_trip1>; + cooling-device = + <&CPU0 (THERMAL_MAX_LIMIT-1) + (THERMAL_MAX_LIMIT-1)>; + }; + + trip1_cpu1 { + trip = <&pm8195_1_trip1>; + cooling-device = + <&CPU1 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu2 { + trip = <&pm8195_1_trip1>; + cooling-device = + <&CPU2 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu3 { + trip = <&pm8195_1_trip1>; + cooling-device = + <&CPU3 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu4 { + trip = <&pm8195_1_trip1>; + cooling-device = + <&CPU4 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu5 { + trip = <&pm8195_1_trip1>; + cooling-device = + <&CPU5 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu6 { + trip = <&pm8195_1_trip1>; + cooling-device = + <&CPU6 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu7 { + trip = <&pm8195_1_trip1>; + cooling-device = + <&CPU7 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + }; }; pm8195_2_temp_alarm: pm8195_2_tz { @@ -146,6 +204,64 @@ type = "passive"; }; }; + + cooling-maps { + trip1_cpu0 { + trip = <&pm8195_2_trip1>; + cooling-device = + <&CPU0 (THERMAL_MAX_LIMIT-1) + (THERMAL_MAX_LIMIT-1)>; + }; + + trip1_cpu1 { + trip = <&pm8195_2_trip1>; + cooling-device = + <&CPU1 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu2 { + trip = <&pm8195_2_trip1>; + cooling-device = + <&CPU2 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu3 { + trip = <&pm8195_2_trip1>; + cooling-device = + <&CPU3 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu4 { + trip = <&pm8195_2_trip1>; + cooling-device = + <&CPU4 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu5 { + trip = <&pm8195_2_trip1>; + cooling-device = + <&CPU5 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu6 { + trip = <&pm8195_2_trip1>; + cooling-device = + <&CPU6 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu7 { + trip = <&pm8195_2_trip1>; + cooling-device = + <&CPU7 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + }; }; pm8195_3_temp_alarm: pm8195_3_tz { @@ -172,5 +288,63 @@ type = "passive"; }; }; + + cooling-maps { + trip1_cpu0 { + trip = <&pm8195_3_trip1>; + cooling-device = + <&CPU0 (THERMAL_MAX_LIMIT-1) + (THERMAL_MAX_LIMIT-1)>; + }; + + trip1_cpu1 { + trip = <&pm8195_3_trip1>; + cooling-device = + <&CPU1 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu2 { + trip = <&pm8195_3_trip1>; + cooling-device = + <&CPU2 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu3 { + trip = <&pm8195_3_trip1>; + cooling-device = + <&CPU3 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu4 { + trip = <&pm8195_3_trip1>; + cooling-device = + <&CPU4 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu5 { + trip = <&pm8195_3_trip1>; + cooling-device = + <&CPU5 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu6 { + trip = <&pm8195_3_trip1>; + cooling-device = + <&CPU6 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu7 { + trip = <&pm8195_3_trip1>; + cooling-device = + <&CPU7 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + }; }; }; diff --git a/arch/arm64/boot/dts/qcom/sa8195-vm-la-mt.dts b/arch/arm64/boot/dts/qcom/sa8195-vm-la-mt.dts index 69fc9ed11e9b..c59921d1b4c5 100644 --- a/arch/arm64/boot/dts/qcom/sa8195-vm-la-mt.dts +++ b/arch/arm64/boot/dts/qcom/sa8195-vm-la-mt.dts @@ -19,5 +19,5 @@ model = "Qualcomm Technologies, Inc. SA8195 Multi LA Virtual Machine"; compatible = "qcom,sa8195p"; qcom,pmic-name = "PM8195"; - qcom,board-id = <0 0>; + qcom,board-id = <0x2000001 0>; }; diff --git a/arch/arm64/boot/dts/qcom/sa8195-vm-la.dts b/arch/arm64/boot/dts/qcom/sa8195-vm-la.dts index 1d54538f77f9..bb721e12b648 100644 --- a/arch/arm64/boot/dts/qcom/sa8195-vm-la.dts +++ b/arch/arm64/boot/dts/qcom/sa8195-vm-la.dts @@ -19,5 +19,5 @@ model = "Qualcomm Technologies, Inc. SA8195 Single LA Virtual Machine"; compatible = "qcom,sa8195p"; qcom,pmic-name = "PM8195"; - qcom,board-id = <0 0>; + qcom,board-id = <0x1000001 0>; }; diff --git a/arch/arm64/boot/dts/qcom/sa8195-vm-lv-mt.dts b/arch/arm64/boot/dts/qcom/sa8195-vm-lv-mt.dts index 4a570f9897d9..76a24b42f78e 100644 --- a/arch/arm64/boot/dts/qcom/sa8195-vm-lv-mt.dts +++ b/arch/arm64/boot/dts/qcom/sa8195-vm-lv-mt.dts @@ -19,5 +19,5 @@ model = "Qualcomm Technologies, Inc. SA8195 Multi LV Virtual Machine"; compatible = "qcom,sa8195p"; qcom,pmic-name = "PM8195"; - qcom,board-id = <0 0>; + qcom,board-id = <0x2000002 0>; }; diff --git a/arch/arm64/boot/dts/qcom/sa8195-vm-lv.dts b/arch/arm64/boot/dts/qcom/sa8195-vm-lv.dts index 10b40d2c3e50..107d2016c9c9 100644 --- a/arch/arm64/boot/dts/qcom/sa8195-vm-lv.dts +++ b/arch/arm64/boot/dts/qcom/sa8195-vm-lv.dts @@ -19,5 +19,5 @@ model = "Qualcomm Technologies, Inc. SA8195 Single LV Virtual Machine"; compatible = "qcom,sa8195p"; qcom,pmic-name = "PM8195"; - qcom,board-id = <0 0>; + qcom,board-id = <0x1000002 0>; }; diff --git a/arch/arm64/boot/dts/qcom/sa8195p-regulator.dtsi b/arch/arm64/boot/dts/qcom/sa8195p-regulator.dtsi index 1ca9f004c58c..9d3ff0740904 100644 --- a/arch/arm64/boot/dts/qcom/sa8195p-regulator.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8195p-regulator.dtsi @@ -41,13 +41,6 @@ qcom,init-voltage-level = ; }; - - ebi_cdev: regulator-cdev { - compatible = "qcom,rpmh-reg-cdev"; - mboxes = <&qmp_aop 0>; - qcom,reg-resource-name = "ebi"; - #cooling-cells = <2>; - }; }; /* PM8195_1 S2 = VDDCX_MM supply */ @@ -79,14 +72,6 @@ qcom,init-voltage-level = ; }; - - mm_cx_cdev: mm-cx-cdev-lvl { - compatible = "qcom,regulator-cooling-device"; - regulator-cdev-supply = <&VDD_MMCX_LEVEL_AO>; - regulator-levels = ; - #cooling-cells = <2>; - }; }; rpmh-regulator-smpa3 { @@ -188,14 +173,6 @@ qcom,init-voltage-level = ; }; - - mx_cdev: mx-cdev-lvl { - compatible = "qcom,regulator-cooling-device"; - regulator-cdev-supply = <&VDD_MX_LEVEL>; - regulator-levels = ; - #cooling-cells = <2>; - }; }; rpmh-regulator-ldoa2 { @@ -647,12 +624,6 @@ = ; qcom,min-dropout-voltage-level = <(-1)>; }; - cx_cdev: regulator-cdev { - compatible = "qcom,rpmh-reg-cdev"; - mboxes = <&qmp_aop 0>; - qcom,reg-resource-name = "cx"; - #cooling-cells = <2>; - }; }; rpmh-regulator-smpe4 { diff --git a/arch/arm64/boot/dts/qcom/sa8195p.dtsi b/arch/arm64/boot/dts/qcom/sa8195p.dtsi index 7b728de681fe..863c5330d7e5 100644 --- a/arch/arm64/boot/dts/qcom/sa8195p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8195p.dtsi @@ -425,26 +425,11 @@ }; &thermal_zones { - cpu-1-7-lowf { - cooling-maps { - /delete-node/ mmcx_vdd_cdev; - }; - }; - gpuss-0-lowf { - cooling-maps { - /delete-node/ mmcx_vdd_cdev; - }; - }; - camera-lowf { - cooling-maps { - /delete-node/ mmcx_vdd_cdev; - }; - }; - mdm-scl-lowf { - cooling-maps { - /delete-node/ mmcx_vdd_cdev; - }; - }; + /delete-node/ cpu-1-7-lowf; + /delete-node/ gpuss-0-lowf; + /delete-node/ camera-lowf; + /delete-node/ mdm-scl-lowf; + /delete-node/ pcie-lowf; lmh-dcvs-01 { trips { @@ -467,7 +452,7 @@ quad-gpuss-max-step { trips { gpu-trip0 { - temperature = <100000>; + temperature = <105000>; }; }; }; diff --git a/arch/arm64/boot/dts/qcom/sdm429-blsp.dtsi b/arch/arm64/boot/dts/qcom/sdm429-blsp.dtsi index 61a2fc581993..06f9e76d7983 100644 --- a/arch/arm64/boot/dts/qcom/sdm429-blsp.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm429-blsp.dtsi @@ -152,7 +152,7 @@ qcom,bam-producer-pipe-index = <5>; qcom,master-id = <86>; qcom,use-pinctrl; - pinctrl-names = "spi_active", "spi_sleep"; + pinctrl-names = "spi_default", "spi_sleep"; pinctrl-0 = <&spi_1_active>; pinctrl-1 = <&spi_1_sleep>; clock-names = "iface_clk", "core_clk"; @@ -178,7 +178,7 @@ qcom,bam-producer-pipe-index = <7>; qcom,master-id = <86>; qcom,use-pinctrl; - pinctrl-names = "spi_active", "spi_sleep"; + pinctrl-names = "spi_default", "spi_sleep"; pinctrl-0 = <&spi_2_active>; pinctrl-1 = <&spi_2_sleep>; clock-names = "iface_clk", "core_clk"; @@ -204,7 +204,7 @@ qcom,bam-producer-pipe-index = <9>; qcom,master-id = <86>; qcom,use-pinctrl; - pinctrl-names = "spi_active", "spi_sleep"; + pinctrl-names = "spi_default", "spi_sleep"; pinctrl-0 = <&spi_3_active>; pinctrl-1 = <&spi_3_sleep>; clock-names = "iface_clk", "core_clk"; @@ -230,7 +230,7 @@ qcom,bam-producer-pipe-index = <11>; qcom,master-id = <86>; qcom,use-pinctrl; - pinctrl-names = "spi_active", "spi_sleep"; + pinctrl-names = "spi_default", "spi_sleep"; pinctrl-0 = <&spi_4_active>; pinctrl-1 = <&spi_4_sleep>; clock-names = "iface_clk", "core_clk"; @@ -393,7 +393,7 @@ qcom,bam-producer-pipe-index = <5>; qcom,master-id = <84>; qcom,use-pinctrl; - pinctrl-names = "spi_active", "spi_sleep"; + pinctrl-names = "spi_default", "spi_sleep"; pinctrl-0 = <&spi_5_active>; pinctrl-1 = <&spi_5_sleep>; clock-names = "iface_clk", "core_clk"; @@ -419,7 +419,7 @@ qcom,bam-producer-pipe-index = <7>; qcom,master-id = <84>; qcom,use-pinctrl; - pinctrl-names = "spi_active", "spi_sleep"; + pinctrl-names = "spi_default", "spi_sleep"; pinctrl-0 = <&spi_6_active>; pinctrl-1 = <&spi_6_sleep>; clock-names = "iface_clk", "core_clk"; @@ -445,7 +445,7 @@ qcom,bam-producer-pipe-index = <9>; qcom,master-id = <84>; qcom,use-pinctrl; - pinctrl-names = "spi_active", "spi_sleep"; + pinctrl-names = "spi_default", "spi_sleep"; pinctrl-0 = <&spi_7_active>; pinctrl-1 = <&spi_7_sleep>; clock-names = "iface_clk", "core_clk"; @@ -471,7 +471,7 @@ qcom,bam-producer-pipe-index = <11>; qcom,master-id = <84>; qcom,use-pinctrl; - pinctrl-names = "spi_active", "spi_sleep"; + pinctrl-names = "spi_default", "spi_sleep"; pinctrl-0 = <&spi_8_active>; pinctrl-1 = <&spi_8_sleep>; clock-names = "iface_clk", "core_clk"; diff --git a/arch/arm64/boot/dts/qcom/sdm429.dtsi b/arch/arm64/boot/dts/qcom/sdm429.dtsi index e41a1c3e5c35..0391e6bcacd4 100644 --- a/arch/arm64/boot/dts/qcom/sdm429.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm429.dtsi @@ -259,6 +259,14 @@ }; }; + + restart@4ab000 { + compatible = "qcom,pshold"; + reg = <0x4ab000 0x4>, + <0x193d100 0x4>; + reg-names = "pshold-base", "tcsr-boot-misc-detect"; + }; + clocks { xo_board { compatible = "fixed-clock"; @@ -335,7 +343,6 @@ qcom,ipi-ping; qcom,wakeup-enable; qcom,scandump-size = <0x40000>; - status = "disabled"; }; rpm_bus: qcom,rpm-smd { @@ -359,6 +366,13 @@ status = "disabled"; }; + qcom,rmtfs_sharedmem@00000000 { + compatible = "qcom,sharedmem-uio"; + reg = <0x00000000 0x00180000>; + reg-names = "rmtfs"; + qcom,client-id = <0x00000001>; + }; + sdhc_1: sdhci@7824900 { compatible = "qcom,sdhci-msm"; reg = <0x7824900 0x500>, <0x7824000 0x800>, <0x7824e00 0x200>; diff --git a/arch/arm64/boot/dts/qcom/sdmmagpie.dtsi b/arch/arm64/boot/dts/qcom/sdmmagpie.dtsi index e5d0292f5518..86098aa8ccba 100644 --- a/arch/arm64/boot/dts/qcom/sdmmagpie.dtsi +++ b/arch/arm64/boot/dts/qcom/sdmmagpie.dtsi @@ -1470,6 +1470,7 @@ "tsens_tm_physical"; interrupts = <0 506 0>, <0 508 0>; interrupt-names = "tsens-upper-lower", "tsens-critical"; + tsens-reinit-wa; #thermal-sensor-cells = <1>; }; @@ -1481,6 +1482,7 @@ "tsens_tm_physical"; interrupts = <0 507 0>, <0 509 0>; interrupt-names = "tsens-upper-lower", "tsens-critical"; + tsens-reinit-wa; #thermal-sensor-cells = <1>; }; diff --git a/arch/arm64/boot/dts/qcom/sdmshrike-coresight.dtsi b/arch/arm64/boot/dts/qcom/sdmshrike-coresight.dtsi new file mode 100644 index 000000000000..9305469824e9 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdmshrike-coresight.dtsi @@ -0,0 +1,1324 @@ +/* Copyright (c) 2020, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&soc { + csr: csr@0x6001000 { + compatible = "qcom,coresight-csr"; + reg = <0x6001000 0x1000>; + reg-names = "csr-base"; + + coresight-name = "coresight-csr"; + qcom,usb-bam-support; + qcom,hwctrl-set-support; + qcom,set-byte-cntr-support; + + qcom,blk-size = <1>; + }; + + replicator_qdss: replicator@6046000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b909>; + + reg = <0x6046000 0x1000>; + reg-names = "replicator-base"; + + coresight-name = "coresight-replicator-qdss"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + replicator0_out_tmc_etr: endpoint { + remote-endpoint= + <&tmc_etr_in_replicator0>; + }; + }; + + port@2 { + reg = <0>; + replicator0_in_tmc_etf: endpoint { + slave-mode; + remote-endpoint= + <&tmc_etf_out_replicator0>; + }; + }; + }; + }; + + tmc_etr: tmc@6048000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b961>; + + reg = <0x6048000 0x1000>, + <0x6064000 0x15000>; + reg-names = "tmc-base", "bam-base"; + + qcom,smmu-s1-bypass; + iommus = <&apps_smmu 0x05e0 0>, + <&apps_smmu 0x04a0 0>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + arm,buffer-size = <0x400000>; + + coresight-name = "coresight-tmc-etr"; + coresight-ctis = <&cti0>; + coresight-csr = <&csr>; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + interrupts = ; + interrupt-names = "byte-cntr-irq"; + + port { + tmc_etr_in_replicator0: endpoint { + slave-mode; + remote-endpoint = <&replicator0_out_tmc_etr>; + }; + }; + }; + + tmc_etf: tmc@6047000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b961>; + + reg = <0x6047000 0x1000>; + reg-names = "tmc-base"; + + coresight-name = "coresight-tmc-etf"; + coresight-ctis = <&cti0>; + coresight-csr = <&csr>; + arm,default-sink; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + tmc_etf_out_replicator0: endpoint { + remote-endpoint = + <&replicator0_in_tmc_etf>; + }; + }; + + port@1 { + reg = <0>; + tmc_etf_in_funnel_merg: endpoint { + slave-mode; + remote-endpoint = + <&funnel_merg_out_tmc_etf>; + }; + }; + }; + + }; + + funnel_merg: funnel@6045000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b908>; + + reg = <0x6045000 0x1000>; + reg-names = "funnel-base"; + + coresight-name = "coresight-funnel-merg"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + funnel_merg_out_tmc_etf: endpoint { + remote-endpoint = + <&tmc_etf_in_funnel_merg>; + }; + }; + + port@1 { + reg = <0>; + funnel_merg_in_funnel_in0: endpoint { + slave-mode; + remote-endpoint = + <&funnel_in0_out_funnel_merg>; + }; + }; + + port@2 { + reg = <1>; + funnel_merg_in_funnel_in1: endpoint { + slave-mode; + remote-endpoint = + <&funnel_in1_out_funnel_merg>; + }; + }; + }; + }; + + funnel_in0: funnel@6041000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b908>; + + reg = <0x6041000 0x1000>; + reg-names = "funnel-base"; + + coresight-name = "coresight-funnel-in0"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + funnel_in0_out_funnel_merg: endpoint { + remote-endpoint = + <&funnel_merg_in_funnel_in0>; + }; + }; + + port@1 { + reg = <6>; + funnel_in0_in_funnel_qatb: endpoint { + slave-mode; + remote-endpoint = + <&funnel_qatb_out_funnel_in0>; + }; + }; + + port@2 { + reg = <7>; + funnel_in0_in_stm: endpoint { + slave-mode; + remote-endpoint = <&stm_out_funnel_in0>; + }; + }; + }; + }; + + funnel_in1: funnel@0x6042000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b908>; + + reg = <0x6042000 0x1000>; + reg-names = "funnel-base"; + + coresight-name = "coresight-funnel-in1"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + funnel_in1_out_funnel_merg: endpoint { + remote-endpoint = + <&funnel_merg_in_funnel_in1>; + }; + }; + + port@3 { + reg = <4>; + funnel_in1_in_funnel_apss_merg: endpoint { + slave-mode; + remote-endpoint = + <&funnel_apss_merg_out_funnel_in1>; + }; + }; + }; + }; + + funnel_apss_merg: funnel@7810000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b908>; + + reg = <0x7810000 0x1000>; + reg-names = "funnel-base"; + + coresight-name = "coresight-funnel-apss-merg"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + funnel_apss_merg_out_funnel_in1: endpoint { + remote-endpoint = + <&funnel_in1_in_funnel_apss_merg>; + }; + }; + + port@1 { + reg = <0>; + funnel_apss_merg_in_funnel_apss: endpoint { + slave-mode; + remote-endpoint = + <&funnel_apss_out_funnel_apss_merg>; + }; + }; + + port@2 { + reg = <2>; + funnel_apss_merg_in_tpda_olc: endpoint { + slave-mode; + remote-endpoint = + <&tpda_olc_out_funnel_apss_merg>; + }; + }; + + port@3 { + reg = <3>; + funnel_apss_merg_in_tpda_llm_silver: endpoint { + slave-mode; + remote-endpoint = + <&tpda_llm_silver_out_funnel_apss_merg>; + }; + }; + + port@4 { + reg = <4>; + funnel_apss_merg_in_tpda_llm_gold: endpoint { + slave-mode; + remote-endpoint = + <&tpda_llm_gold_out_funnel_apss_merg>; + }; + }; + + port@5 { + reg = <5>; + funnel_apss_merg_in_tpda_apss: endpoint { + slave-mode; + remote-endpoint = + <&tpda_apss_out_funnel_apss_merg>; + }; + }; + }; + }; + + tpda_olc: tpda@7832000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b969>; + reg = <0x7832000 0x1000>; + reg-names = "tpda-base"; + + coresight-name = "coresight-tpda-olc"; + + qcom,tpda-atid = <69>; + qcom,cmb-elem-size = <0 64>; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + tpda_olc_out_funnel_apss_merg: endpoint { + remote-endpoint = + <&funnel_apss_merg_in_tpda_olc>; + }; + }; + + port@1 { + reg = <0>; + tpda_olc_in_tpdm_olc: endpoint { + slave-mode; + remote-endpoint = + <&tpdm_olc_out_tpda_olc>; + }; + }; + }; + }; + + tpdm_olc: tpdm@7830000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b968>; + reg = <0x7830000 0x1000>; + reg-names = "tpdm-base"; + + coresight-name = "coresight-tpdm-olc"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + port{ + tpdm_olc_out_tpda_olc: endpoint { + remote-endpoint = <&tpda_olc_in_tpdm_olc>; + }; + }; + }; + + tpda_apss: tpda@7862000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b969>; + reg = <0x7862000 0x1000>; + reg-names = "tpda-base"; + + coresight-name = "coresight-tpda-apss"; + + qcom,tpda-atid = <66>; + qcom,dsb-elem-size = <0 32>; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + tpda_apss_out_funnel_apss_merg: endpoint { + remote-endpoint = + <&funnel_apss_merg_in_tpda_apss>; + }; + }; + + port@1 { + reg = <0>; + tpda_apss_in_tpdm_apss: endpoint { + slave-mode; + remote-endpoint = + <&tpdm_apss_out_tpda_apss>; + }; + }; + }; + }; + + tpdm_apss: tpdm@7860000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b968>; + reg = <0x7860000 0x1000>; + reg-names = "tpdm-base"; + + coresight-name = "coresight-tpdm-apss"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + port { + tpdm_apss_out_tpda_apss: endpoint { + remote-endpoint = <&tpda_apss_in_tpdm_apss>; + }; + }; + }; + + tpda_llm_silver: tpda@78c0000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b969>; + reg = <0x78c0000 0x1000>; + reg-names = "tpda-base"; + + coresight-name = "coresight-tpda-llm-silver"; + + qcom,tpda-atid = <72>; + qcom,cmb-elem-size = <0 32>; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + tpda_llm_silver_out_funnel_apss_merg: endpoint { + remote-endpoint = + <&funnel_apss_merg_in_tpda_llm_silver>; + }; + }; + + port@1 { + reg = <0>; + tpda_llm_silver_in_tpdm_llm_silver: endpoint { + slave-mode; + remote-endpoint = + <&tpdm_llm_silver_out_tpda_llm_silver>; + }; + }; + }; + }; + + tpdm_llm_silver: tpdm@78a0000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b968>; + reg = <0x78a0000 0x1000>; + reg-names = "tpdm-base"; + + coresight-name = "coresight-tpdm-llm-silver"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + port { + tpdm_llm_silver_out_tpda_llm_silver: endpoint { + remote-endpoint = + <&tpda_llm_silver_in_tpdm_llm_silver>; + }; + }; + }; + + tpda_llm_gold: tpda@78d0000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b969>; + reg = <0x78d0000 0x1000>; + reg-names = "tpda-base"; + + coresight-name = "coresight-tpda-llm-gold"; + + qcom,tpda-atid = <73>; + qcom,cmb-elem-size = <0 32>; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + tpda_llm_gold_out_funnel_apss_merg: endpoint { + remote-endpoint = + <&funnel_apss_merg_in_tpda_llm_gold>; + }; + }; + + port@1 { + reg = <0>; + tpda_llm_gold_in_tpdm_llm_gold: endpoint { + slave-mode; + remote-endpoint = + <&tpdm_llm_gold_out_tpda_llm_gold>; + }; + }; + }; + }; + + tpdm_llm_gold: tpdm@78b0000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b968>; + reg = <0x78b0000 0x1000>; + reg-names = "tpdm-base"; + + coresight-name = "coresight-tpdm-llm-gold"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + port { + tpdm_llm_gold_out_tpda_llm_gold: endpoint { + remote-endpoint = + <&tpda_llm_gold_in_tpdm_llm_gold>; + }; + }; + }; + + funnel_apss: funnel@7800000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b908>; + + reg = <0x7800000 0x1000>; + reg-names = "funnel-base"; + + coresight-name = "coresight-funnel-apss"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + funnel_apss_out_funnel_apss_merg: endpoint { + remote-endpoint = + <&funnel_apss_merg_in_funnel_apss>; + }; + }; + + port@1 { + reg = <0>; + funnel_apss_in_etm0: endpoint { + slave-mode; + remote-endpoint = + <&etm0_out_funnel_apss>; + }; + }; + + port@2 { + reg = <1>; + funnel_apss_in_etm1: endpoint { + slave-mode; + remote-endpoint = + <&etm1_out_funnel_apss>; + }; + }; + + port@3 { + reg = <2>; + funnel_apss_in_etm2: endpoint { + slave-mode; + remote-endpoint = + <&etm2_out_funnel_apss>; + }; + }; + + port@4 { + reg = <3>; + funnel_apss_in_etm3: endpoint { + slave-mode; + remote-endpoint = + <&etm3_out_funnel_apss>; + }; + }; + + port@5 { + reg = <4>; + funnel_apss_in_etm4: endpoint { + slave-mode; + remote-endpoint = + <&etm4_out_funnel_apss>; + }; + }; + + port@6 { + reg = <5>; + funnel_apss_in_etm5: endpoint { + slave-mode; + remote-endpoint = + <&etm5_out_funnel_apss>; + }; + }; + + port@7 { + reg = <6>; + funnel_apss_in_etm6: endpoint { + slave-mode; + remote-endpoint = + <&etm6_out_funnel_apss>; + }; + }; + + port@8 { + reg = <7>; + funnel_apss_in_etm7: endpoint { + slave-mode; + remote-endpoint = + <&etm7_out_funnel_apss>; + }; + }; + }; + }; + + etm0: etm@7040000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb95d>; + + reg = <0x7040000 0x1000>; + cpu = <&CPU0>; + + coresight-name = "coresight-etm0"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; + + port { + etm0_out_funnel_apss: endpoint { + remote-endpoint = <&funnel_apss_in_etm0>; + }; + }; + }; + + etm1: etm@7140000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb95d>; + + reg = <0x7140000 0x1000>; + cpu = <&CPU1>; + + qcom,tupwr-disable; + coresight-name = "coresight-etm1"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + port { + etm1_out_funnel_apss: endpoint { + remote-endpoint = <&funnel_apss_in_etm1>; + }; + }; + }; + + etm2: etm@7240000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb95d>; + + reg = <0x7240000 0x1000>; + cpu = <&CPU2>; + + qcom,tupwr-disable; + coresight-name = "coresight-etm2"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + port { + etm2_out_funnel_apss: endpoint { + remote-endpoint = <&funnel_apss_in_etm2>; + }; + }; + }; + + etm3: etm@7340000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb95d>; + + reg = <0x7340000 0x1000>; + cpu = <&CPU3>; + + qcom,tupwr-disable; + coresight-name = "coresight-etm3"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + port { + etm3_out_funnel_apss: endpoint { + remote-endpoint = <&funnel_apss_in_etm3>; + }; + }; + }; + + etm4: etm@7440000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb95d>; + + reg = <0x7440000 0x1000>; + cpu = <&CPU4>; + + qcom,tupwr-disable; + coresight-name = "coresight-etm4"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + port { + etm4_out_funnel_apss: endpoint { + remote-endpoint = <&funnel_apss_in_etm4>; + }; + }; + }; + + etm5: etm@7540000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb95d>; + + reg = <0x7540000 0x1000>; + cpu = <&CPU5>; + + qcom,tupwr-disable; + coresight-name = "coresight-etm5"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + port { + etm5_out_funnel_apss: endpoint { + remote-endpoint = <&funnel_apss_in_etm5>; + }; + }; + }; + + etm6: etm@7640000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb95d>; + + reg = <0x7640000 0x1000>; + cpu = <&CPU6>; + + qcom,tupwr-disable; + coresight-name = "coresight-etm6"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + port { + etm6_out_funnel_apss: endpoint { + remote-endpoint = <&funnel_apss_in_etm6>; + }; + }; + }; + + etm7: etm@7740000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb95d>; + + reg = <0x7740000 0x1000>; + cpu = <&CPU7>; + + qcom,tupwr-disable; + coresight-name = "coresight-etm7"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + port { + etm7_out_funnel_apss: endpoint { + remote-endpoint = <&funnel_apss_in_etm7>; + }; + }; + }; + + cti0_apss: cti@78e0000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x78e0000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-apss_cti0"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti1_apss: cti@78f0000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x78f0000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-apss_cti1"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti2_apss: cti@7900000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x7900000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-apss_cti2"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti0: cti@6010000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x6010000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti0"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti1: cti@6011000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x6011000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti1"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti2: cti@6012000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x6012000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti2"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti3: cti@6013000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x6013000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti3"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti4: cti@6014000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x6014000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti4"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti5: cti@6015000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x6015000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti5"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti6: cti@6016000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x6016000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti6"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti7: cti@6017000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x6017000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti7"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti8: cti@6018000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x6018000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti8"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti9: cti@6019000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x6019000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti9"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti10: cti@601a000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x601a000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti10"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti11: cti@601b000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x601b000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti11"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti12: cti@601c000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x601c000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti12"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti13: cti@601d000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x601d000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti13"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti14: cti@601e000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x601e000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti14"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti15: cti@601f000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x601f000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti15"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti_cpu0: cti@7020000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x7020000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-cpu0"; + cpu = <&CPU0>; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti_cpu1: cti@7120000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x7120000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-cpu1"; + cpu = <&CPU1>; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti_cpu2: cti@7220000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x7220000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-cpu2"; + cpu = <&CPU2>; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti_cpu3: cti@7320000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x7320000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-cpu3"; + cpu = <&CPU3>; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti_cpu4: cti@7420000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x7420000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-cpu4"; + cpu = <&CPU4>; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti_cpu5: cti@7520000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x7520000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-cpu5"; + cpu = <&CPU5>; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti_cpu6: cti@7620000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x7620000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-cpu6"; + cpu = <&CPU6>; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti_cpu7: cti@7720000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x7720000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-cpu7"; + cpu = <&CPU7>; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + hwevent: hwevent@91866f0 { + compatible = "qcom,coresight-hwevent"; + reg = <0x091866f0 0x4>, + <0x91966f0 0x4>, + <0x9186038 0x4>, + <0x9196038 0x4>, + <0x17e00034 0x4>, + <0x18200050 0x80>, + <0x02c8d050 0x80>, + <0x0af20050 0x80>; + reg-names = "ddr-ch0-cfg", "ddr-ch23-cfg", "ddr-ch0-ctrl", + "ddr-ch23-ctrl", "apss-testbus-mux-cfg", + "apss-rsc-hwevent-mux0-select", + "gpu-rsc-hwevent-mux0-select", + "sde-rsc-hwevent-mux0-select"; + + coresight-name = "coresight-hwevent"; + coresight-csr = <&csr>; + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + funnel_qatb: funnel@6005000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b908>; + + reg = <0x6005000 0x1000>; + reg-names = "funnel-base"; + + coresight-name = "coresight-funnel-qatb"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + funnel_qatb_out_funnel_in0: endpoint { + remote-endpoint = + <&funnel_in0_in_funnel_qatb>; + }; + }; + + port@1 { + reg = <0>; + funnel_qatb_in_tpda: endpoint { + slave-mode; + remote-endpoint = + <&tpda_out_funnel_qatb>; + }; + }; + }; + }; + + tpda: tpda@6004000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b969>; + reg = <0x6004000 0x1000>; + reg-names = "tpda-base"; + + coresight-name = "coresight-tpda"; + + qcom,tpda-atid = <65>; + qcom,bc-elem-size = <10 32>, + <13 32>; + qcom,tc-elem-size = <13 32>; + qcom,dsb-elem-size = <0 32>, + <2 32>, + <3 32>, + <5 32>, + <6 32>, + <10 32>, + <11 32>, + <13 32>; + qcom,cmb-elem-size = <3 64>, + <7 64>, + <13 64>; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + tpda_out_funnel_qatb: endpoint { + remote-endpoint = + <&funnel_qatb_in_tpda>; + }; + + }; + + port@1 { + reg = <5>; + tpda_in_funnel_ddr_0: endpoint { + slave-mode; + remote-endpoint = + <&funnel_ddr_0_out_tpda>; + }; + }; + }; + }; + + funnel_ddr_0: funnel@6a05000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b908>; + + reg = <0x6a05000 0x1000>; + reg-names = "funnel-base"; + + coresight-name = "coresight-funnel-ddr-0"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + funnel_ddr_0_out_tpda: endpoint { + remote-endpoint = + <&tpda_in_funnel_ddr_0>; + }; + }; + + port@1 { + reg = <0>; + funnel_ddr_0_in_tpdm_ddr: endpoint { + slave-mode; + remote-endpoint = + <&tpdm_ddr_out_funnel_ddr_0>; + }; + }; + }; + }; + + tpdm_ddr: tpdm@6a00000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b968>; + reg = <0x6a00000 0x1000>; + reg-names = "tpdm-base"; + + coresight-name = "coresight-tpdm-ddr"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + qcom,msr-fix-req; + + port { + tpdm_ddr_out_funnel_ddr_0: endpoint { + remote-endpoint = <&funnel_ddr_0_in_tpdm_ddr>; + }; + }; + }; + + stm: stm@6002000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b962>; + + reg = <0x6002000 0x1000>, + <0x16280000 0x180000>, + <0x7820f0 0x4>; + reg-names = "stm-base", "stm-stimulus-base", "stm-debug-status"; + + coresight-name = "coresight-stm"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + port { + stm_out_funnel_in0: endpoint { + remote-endpoint = <&funnel_in0_in_stm>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/sdmshrike-pinctrl.dtsi b/arch/arm64/boot/dts/qcom/sdmshrike-pinctrl.dtsi index c45e50bdc39f..8017279a097d 100644 --- a/arch/arm64/boot/dts/qcom/sdmshrike-pinctrl.dtsi +++ b/arch/arm64/boot/dts/qcom/sdmshrike-pinctrl.dtsi @@ -5001,7 +5001,7 @@ config { pins = "gpio85", "gpio86"; drive-strength = <2>; - bias-disable; + bias-pull-down; }; }; }; diff --git a/arch/arm64/boot/dts/qcom/sdmshrike.dtsi b/arch/arm64/boot/dts/qcom/sdmshrike.dtsi index d967177aec66..d417ff891224 100644 --- a/arch/arm64/boot/dts/qcom/sdmshrike.dtsi +++ b/arch/arm64/boot/dts/qcom/sdmshrike.dtsi @@ -2841,6 +2841,7 @@ #include "sdmshrike-regulators.dtsi" #include "sdmshrike-ion.dtsi" #include "sdmshrike-bus.dtsi" +#include "sdmshrike-coresight.dtsi" #include "msm-arm-smmu-sdmshrike.dtsi" #include "sdmshrike-usb.dtsi" #include "sdmshrike-qupv3.dtsi" diff --git a/arch/arm64/boot/dts/qcom/sdxprairie-v2-dsda-cdp.dts b/arch/arm64/boot/dts/qcom/sdxprairie-v2-dsda-cdp.dts index af338a7787c5..81dfac855db4 100644 --- a/arch/arm64/boot/dts/qcom/sdxprairie-v2-dsda-cdp.dts +++ b/arch/arm64/boot/dts/qcom/sdxprairie-v2-dsda-cdp.dts @@ -16,9 +16,50 @@ #include "sdxprairie-cdp.dtsi" / { - model = "Qualcomm Technologies, Inc. SDXPRAIRIE v2 CDP - TELEMATICS AU DSDA"; + model = "Qualcomm Technologies, Inc. SDXPRAIRIE v2 CDP TEL AU DSDA"; compatible = "qcom,sdxprairie-cdp", "qcom,sdxprairie", "qcom,cdp"; qcom,board-id = <0x6010001 0x0>; }; + +/* delete pm8150b nodes */ +&thermal_zones { + /delete-node/ pm8150b-wp-therm; + /delete-node/ pm8150b_tz; + /delete-node/ pm8150b-ibat-lvl0; + /delete-node/ pm8150b-ibat-lvl1; + /delete-node/ pm8150b-vbat-lvl0; + /delete-node/ pm8150b-vbat-lvl1; + /delete-node/ pm8150b-vbat-lvl2; + /delete-node/ pm8150b-bcl-lvl0; + /delete-node/ pm8150b-bcl-lvl1; + /delete-node/ pm8150b-bcl-lvl2; + /delete-node/ soc; +}; + +&usb { + extcon = <&vbus_detect>; +}; + +&spmi_bus { + /delete-node/ qpnp,fg; + /delete-node/ bcl@1d00; + /delete-node/ qcom,usb-pdphy@1700; + /delete-node/ qcom,qpnp-smb5; + /delete-node/ adc_tm@3500; + /delete-node/ vadc@3100; + /delete-node/ qcom,pm8150b@2; + /delete-node/ qcom,pm8150b@3; +}; + +&qnand_1 { + status = "ok"; +}; + +&blsp1_uart2b_hs { + status = "okay"; +}; + +&vbus_detect { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/qcom/sdxprairie.dtsi b/arch/arm64/boot/dts/qcom/sdxprairie.dtsi index 4282950bec5e..8548d20c3808 100644 --- a/arch/arm64/boot/dts/qcom/sdxprairie.dtsi +++ b/arch/arm64/boot/dts/qcom/sdxprairie.dtsi @@ -547,7 +547,6 @@ qcom,use-ipa-pm; qcom,use-xbl-boot; qcom,arm-smmu; - qcom,smmu-fast-map; qcom,wlan-ce-db-over-pcie; qcom,bandwidth-vote-for-ipa; qcom,msm-bus,name = "ipa"; @@ -608,6 +607,8 @@ /* modem tables in IMEM */ <0x14688000 0x14688000 0x3000>; qcom,ipa-q6-smem-size = <26624>; + qcom,smmu-fast-map; + qcom,geometry-mapping = <0x0 0xF0000000>; }; ipa_smmu_wlan: ipa_smmu_wlan { @@ -1236,7 +1237,7 @@ qcom,pcie-active-config; qcom,pcie-aggregated-irq; qcom,pcie-mhi-a7-irq; - qcom,phy-status-reg = <0x814>; + qcom,phy-status-reg2 = <0x1214>; qcom,mhi-soc-reset-offset = <0xb01b8>; qcom,phy-init = <0x1240 0x001 0x0 0x1 diff --git a/arch/arm64/boot/dts/qcom/sm6150.dtsi b/arch/arm64/boot/dts/qcom/sm6150.dtsi index 4cac5c0ccb46..fae82d841330 100644 --- a/arch/arm64/boot/dts/qcom/sm6150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6150.dtsi @@ -634,7 +634,7 @@ }; disp_rdump_memory: disp_rdump_region@9c000000 { - reg = <0x0 0x9c000000 0x0 0x01000000>; + reg = <0x0 0x9c000000 0x0 0x0f00000>; label = "disp_rdump_region"; }; diff --git a/arch/arm64/configs/vendor/sa2150p-perf_defconfig b/arch/arm64/configs/vendor/sa2150p-perf_defconfig index 1effd0037e87..f5e65eed857b 100644 --- a/arch/arm64/configs/vendor/sa2150p-perf_defconfig +++ b/arch/arm64/configs/vendor/sa2150p-perf_defconfig @@ -249,6 +249,9 @@ CONFIG_DM_VERITY_FEC=y CONFIG_NETDEVICES=y CONFIG_DUMMY=y CONFIG_TUN=y +CONFIG_STMMAC_ETH=y +# CONFIG_DWMAC_GENERIC is not set +# CONFIG_DWMAC_IPQ806X is not set CONFIG_AT803X_PHY=y CONFIG_MICREL_PHY=y CONFIG_PPP=y @@ -290,7 +293,6 @@ CONFIG_SPI_QUP=y CONFIG_SPMI=y CONFIG_SLIMBUS_MSM_NGD=y CONFIG_PPS_CLIENT_GPIO=y -CONFIG_PTP_1588_CLOCK=y CONFIG_PINCTRL_QCS405=y CONFIG_FRAGMENTED_GPIO_ADDRESS_SPACE=y CONFIG_PINCTRL_QCOM_SPMI_PMIC=y diff --git a/arch/arm64/configs/vendor/sa2150p_defconfig b/arch/arm64/configs/vendor/sa2150p_defconfig index 74fdcd58b816..3ed8ba7dce30 100644 --- a/arch/arm64/configs/vendor/sa2150p_defconfig +++ b/arch/arm64/configs/vendor/sa2150p_defconfig @@ -255,6 +255,9 @@ CONFIG_DM_VERITY_FEC=y CONFIG_NETDEVICES=y CONFIG_DUMMY=y CONFIG_TUN=y +CONFIG_STMMAC_ETH=y +# CONFIG_DWMAC_GENERIC is not set +# CONFIG_DWMAC_IPQ806X is not set CONFIG_AT803X_PHY=y CONFIG_MICREL_PHY=y CONFIG_PPP=y @@ -300,7 +303,6 @@ CONFIG_SPMI=y CONFIG_SPMI_MSM_PMIC_ARB_DEBUG=y CONFIG_SLIMBUS_MSM_NGD=y CONFIG_PPS_CLIENT_GPIO=y -CONFIG_PTP_1588_CLOCK=y CONFIG_PINCTRL_QCS405=y CONFIG_FRAGMENTED_GPIO_ADDRESS_SPACE=y CONFIG_PINCTRL_QCOM_SPMI_PMIC=y diff --git a/arch/arm64/configs/vendor/sdmsteppe-auto-perf_defconfig b/arch/arm64/configs/vendor/sdmsteppe-auto-perf_defconfig index 3ed484a1a0c4..1f0d081ed1e4 100644 --- a/arch/arm64/configs/vendor/sdmsteppe-auto-perf_defconfig +++ b/arch/arm64/configs/vendor/sdmsteppe-auto-perf_defconfig @@ -520,7 +520,11 @@ CONFIG_QPNP_REVID=y CONFIG_SPS=y CONFIG_SPS_SUPPORT_NDP_BAM=y CONFIG_USB_BAM=y -CONFIG_GSI=y +CONFIG_IPA3=y +CONFIG_IPA_WDI_UNIFIED_API=y +CONFIG_RMNET_IPA3=y +CONFIG_RNDIS_IPA=y +CONFIG_IPA_UT=y CONFIG_MSM_11AD=m CONFIG_SPMI_PMIC_CLKDIV=y CONFIG_MSM_CLK_AOP_QMP=y diff --git a/arch/arm64/configs/vendor/sdmsteppe-auto_defconfig b/arch/arm64/configs/vendor/sdmsteppe-auto_defconfig index c7b325846756..cfb1b76eedd7 100644 --- a/arch/arm64/configs/vendor/sdmsteppe-auto_defconfig +++ b/arch/arm64/configs/vendor/sdmsteppe-auto_defconfig @@ -547,7 +547,12 @@ CONFIG_QPNP_REVID=y CONFIG_SPS=y CONFIG_SPS_SUPPORT_NDP_BAM=y CONFIG_USB_BAM=y -CONFIG_GSI=y +CONFIG_IPA3=y +CONFIG_IPA_DEBUG=y +CONFIG_IPA_WDI_UNIFIED_API=y +CONFIG_RMNET_IPA3=y +CONFIG_RNDIS_IPA=y +CONFIG_IPA_UT=y CONFIG_MSM_11AD=m CONFIG_SPMI_PMIC_CLKDIV=y CONFIG_MSM_CLK_AOP_QMP=y diff --git a/arch/arm64/configs/vendor/trinket-perf_defconfig b/arch/arm64/configs/vendor/trinket-perf_defconfig index 4ec93eb1019a..74a054f6473d 100644 --- a/arch/arm64/configs/vendor/trinket-perf_defconfig +++ b/arch/arm64/configs/vendor/trinket-perf_defconfig @@ -283,6 +283,7 @@ CONFIG_MD=y CONFIG_BLK_DEV_DM=y CONFIG_DM_CRYPT=y CONFIG_DM_DEFAULT_KEY=y +CONFIG_DM_SNAPSHOT=y CONFIG_DM_UEVENT=y CONFIG_DM_VERITY=y CONFIG_DM_VERITY_FEC=y diff --git a/arch/arm64/configs/vendor/trinket_defconfig b/arch/arm64/configs/vendor/trinket_defconfig index 54a087e1c4bb..0e05ff519201 100644 --- a/arch/arm64/configs/vendor/trinket_defconfig +++ b/arch/arm64/configs/vendor/trinket_defconfig @@ -294,6 +294,7 @@ CONFIG_MD=y CONFIG_BLK_DEV_DM=y CONFIG_DM_CRYPT=y CONFIG_DM_DEFAULT_KEY=y +CONFIG_DM_SNAPSHOT=y CONFIG_DM_UEVENT=y CONFIG_DM_VERITY=y CONFIG_DM_VERITY_FEC=y diff --git a/drivers/bus/mhi/controllers/mhi_qcom.c b/drivers/bus/mhi/controllers/mhi_qcom.c index 81a7ee796487..26811368e6c3 100644 --- a/drivers/bus/mhi/controllers/mhi_qcom.c +++ b/drivers/bus/mhi/controllers/mhi_qcom.c @@ -33,13 +33,16 @@ struct firmware_info { }; static const struct firmware_info firmware_table[] = { - {.dev_id = 0x308, .fw_image = "sdx65m/sbl1.mbn"}, - {.dev_id = 0x307, .fw_image = "sdx60m/sbl1.mbn"}, - {.dev_id = 0x306, .fw_image = "sdx55m/sbl1.mbn"}, + {.dev_id = 0x308, .fw_image = "sdx65m/sbl1.mbn", + .edl_image = "sdx65m/edl.mbn"}, + {.dev_id = 0x307, .fw_image = "sdx60m/sbl1.mbn", + .edl_image = "sdx60m/edl.mbn"}, + {.dev_id = 0x306, .fw_image = "sdx55m/sbl1.mbn", + .edl_image = "sdx55m/edl.mbn"}, {.dev_id = 0x305, .fw_image = "sdx50m/sbl1.mbn"}, {.dev_id = 0x304, .fw_image = "sbl.mbn", .edl_image = "edl.mbn"}, /* default, set to debug.mbn */ - {.fw_image = "debug.mbn"}, + {.fw_image = "debug.mbn", .edl_image = "debug.mbn"}, }; static int debug_mode; diff --git a/drivers/bus/mhi/core/mhi_internal.h b/drivers/bus/mhi/core/mhi_internal.h index 7b63da5fd225..61b8aa8cc611 100644 --- a/drivers/bus/mhi/core/mhi_internal.h +++ b/drivers/bus/mhi/core/mhi_internal.h @@ -752,6 +752,8 @@ struct mhi_bus { /* default MHI timeout */ #define MHI_TIMEOUT_MS (1000) +#define MHI_FORCE_WAKE_DELAY_US (100) + extern struct mhi_bus mhi_bus; struct mhi_controller *find_mhi_controller_by_name(const char *name); diff --git a/drivers/bus/mhi/core/mhi_pm.c b/drivers/bus/mhi/core/mhi_pm.c index 1ae24eba7769..550d0effa98d 100644 --- a/drivers/bus/mhi/core/mhi_pm.c +++ b/drivers/bus/mhi/core/mhi_pm.c @@ -404,35 +404,42 @@ void mhi_pm_m1_transition(struct mhi_controller *mhi_cntrl) enum MHI_PM_STATE state; write_lock_irq(&mhi_cntrl->pm_lock); + /* Just check if we are racing with device_wake assertion */ + if (atomic_read(&mhi_cntrl->dev_wake)) + MHI_VERB("M2 transition request post dev_wake:%d\n", + atomic_read(&mhi_cntrl->dev_wake)); + /* if it fails, means we transition to M3 */ state = mhi_tryset_pm_state(mhi_cntrl, MHI_PM_M2); - if (state == MHI_PM_M2) { - MHI_VERB("Entered M2 State\n"); - mhi_set_mhi_state(mhi_cntrl, MHI_STATE_M2); - mhi_cntrl->dev_state = MHI_STATE_M2; - mhi_cntrl->M2++; - - write_unlock_irq(&mhi_cntrl->pm_lock); - wake_up_all(&mhi_cntrl->state_event); - - /* transfer pending, exit M2 immediately */ - if (unlikely(atomic_read(&mhi_cntrl->pending_pkts) || - atomic_read(&mhi_cntrl->dev_wake))) { - MHI_VERB( - "Exiting M2 Immediately, pending_pkts:%d dev_wake:%d\n", - atomic_read(&mhi_cntrl->pending_pkts), - atomic_read(&mhi_cntrl->dev_wake)); - read_lock_bh(&mhi_cntrl->pm_lock); - mhi_cntrl->wake_get(mhi_cntrl, true); - mhi_cntrl->wake_put(mhi_cntrl, true); - read_unlock_bh(&mhi_cntrl->pm_lock); - } else { - mhi_cntrl->status_cb(mhi_cntrl, mhi_cntrl->priv_data, - MHI_CB_IDLE); - } - } else { + if (state != MHI_PM_M2) { + /* Nothing to be done, handle M3 transition later */ write_unlock_irq(&mhi_cntrl->pm_lock); + return; } + + MHI_VERB("Entered M2 State\n"); + mhi_set_mhi_state(mhi_cntrl, MHI_STATE_M2); + mhi_cntrl->dev_state = MHI_STATE_M2; + mhi_cntrl->M2++; + + write_unlock_irq(&mhi_cntrl->pm_lock); + wake_up_all(&mhi_cntrl->state_event); + + /* transfer pending, exit M2 immediately */ + if (unlikely(atomic_read(&mhi_cntrl->pending_pkts) || + atomic_read(&mhi_cntrl->dev_wake))) { + MHI_VERB( + "Exiting M2 Immediately, pending_pkts:%d dev_wake:%d\n", + atomic_read(&mhi_cntrl->pending_pkts), + atomic_read(&mhi_cntrl->dev_wake)); + read_lock_bh(&mhi_cntrl->pm_lock); + mhi_cntrl->wake_get(mhi_cntrl, true); + mhi_cntrl->wake_put(mhi_cntrl, true); + read_unlock_bh(&mhi_cntrl->pm_lock); + return; + } + + mhi_cntrl->status_cb(mhi_cntrl, mhi_cntrl->priv_data, MHI_CB_IDLE); } int mhi_pm_m3_transition(struct mhi_controller *mhi_cntrl) @@ -1580,6 +1587,57 @@ int mhi_device_get_sync(struct mhi_device *mhi_dev, int vote) } EXPORT_SYMBOL(mhi_device_get_sync); +int mhi_device_get_sync_atomic(struct mhi_device *mhi_dev, int timeout_us) +{ + struct mhi_controller *mhi_cntrl = mhi_dev->mhi_cntrl; + + read_lock_bh(&mhi_cntrl->pm_lock); + if (MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state)) { + read_unlock_bh(&mhi_cntrl->pm_lock); + return -EIO; + } + + mhi_cntrl->wake_get(mhi_cntrl, true); + read_unlock_bh(&mhi_cntrl->pm_lock); + + atomic_inc(&mhi_dev->dev_vote); + pm_wakeup_hard_event(&mhi_cntrl->mhi_dev->dev); + mhi_cntrl->runtime_get(mhi_cntrl, mhi_cntrl->priv_data); + + /* Return if client doesn't want us to wait */ + if (!timeout_us) { + if (mhi_cntrl->pm_state != MHI_PM_M0) + MHI_ERR("Return without waiting for M0\n"); + + mhi_cntrl->runtime_put(mhi_cntrl, mhi_cntrl->priv_data); + return 0; + } + + while (mhi_cntrl->pm_state != MHI_PM_M0 && + !MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state) && + timeout_us > 0) { + udelay(MHI_FORCE_WAKE_DELAY_US); + timeout_us -= MHI_FORCE_WAKE_DELAY_US; + } + + if (MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state) || timeout_us <= 0) { + MHI_ERR("Did not enter M0 state, cur_state:%s pm_state:%s\n", + TO_MHI_STATE_STR(mhi_cntrl->dev_state), + to_mhi_pm_state_str(mhi_cntrl->pm_state)); + read_lock_bh(&mhi_cntrl->pm_lock); + mhi_cntrl->wake_put(mhi_cntrl, false); + read_unlock_bh(&mhi_cntrl->pm_lock); + atomic_dec(&mhi_dev->dev_vote); + mhi_cntrl->runtime_put(mhi_cntrl, mhi_cntrl->priv_data); + return -ETIMEDOUT; + } + + mhi_cntrl->runtime_put(mhi_cntrl, mhi_cntrl->priv_data); + + return 0; +} +EXPORT_SYMBOL(mhi_device_get_sync_atomic); + void mhi_device_put(struct mhi_device *mhi_dev, int vote) { struct mhi_controller *mhi_cntrl = mhi_dev->mhi_cntrl; diff --git a/drivers/char/virtio_fastrpc.c b/drivers/char/virtio_fastrpc.c index 7a6de1fc4592..845acd8c1d6c 100644 --- a/drivers/char/virtio_fastrpc.c +++ b/drivers/char/virtio_fastrpc.c @@ -61,7 +61,6 @@ #define DEBUGFS_SIZE 3072 #define PID_SIZE 10 #define UL_SIZE 25 -#define FASTRPC_STATIC_HANDLE_KERNEL 1 #define VIRTIO_FASTRPC_CMD_OPEN 1 #define VIRTIO_FASTRPC_CMD_CLOSE 2 @@ -98,6 +97,33 @@ memmove((dst), (src), (size));\ } while (0) +#define PERF_KEYS \ + "count:flush:map:copy:rpmsg:getargs:putargs:invalidate:invoke:tid:ptr" +#define FASTRPC_STATIC_HANDLE_KERNEL 1 +#define FASTRPC_STATIC_HANDLE_LISTENER 3 +#define FASTRPC_STATIC_HANDLE_MAX 20 + +#define PERF_END (void)0 + +#define PERF(enb, cnt, ff) \ + {\ + struct timespec startT = {0};\ + int64_t *counter = cnt;\ + if (enb && counter) {\ + getnstimeofday(&startT);\ + } \ + ff ;\ + if (enb && counter) {\ + *counter += getnstimediff(&startT);\ + } \ + } + +#define GET_COUNTER(perf_ptr, offset) \ + (perf_ptr != NULL ?\ + (((offset >= 0) && (offset < PERF_KEY_MAX)) ?\ + (int64_t *)(perf_ptr + offset)\ + : (int64_t *)NULL) : (int64_t *)NULL) + struct virt_msg_hdr { u32 pid; /* GVM pid */ u32 tid; /* GVM tid */ @@ -181,9 +207,37 @@ struct fastrpc_apps { struct virt_fastrpc_msg *msgtable[FASTRPC_MSG_MAX]; }; +enum fastrpc_perfkeys { + PERF_COUNT = 0, + PERF_FLUSH = 1, + PERF_MAP = 2, + PERF_COPY = 3, + PERF_LINK = 4, + PERF_GETARGS = 5, + PERF_PUTARGS = 6, + PERF_INVARGS = 7, + PERF_INVOKE = 8, + PERF_KEY_MAX = 9, +}; + +struct fastrpc_perf { + int64_t count; + int64_t flush; + int64_t map; + int64_t copy; + int64_t link; + int64_t getargs; + int64_t putargs; + int64_t invargs; + int64_t invoke; + int64_t tid; + struct hlist_node hn; +}; + struct fastrpc_file { spinlock_t hlock; struct hlist_head maps; + struct hlist_head perf; struct hlist_head remote_bufs; uint32_t mode; uint32_t profile; @@ -195,6 +249,7 @@ struct fastrpc_file { int dsp_proc_init; struct fastrpc_apps *apps; struct dentry *debugfs_file; + struct mutex perf_mutex; struct mutex map_mutex; /* Identifies the device (MINOR_NUM_DEV / MINOR_NUM_SECURE_DEV) */ int dev_minor; @@ -242,6 +297,45 @@ static inline int64_t getnstimediff(struct timespec *start) return ns; } +static inline int64_t *getperfcounter(struct fastrpc_file *fl, int key) +{ + int err = 0; + int64_t *val = NULL; + struct fastrpc_perf *perf = NULL, *fperf = NULL; + struct hlist_node *n = NULL; + + VERIFY(err, !IS_ERR_OR_NULL(fl)); + if (err) + goto bail; + + mutex_lock(&fl->perf_mutex); + hlist_for_each_entry_safe(perf, n, &fl->perf, hn) { + if (perf->tid == current->pid) { + fperf = perf; + break; + } + } + + if (IS_ERR_OR_NULL(fperf)) { + fperf = kzalloc(sizeof(*fperf), GFP_KERNEL); + + VERIFY(err, !IS_ERR_OR_NULL(fperf)); + if (err) { + mutex_unlock(&fl->perf_mutex); + kfree(fperf); + goto bail; + } + + fperf->tid = current->pid; + hlist_add_head(&fperf->hn, &fl->perf); + } + + val = ((int64_t *)fperf) + key; + mutex_unlock(&fl->perf_mutex); +bail: + return val; +} + static void *get_a_tx_buf(void) { struct fastrpc_apps *me = &gfa; @@ -486,6 +580,11 @@ static int virt_fastrpc_invoke(struct fastrpc_file *fl, uint32_t kernel, struct fastrpc_mmap **maps; size_t copylen = 0, size = 0; char *payload; + struct timespec invoket = {0}; + int64_t *perf_counter = getperfcounter(fl, PERF_COUNT); + + if (fl->profile) + getnstimeofday(&invoket); bufs = REMOTE_SCALARS_LENGTH(invoke->sc); size = bufs * sizeof(*lpra) + bufs * sizeof(*fds) @@ -508,6 +607,7 @@ static int virt_fastrpc_invoke(struct fastrpc_file *fl, uint32_t kernel, fds = NULL; } + PERF(fl->profile, GET_COUNTER(perf_counter, PERF_MAP), /* calculate len required for copying */ for (i = 0; i < inbufs + outbufs; i++) { size_t len = lpra[i].buf.len; @@ -530,6 +630,7 @@ static int virt_fastrpc_invoke(struct fastrpc_file *fl, uint32_t kernel, if (i < inbufs) outbufs_offset += len; } + PERF_END); size = bufs * sizeof(*rpra) + copylen + sizeof(*vmsg); msg = virt_alloc_msg(size); if (!msg) @@ -551,6 +652,7 @@ static int virt_fastrpc_invoke(struct fastrpc_file *fl, uint32_t kernel, rpra = (struct virt_fastrpc_buf *)vmsg->pra; payload = (char *)&rpra[bufs]; + PERF(fl->profile, GET_COUNTER(perf_counter, PERF_COPY), for (i = 0; i < inbufs + outbufs; i++) { size_t len = lpra[i].buf.len; struct sg_table *table; @@ -582,7 +684,16 @@ static int virt_fastrpc_invoke(struct fastrpc_file *fl, uint32_t kernel, payload += len; } } + PERF_END); + if (fl->profile) { + int64_t *count = GET_COUNTER(perf_counter, PERF_GETARGS); + + if (count) + *count += getnstimediff(&invoket); + } + + PERF(fl->profile, GET_COUNTER(perf_counter, PERF_LINK), sg_init_one(sg, vmsg, size); mutex_lock(&me->lock); @@ -594,6 +705,7 @@ static int virt_fastrpc_invoke(struct fastrpc_file *fl, uint32_t kernel, virtqueue_kick(me->svq); mutex_unlock(&me->lock); + PERF_END); wait_for_completion(&msg->work); @@ -605,6 +717,7 @@ static int virt_fastrpc_invoke(struct fastrpc_file *fl, uint32_t kernel, rpra = (struct virt_fastrpc_buf *)rsp->pra; payload = (char *)&rpra[bufs] + outbufs_offset; + PERF(fl->profile, GET_COUNTER(perf_counter, PERF_PUTARGS), for (i = inbufs; i < inbufs + outbufs; i++) { if (!maps[i]) { K_COPY_TO_USER(err, kernel, lpra[i].buf.pv, @@ -619,6 +732,7 @@ static int virt_fastrpc_invoke(struct fastrpc_file *fl, uint32_t kernel, } payload += rpra[i].len; } + PERF_END); bail: if (rsp) { sg_init_one(sg, rsp, me->buf_size); @@ -651,8 +765,11 @@ static int fastrpc_internal_invoke(struct fastrpc_file *fl, int domain = fl->domain; int handles, err = 0; struct timespec invoket = {0}; + int64_t *perf_counter = getperfcounter(fl, PERF_COUNT); + + if (fl->profile) + getnstimeofday(&invoket); - getnstimeofday(&invoket); if (!kernel) { VERIFY(err, invoke->handle != FASTRPC_STATIC_HANDLE_KERNEL); if (err) { @@ -679,6 +796,20 @@ static int fastrpc_internal_invoke(struct fastrpc_file *fl, } err = virt_fastrpc_invoke(fl, kernel, inv); + if (fl->profile) { + if (invoke->handle != FASTRPC_STATIC_HANDLE_LISTENER) { + int64_t *count = GET_COUNTER(perf_counter, PERF_INVOKE); + + if (count) + *count += getnstimediff(&invoket); + } + if (invoke->handle > FASTRPC_STATIC_HANDLE_MAX) { + int64_t *count = GET_COUNTER(perf_counter, PERF_COUNT); + + if (count) + *count = *count + 1; + } + } bail: return err; } @@ -703,6 +834,8 @@ static ssize_t fastrpc_debugfs_read(struct file *filp, char __user *buffer, if (fl) { len += scnprintf(fileinfo + len, DEBUGFS_SIZE - len, "\n%s %d\n", " CHANNEL =", fl->domain); + len += scnprintf(fileinfo + len, DEBUGFS_SIZE - len, + "%s %9s %d\n", "profile", ":", fl->profile); } if (len > DEBUGFS_SIZE) @@ -931,6 +1064,7 @@ static int fastrpc_open(struct inode *inode, struct file *filp) spin_lock_init(&fl->hlock); INIT_HLIST_HEAD(&fl->maps); + INIT_HLIST_HEAD(&fl->perf); INIT_HLIST_HEAD(&fl->remote_bufs); fl->tgid = current->tgid; fl->apps = me; @@ -943,12 +1077,14 @@ static int fastrpc_open(struct inode *inode, struct file *filp) fl->dsp_proc_init = 0; filp->private_data = fl; mutex_init(&fl->map_mutex); + mutex_init(&fl->perf_mutex); return 0; } static int fastrpc_file_free(struct fastrpc_file *fl) { struct fastrpc_mmap *map = NULL, *lmap = NULL; + struct fastrpc_perf *perf = NULL, *fperf = NULL; if (!fl) return 0; @@ -975,6 +1111,21 @@ static int fastrpc_file_free(struct fastrpc_file *fl) } while (lmap); mutex_unlock(&fl->map_mutex); + mutex_lock(&fl->perf_mutex); + do { + struct hlist_node *pn = NULL; + + fperf = NULL; + hlist_for_each_entry_safe(perf, pn, &fl->perf, hn) { + hlist_del_init(&perf->hn); + fperf = perf; + break; + } + kfree(fperf); + } while (fperf); + mutex_unlock(&fl->perf_mutex); + mutex_destroy(&fl->perf_mutex); + fastrpc_remote_buf_list_free(fl); mutex_destroy(&fl->map_mutex); kfree(fl); @@ -1736,8 +1887,7 @@ static long fastrpc_ioctl(struct file *file, unsigned int ioctl_num, fl->mode = (uint32_t)ioctl_param; break; case FASTRPC_MODE_PROFILE: - err = -ENOTTY; - dev_err(me->dev, "profile mode is not supported\n"); + fl->profile = (uint32_t)ioctl_param; break; case FASTRPC_MODE_SESSION: err = -ENOTTY; @@ -1749,8 +1899,43 @@ static long fastrpc_ioctl(struct file *file, unsigned int ioctl_num, } break; case FASTRPC_IOCTL_GETPERF: - err = -ENOTTY; - dev_err(me->dev, "get perf is not supported\n"); + K_COPY_FROM_USER(err, 0, &p.perf, + param, sizeof(p.perf)); + if (err) + goto bail; + p.perf.numkeys = sizeof(struct fastrpc_perf)/sizeof(int64_t); + if (p.perf.keys) { + char *keys = PERF_KEYS; + + K_COPY_TO_USER(err, 0, (void *)p.perf.keys, + keys, strlen(keys)+1); + if (err) + goto bail; + } + if (p.perf.data) { + struct fastrpc_perf *perf = NULL, *fperf = NULL; + struct hlist_node *n = NULL; + + mutex_lock(&fl->perf_mutex); + hlist_for_each_entry_safe(perf, n, &fl->perf, hn) { + if (perf->tid == current->pid) { + fperf = perf; + break; + } + } + + mutex_unlock(&fl->perf_mutex); + + if (fperf) { + K_COPY_TO_USER(err, 0, + (void *)p.perf.data, fperf, + sizeof(*fperf) - + sizeof(struct hlist_node)); + } + } + K_COPY_TO_USER(err, 0, param, &p.perf, sizeof(p.perf)); + if (err) + goto bail; break; case FASTRPC_IOCTL_CONTROL: K_COPY_FROM_USER(err, 0, &p.cp, param, diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index e615b47b4702..5d5e1be282db 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -4115,6 +4115,7 @@ static int clk_add_and_print_opp(struct clk_hw *hw, unsigned long rate, int uv, int n) { struct clk_core *core = hw->core; + unsigned long rrate; int j, ret = 0; for (j = 0; j < count; j++) { @@ -4125,8 +4126,11 @@ static int clk_add_and_print_opp(struct clk_hw *hw, return ret; } - if (n == 0 || n == core->num_rate_max - 1 || - rate == clk_hw_round_rate(hw, INT_MAX)) + clk_prepare_lock(); + rrate = clk_hw_round_rate(hw, INT_MAX); + clk_prepare_unlock(); + + if (n == 0 || n == core->num_rate_max - 1 || rate == rrate) pr_info("%s: set OPP pair(%lu Hz: %u uV) on %s\n", core->name, rate, uv, dev_name(device_list[j])); @@ -4181,7 +4185,9 @@ static void clk_populate_clock_opp_table(struct device_node *np, } for (n = 0; ; n++) { + clk_prepare_lock(); rrate = clk_hw_round_rate(hw, rate + 1); + clk_prepare_unlock(); if (!rrate) { pr_err("clk_round_rate failed for %s\n", core->name); diff --git a/drivers/clk/qcom/camcc-sm6150.c b/drivers/clk/qcom/camcc-sm6150.c index c7942f794804..a06275a133fc 100644 --- a/drivers/clk/qcom/camcc-sm6150.c +++ b/drivers/clk/qcom/camcc-sm6150.c @@ -159,7 +159,7 @@ static struct pll_vco cam_cc_pll_vco[] = { }; /* 600MHz configuration */ -static struct alpha_pll_config cam_cc_pll0_config = { +static const struct alpha_pll_config cam_cc_pll0_config = { .l = 0x1F, .alpha_u = 0x40, .alpha_en_mask = BIT(24), @@ -175,7 +175,6 @@ static struct clk_alpha_pll cam_cc_pll0_out_aux = { .offset = 0x0, .vco_table = cam_cc_pll_vco, .num_vco = ARRAY_SIZE(cam_cc_pll_vco), - .config = &cam_cc_pll0_config, .clkr = { .hw.init = &(struct clk_init_data){ .name = "cam_cc_pll0_out_aux", @@ -192,7 +191,7 @@ static struct clk_alpha_pll cam_cc_pll0_out_aux = { }; /* 808MHz configuration */ -static struct alpha_pll_config cam_cc_pll1_config = { +static const struct alpha_pll_config cam_cc_pll1_config = { .l = 0x2A, .alpha_u = 0x15, .alpha = 0x55555555, @@ -209,7 +208,6 @@ static struct clk_alpha_pll cam_cc_pll1_out_aux = { .offset = 0x1000, .vco_table = cam_cc_pll_vco, .num_vco = ARRAY_SIZE(cam_cc_pll_vco), - .config = &cam_cc_pll1_config, .clkr = { .hw.init = &(struct clk_init_data){ .name = "cam_cc_pll1_out_aux", @@ -226,7 +224,7 @@ static struct clk_alpha_pll cam_cc_pll1_out_aux = { }; /* 960MHz configuration */ -static struct alpha_pll_config cam_cc_pll2_config = { +static const struct alpha_pll_config cam_cc_pll2_config = { .l = 0x32, .vco_val = 0x0 << 20, .vco_mask = 0x3 << 20, @@ -243,7 +241,6 @@ static struct clk_alpha_pll cam_cc_pll2_out_early = { .offset = 0x2000, .vco_table = cam_cc_pll2_vco, .num_vco = ARRAY_SIZE(cam_cc_pll2_vco), - .config = &cam_cc_pll2_config, .clkr = { .hw.init = &(struct clk_init_data){ .name = "cam_cc_pll2_out_early", @@ -270,7 +267,7 @@ static struct clk_alpha_pll_postdiv cam_cc_pll2_out_aux2 = { }; /* 1080MHz configuration */ -static struct alpha_pll_config cam_cc_pll3_config = { +static const struct alpha_pll_config cam_cc_pll3_config = { .l = 0x38, .alpha_u = 0x40, .alpha_en_mask = BIT(24), @@ -286,7 +283,6 @@ static struct clk_alpha_pll cam_cc_pll3_out_main = { .offset = 0x3000, .vco_table = cam_cc_pll_vco, .num_vco = ARRAY_SIZE(cam_cc_pll_vco), - .config = &cam_cc_pll3_config, .clkr = { .hw.init = &(struct clk_init_data){ .name = "cam_cc_pll3_out_main", @@ -349,7 +345,6 @@ static struct clk_rcg2 cam_cc_cci_clk_src = { .hid_width = 5, .parent_map = cam_cc_parent_map_5, .freq_tbl = ftbl_cam_cc_cci_clk_src, - .enable_safe_config = true, .clkr.hw.init = &(struct clk_init_data){ .name = "cam_cc_cci_clk_src", .parent_names = cam_cc_parent_names_5, @@ -379,7 +374,6 @@ static struct clk_rcg2 cam_cc_cphy_rx_clk_src = { .hid_width = 5, .parent_map = cam_cc_parent_map_2, .freq_tbl = ftbl_cam_cc_cphy_rx_clk_src, - .enable_safe_config = true, .clkr.hw.init = &(struct clk_init_data){ .name = "cam_cc_cphy_rx_clk_src", .parent_names = cam_cc_parent_names_2, @@ -409,7 +403,6 @@ static struct clk_rcg2 cam_cc_csi0phytimer_clk_src = { .hid_width = 5, .parent_map = cam_cc_parent_map_0, .freq_tbl = ftbl_cam_cc_csi0phytimer_clk_src, - .enable_safe_config = true, .clkr.hw.init = &(struct clk_init_data){ .name = "cam_cc_csi0phytimer_clk_src", .parent_names = cam_cc_parent_names_0, @@ -430,7 +423,6 @@ static struct clk_rcg2 cam_cc_csi1phytimer_clk_src = { .hid_width = 5, .parent_map = cam_cc_parent_map_0, .freq_tbl = ftbl_cam_cc_csi0phytimer_clk_src, - .enable_safe_config = true, .clkr.hw.init = &(struct clk_init_data){ .name = "cam_cc_csi1phytimer_clk_src", .parent_names = cam_cc_parent_names_0, @@ -451,7 +443,6 @@ static struct clk_rcg2 cam_cc_csi2phytimer_clk_src = { .hid_width = 5, .parent_map = cam_cc_parent_map_0, .freq_tbl = ftbl_cam_cc_csi0phytimer_clk_src, - .enable_safe_config = true, .clkr.hw.init = &(struct clk_init_data){ .name = "cam_cc_csi2phytimer_clk_src", .parent_names = cam_cc_parent_names_0, @@ -480,7 +471,6 @@ static struct clk_rcg2 cam_cc_fast_ahb_clk_src = { .hid_width = 5, .parent_map = cam_cc_parent_map_0, .freq_tbl = ftbl_cam_cc_fast_ahb_clk_src, - .enable_safe_config = true, .clkr.hw.init = &(struct clk_init_data){ .name = "cam_cc_fast_ahb_clk_src", .parent_names = cam_cc_parent_names_0, @@ -791,7 +781,6 @@ static struct clk_rcg2 cam_cc_mclk0_clk_src = { .hid_width = 5, .parent_map = cam_cc_parent_map_3, .freq_tbl = ftbl_cam_cc_mclk0_clk_src, - .enable_safe_config = true, .clkr.hw.init = &(struct clk_init_data){ .name = "cam_cc_mclk0_clk_src", .parent_names = cam_cc_parent_names_3, @@ -811,7 +800,6 @@ static struct clk_rcg2 cam_cc_mclk1_clk_src = { .hid_width = 5, .parent_map = cam_cc_parent_map_3, .freq_tbl = ftbl_cam_cc_mclk0_clk_src, - .enable_safe_config = true, .clkr.hw.init = &(struct clk_init_data){ .name = "cam_cc_mclk1_clk_src", .parent_names = cam_cc_parent_names_3, @@ -831,7 +819,6 @@ static struct clk_rcg2 cam_cc_mclk2_clk_src = { .hid_width = 5, .parent_map = cam_cc_parent_map_3, .freq_tbl = ftbl_cam_cc_mclk0_clk_src, - .enable_safe_config = true, .clkr.hw.init = &(struct clk_init_data){ .name = "cam_cc_mclk2_clk_src", .parent_names = cam_cc_parent_names_3, @@ -851,7 +838,6 @@ static struct clk_rcg2 cam_cc_mclk3_clk_src = { .hid_width = 5, .parent_map = cam_cc_parent_map_3, .freq_tbl = ftbl_cam_cc_mclk0_clk_src, - .enable_safe_config = true, .clkr.hw.init = &(struct clk_init_data){ .name = "cam_cc_mclk3_clk_src", .parent_names = cam_cc_parent_names_3, @@ -1775,13 +1761,13 @@ static int cam_cc_sm6150_probe(struct platform_device *pdev) } clk_alpha_pll_configure(&cam_cc_pll0_out_aux, regmap, - cam_cc_pll0_out_aux.config); + &cam_cc_pll0_config); clk_alpha_pll_configure(&cam_cc_pll1_out_aux, regmap, - cam_cc_pll1_out_aux.config); + &cam_cc_pll1_config); clk_alpha_pll_configure(&cam_cc_pll2_out_early, regmap, - cam_cc_pll2_out_early.config); + &cam_cc_pll2_config); clk_alpha_pll_configure(&cam_cc_pll3_out_main, regmap, - cam_cc_pll3_out_main.config); + &cam_cc_pll3_config); ret = qcom_cc_really_probe(pdev, &cam_cc_sm6150_desc, regmap); if (ret) { diff --git a/drivers/clk/qcom/dispcc-sm6150.c b/drivers/clk/qcom/dispcc-sm6150.c index 7de420931b1f..2c115626f50c 100644 --- a/drivers/clk/qcom/dispcc-sm6150.c +++ b/drivers/clk/qcom/dispcc-sm6150.c @@ -129,7 +129,7 @@ static struct pll_vco disp_cc_pll_vco[] = { }; /* 576MHz configuration */ -static struct alpha_pll_config disp_cc_pll0_config = { +static const struct alpha_pll_config disp_cc_pll0_config = { .l = 0x1E, .vco_val = 0x2 << 20, .vco_mask = 0x3 << 20, @@ -156,7 +156,6 @@ static struct clk_alpha_pll disp_cc_pll0_out_main = { .vco_table = disp_cc_pll_vco, .num_vco = ARRAY_SIZE(disp_cc_pll_vco), .flags = SUPPORTS_DYNAMIC_UPDATE, - .config = &disp_cc_pll0_config, .clkr = { .hw.init = &(struct clk_init_data){ .name = "disp_cc_pll0_out_main", @@ -282,7 +281,6 @@ static struct clk_rcg2 disp_cc_mdss_dp_link_clk_src = { .hid_width = 5, .parent_map = disp_cc_parent_map_0, .freq_tbl = ftbl_disp_cc_mdss_dp_link_clk_src, - .enable_safe_config = true, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_link_clk_src", .parent_names = disp_cc_parent_names_0, @@ -865,7 +863,7 @@ static int disp_cc_sm6150_probe(struct platform_device *pdev) } clk_alpha_pll_configure(&disp_cc_pll0_out_main, regmap, - disp_cc_pll0_out_main.config); + &disp_cc_pll0_config); ret = qcom_cc_really_probe(pdev, &disp_cc_sm6150_desc, regmap); if (ret) { diff --git a/drivers/clk/qcom/gpucc-sm6150.c b/drivers/clk/qcom/gpucc-sm6150.c index 1871ae7e4328..04ed13b5230c 100644 --- a/drivers/clk/qcom/gpucc-sm6150.c +++ b/drivers/clk/qcom/gpucc-sm6150.c @@ -110,7 +110,7 @@ static struct pll_vco gpu_cc_pll1_vco[] = { }; /* 1020MHz configuration */ -static struct alpha_pll_config gpu_pll0_config = { +static const struct alpha_pll_config gpu_pll0_config = { .l = 0x35, .config_ctl_val = 0x4001055b, .test_ctl_hi_val = 0x1, @@ -124,7 +124,7 @@ static struct alpha_pll_config gpu_pll0_config = { }; /* 930MHz configuration */ -static struct alpha_pll_config gpu_pll1_config = { +static const struct alpha_pll_config gpu_pll1_config = { .l = 0x30, .config_ctl_val = 0x4001055b, .test_ctl_hi_val = 0x1, @@ -154,7 +154,6 @@ static struct clk_alpha_pll gpu_cc_pll0_out_aux2 = { .vco_table = gpu_cc_pll_vco, .num_vco = ARRAY_SIZE(gpu_cc_pll_vco), .flags = SUPPORTS_DYNAMIC_UPDATE, - .config = &gpu_pll0_config, .clkr = { .hw.init = &(struct clk_init_data){ .name = "gpu_cc_pll0_out_aux2", @@ -187,7 +186,6 @@ static struct clk_alpha_pll gpu_cc_pll1_out_aux2 = { .vco_table = gpu_cc_pll_vco, .num_vco = ARRAY_SIZE(gpu_cc_pll_vco), .flags = SUPPORTS_DYNAMIC_UPDATE, - .config = &gpu_pll1_config, .clkr = { .hw.init = &(struct clk_init_data){ .name = "gpu_cc_pll1_out_aux2", @@ -643,9 +641,9 @@ static int gpu_cc_sm6150_probe(struct platform_device *pdev) } clk_alpha_pll_configure(&gpu_cc_pll0_out_aux2, regmap, - gpu_cc_pll0_out_aux2.config); + &gpu_pll0_config); clk_alpha_pll_configure(&gpu_cc_pll1_out_aux2, regmap, - gpu_cc_pll1_out_aux2.config); + &gpu_pll1_config); ret = qcom_cc_really_probe(pdev, &gpu_cc_sm6150_desc, regmap); if (ret) { diff --git a/drivers/clk/qcom/mdss/mdss-dsi-pll-10nm.c b/drivers/clk/qcom/mdss/mdss-dsi-pll-10nm.c index ab44b3964f71..e549ef13f578 100644 --- a/drivers/clk/qcom/mdss/mdss-dsi-pll-10nm.c +++ b/drivers/clk/qcom/mdss/mdss-dsi-pll-10nm.c @@ -470,7 +470,7 @@ static void dsi_pll_config_slave(struct mdss_pll_resources *rsc) rsc->slave = NULL; if (!orsc) { - pr_warn("slave PLL unavilable, assuming standalone config\n"); + pr_debug("slave PLL unavilable, assuming standalone config\n"); return; } diff --git a/drivers/clk/qcom/scc-sm6150.c b/drivers/clk/qcom/scc-sm6150.c index 19b96825cc84..1790b13a993c 100644 --- a/drivers/clk/qcom/scc-sm6150.c +++ b/drivers/clk/qcom/scc-sm6150.c @@ -37,8 +37,8 @@ static DEFINE_VDD_REGULATORS(vdd_scc_cx, VDD_NUM, 1, vdd_corner); enum { - P_AOSS_CC_RO_CLK, P_AON_SLEEP_CLK, + P_AOSS_CC_RO_CLK, P_CORE_PI_CXO_CLK, P_QDSP6SS_PLL_OUT_AUX, P_SCC_PLL_OUT_AUX, @@ -69,6 +69,51 @@ static const char * const scc_parent_names_0[] = { "ssc_bi_pll_test_se", }; +static struct pll_vco scc_pll_vco[] = { + { 500000000, 1000000000, 2 }, +}; + +/* 600MHz configuration */ +static const struct alpha_pll_config scc_pll_config = { + .l = 0x1F, + .alpha_u = 0x40, + .alpha_en_mask = BIT(24), + .vco_val = 0x2 << 20, + .vco_mask = 0x3 << 20, + .post_div_val = 0x3 << 15, + .post_div_mask = 0x7 << 15, + .aux_output_mask = BIT(1), + .aux2_output_mask = BIT(2), + .config_ctl_val = 0x4001055b, + .test_ctl_hi_val = 0x1, + .test_ctl_hi_mask = 0x1, +}; + +static struct clk_alpha_pll scc_pll_out_aux2 = { + .offset = 0x0, + .vco_table = scc_pll_vco, + .num_vco = ARRAY_SIZE(scc_pll_vco), + .clkr.hw.init = &(struct clk_init_data){ + .name = "scc_pll_out_aux2", + .parent_names = (const char *[]){ "bi_tcxo" }, + .num_parents = 1, + .ops = &clk_alpha_pll_ops, + .vdd_class = &vdd_scc_cx, + .num_rate_max = VDD_NUM, + .rate_max = (unsigned long[VDD_NUM]) { + [VDD_MIN] = 1000000000, + [VDD_NOMINAL] = 2000000000}, + }, +}; + +static const struct clk_div_table post_div_table[] = { + { 0x0, 1 }, + { 0x3, 3 }, + { 0x5, 5 }, + { 0x7, 7 }, + { } +}; + static const struct freq_tbl ftbl_scc_main_rcg_clk_src[] = { F(100000000, P_SCC_PLL_OUT_AUX, 2, 0, 0), F(200000000, P_SCC_PLL_OUT_AUX, 1, 0, 0), @@ -510,6 +555,8 @@ static int scc_sm6150_probe(struct platform_device *pdev) return PTR_ERR(regmap); } + clk_alpha_pll_configure(&scc_pll_out_aux2, regmap, &scc_pll_config); + ret = qcom_cc_really_probe(pdev, &scc_sm6150_desc, regmap); if (ret) { dev_err(&pdev->dev, "Failed to register SCC clocks\n"); diff --git a/drivers/clk/qcom/videocc-sm6150.c b/drivers/clk/qcom/videocc-sm6150.c index f74a97264ae9..26adcec4e9e3 100644 --- a/drivers/clk/qcom/videocc-sm6150.c +++ b/drivers/clk/qcom/videocc-sm6150.c @@ -85,7 +85,7 @@ static struct pll_vco video_cc_pll_vco[] = { }; /* 600MHz configuration */ -static struct alpha_pll_config video_pll0_config = { +static const struct alpha_pll_config video_pll0_config = { .l = 0x1F, .alpha_u = 0x40, .alpha = 0x00, @@ -115,7 +115,6 @@ static struct clk_alpha_pll video_pll0_out_main = { .vco_table = video_cc_pll_vco, .num_vco = ARRAY_SIZE(video_cc_pll_vco), .flags = SUPPORTS_DYNAMIC_UPDATE, - .config = &video_pll0_config, .clkr = { .hw.init = &(struct clk_init_data){ .name = "video_pll0_out_main", @@ -399,7 +398,7 @@ static int video_cc_sm6150_probe(struct platform_device *pdev) } clk_alpha_pll_configure(&video_pll0_out_main, regmap, - video_pll0_out_main.config); + &video_pll0_config); ret = qcom_cc_really_probe(pdev, &video_cc_sm6150_desc, regmap); if (ret) { diff --git a/drivers/dma-buf/dma-buf.c b/drivers/dma-buf/dma-buf.c index c55d9e7503b7..b4155eca3847 100644 --- a/drivers/dma-buf/dma-buf.c +++ b/drivers/dma-buf/dma-buf.c @@ -635,6 +635,7 @@ struct dma_buf *dma_buf_export(const struct dma_buf_export_info *exp_info) dmabuf->cb_excl.poll = dmabuf->cb_shared.poll = &dmabuf->poll; dmabuf->cb_excl.active = dmabuf->cb_shared.active = 0; dmabuf->buf_name = bufname; + dmabuf->name = bufname; dmabuf->ktime = ktime_get(); if (!resv) { diff --git a/drivers/firmware/qcom/tz_log.c b/drivers/firmware/qcom/tz_log.c index 75f64286dad6..6be89ae0b8c2 100644 --- a/drivers/firmware/qcom/tz_log.c +++ b/drivers/firmware/qcom/tz_log.c @@ -327,6 +327,7 @@ static struct tzdbg tzdbg = { static struct tzdbg_log_t *g_qsee_log; static dma_addr_t coh_pmem; static uint32_t debug_rw_buf_size; +static bool restore_from_hibernation; /* * Debugfs data structure and functions @@ -717,6 +718,15 @@ static int _disp_tz_log_stats(size_t count) { static struct tzdbg_log_pos_t log_start = {0}; struct tzdbg_log_t *log_ptr; + /* wrap and offset are initialized to zero since tz is coldboot + * during restoration from hibernation.the reason to initialise + * the wrap and offset to zero since it contains previous boot + * values and which are invalid now. + */ + if (restore_from_hibernation) { + log_start.wrap = log_start.offset = 0; + return 0; + } log_ptr = (struct tzdbg_log_t *)((unsigned char *)tzdbg.diag_buf + tzdbg.diag_buf->ring_off - @@ -742,6 +752,16 @@ static int _disp_qsee_log_stats(size_t count) { static struct tzdbg_log_pos_t log_start = {0}; + /* wrap and offset are initialized to zero since tz is coldboot + * during restoration from hibernation. The reason to initialise + * the wrap and offset to zero since it contains previous values + * and which are invalid now. + */ + if (restore_from_hibernation) { + log_start.wrap = log_start.offset = 0; + return 0; + } + return _disp_log_stats(g_qsee_log, &log_start, QSEE_LOG_BUF_SIZE - sizeof(struct tzdbg_log_pos_t), count, TZDBG_QSEE_LOG); @@ -1140,6 +1160,52 @@ static int tz_log_remove(struct platform_device *pdev) return 0; } +#ifdef CONFIG_PM +static int tz_log_freeze(struct device *dev) +{ + /* This Boolean variable is maintained to initialise the ring buffer + * log pointer to zero during restoration from hibernation + */ + restore_from_hibernation = 1; + if (g_qsee_log) + dma_free_coherent(dev, QSEE_LOG_BUF_SIZE, (void *)g_qsee_log, + coh_pmem); + return 0; +} + +static int tz_log_restore(struct device *dev) +{ + /* ring buffer log pointer needs to be re initialized + * during restoration from hibernation. + */ + if (restore_from_hibernation) { + _disp_tz_log_stats(0); + _disp_qsee_log_stats(0); + } + /* Register the log bugger at TZ during hibernation resume. + * After hibernation the log buffer is with HLOS as TZ encountered + * a coldboot sequence. + */ + tzdbg_register_qsee_log_buf(to_platform_device(dev)); + /* This is set back to zero after successful restoration + * from hibernation. + */ + restore_from_hibernation = 0; + return 0; +} + +static const struct dev_pm_ops tz_log_pmops = { + .freeze = tz_log_freeze, + .restore = tz_log_restore, + .thaw = tz_log_restore, +}; + +#define TZ_LOG_PMOPS (&tz_log_pmops) + +#else +#define TZ_LOG_PMOPS NULL +#endif + static const struct of_device_id tzlog_match[] = { { .compatible = "qcom,tz-log", }, diff --git a/drivers/gpu/drm/drm_auth.c b/drivers/gpu/drm/drm_auth.c index 2ab6516665cc..1669c42c40ed 100644 --- a/drivers/gpu/drm/drm_auth.c +++ b/drivers/gpu/drm/drm_auth.c @@ -232,6 +232,12 @@ int drm_dropmaster_ioctl(struct drm_device *dev, void *data, if (!dev->master) goto out_unlock; + if (file_priv->master->lessor != NULL) { + DRM_DEBUG_LEASE("Attempt to drop lessee %d as master\n", file_priv->master->lessee_id); + ret = -EINVAL; + goto out_unlock; + } + ret = 0; drm_drop_master(dev, file_priv); out_unlock: diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index 3ba6d904ae80..03cb7721e13a 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -145,6 +145,9 @@ static void free_sink_buffer(struct etm_event_data *event_data) cpu = cpumask_first(mask); sink = coresight_get_sink(etm_event_cpu_path(event_data, cpu)); + if (!sink) + return; + sink_ops(sink)->free_buffer(event_data->snk_config); } diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c index 19d33fbdb6f6..7d79f0dfd01d 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c @@ -964,8 +964,11 @@ static ssize_t addr_range_show(struct device *dev, spin_lock(&drvdata->spinlock); idx = config->addr_idx; - if (idx >= ETM_MAX_SINGLE_ADDR_CMP) + if (idx >= ETM_MAX_SINGLE_ADDR_CMP) { + spin_unlock(&drvdata->spinlock); return -EINVAL; + } + if (idx % 2 != 0) { spin_unlock(&drvdata->spinlock); return -EPERM; @@ -1002,8 +1005,11 @@ static ssize_t addr_range_store(struct device *dev, spin_lock(&drvdata->spinlock); idx = config->addr_idx; - if (idx >= ETM_MAX_SINGLE_ADDR_CMP) + if (idx >= ETM_MAX_SINGLE_ADDR_CMP) { + spin_unlock(&drvdata->spinlock); return -EINVAL; + } + if (idx % 2 != 0) { spin_unlock(&drvdata->spinlock); return -EPERM; diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index 3baf2c8cf0dc..745fcaad4348 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -883,7 +883,9 @@ static struct etr_buf *tmc_alloc_etr_buf(struct tmc_drvdata *drvdata, static void tmc_free_etr_buf(struct etr_buf *etr_buf) { - WARN_ON(!etr_buf->ops || !etr_buf->ops->free); + if (WARN_ON(!etr_buf->ops || !etr_buf->ops->free)) + return; + etr_buf->ops->free(etr_buf); kfree(etr_buf); } @@ -947,7 +949,8 @@ static void tmc_sync_etr_buf(struct tmc_drvdata *drvdata) etr_buf->full = status & TMC_STS_FULL; - WARN_ON(!etr_buf->ops || !etr_buf->ops->sync); + if (WARN_ON(!etr_buf->ops || !etr_buf->ops->sync)) + return; etr_buf->ops->sync(etr_buf, rrp, rwp); } diff --git a/drivers/input/misc/qpnp-power-on.c b/drivers/input/misc/qpnp-power-on.c index d84f3c0ae33e..abb57ad50d9d 100644 --- a/drivers/input/misc/qpnp-power-on.c +++ b/drivers/input/misc/qpnp-power-on.c @@ -242,6 +242,7 @@ struct qpnp_pon { bool resin_pon_reset; ktime_t kpdpwr_last_release_time; struct notifier_block pon_nb; + bool legacy_hard_reset_offset; }; static int pon_ship_mode_en; @@ -423,7 +424,7 @@ int qpnp_pon_set_restart_reason(enum pon_restart_reason reason) if (!pon->store_hard_reset_reason) return 0; - if (is_pon_gen2(pon)) + if (is_pon_gen2(pon) && !pon->legacy_hard_reset_offset) rc = qpnp_pon_masked_write(pon, QPNP_PON_SOFT_RB_SPARE(pon), GENMASK(7, 1), (reason << 1)); else @@ -2416,6 +2417,9 @@ static int qpnp_pon_probe(struct platform_device *pdev) pon->store_hard_reset_reason = of_property_read_bool(dev->of_node, "qcom,store-hard-reset-reason"); + pon->legacy_hard_reset_offset = of_property_read_bool(pdev->dev.of_node, + "qcom,use-legacy-hard-reset-offset"); + if (of_property_read_bool(dev->of_node, "qcom,secondary-pon-reset")) { if (sys_reset) { dev_err(dev, "qcom,system-reset property shouldn't be used along with qcom,secondary-pon-reset property\n"); diff --git a/drivers/media/platform/msm/camera_v2/sensor/csid/msm_csid.c b/drivers/media/platform/msm/camera_v2/sensor/csid/msm_csid.c index 851bb261ca1b..9f0bd6f9e4f0 100644 --- a/drivers/media/platform/msm/camera_v2/sensor/csid/msm_csid.c +++ b/drivers/media/platform/msm/camera_v2/sensor/csid/msm_csid.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2011-2019, The Linux Foundation. All rights reserved. +/* Copyright (c) 2011-2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -854,6 +854,14 @@ static int msm_csid_release(struct csid_device *csid_dev) msm_camera_enable_irq(csid_dev->irq, false); + if (msm_camera_tz_is_secured( + MSM_CAMERA_TZ_IO_REGION_CSIDCORE0 + csid_dev->pdev->id) == 0) { + msm_camera_vio_w(csid_dev->ctrl_reg->csid_reg.csid_rst_stb_all, + csid_dev->base, + csid_dev->ctrl_reg->csid_reg.csid_rst_cmd_addr, + csid_dev->pdev->id); + } + msm_camera_clk_enable(&csid_dev->pdev->dev, csid_dev->csid_clk_info, csid_dev->csid_clk, diff --git a/drivers/media/platform/msm/vidc/msm_vdec.c b/drivers/media/platform/msm/vidc/msm_vdec.c index 222b26515f37..d184e4031ba3 100644 --- a/drivers/media/platform/msm/vidc/msm_vdec.c +++ b/drivers/media/platform/msm/vidc/msm_vdec.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2012-2019, The Linux Foundation. All rights reserved. +/* Copyright (c) 2012-2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -542,7 +542,7 @@ struct msm_vidc_format vdec_formats[] = { .type = OUTPUT_PORT, .defer_outputs = true, .input_min_count = 4, - .output_min_count = 11, + .output_min_count = 9, }, }; diff --git a/drivers/mtd/devices/msm_qpic_nand.c b/drivers/mtd/devices/msm_qpic_nand.c index e094673f9cac..8cb1feb3dcd1 100644 --- a/drivers/mtd/devices/msm_qpic_nand.c +++ b/drivers/mtd/devices/msm_qpic_nand.c @@ -881,10 +881,12 @@ static int msm_nand_flash_onfi_probe(struct msm_nand_info *info) struct version nandc_version = {0}; ret = msm_nand_version_check(info, &nandc_version); - if (!ret && !(nandc_version.nand_major == 1 && + if (!ret && !((nandc_version.nand_major == 1 && nandc_version.nand_minor >= 5 && nandc_version.qpic_major == 1 && - nandc_version.qpic_minor >= 5)) { + nandc_version.qpic_minor >= 5) || + (nandc_version.nand_major >= 2 && + nandc_version.qpic_major >= 2))) { ret = -EPERM; goto out; } @@ -1993,7 +1995,7 @@ free_dma: if (last_pos < ecc_bytes_percw_in_bits) num_zero_bits++; - if (num_zero_bits > 4) { + if (num_zero_bits > MAX_ECC_BIT_FLIPS) { *erased_page = false; goto free_mem; } @@ -2005,7 +2007,7 @@ free_dma: ecc_temp += chip->ecc_parity_bytes; } - if ((n == cwperpage) && (num_zero_bits <= 4)) + if ((n == cwperpage) && (num_zero_bits <= MAX_ECC_BIT_FLIPS)) *erased_page = true; free_mem: kfree(ecc); @@ -2228,6 +2230,33 @@ static int msm_nand_read_pagescope(struct mtd_info *mtd, loff_t from, goto free_dma; /* Check for flash status errors */ pageerr = rawerr = 0; + + /* + * PAGE_ERASED bit will set only if all + * CODEWORD_ERASED bit of all codewords + * of the page is set. + * + * PAGE_ERASED bit is a 'logical and' of all + * CODEWORD_ERASED bit of all codewords i.e. + * even if one codeword is detected as not + * an erased codeword, PAGE_ERASED bit will unset. + */ + for (n = rw_params.start_sector; n < cwperpage; n++) { + if ((dma_buffer->result[n].erased_cw_status & + (1 << PAGE_ERASED)) && + (dma_buffer->result[n].buffer_status & + NUM_ERRORS)) { + err = msm_nand_is_erased_page_ps(mtd, + from, ops, + &rw_params, + &erased_page); + if (err) + goto free_dma; + if (erased_page) + rawerr = -EIO; + break; + } + } for (n = rw_params.start_sector; n < cwperpage; n++) { if (dma_buffer->result[n].flash_status & (FS_OP_ERR | FS_MPU_ERR)) { @@ -2633,7 +2662,7 @@ free_dma: if (last_pos < ecc_bytes_percw_in_bits) num_zero_bits++; - if (num_zero_bits > 4) { + if (num_zero_bits > MAX_ECC_BIT_FLIPS) { *erased_page = false; goto free_mem; } @@ -2645,7 +2674,7 @@ free_dma: ecc_temp += chip->ecc_parity_bytes; } - if ((n == cwperpage) && (num_zero_bits <= 4)) + if ((n == cwperpage) && (num_zero_bits <= MAX_ECC_BIT_FLIPS)) *erased_page = true; free_mem: kfree(ecc); @@ -2840,6 +2869,33 @@ static int msm_nand_read_oob(struct mtd_info *mtd, loff_t from, goto free_dma; /* Check for flash status errors */ pageerr = rawerr = 0; + + /* + * PAGE_ERASED bit will set only if all + * CODEWORD_ERASED bit of all codewords + * of the page is set. + * + * PAGE_ERASED bit is a 'logical and' of all + * CODEWORD_ERASED bit of all codewords i.e. + * even if one codeword is detected as not + * an erased codeword, PAGE_ERASED bit will unset. + */ + for (n = rw_params.start_sector; n < cwperpage; n++) { + if ((dma_buffer->result[n].erased_cw_status & + (1 << PAGE_ERASED)) && + (dma_buffer->result[n].buffer_status & + NUM_ERRORS)) { + err = msm_nand_is_erased_page(mtd, + from, ops, + &rw_params, + &erased_page); + if (err) + goto free_dma; + if (erased_page) + rawerr = -EIO; + break; + } + } for (n = rw_params.start_sector; n < cwperpage; n++) { if (dma_buffer->result[n].flash_status & (FS_OP_ERR | FS_MPU_ERR)) { diff --git a/drivers/mtd/devices/msm_qpic_nand.h b/drivers/mtd/devices/msm_qpic_nand.h index d6c6d4080e48..b48272a552f1 100644 --- a/drivers/mtd/devices/msm_qpic_nand.h +++ b/drivers/mtd/devices/msm_qpic_nand.h @@ -1,6 +1,6 @@ /* * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2012-2019 The Linux Foundation. All rights reserved. + * Copyright (c) 2012-2020 The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -165,7 +165,10 @@ #define RESET_ERASED_DET (1 << AUTO_DETECT_RES) #define ACTIVE_ERASED_DET (0 << AUTO_DETECT_RES) #define CLR_ERASED_PAGE_DET (RESET_ERASED_DET | MASK_ECC) -#define SET_ERASED_PAGE_DET (ACTIVE_ERASED_DET | MASK_ECC) +#define SET_ERASED_PAGE_DET (ACTIVE_ERASED_DET | MASK_ECC | SET_N_MAX_ZEROS) +#define N_MAX_ZEROS 2 +#define MAX_ECC_BIT_FLIPS 4 +#define SET_N_MAX_ZEROS (MAX_ECC_BIT_FLIPS << N_MAX_ZEROS) #define MSM_NAND_ERASED_CW_DETECT_STATUS(info) MSM_NAND_REG(info, 0x300EC) #define PAGE_ALL_ERASED 7 @@ -174,6 +177,7 @@ #define CODEWORD_ERASED 4 #define ERASED_PAGE ((1 << PAGE_ALL_ERASED) | (1 << PAGE_ERASED)) #define ERASED_CW ((1 << CODEWORD_ALL_ERASED) | (1 << CODEWORD_ERASED)) +#define NUM_ERRORS 0x1f #define MSM_NAND_CTRL(info) MSM_NAND_REG(info, 0x30F00) #define BAM_MODE_EN 0 diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c index f1626e102e50..66ffde0d5567 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c @@ -30,9 +30,23 @@ #include "stmmac_ptp.h" #include "dwmac-qcom-ipa-offload.h" -static unsigned long tlmm_central_base_addr; +static void __iomem *tlmm_central_base_addr; bool phy_intr_en; +static struct ethqos_emac_por emac_por[] = { + { .offset = RGMII_IO_MACRO_CONFIG, .value = 0x0 }, + { .offset = SDCC_HC_REG_DLL_CONFIG, .value = 0x0 }, + { .offset = SDCC_HC_REG_DDR_CONFIG, .value = 0x0 }, + { .offset = SDCC_HC_REG_DLL_CONFIG2, .value = 0x0 }, + { .offset = SDCC_USR_CTL, .value = 0x0 }, + { .offset = RGMII_IO_MACRO_CONFIG2, .value = 0x0}, +}; + +static struct ethqos_emac_driver_data emac_por_data = { + .por = emac_por, + .num_por = ARRAY_SIZE(emac_por), +}; + struct qcom_ethqos *pethqos; struct stmmac_emb_smmu_cb_ctx stmmac_emb_smmu_ctx = {0}; @@ -48,6 +62,21 @@ static struct qmp_pkt pkt; static char qmp_buf[MAX_QMP_MSG_SIZE + 1] = {0}; static struct ip_params pparams = {"", "", "", ""}; +static void qcom_ethqos_read_iomacro_por_values(struct qcom_ethqos *ethqos) +{ + int i; + + ethqos->por = emac_por_data.por; + ethqos->num_por = emac_por_data.num_por; + + /* Read to POR values and enable clk */ + for (i = 0; i < ethqos->num_por; i++) + ethqos->por[i].value = + readl_relaxed( + ethqos->rgmii_base + + ethqos->por[i].offset); +} + static inline unsigned int dwmac_qcom_get_eth_type(unsigned char *buf) { return @@ -1045,7 +1074,7 @@ static void ethqos_pps_irq_config(struct qcom_ethqos *ethqos) } static const struct of_device_id qcom_ethqos_match[] = { - { .compatible = "qcom,sdxprairie-ethqos", .data = &emac_v2_3_2_por}, + { .compatible = "qcom,sdxprairie-ethqos",}, { .compatible = "qcom,emac-smmu-embedded", }, { .compatible = "qcom,stmmac-ethqos", }, {} @@ -1417,9 +1446,9 @@ static int ethqos_update_rgmii_tx_drv_strength(struct qcom_ethqos *ethqos) ETHQOSDBG("tlmm_central_base = 0x%x, size = 0x%x\n", tlmm_central_base, tlmm_central_size); - tlmm_central_base_addr = (unsigned long)ioremap( + tlmm_central_base_addr = ioremap( tlmm_central_base, tlmm_central_size); - if ((void __iomem *)!tlmm_central_base_addr) { + if (!tlmm_central_base_addr) { ETHQOSERR("cannot map dwc_tlmm_central reg memory, aborting\n"); ret = -EIO; goto err_out; @@ -1459,7 +1488,7 @@ static int ethqos_update_rgmii_tx_drv_strength(struct qcom_ethqos *ethqos) err_out: if (tlmm_central_base_addr) - iounmap((void __iomem *)tlmm_central_base_addr); + iounmap(tlmm_central_base_addr); return ret; } @@ -1771,8 +1800,6 @@ static int qcom_ethqos_probe(struct platform_device *pdev) goto err_mem; } - ethqos->por = of_device_get_match_data(&pdev->dev); - ethqos->rgmii_clk = devm_clk_get(&pdev->dev, "rgmii"); if (!ethqos->rgmii_clk) { ret = -ENOMEM; @@ -1880,6 +1907,8 @@ static int qcom_ethqos_probe(struct platform_device *pdev) pethqos = ethqos; ethqos_create_debugfs(ethqos); + qcom_ethqos_read_iomacro_por_values(ethqos); + ndev = dev_get_drvdata(ðqos->pdev->dev); priv = netdev_priv(ndev); diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.h b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.h index 73849621f46e..5b06145c6e8e 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.h @@ -380,22 +380,9 @@ struct ethqos_emac_por { unsigned int value; }; -static const struct ethqos_emac_por emac_v2_3_0_por[] = { - { .offset = RGMII_IO_MACRO_CONFIG, .value = 0x00C01343 }, - { .offset = SDCC_HC_REG_DLL_CONFIG, .value = 0x2004642C }, - { .offset = SDCC_HC_REG_DDR_CONFIG, .value = 0x00000000 }, - { .offset = SDCC_HC_REG_DLL_CONFIG2, .value = 0x00200000 }, - { .offset = SDCC_USR_CTL, .value = 0x00010800 }, - { .offset = RGMII_IO_MACRO_CONFIG2, .value = 0x00002060 }, -}; - -static const struct ethqos_emac_por emac_v2_3_2_por[] = { - { .offset = RGMII_IO_MACRO_CONFIG, .value = 0x00C01343 }, - { .offset = SDCC_HC_REG_DLL_CONFIG, .value = 0x2004642C }, - { .offset = SDCC_HC_REG_DDR_CONFIG, .value = 0x80040800 }, - { .offset = SDCC_HC_REG_DLL_CONFIG2, .value = 0x00200000 }, - { .offset = SDCC_USR_CTL, .value = 0x00010800 }, - { .offset = RGMII_IO_MACRO_CONFIG2, .value = 0x00002060 }, +struct ethqos_emac_driver_data { + struct ethqos_emac_por *por; + unsigned int num_por; }; struct qcom_ethqos { @@ -415,7 +402,7 @@ struct qcom_ethqos { /* Work struct for handling phy interrupt */ struct work_struct emac_phy_work; - const struct ethqos_emac_por *por; + struct ethqos_emac_por *por; unsigned int num_por; unsigned int emac_ver; diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ipa.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ipa.c index 90f789919784..fc6a346a4b7f 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ipa.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ipa.c @@ -95,7 +95,7 @@ static int ethqos_alloc_ipa_tx_queue_struct(struct qcom_ethqos *ethqos) goto err_out_tx_q_alloc_failed; } - eth_ipa_ctx.tx_queue->desc_cnt = IPA_TX_DESC_CNT; + eth_ipa_ctx.tx_queue->desc_cnt = eth_ipa_ctx.ipa_dma_tx_desc_cnt; /* Allocate tx_desc_ptrs */ eth_ipa_ctx.tx_queue->tx_desc_ptrs = @@ -224,7 +224,7 @@ static int ethqos_alloc_ipa_rx_queue_struct(struct qcom_ethqos *ethqos) goto err_out_rx_q_alloc_failed; } - eth_ipa_ctx.rx_queue->desc_cnt = IPA_RX_DESC_CNT; + eth_ipa_ctx.rx_queue->desc_cnt = eth_ipa_ctx.ipa_dma_rx_desc_cnt; /* Allocate rx_desc_ptrs */ eth_ipa_ctx.rx_queue->rx_desc_ptrs = @@ -1664,8 +1664,8 @@ static int ethqos_ipa_create_debugfs(struct qcom_ethqos *ethqos) debugfs_create_file("dma_stats", 0600, ethqos->debugfs_dir, ethqos, &fops_ntn_dma_stats); - if (!eth_ipa->debugfs_suspend_ipa_offload || - IS_ERR(eth_ipa->debugfs_suspend_ipa_offload)) { + if (!eth_ipa->debugfs_dma_stats || + IS_ERR(eth_ipa->debugfs_dma_stats)) { ETHQOSERR("Cannot create debugfs_dma_stats %d\n", (int)eth_ipa->debugfs_dma_stats); goto fail; @@ -2193,11 +2193,29 @@ static int ethqos_ipa_uc_ready(struct qcom_ethqos *pdata) void ethqos_ipa_offload_event_handler(void *data, int ev) { + int ret; ETHQOSDBG("Enter: event=%d\n", ev); if (ev == EV_PROBE_INIT) { eth_ipa_ctx.ethqos = data; mutex_init(ð_ipa_ctx.ipa_lock); + ret = + of_property_read_u32(eth_ipa_ctx.ethqos->pdev->dev.of_node, + "ipa-dma-rx-desc-cnt", + ð_ipa_ctx.ipa_dma_rx_desc_cnt); + if (ret) { + ETHQOSDBG(":resource ipa-dma-rx-desc-cnt not in dt\n"); + eth_ipa_ctx.ipa_dma_rx_desc_cnt = IPA_RX_DESC_CNT; + } + + ret = + of_property_read_u32(eth_ipa_ctx.ethqos->pdev->dev.of_node, + "ipa-dma-tx-desc-cnt", + ð_ipa_ctx.ipa_dma_tx_desc_cnt); + if (ret) { + ETHQOSDBG(":resource ipa-dma-tx-desc-cnt not in dt\n"); + eth_ipa_ctx.ipa_dma_tx_desc_cnt = IPA_TX_DESC_CNT; + } return; } diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ipa.h b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ipa.h index adae4a481aa5..ee32f4e2dbfe 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ipa.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ipa.h @@ -76,8 +76,8 @@ static char * const IPA_OFFLOAD_EVENT_string[] = { #define ETHQOS_ETH_FRAME_LEN_IPA ((1 << 11)) /*IPA can support 2KB max length*/ -#define IPA_TX_DESC_CNT 128 /*Increase TX desc count to 128 for IPA offload*/ -#define IPA_RX_DESC_CNT 128 /*Increase RX desc count to 128 for IPA offload*/ +#define IPA_TX_DESC_CNT 128 /*Default TX desc count to 128 for IPA offload*/ +#define IPA_RX_DESC_CNT 128 /*Default RX desc count to 128 for IPA offload*/ #define BASE_ADDRESS (ethqos->ioaddr) @@ -644,6 +644,9 @@ struct ethqos_prv_ipa_data { phys_addr_t uc_db_tx_addr; u32 ipa_client_hndl; + u32 ipa_dma_tx_desc_cnt; + u32 ipa_dma_rx_desc_cnt; + /* IPA state variables */ /* State of EMAC HW initialization */ bool emac_dev_ready; diff --git a/drivers/platform/msm/ep_pcie/ep_pcie_com.h b/drivers/platform/msm/ep_pcie/ep_pcie_com.h index 014bb9a72055..4d3b594b8659 100644 --- a/drivers/platform/msm/ep_pcie/ep_pcie_com.h +++ b/drivers/platform/msm/ep_pcie/ep_pcie_com.h @@ -351,6 +351,7 @@ struct ep_pcie_dev_t { u32 dbi_base_reg; u32 slv_space_reg; u32 phy_status_reg; + u32 phy_status_bit_mask_bit; u32 phy_init_len; u32 mhi_soc_reset_offset; struct ep_pcie_phy_info_t *phy_init; diff --git a/drivers/platform/msm/ep_pcie/ep_pcie_core.c b/drivers/platform/msm/ep_pcie/ep_pcie_core.c index ddac54f336b8..17caad36330b 100644 --- a/drivers/platform/msm/ep_pcie/ep_pcie_core.c +++ b/drivers/platform/msm/ep_pcie/ep_pcie_core.c @@ -1712,6 +1712,15 @@ int ep_pcie_core_enable_endpoint(enum ep_pcie_options opt) ep_pcie_core_init(dev, true); dev->link_status = EP_PCIE_LINK_UP; dev->l23_ready = false; + + /* enable pipe clock for early link init case*/ + ret = ep_pcie_pipe_clk_init(dev); + if (ret) { + EP_PCIE_ERR(dev, + "PCIe V%d: failed to enable pipe clock\n", + dev->rev); + goto pipe_clk_fail; + } goto checkbme; } else { ltssm_en = readl_relaxed(dev->parf @@ -3074,6 +3083,21 @@ static int ep_pcie_probe(struct platform_device *pdev) EP_PCIE_DBG(&ep_pcie_dev, "PCIe V%d: phy-status-reg:0x%x\n", ep_pcie_dev.rev, ep_pcie_dev.phy_status_reg); + ep_pcie_dev.phy_status_bit_mask_bit = BIT(6); + + ret = of_property_read_u32((&pdev->dev)->of_node, + "qcom,phy-status-reg2", + &ep_pcie_dev.phy_status_reg); + if (ret) { + EP_PCIE_DBG(&ep_pcie_dev, + "PCIe V%d: phy-status-reg2 does not exist\n", + ep_pcie_dev.rev); + } else { + EP_PCIE_DBG(&ep_pcie_dev, "PCIe V%d: phy-status-reg2:0x%x\n", + ep_pcie_dev.rev, ep_pcie_dev.phy_status_reg); + ep_pcie_dev.phy_status_bit_mask_bit = BIT(7); + } + ep_pcie_dev.phy_rev = 1; ret = of_property_read_u32((&pdev->dev)->of_node, "qcom,pcie-phy-ver", diff --git a/drivers/platform/msm/ep_pcie/ep_pcie_phy.c b/drivers/platform/msm/ep_pcie/ep_pcie_phy.c index 89562ef33cea..0b95947ba3d9 100644 --- a/drivers/platform/msm/ep_pcie/ep_pcie_phy.c +++ b/drivers/platform/msm/ep_pcie/ep_pcie_phy.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. +/* Copyright (c) 2015-2018, 2019-2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -158,7 +158,7 @@ bool ep_pcie_phy_is_ready(struct ep_pcie_dev_t *dev) else offset = PCIE_PHY_PCS_STATUS; - if (readl_relaxed(dev->phy + offset) & BIT(6)) + if (readl_relaxed(dev->phy + offset) & dev->phy_status_bit_mask_bit) return false; else return true; diff --git a/drivers/soc/qcom/hgsl/hgsl.c b/drivers/soc/qcom/hgsl/hgsl.c index 60070a4c6f01..80f9b7436ca5 100644 --- a/drivers/soc/qcom/hgsl/hgsl.c +++ b/drivers/soc/qcom/hgsl/hgsl.c @@ -226,7 +226,9 @@ struct hgsl_db_cmds { uint32_t ctx_id; uint32_t cmd_flags; uint32_t timestamp; + uint64_t user_profile_gpuaddr; uint32_t num_ibs; + uint32_t ib_desc_gmuaddr; struct hgsl_fw_ib_desc ib_descs[]; } __packed; diff --git a/drivers/soc/qcom/qmi_rmnet.c b/drivers/soc/qcom/qmi_rmnet.c index 4a2c7449f46f..963bec244260 100644 --- a/drivers/soc/qcom/qmi_rmnet.c +++ b/drivers/soc/qcom/qmi_rmnet.c @@ -1162,7 +1162,7 @@ void qmi_rmnet_work_init(void *port) return; rmnet_ps_wq = alloc_workqueue("rmnet_powersave_work", - WQ_MEM_RECLAIM | WQ_CPU_INTENSIVE, 1); + WQ_CPU_INTENSIVE, 1); if (!rmnet_ps_wq) return; diff --git a/drivers/soc/qcom/wcnss/wcnss_wlan.c b/drivers/soc/qcom/wcnss/wcnss_wlan.c index 5ae9596daab4..fba3dc744061 100644 --- a/drivers/soc/qcom/wcnss/wcnss_wlan.c +++ b/drivers/soc/qcom/wcnss/wcnss_wlan.c @@ -39,6 +39,7 @@ #include #include #include +#include #include #include #include diff --git a/include/linux/mhi.h b/include/linux/mhi.h index 5460fc206d7e..9c422c96b718 100644 --- a/include/linux/mhi.h +++ b/include/linux/mhi.h @@ -610,6 +610,30 @@ void mhi_device_get(struct mhi_device *mhi_dev, int vote); */ int mhi_device_get_sync(struct mhi_device *mhi_dev, int vote); +/** + * mhi_device_get_sync_atomic - Asserts device_wait and moves device to M0 + * @mhi_dev: Device associated with the channels + * @timeout_us: timeout, in micro-seconds + * + * The device_wake is asserted to keep device in M0 or bring it to M0. + * If device is not in M0 state, then this function will wait for device to + * move to M0, until @timeout_us elapses. + * However, if device's M1 state-change event races with this function + * then there is a possiblity of device moving from M0 to M2 and back + * to M0. That can't be avoided as host must transition device from M1 to M2 + * as per the spec. + * Clients can ignore that transition after this function returns as the device + * is expected to immediately move from M2 to M0 as wake is asserted and + * wouldn't enter low power state. + * + * Returns: + * 0 if operation was successful (however, M0 -> M2 -> M0 is possible later) as + * mentioned above. + * -ETIMEDOUT is device faled to move to M0 before @timeout_us elapsed + * -EIO if the MHI state is one of the ERROR states. + */ +int mhi_device_get_sync_atomic(struct mhi_device *mhi_dev, int timeout_us); + /** * mhi_device_put - re-enable low power modes * @mhi_dev: Device associated with the channels diff --git a/kernel/printk/printk.c b/kernel/printk/printk.c index 3da683b6ad75..7f63d4f20055 100644 --- a/kernel/printk/printk.c +++ b/kernel/printk/printk.c @@ -824,6 +824,9 @@ static ssize_t devkmsg_write(struct kiocb *iocb, struct iov_iter *from) /* QG-D */ if (strstr(line, "healthd")|| strstr(line, "cacert") || + strstr(line, "ueventd") || + strstr(line, "logd") || + strstr(line, "CSPL") || !strcmp(line, "CP: Couldn't")) goto free; } diff --git a/net/wireguard/src/Kbuild b/net/wireguard/src/Kbuild index f1b4ad76fdf6..a0d433f292f3 100644 --- a/net/wireguard/src/Kbuild +++ b/net/wireguard/src/Kbuild @@ -2,7 +2,7 @@ # # Copyright (C) 2015-2019 Jason A. Donenfeld . All Rights Reserved. -ccflags-y := -O3 -fvisibility=hidden +ccflags-y := -O3 ccflags-$(CONFIG_WIREGUARD_DEBUG) += -DDEBUG -g ccflags-y += -D'pr_fmt(fmt)=KBUILD_MODNAME ": " fmt' ccflags-y += -Wframe-larger-than=2048 diff --git a/net/wireguard/src/compat/compat.h b/net/wireguard/src/compat/compat.h index d80b0ef37ac9..dbb798934e89 100644 --- a/net/wireguard/src/compat/compat.h +++ b/net/wireguard/src/compat/compat.h @@ -16,7 +16,7 @@ #define ISRHEL7 #elif RHEL_MAJOR == 8 #define ISRHEL8 -#if RHEL_MINOR == 1 +#if RHEL_MINOR == 2 #define ISCENTOS8 #endif #endif @@ -28,21 +28,12 @@ #define ISUBUNTU1604 #elif LINUX_VERSION_CODE < KERNEL_VERSION(4, 16, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 15, 0) #define ISUBUNTU1804 +#elif LINUX_VERSION_CODE < KERNEL_VERSION(5, 1, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 0, 0) +#define ISUBUNTU1904 #elif LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 3, 0) #define ISUBUNTU1910 #endif #endif -#ifdef CONFIG_SUSE_KERNEL -#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 5, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 4, 0) -#define ISOPENSUSE42 -#endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 12, 0) -#define ISOPENSUSE15 -#endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 3, 0) -#define ISOPENSUSE152 -#endif -#endif #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0) #error "WireGuard requires Linux >= 3.10" @@ -100,7 +91,7 @@ #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 17, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(3, 16, 83) #define ipv6_dst_lookup_flow(a, b, c, d) ipv6_dst_lookup_flow(b, c, d) -#elif (LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 5) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(5, 3, 18) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 20, 0)) || ((!defined(ISRHEL8) || defined(ISCENTOS8)) && !defined(ISDEBIAN) && !defined(ISUBUNTU1804) && LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 119) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 15, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(4, 14, 181) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 10, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(4, 9, 224) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 5, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 224) && !defined(ISUBUNTU1604)) +#elif (LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 5) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(5, 3, 18) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 20, 0) && !defined(ISUBUNTU1904)) || (!defined(ISRHEL8) && !defined(ISDEBIAN) && !defined(ISUBUNTU1804) && LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 119) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 15, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(4, 14, 181) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 10, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(4, 9, 224) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 5, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 224) && !defined(ISUBUNTU1604)) #define ipv6_dst_lookup_flow(a, b, c, d) ipv6_dst_lookup(a, b, &dst, c) + (void *)0 ?: dst #endif @@ -117,7 +108,7 @@ static const struct ipv6_stub_type ipv6_stub_impl = { static const struct ipv6_stub_type *ipv6_stub = &ipv6_stub_impl; #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 8, 0) && IS_ENABLED(CONFIG_IPV6) && !defined(ISOPENSUSE42) && !defined(ISRHEL7) +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 8, 0) && IS_ENABLED(CONFIG_IPV6) && !defined(ISRHEL7) #include static inline bool ipv6_mod_enabled(void) { @@ -290,7 +281,7 @@ static const struct in6_addr __compat_in6addr_any = IN6ADDR_ANY_INIT; #define in6addr_any __compat_in6addr_any #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 2, 0) && !defined(ISOPENSUSE15) +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 2, 0) #include #include #include @@ -386,7 +377,7 @@ static inline bool rng_is_initialized(void) } #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && !defined(ISOPENSUSE15) +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) static inline int get_random_bytes_wait(void *buf, int nbytes) { int ret = wait_for_random_bytes(); @@ -529,7 +520,7 @@ static inline void __compat_kvfree(const void *addr) #define priv_destructor destructor #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && !defined(ISOPENSUSE15) +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) #define wg_newlink(a,b,c,d,e) wg_newlink(a,b,c,d) #endif @@ -668,12 +659,12 @@ struct __compat_dummy_container { char dev; }; #define COMPAT_CANNOT_USE_AVX512 #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) && !defined(ISOPENSUSE15) +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) #include #define genl_dump_check_consistent(a, b) genl_dump_check_consistent(a, b, &genl_family) #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && !defined(ISRHEL7) && !defined(ISOPENSUSE15) +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && !defined(ISRHEL7) static inline void *skb_put_data(struct sk_buff *skb, const void *data, unsigned int len) { void *tmp = skb_put(skb, len); @@ -730,7 +721,7 @@ static inline void cpu_to_le32_array(u32 *buf, unsigned int words) } #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 14, 0) && !defined(ISOPENSUSE15) +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 14, 0) #include static inline void crypto_xor_cpy(u8 *dst, const u8 *src1, const u8 *src2, unsigned int size) @@ -791,7 +782,7 @@ struct __kernel_timespec { #endif #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 1, 0) && (!defined(ISRHEL8) || defined(ISCENTOS8)) +#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 1, 0) && !defined(ISRHEL8) #include #define skb_probe_transport_header(a) skb_probe_transport_header(a, 0) #endif @@ -800,7 +791,7 @@ struct __kernel_timespec { #define ignore_df local_df #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 1, 0) && (!defined(ISRHEL8) || defined(ISCENTOS8)) +#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 1, 0) && !defined(ISRHEL8) /* Note that all intentional uses of the non-_bh variety need to explicitly * undef these, conditionalized on COMPAT_CANNOT_DEPRECIATE_BH_RCU. */ @@ -832,7 +823,7 @@ static __always_inline void old_rcu_barrier(void) #define COMPAT_CANNOT_DEPRECIATE_BH_RCU #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 10) && !defined(ISRHEL8) && !defined(ISOPENSUSE15) +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 10) && !defined(ISRHEL8) static inline void skb_mark_not_on_list(struct sk_buff *skb) { skb->next = NULL; @@ -842,7 +833,7 @@ static inline void skb_mark_not_on_list(struct sk_buff *skb) #if LINUX_VERSION_CODE < KERNEL_VERSION(4, 20, 0) && !defined(ISRHEL8) #define NLA_EXACT_LEN NLA_UNSPEC #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 2, 0) && (!defined(ISRHEL8) || defined(ISCENTOS8)) +#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 2, 0) && !defined(ISRHEL8) #define NLA_MIN_LEN NLA_UNSPEC #define COMPAT_CANNOT_INDIVIDUAL_NETLINK_OPS_POLICY #endif @@ -858,7 +849,7 @@ static inline void skb_mark_not_on_list(struct sk_buff *skb) #endif #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 5, 0) && !defined(ISOPENSUSE152) +#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 5, 0) #define genl_dumpit_info(cb) ({ \ struct { struct nlattr **attrs; } *a = (void *)((u8 *)cb->args + offsetofend(struct dump_ctx, next_allowedip)); \ BUILD_BUG_ON(sizeof(cb->args) < offsetofend(struct dump_ctx, next_allowedip) + sizeof(*a)); \ @@ -1021,7 +1012,7 @@ out: #define COMPAT_CANNOT_USE_MAX_MTU #endif -#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 5, 14) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 5, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 29) && !defined(ISUBUNTU1910)) +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 5, 14) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 5, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 29) && !defined(ISUBUNTU1910) && !defined(ISUBUNTU1904) && (!defined(ISRHEL8) || defined(ISCENTOS8))) #include #include static inline void skb_reset_redirect(struct sk_buff *skb) @@ -1045,6 +1036,32 @@ static inline void skb_reset_redirect(struct sk_buff *skb) #define sw_hash ignore_df = 0; skb->nf_trace = skb->ooo_okay #endif +#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 3, 0) +#define pre_exit exit +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 8, 0) +#include +static inline __be16 ip_tunnel_parse_protocol(const struct sk_buff *skb) +{ + if (skb_network_header(skb) >= skb->head && + (skb_network_header(skb) + sizeof(struct iphdr)) <= skb_tail_pointer(skb) && + ip_hdr(skb)->version == 4) + return htons(ETH_P_IP); + if (skb_network_header(skb) >= skb->head && + (skb_network_header(skb) + sizeof(struct ipv6hdr)) <= skb_tail_pointer(skb) && + ipv6_hdr(skb)->version == 6) + return htons(ETH_P_IPV6); + return 0; +} +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 1, 0) || defined(ISRHEL8) +static const struct header_ops ip_tunnel_header_ops = { .parse_protocol = ip_tunnel_parse_protocol }; +#else +#define header_ops hard_header_len +#define ip_tunnel_header_ops *(char *)0 - (char *)0 +#endif +#endif + #if defined(ISUBUNTU1604) || defined(ISRHEL7) #include #ifndef _WG_LINUX_SIPHASH_H diff --git a/net/wireguard/src/device.c b/net/wireguard/src/device.c index 5ea039ba305b..1155783a8f10 100644 --- a/net/wireguard/src/device.c +++ b/net/wireguard/src/device.c @@ -53,17 +53,18 @@ static int wg_open(struct net_device *dev) #endif #endif + mutex_lock(&wg->device_update_lock); ret = wg_socket_init(wg, wg->incoming_port); if (ret < 0) - return ret; - mutex_lock(&wg->device_update_lock); + goto out; list_for_each_entry(peer, &wg->peer_list, peer_list) { wg_packet_send_staged_packets(peer); if (peer->persistent_keepalive_interval) wg_packet_send_keepalive(peer); } +out: mutex_unlock(&wg->device_update_lock); - return 0; + return ret; } #ifdef CONFIG_PM_SLEEP @@ -233,6 +234,7 @@ static void wg_destruct(struct net_device *dev) list_del(&wg->device_list); rtnl_unlock(); mutex_lock(&wg->device_update_lock); + rcu_assign_pointer(wg->creating_net, NULL); wg->incoming_port = 0; wg_socket_reinit(wg, NULL, NULL); /* The final references are cleared in the below calls to destroy_workqueue. */ @@ -248,13 +250,11 @@ static void wg_destruct(struct net_device *dev) skb_queue_purge(&wg->incoming_handshakes); free_percpu(dev->tstats); free_percpu(wg->incoming_handshakes_worker); - if (wg->have_creating_net_ref) - put_net(wg->creating_net); kvfree(wg->index_hashtable); kvfree(wg->peer_hashtable); mutex_unlock(&wg->device_update_lock); - pr_debug("%s: Interface deleted\n", dev->name); + pr_debug("%s: Interface destroyed\n", dev->name); free_netdev(dev); } @@ -270,6 +270,7 @@ static void wg_setup(struct net_device *dev) max(sizeof(struct ipv6hdr), sizeof(struct iphdr)); dev->netdev_ops = &netdev_ops; + dev->header_ops = &ip_tunnel_header_ops; dev->hard_header_len = 0; dev->addr_len = 0; dev->needed_headroom = DATA_PACKET_HEAD_ROOM; @@ -306,7 +307,7 @@ static int wg_newlink(struct net *src_net, struct net_device *dev, struct wg_device *wg = netdev_priv(dev); int ret = -ENOMEM; - wg->creating_net = src_net; + rcu_assign_pointer(wg->creating_net, src_net); init_rwsem(&wg->static_identity.lock); mutex_init(&wg->socket_update_lock); mutex_init(&wg->device_update_lock); @@ -407,30 +408,26 @@ static struct rtnl_link_ops link_ops __read_mostly = { .newlink = wg_newlink, }; -static int wg_netdevice_notification(struct notifier_block *nb, - unsigned long action, void *data) +static void wg_netns_pre_exit(struct net *net) { - struct net_device *dev = ((struct netdev_notifier_info *)data)->dev; - struct wg_device *wg = netdev_priv(dev); + struct wg_device *wg; - ASSERT_RTNL(); - - if (action != NETDEV_REGISTER || dev->netdev_ops != &netdev_ops) - return 0; - - if (dev_net(dev) == wg->creating_net && wg->have_creating_net_ref) { - put_net(wg->creating_net); - wg->have_creating_net_ref = false; - } else if (dev_net(dev) != wg->creating_net && - !wg->have_creating_net_ref) { - wg->have_creating_net_ref = true; - get_net(wg->creating_net); + rtnl_lock(); + list_for_each_entry(wg, &device_list, device_list) { + if (rcu_access_pointer(wg->creating_net) == net) { + pr_debug("%s: Creating namespace exiting\n", wg->dev->name); + netif_carrier_off(wg->dev); + mutex_lock(&wg->device_update_lock); + rcu_assign_pointer(wg->creating_net, NULL); + wg_socket_reinit(wg, NULL, NULL); + mutex_unlock(&wg->device_update_lock); + } } - return 0; + rtnl_unlock(); } -static struct notifier_block netdevice_notifier = { - .notifier_call = wg_netdevice_notification +static struct pernet_operations pernet_ops = { + .pre_exit = wg_netns_pre_exit }; int __init wg_device_init(void) @@ -443,18 +440,18 @@ int __init wg_device_init(void) return ret; #endif - ret = register_netdevice_notifier(&netdevice_notifier); + ret = register_pernet_device(&pernet_ops); if (ret) goto error_pm; ret = rtnl_link_register(&link_ops); if (ret) - goto error_netdevice; + goto error_pernet; return 0; -error_netdevice: - unregister_netdevice_notifier(&netdevice_notifier); +error_pernet: + unregister_pernet_device(&pernet_ops); error_pm: #ifdef CONFIG_PM_SLEEP unregister_pm_notifier(&pm_notifier); @@ -465,7 +462,7 @@ error_pm: void wg_device_uninit(void) { rtnl_link_unregister(&link_ops); - unregister_netdevice_notifier(&netdevice_notifier); + unregister_pernet_device(&pernet_ops); #ifdef CONFIG_PM_SLEEP unregister_pm_notifier(&pm_notifier); #endif diff --git a/net/wireguard/src/device.h b/net/wireguard/src/device.h index b15a8be9d816..4d0144e16947 100644 --- a/net/wireguard/src/device.h +++ b/net/wireguard/src/device.h @@ -40,7 +40,7 @@ struct wg_device { struct net_device *dev; struct crypt_queue encrypt_queue, decrypt_queue; struct sock __rcu *sock4, *sock6; - struct net *creating_net; + struct net __rcu *creating_net; struct noise_static_identity static_identity; struct workqueue_struct *handshake_receive_wq, *handshake_send_wq; struct workqueue_struct *packet_crypt_wq; @@ -56,7 +56,6 @@ struct wg_device { unsigned int num_peers, device_update_gen; u32 fwmark; u16 incoming_port; - bool have_creating_net_ref; }; int wg_device_init(void); diff --git a/net/wireguard/src/dkms.conf b/net/wireguard/src/dkms.conf index d7420f4c6ba0..8653841329f2 100644 --- a/net/wireguard/src/dkms.conf +++ b/net/wireguard/src/dkms.conf @@ -1,5 +1,5 @@ PACKAGE_NAME="wireguard" -PACKAGE_VERSION="1.0.20200520" +PACKAGE_VERSION="1.0.20200712" AUTOINSTALL=yes BUILT_MODULE_NAME="wireguard" diff --git a/net/wireguard/src/netlink.c b/net/wireguard/src/netlink.c index 93cdbfecfeee..3dde0ede48d3 100644 --- a/net/wireguard/src/netlink.c +++ b/net/wireguard/src/netlink.c @@ -509,11 +509,15 @@ static int wg_set_device(struct sk_buff *skb, struct genl_info *info) if (flags & ~__WGDEVICE_F_ALL) goto out; - ret = -EPERM; - if ((info->attrs[WGDEVICE_A_LISTEN_PORT] || - info->attrs[WGDEVICE_A_FWMARK]) && - !ns_capable(wg->creating_net->user_ns, CAP_NET_ADMIN)) - goto out; + if (info->attrs[WGDEVICE_A_LISTEN_PORT] || info->attrs[WGDEVICE_A_FWMARK]) { + struct net *net; + rcu_read_lock(); + net = rcu_dereference(wg->creating_net); + ret = !net || !ns_capable(net->user_ns, CAP_NET_ADMIN) ? -EPERM : 0; + rcu_read_unlock(); + if (ret) + goto out; + } ++wg->device_update_gen; diff --git a/net/wireguard/src/noise.c b/net/wireguard/src/noise.c index d0987cdd5aab..5fbe06368e31 100644 --- a/net/wireguard/src/noise.c +++ b/net/wireguard/src/noise.c @@ -619,8 +619,8 @@ wg_noise_handshake_consume_initiation(struct message_handshake_initiation *src, memcpy(handshake->hash, hash, NOISE_HASH_LEN); memcpy(handshake->chaining_key, chaining_key, NOISE_HASH_LEN); handshake->remote_index = src->sender_index; - if ((s64)(handshake->last_initiation_consumption - - (initiation_consumption = ktime_get_coarse_boottime_ns())) < 0) + initiation_consumption = ktime_get_coarse_boottime_ns(); + if ((s64)(handshake->last_initiation_consumption - initiation_consumption) < 0) handshake->last_initiation_consumption = initiation_consumption; handshake->state = HANDSHAKE_CONSUMED_INITIATION; up_write(&handshake->lock); diff --git a/net/wireguard/src/queueing.h b/net/wireguard/src/queueing.h index e88eb93af9d8..bab170b95938 100644 --- a/net/wireguard/src/queueing.h +++ b/net/wireguard/src/queueing.h @@ -11,6 +11,7 @@ #include #include #include +#include struct wg_device; struct wg_peer; @@ -65,25 +66,9 @@ struct packet_cb { #define PACKET_CB(skb) ((struct packet_cb *)((skb)->cb)) #define PACKET_PEER(skb) (PACKET_CB(skb)->keypair->entry.peer) -/* Returns either the correct skb->protocol value, or 0 if invalid. */ -static inline __be16 wg_examine_packet_protocol(struct sk_buff *skb) -{ - if (skb_network_header(skb) >= skb->head && - (skb_network_header(skb) + sizeof(struct iphdr)) <= - skb_tail_pointer(skb) && - ip_hdr(skb)->version == 4) - return htons(ETH_P_IP); - if (skb_network_header(skb) >= skb->head && - (skb_network_header(skb) + sizeof(struct ipv6hdr)) <= - skb_tail_pointer(skb) && - ipv6_hdr(skb)->version == 6) - return htons(ETH_P_IPV6); - return 0; -} - static inline bool wg_check_packet_protocol(struct sk_buff *skb) { - __be16 real_protocol = wg_examine_packet_protocol(skb); + __be16 real_protocol = ip_tunnel_parse_protocol(skb); return real_protocol && skb->protocol == real_protocol; } diff --git a/net/wireguard/src/receive.c b/net/wireguard/src/receive.c index 055d3dd58077..172ef823d327 100644 --- a/net/wireguard/src/receive.c +++ b/net/wireguard/src/receive.c @@ -392,7 +392,7 @@ static void wg_packet_consume_data_done(struct wg_peer *peer, #ifndef COMPAT_CANNOT_USE_CSUM_LEVEL skb->csum_level = ~0; /* All levels */ #endif - skb->protocol = wg_examine_packet_protocol(skb); + skb->protocol = ip_tunnel_parse_protocol(skb); if (skb->protocol == htons(ETH_P_IP)) { len = ntohs(ip_hdr(skb)->tot_len); if (unlikely(len < sizeof(struct iphdr))) @@ -419,14 +419,8 @@ static void wg_packet_consume_data_done(struct wg_peer *peer, if (unlikely(routed_peer != peer)) goto dishonest_packet_peer; - if (unlikely(napi_gro_receive(&peer->napi, skb) == GRO_DROP)) { - ++dev->stats.rx_dropped; - net_dbg_ratelimited("%s: Failed to give packet to userspace from peer %llu (%pISpfsc)\n", - dev->name, peer->internal_id, - &peer->endpoint.addr); - } else { - update_rx_stats(peer, message_data_len(len_before_trim)); - } + napi_gro_receive(&peer->napi, skb); + update_rx_stats(peer, message_data_len(len_before_trim)); return; dishonest_packet_peer: diff --git a/net/wireguard/src/socket.c b/net/wireguard/src/socket.c index f9018027fc13..c33e2c81635f 100644 --- a/net/wireguard/src/socket.c +++ b/net/wireguard/src/socket.c @@ -347,6 +347,7 @@ static void set_sock_opts(struct socket *sock) int wg_socket_init(struct wg_device *wg, u16 port) { + struct net *net; int ret; struct udp_tunnel_sock_cfg cfg = { .sk_user_data = wg, @@ -371,37 +372,47 @@ int wg_socket_init(struct wg_device *wg, u16 port) }; #endif + rcu_read_lock(); + net = rcu_dereference(wg->creating_net); + net = net ? maybe_get_net(net) : NULL; + rcu_read_unlock(); + if (unlikely(!net)) + return -ENONET; + #if IS_ENABLED(CONFIG_IPV6) retry: #endif - ret = udp_sock_create(wg->creating_net, &port4, &new4); + ret = udp_sock_create(net, &port4, &new4); if (ret < 0) { pr_err("%s: Could not create IPv4 socket\n", wg->dev->name); - return ret; + goto out; } set_sock_opts(new4); - setup_udp_tunnel_sock(wg->creating_net, new4, &cfg); + setup_udp_tunnel_sock(net, new4, &cfg); #if IS_ENABLED(CONFIG_IPV6) if (ipv6_mod_enabled()) { port6.local_udp_port = inet_sk(new4->sk)->inet_sport; - ret = udp_sock_create(wg->creating_net, &port6, &new6); + ret = udp_sock_create(net, &port6, &new6); if (ret < 0) { udp_tunnel_sock_release(new4); if (ret == -EADDRINUSE && !port && retries++ < 100) goto retry; pr_err("%s: Could not create IPv6 socket\n", wg->dev->name); - return ret; + goto out; } set_sock_opts(new6); - setup_udp_tunnel_sock(wg->creating_net, new6, &cfg); + setup_udp_tunnel_sock(net, new6, &cfg); } #endif wg_socket_reinit(wg, new4->sk, new6 ? new6->sk : NULL); - return 0; + ret = 0; +out: + put_net(net); + return ret; } void wg_socket_reinit(struct wg_device *wg, struct sock *new4, diff --git a/net/wireguard/src/tests/netns.sh b/net/wireguard/src/tests/netns.sh index e4dc485b6e43..c83ddc7aca27 100755 --- a/net/wireguard/src/tests/netns.sh +++ b/net/wireguard/src/tests/netns.sh @@ -346,7 +346,8 @@ ip1 -4 rule add table main suppress_prefixlength 0 if [[ $(ip1 -4 rule show all) == *suppress_prefixlength* ]]; then # Flood the pings instead of sending just one, to trigger routing table reference counting bugs. n1 ping -W 1 -c 100 -f 192.168.99.7 - n1 ping -W 1 -c 100 -f abab::1111 + # ca7a03c got ported to 5.2 when it shouldn't have. + [[ $(< /proc/version) =~ ^Linux\ version\ 5\.2[.\ ] ]] || n1 ping -W 1 -c 100 -f abab::1111 fi # Have ns2 NAT into wg0 packets from ns0, but return an icmp error along the right route. @@ -590,9 +591,20 @@ ip0 link set wg0 up kill $ncat_pid ip0 link del wg0 +# Ensure there aren't circular reference loops +ip1 link add wg1 type wireguard +ip2 link add wg2 type wireguard +ip1 link set wg1 netns $netns2 +ip2 link set wg2 netns $netns1 +pp ip netns delete $netns1 +pp ip netns delete $netns2 +pp ip netns add $netns1 +pp ip netns add $netns2 + +sleep 2 # Wait for cleanup and grace periods declare -A objects while read -t 0.1 -r line 2>/dev/null || [[ $? -ne 142 ]]; do - [[ $line =~ .*(wg[0-9]+:\ [A-Z][a-z]+\ [0-9]+)\ .*(created|destroyed).* ]] || continue + [[ $line =~ .*(wg[0-9]+:\ [A-Z][a-z]+\ ?[0-9]*)\ .*(created|destroyed).* ]] || continue objects["${BASH_REMATCH[1]}"]+="${BASH_REMATCH[2]}" done < /dev/kmsg alldeleted=1 diff --git a/net/wireguard/src/tests/qemu/Makefile b/net/wireguard/src/tests/qemu/Makefile index 5eab33c2fdb2..75d0368cd1d9 100644 --- a/net/wireguard/src/tests/qemu/Makefile +++ b/net/wireguard/src/tests/qemu/Makefile @@ -46,8 +46,8 @@ endef ifneq ($(findstring https://,$(KERNEL_VERSION)),) KERNEL_URL := $(word 1,$(KERNEL_VERSION)) KERNEL_NAME := $(word 2,$(KERNEL_VERSION)) -KERNEL_TAR := $(DISTFILES_PATH)/$(KERNEL_NAME)-$(notdir $(KERNEL_URL)) -KERNEL_PATH := $(BUILD_PATH)/$(KERNEL_NAME) +KERNEL_TAR := $(DISTFILES_PATH)/linux-$(KERNEL_NAME)-$(notdir $(KERNEL_URL)) +KERNEL_PATH := $(BUILD_PATH)/linux-$(KERNEL_NAME) KERNEL_VERSION := $(KERNEL_NAME) $(KERNEL_TAR): mkdir -p $(DISTFILES_PATH) diff --git a/net/wireguard/src/version.h b/net/wireguard/src/version.h index d29b2e34f0df..c495ef5e59a3 100644 --- a/net/wireguard/src/version.h +++ b/net/wireguard/src/version.h @@ -1,3 +1,3 @@ #ifndef WIREGUARD_VERSION -#define WIREGUARD_VERSION "1.0.20200520" +#define WIREGUARD_VERSION "1.0.20200712" #endif diff --git a/techpack/audio/dsp/q6afe.c b/techpack/audio/dsp/q6afe.c index 6a357dba197a..05d842f21a1d 100644 --- a/techpack/audio/dsp/q6afe.c +++ b/techpack/audio/dsp/q6afe.c @@ -3478,10 +3478,10 @@ int afe_tdm_port_start(u16 port_id, struct afe_tdm_port_config *tdm_port, if (cal_block != NULL) { afe_top = (struct audio_cal_info_afe_top *)cal_block->cal_info; - pr_info("%s: top_id:%x acdb_id:%d port_id:0x%x\n", + pr_debug("%s: top_id:%x acdb_id:%d port_id:0x%x\n", __func__, afe_top->topology, afe_top->acdb_id, port_id); } else { - pr_info("%s: port_id:0x%x\n", __func__, port_id); + pr_debug("%s: port_id:0x%x\n", __func__, port_id); } ret = afe_send_cmd_port_start(port_id); @@ -4502,10 +4502,10 @@ static int __afe_port_start(u16 port_id, union afe_port_config *afe_config, if (cal_block != NULL) { afe_top = (struct audio_cal_info_afe_top *)cal_block->cal_info; - pr_info("%s: top_id:%x acdb_id:%d port_id:0x%x\n", + pr_debug("%s: top_id:%x acdb_id:%d port_id:0x%x\n", __func__, afe_top->topology, afe_top->acdb_id, port_id); } else { - pr_info("%s: port_id:0x%x\n", __func__, port_id); + pr_debug("%s: port_id:0x%x\n", __func__, port_id); } ret = afe_send_cmd_port_start(port_id); @@ -7117,7 +7117,7 @@ int afe_close(int port_id) ret = -EINVAL; goto fail_cmd; } - pr_info("%s: port_id = 0x%x\n", __func__, port_id); + pr_debug("%s: port_id = 0x%x\n", __func__, port_id); if ((port_id == RT_PROXY_DAI_001_RX) || (port_id == RT_PROXY_DAI_002_TX)) { pr_debug("%s: before decrementing pcm_afe_instance %d\n",