From e2e56b62cafc0982b34b802d72be0c037e9f5d0a Mon Sep 17 00:00:00 2001 From: Ajay Agarwal Date: Mon, 16 Sep 2019 20:04:03 +0530 Subject: [PATCH 001/126] usb: config: Fix incorrect use of keywords Use 'QTI' string in config names to fix incorrect usage. Change-Id: I3af8a34653b8d67eb1263e9d5d162688ff381898 Signed-off-by: Ajay Agarwal --- drivers/char/diag/Kconfig | 2 +- drivers/char/diag/Makefile | 2 +- drivers/char/diag/diag_debugfs.c | 6 +++--- drivers/char/diag/diagfwd_bridge.c | 4 ++-- drivers/usb/gadget/Kconfig | 2 +- drivers/usb/misc/Kconfig | 14 ++++++++++++-- drivers/usb/misc/Makefile | 5 +++-- include/linux/usb/diag_bridge.h | 2 +- include/linux/usb/usb_bridge.h | 4 ++-- 9 files changed, 26 insertions(+), 15 deletions(-) diff --git a/drivers/char/diag/Kconfig b/drivers/char/diag/Kconfig index 2a5e5fc7dbb4..5feb999123fd 100644 --- a/drivers/char/diag/Kconfig +++ b/drivers/char/diag/Kconfig @@ -27,7 +27,7 @@ config DIAG_OVER_USB config DIAGFWD_BRIDGE_CODE bool "Enable remote DIAG traffic over MHI/HSIC" depends on DIAG_CHAR - depends on USB_QCOM_DIAG_BRIDGE || MHI_BUS + depends on USB_QTI_DIAG_BRIDGE || MHI_BUS default y help MHI/HSIC Transport Layer for DIAG Router. When the MHI/HSIC endpoints diff --git a/drivers/char/diag/Makefile b/drivers/char/diag/Makefile index 2797100588ce..5ffb360d1f40 100644 --- a/drivers/char/diag/Makefile +++ b/drivers/char/diag/Makefile @@ -1,5 +1,5 @@ obj-$(CONFIG_DIAG_CHAR) := diagchar.o obj-$(CONFIG_DIAGFWD_BRIDGE_CODE) += diagfwd_bridge.o -obj-$(CONFIG_USB_QCOM_DIAG_BRIDGE) += diagfwd_hsic.o +obj-$(CONFIG_USB_QTI_DIAG_BRIDGE) += diagfwd_hsic.o obj-$(CONFIG_MHI_BUS) += diagfwd_mhi.o diagchar-objs := diagchar_core.o diagchar_hdlc.o diagfwd.o diagfwd_peripheral.o diagfwd_socket.o diagfwd_rpmsg.o diag_mux.o diag_memorydevice.o diag_usb.o diagmem.o diagfwd_cntl.o diag_dci.o diag_masks.o diag_debugfs.o diag_pcie.o diff --git a/drivers/char/diag/diag_debugfs.c b/drivers/char/diag/diag_debugfs.c index 73b7f194b984..6910d5c81001 100644 --- a/drivers/char/diag/diag_debugfs.c +++ b/drivers/char/diag/diag_debugfs.c @@ -21,7 +21,7 @@ #ifdef CONFIG_DIAGFWD_BRIDGE_CODE #include "diagfwd_bridge.h" #endif -#ifdef CONFIG_USB_QCOM_DIAG_BRIDGE +#ifdef CONFIG_USB_QTI_DIAG_BRIDGE #include "diagfwd_hsic.h" #endif #ifdef CONFIG_MHI_BUS @@ -781,7 +781,7 @@ static ssize_t diag_dbgfs_write_debug(struct file *fp, const char __user *buf, #endif #ifdef CONFIG_DIAGFWD_BRIDGE_CODE -#ifdef CONFIG_USB_QCOM_DIAG_BRIDGE +#ifdef CONFIG_USB_QTI_DIAG_BRIDGE static ssize_t diag_dbgfs_read_hsicinfo(struct file *file, char __user *ubuf, size_t count, loff_t *ppos) { @@ -1104,7 +1104,7 @@ int diag_debugfs_init(void) &diag_dbgfs_bridge_ops); if (!entry) goto err; -#ifdef CONFIG_USB_QCOM_DIAG_BRIDGE +#ifdef CONFIG_USB_QTI_DIAG_BRIDGE entry = debugfs_create_file("hsicinfo", 0444, diag_dbgfs_dent, 0, &diag_dbgfs_hsicinfo_ops); if (!entry) diff --git a/drivers/char/diag/diagfwd_bridge.c b/drivers/char/diag/diagfwd_bridge.c index 27f7aacc4825..c417c31e7a45 100644 --- a/drivers/char/diag/diagfwd_bridge.c +++ b/drivers/char/diag/diagfwd_bridge.c @@ -273,7 +273,7 @@ uint16_t diag_get_remote_device_mask(void) void diag_register_with_bridge(void) { - if (IS_ENABLED(CONFIG_USB_QCOM_DIAG_BRIDGE)) + if (IS_ENABLED(CONFIG_USB_QTI_DIAG_BRIDGE)) diag_register_with_hsic(); else if (IS_ENABLED(CONFIG_MHI_BUS)) diag_register_with_mhi(); @@ -281,7 +281,7 @@ void diag_register_with_bridge(void) void diag_unregister_bridge(void) { - if (IS_ENABLED(CONFIG_USB_QCOM_DIAG_BRIDGE)) + if (IS_ENABLED(CONFIG_USB_QTI_DIAG_BRIDGE)) diag_unregister_hsic(); else if (IS_ENABLED(CONFIG_MHI_BUS)) diag_unregister_mhi(); diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index e1cfe2300938..05d6735421ce 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig @@ -624,7 +624,7 @@ config USB_CONFIGFS_F_IPC config USB_CONFIGFS_F_MDM_DATA bool "USB QTI Modem Data function" select USB_F_MDM_DATA - depends on USB_CONFIGFS && USB_QCOM_MDM_DATA_BRIDGE + depends on USB_CONFIGFS && USB_QTI_MDM_DATA_BRIDGE help USB QTI modem data function driver. diff --git a/drivers/usb/misc/Kconfig b/drivers/usb/misc/Kconfig index 97c4d5594ff0..b65284352bf9 100644 --- a/drivers/usb/misc/Kconfig +++ b/drivers/usb/misc/Kconfig @@ -288,7 +288,7 @@ config USB_TYPEC_MUX_NXP5150A Say Y here if you want to use NXP CC Logic Type-C Chipset NXP5150A for CC detection and Mux control. -config USB_QCOM_DIAG_BRIDGE +config USB_QTI_DIAG_BRIDGE tristate "USB QTI diagnostic bridge driver" depends on USB help @@ -299,7 +299,7 @@ config USB_QCOM_DIAG_BRIDGE To compile this driver as a module, choose M here: the module will be called diag_bridge. If unsure, choose N. -config USB_QCOM_MDM_DATA_BRIDGE +config USB_QTI_MDM_DATA_BRIDGE tristate "USB QTI modem data bridge driver" select USB_CONFIGFS_F_MDM_DATA depends on USB @@ -309,3 +309,13 @@ config USB_QCOM_MDM_DATA_BRIDGE data packets between the modem and peripheral usb gadget driver. To compile this driver as a module, choose M here: the module will be called mdm_data_bridge. If unsure, choose N. + +config USB_QTI_KS_BRIDGE + tristate "USB QTI kick start bridge driver" + depends on USB + help + Say Y here if you have a QTI modem device connected via USB that + will be bridged in kernel space. This driver works as a bridge to pass + boot images, ram-dumps etc. + To compile this driver as a module, choose M here: the module will be + called ks_bridge. If unsure, choose N. diff --git a/drivers/usb/misc/Makefile b/drivers/usb/misc/Makefile index 9fdabc9242a4..9d7453d9815a 100644 --- a/drivers/usb/misc/Makefile +++ b/drivers/usb/misc/Makefile @@ -33,5 +33,6 @@ obj-$(CONFIG_USB_TYPEC_MUX_NXP5150A) += nxp_typec.o obj-$(CONFIG_USB_SISUSBVGA) += sisusbvga/ obj-$(CONFIG_USB_LINK_LAYER_TEST) += lvstest.o obj-$(CONFIG_USB_REDRIVER_NB7VPQ904M) += ssusb-redriver-nb7vpq904m.o -obj-$(CONFIG_USB_QCOM_DIAG_BRIDGE) += diag_bridge.o -obj-$(CONFIG_USB_QCOM_MDM_DATA_BRIDGE) += mdm_data_bridge.o +obj-$(CONFIG_USB_QTI_DIAG_BRIDGE) += diag_bridge.o +obj-$(CONFIG_USB_QTI_MDM_DATA_BRIDGE) += mdm_data_bridge.o +obj-$(CONFIG_USB_QTI_KS_BRIDGE) += ks_bridge.o diff --git a/include/linux/usb/diag_bridge.h b/include/linux/usb/diag_bridge.h index 806b380a83ba..b3d4f2f4fb5c 100644 --- a/include/linux/usb/diag_bridge.h +++ b/include/linux/usb/diag_bridge.h @@ -23,7 +23,7 @@ struct diag_bridge_ops { void (*resume)(void *ctxt); }; -#if IS_ENABLED(CONFIG_USB_QCOM_DIAG_BRIDGE) +#if IS_ENABLED(CONFIG_USB_QTI_DIAG_BRIDGE) extern int diag_bridge_read(int id, char *data, int size); extern int diag_bridge_write(int id, char *data, int size); diff --git a/include/linux/usb/usb_bridge.h b/include/linux/usb/usb_bridge.h index a270419fa535..c4315b743dcb 100644 --- a/include/linux/usb/usb_bridge.h +++ b/include/linux/usb/usb_bridge.h @@ -85,8 +85,8 @@ struct timestamp_buf { rwlock_t lck; /* lock */ }; -#if defined(CONFIG_USB_QCOM_MDM_BRIDGE) || \ - defined(CONFIG_USB_QCOM_MDM_BRIDGE_MODULE) +#if defined(CONFIG_USB_QTI_MDM_DATA_BRIDGE) || \ + defined(CONFIG_USB_QTI_MDM_DATA_BRIDGE_MODULE) /* Bridge APIs called by gadget driver */ int data_bridge_open(struct bridge *brdg); From 532c15bf69166a8439c5c6a2fe5d602a487e5991 Mon Sep 17 00:00:00 2001 From: Chennuru Rajeshwar Reddy Date: Thu, 17 Oct 2019 12:22:52 +0530 Subject: [PATCH 002/126] Revert "clk: qcom: update pll configs for all clock controllers" This reverts commit f11f283750c0deba516b901e61e60c8619ccdd4a. Change-Id: Iae5e2ed47edc6075027f86c795f80184681bb521 Signed-off-by: Chennuru Rajeshwar Reddy --- drivers/clk/qcom/camcc-sm6150.c | 30 ++++++++---------------------- drivers/clk/qcom/dispcc-sm6150.c | 6 ++---- drivers/clk/qcom/gpucc-sm6150.c | 10 ++++------ drivers/clk/qcom/scc-sm6150.c | 14 +++----------- drivers/clk/qcom/videocc-sm6150.c | 5 ++--- 5 files changed, 19 insertions(+), 46 deletions(-) diff --git a/drivers/clk/qcom/camcc-sm6150.c b/drivers/clk/qcom/camcc-sm6150.c index c7942f794804..a06275a133fc 100644 --- a/drivers/clk/qcom/camcc-sm6150.c +++ b/drivers/clk/qcom/camcc-sm6150.c @@ -159,7 +159,7 @@ static struct pll_vco cam_cc_pll_vco[] = { }; /* 600MHz configuration */ -static struct alpha_pll_config cam_cc_pll0_config = { +static const struct alpha_pll_config cam_cc_pll0_config = { .l = 0x1F, .alpha_u = 0x40, .alpha_en_mask = BIT(24), @@ -175,7 +175,6 @@ static struct clk_alpha_pll cam_cc_pll0_out_aux = { .offset = 0x0, .vco_table = cam_cc_pll_vco, .num_vco = ARRAY_SIZE(cam_cc_pll_vco), - .config = &cam_cc_pll0_config, .clkr = { .hw.init = &(struct clk_init_data){ .name = "cam_cc_pll0_out_aux", @@ -192,7 +191,7 @@ static struct clk_alpha_pll cam_cc_pll0_out_aux = { }; /* 808MHz configuration */ -static struct alpha_pll_config cam_cc_pll1_config = { +static const struct alpha_pll_config cam_cc_pll1_config = { .l = 0x2A, .alpha_u = 0x15, .alpha = 0x55555555, @@ -209,7 +208,6 @@ static struct clk_alpha_pll cam_cc_pll1_out_aux = { .offset = 0x1000, .vco_table = cam_cc_pll_vco, .num_vco = ARRAY_SIZE(cam_cc_pll_vco), - .config = &cam_cc_pll1_config, .clkr = { .hw.init = &(struct clk_init_data){ .name = "cam_cc_pll1_out_aux", @@ -226,7 +224,7 @@ static struct clk_alpha_pll cam_cc_pll1_out_aux = { }; /* 960MHz configuration */ -static struct alpha_pll_config cam_cc_pll2_config = { +static const struct alpha_pll_config cam_cc_pll2_config = { .l = 0x32, .vco_val = 0x0 << 20, .vco_mask = 0x3 << 20, @@ -243,7 +241,6 @@ static struct clk_alpha_pll cam_cc_pll2_out_early = { .offset = 0x2000, .vco_table = cam_cc_pll2_vco, .num_vco = ARRAY_SIZE(cam_cc_pll2_vco), - .config = &cam_cc_pll2_config, .clkr = { .hw.init = &(struct clk_init_data){ .name = "cam_cc_pll2_out_early", @@ -270,7 +267,7 @@ static struct clk_alpha_pll_postdiv cam_cc_pll2_out_aux2 = { }; /* 1080MHz configuration */ -static struct alpha_pll_config cam_cc_pll3_config = { +static const struct alpha_pll_config cam_cc_pll3_config = { .l = 0x38, .alpha_u = 0x40, .alpha_en_mask = BIT(24), @@ -286,7 +283,6 @@ static struct clk_alpha_pll cam_cc_pll3_out_main = { .offset = 0x3000, .vco_table = cam_cc_pll_vco, .num_vco = ARRAY_SIZE(cam_cc_pll_vco), - .config = &cam_cc_pll3_config, .clkr = { .hw.init = &(struct clk_init_data){ .name = "cam_cc_pll3_out_main", @@ -349,7 +345,6 @@ static struct clk_rcg2 cam_cc_cci_clk_src = { .hid_width = 5, .parent_map = cam_cc_parent_map_5, .freq_tbl = ftbl_cam_cc_cci_clk_src, - .enable_safe_config = true, .clkr.hw.init = &(struct clk_init_data){ .name = "cam_cc_cci_clk_src", .parent_names = cam_cc_parent_names_5, @@ -379,7 +374,6 @@ static struct clk_rcg2 cam_cc_cphy_rx_clk_src = { .hid_width = 5, .parent_map = cam_cc_parent_map_2, .freq_tbl = ftbl_cam_cc_cphy_rx_clk_src, - .enable_safe_config = true, .clkr.hw.init = &(struct clk_init_data){ .name = "cam_cc_cphy_rx_clk_src", .parent_names = cam_cc_parent_names_2, @@ -409,7 +403,6 @@ static struct clk_rcg2 cam_cc_csi0phytimer_clk_src = { .hid_width = 5, .parent_map = cam_cc_parent_map_0, .freq_tbl = ftbl_cam_cc_csi0phytimer_clk_src, - .enable_safe_config = true, .clkr.hw.init = &(struct clk_init_data){ .name = "cam_cc_csi0phytimer_clk_src", .parent_names = cam_cc_parent_names_0, @@ -430,7 +423,6 @@ static struct clk_rcg2 cam_cc_csi1phytimer_clk_src = { .hid_width = 5, .parent_map = cam_cc_parent_map_0, .freq_tbl = ftbl_cam_cc_csi0phytimer_clk_src, - .enable_safe_config = true, .clkr.hw.init = &(struct clk_init_data){ .name = "cam_cc_csi1phytimer_clk_src", .parent_names = cam_cc_parent_names_0, @@ -451,7 +443,6 @@ static struct clk_rcg2 cam_cc_csi2phytimer_clk_src = { .hid_width = 5, .parent_map = cam_cc_parent_map_0, .freq_tbl = ftbl_cam_cc_csi0phytimer_clk_src, - .enable_safe_config = true, .clkr.hw.init = &(struct clk_init_data){ .name = "cam_cc_csi2phytimer_clk_src", .parent_names = cam_cc_parent_names_0, @@ -480,7 +471,6 @@ static struct clk_rcg2 cam_cc_fast_ahb_clk_src = { .hid_width = 5, .parent_map = cam_cc_parent_map_0, .freq_tbl = ftbl_cam_cc_fast_ahb_clk_src, - .enable_safe_config = true, .clkr.hw.init = &(struct clk_init_data){ .name = "cam_cc_fast_ahb_clk_src", .parent_names = cam_cc_parent_names_0, @@ -791,7 +781,6 @@ static struct clk_rcg2 cam_cc_mclk0_clk_src = { .hid_width = 5, .parent_map = cam_cc_parent_map_3, .freq_tbl = ftbl_cam_cc_mclk0_clk_src, - .enable_safe_config = true, .clkr.hw.init = &(struct clk_init_data){ .name = "cam_cc_mclk0_clk_src", .parent_names = cam_cc_parent_names_3, @@ -811,7 +800,6 @@ static struct clk_rcg2 cam_cc_mclk1_clk_src = { .hid_width = 5, .parent_map = cam_cc_parent_map_3, .freq_tbl = ftbl_cam_cc_mclk0_clk_src, - .enable_safe_config = true, .clkr.hw.init = &(struct clk_init_data){ .name = "cam_cc_mclk1_clk_src", .parent_names = cam_cc_parent_names_3, @@ -831,7 +819,6 @@ static struct clk_rcg2 cam_cc_mclk2_clk_src = { .hid_width = 5, .parent_map = cam_cc_parent_map_3, .freq_tbl = ftbl_cam_cc_mclk0_clk_src, - .enable_safe_config = true, .clkr.hw.init = &(struct clk_init_data){ .name = "cam_cc_mclk2_clk_src", .parent_names = cam_cc_parent_names_3, @@ -851,7 +838,6 @@ static struct clk_rcg2 cam_cc_mclk3_clk_src = { .hid_width = 5, .parent_map = cam_cc_parent_map_3, .freq_tbl = ftbl_cam_cc_mclk0_clk_src, - .enable_safe_config = true, .clkr.hw.init = &(struct clk_init_data){ .name = "cam_cc_mclk3_clk_src", .parent_names = cam_cc_parent_names_3, @@ -1775,13 +1761,13 @@ static int cam_cc_sm6150_probe(struct platform_device *pdev) } clk_alpha_pll_configure(&cam_cc_pll0_out_aux, regmap, - cam_cc_pll0_out_aux.config); + &cam_cc_pll0_config); clk_alpha_pll_configure(&cam_cc_pll1_out_aux, regmap, - cam_cc_pll1_out_aux.config); + &cam_cc_pll1_config); clk_alpha_pll_configure(&cam_cc_pll2_out_early, regmap, - cam_cc_pll2_out_early.config); + &cam_cc_pll2_config); clk_alpha_pll_configure(&cam_cc_pll3_out_main, regmap, - cam_cc_pll3_out_main.config); + &cam_cc_pll3_config); ret = qcom_cc_really_probe(pdev, &cam_cc_sm6150_desc, regmap); if (ret) { diff --git a/drivers/clk/qcom/dispcc-sm6150.c b/drivers/clk/qcom/dispcc-sm6150.c index d6ad88ea1b71..0186573c3dea 100644 --- a/drivers/clk/qcom/dispcc-sm6150.c +++ b/drivers/clk/qcom/dispcc-sm6150.c @@ -129,7 +129,7 @@ static struct pll_vco disp_cc_pll_vco[] = { }; /* 576MHz configuration */ -static struct alpha_pll_config disp_cc_pll0_config = { +static const struct alpha_pll_config disp_cc_pll0_config = { .l = 0x1E, .vco_val = 0x2 << 20, .vco_mask = 0x3 << 20, @@ -144,7 +144,6 @@ static struct clk_alpha_pll disp_cc_pll0_out_main = { .vco_table = disp_cc_pll_vco, .num_vco = ARRAY_SIZE(disp_cc_pll_vco), .flags = SUPPORTS_DYNAMIC_UPDATE, - .config = &disp_cc_pll0_config, .clkr = { .hw.init = &(struct clk_init_data){ .name = "disp_cc_pll0_out_main", @@ -270,7 +269,6 @@ static struct clk_rcg2 disp_cc_mdss_dp_link_clk_src = { .hid_width = 5, .parent_map = disp_cc_parent_map_0, .freq_tbl = ftbl_disp_cc_mdss_dp_link_clk_src, - .enable_safe_config = true, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_link_clk_src", .parent_names = disp_cc_parent_names_0, @@ -852,7 +850,7 @@ static int disp_cc_sm6150_probe(struct platform_device *pdev) } clk_alpha_pll_configure(&disp_cc_pll0_out_main, regmap, - disp_cc_pll0_out_main.config); + &disp_cc_pll0_config); ret = qcom_cc_really_probe(pdev, &disp_cc_sm6150_desc, regmap); if (ret) { diff --git a/drivers/clk/qcom/gpucc-sm6150.c b/drivers/clk/qcom/gpucc-sm6150.c index e8643ad15b00..62e71409b2ef 100644 --- a/drivers/clk/qcom/gpucc-sm6150.c +++ b/drivers/clk/qcom/gpucc-sm6150.c @@ -102,7 +102,7 @@ static struct pll_vco gpu_cc_pll_vco[] = { }; /* 1020MHz configuration */ -static struct alpha_pll_config gpu_pll0_config = { +static const struct alpha_pll_config gpu_pll0_config = { .l = 0x35, .config_ctl_val = 0x4001055b, .test_ctl_hi_val = 0x1, @@ -116,7 +116,7 @@ static struct alpha_pll_config gpu_pll0_config = { }; /* 930MHz configuration */ -static struct alpha_pll_config gpu_pll1_config = { +static const struct alpha_pll_config gpu_pll1_config = { .l = 0x30, .config_ctl_val = 0x4001055b, .test_ctl_hi_val = 0x1, @@ -134,7 +134,6 @@ static struct clk_alpha_pll gpu_cc_pll0_out_aux2 = { .vco_table = gpu_cc_pll_vco, .num_vco = ARRAY_SIZE(gpu_cc_pll_vco), .flags = SUPPORTS_DYNAMIC_UPDATE, - .config = &gpu_pll0_config, .clkr = { .hw.init = &(struct clk_init_data){ .name = "gpu_cc_pll0_out_aux2", @@ -155,7 +154,6 @@ static struct clk_alpha_pll gpu_cc_pll1_out_aux2 = { .vco_table = gpu_cc_pll_vco, .num_vco = ARRAY_SIZE(gpu_cc_pll_vco), .flags = SUPPORTS_DYNAMIC_UPDATE, - .config = &gpu_pll1_config, .clkr = { .hw.init = &(struct clk_init_data){ .name = "gpu_cc_pll1_out_aux2", @@ -596,9 +594,9 @@ static int gpu_cc_sm6150_probe(struct platform_device *pdev) } clk_alpha_pll_configure(&gpu_cc_pll0_out_aux2, regmap, - gpu_cc_pll0_out_aux2.config); + &gpu_pll0_config); clk_alpha_pll_configure(&gpu_cc_pll1_out_aux2, regmap, - gpu_cc_pll1_out_aux2.config); + &gpu_pll1_config); ret = qcom_cc_really_probe(pdev, &gpu_cc_sm6150_desc, regmap); if (ret) { diff --git a/drivers/clk/qcom/scc-sm6150.c b/drivers/clk/qcom/scc-sm6150.c index bfe2134caf18..26e6f02435e3 100644 --- a/drivers/clk/qcom/scc-sm6150.c +++ b/drivers/clk/qcom/scc-sm6150.c @@ -37,8 +37,8 @@ static DEFINE_VDD_REGULATORS(vdd_scc_cx, VDD_NUM, 1, vdd_corner); enum { - P_AOSS_CC_RO_CLK, P_AON_SLEEP_CLK, + P_AOSS_CC_RO_CLK, P_CORE_PI_CXO_CLK, P_QDSP6SS_PLL_OUT_AUX, P_SCC_PLL_OUT_AUX, @@ -74,7 +74,7 @@ static struct pll_vco scc_pll_vco[] = { }; /* 600MHz configuration */ -static struct alpha_pll_config scc_pll_config = { +static const struct alpha_pll_config scc_pll_config = { .l = 0x1F, .alpha_u = 0x40, .alpha_en_mask = BIT(24), @@ -93,7 +93,6 @@ static struct clk_alpha_pll scc_pll_out_aux2 = { .offset = 0x0, .vco_table = scc_pll_vco, .num_vco = ARRAY_SIZE(scc_pll_vco), - .config = &scc_pll_config, .clkr.hw.init = &(struct clk_init_data){ .name = "scc_pll_out_aux2", .parent_names = (const char *[]){ "bi_tcxo" }, @@ -142,7 +141,6 @@ static struct clk_rcg2 scc_main_rcg_clk_src = { .hid_width = 5, .parent_map = scc_parent_map_0, .freq_tbl = ftbl_scc_main_rcg_clk_src, - .enable_safe_config = true, .clkr.hw.init = &(struct clk_init_data){ .name = "scc_main_rcg_clk_src", .parent_names = scc_parent_names_0, @@ -202,7 +200,6 @@ static struct clk_rcg2 scc_qupv3_se1_clk_src = { .hid_width = 5, .parent_map = scc_parent_map_0, .freq_tbl = ftbl_scc_qupv3_se0_clk_src, - .enable_safe_config = true, .clkr.hw.init = &(struct clk_init_data){ .name = "scc_qupv3_se1_clk_src", .parent_names = scc_parent_names_0, @@ -224,7 +221,6 @@ static struct clk_rcg2 scc_qupv3_se2_clk_src = { .hid_width = 5, .parent_map = scc_parent_map_0, .freq_tbl = ftbl_scc_qupv3_se0_clk_src, - .enable_safe_config = true, .clkr.hw.init = &(struct clk_init_data){ .name = "scc_qupv3_se2_clk_src", .parent_names = scc_parent_names_0, @@ -246,7 +242,6 @@ static struct clk_rcg2 scc_qupv3_se3_clk_src = { .hid_width = 5, .parent_map = scc_parent_map_0, .freq_tbl = ftbl_scc_qupv3_se0_clk_src, - .enable_safe_config = true, .clkr.hw.init = &(struct clk_init_data){ .name = "scc_qupv3_se3_clk_src", .parent_names = scc_parent_names_0, @@ -268,7 +263,6 @@ static struct clk_rcg2 scc_qupv3_se4_clk_src = { .hid_width = 5, .parent_map = scc_parent_map_0, .freq_tbl = ftbl_scc_qupv3_se0_clk_src, - .enable_safe_config = true, .clkr.hw.init = &(struct clk_init_data){ .name = "scc_qupv3_se4_clk_src", .parent_names = scc_parent_names_0, @@ -290,7 +284,6 @@ static struct clk_rcg2 scc_qupv3_se5_clk_src = { .hid_width = 5, .parent_map = scc_parent_map_0, .freq_tbl = ftbl_scc_qupv3_se0_clk_src, - .enable_safe_config = true, .clkr.hw.init = &(struct clk_init_data){ .name = "scc_qupv3_se5_clk_src", .parent_names = scc_parent_names_0, @@ -578,8 +571,7 @@ static int scc_sm6150_probe(struct platform_device *pdev) return PTR_ERR(regmap); } - clk_alpha_pll_configure(&scc_pll_out_aux2, regmap, - scc_pll_out_aux2.config); + clk_alpha_pll_configure(&scc_pll_out_aux2, regmap, &scc_pll_config); ret = qcom_cc_really_probe(pdev, &scc_sm6150_desc, regmap); if (ret) { diff --git a/drivers/clk/qcom/videocc-sm6150.c b/drivers/clk/qcom/videocc-sm6150.c index 095ff1452b63..946e9c2820ad 100644 --- a/drivers/clk/qcom/videocc-sm6150.c +++ b/drivers/clk/qcom/videocc-sm6150.c @@ -85,7 +85,7 @@ static struct pll_vco video_cc_pll_vco[] = { }; /* 600MHz configuration */ -static struct alpha_pll_config video_pll0_config = { +static const struct alpha_pll_config video_pll0_config = { .l = 0x1F, .alpha_u = 0x40, .alpha = 0x00, @@ -103,7 +103,6 @@ static struct clk_alpha_pll video_pll0_out_main = { .vco_table = video_cc_pll_vco, .num_vco = ARRAY_SIZE(video_cc_pll_vco), .flags = SUPPORTS_DYNAMIC_UPDATE, - .config = &video_pll0_config, .clkr = { .hw.init = &(struct clk_init_data){ .name = "video_pll0_out_main", @@ -365,7 +364,7 @@ static int video_cc_sm6150_probe(struct platform_device *pdev) } clk_alpha_pll_configure(&video_pll0_out_main, regmap, - video_pll0_out_main.config); + &video_pll0_config); ret = qcom_cc_really_probe(pdev, &video_cc_sm6150_desc, regmap); if (ret) { From 274ba1683a632275757a58a989aae17c8d8d2b3f Mon Sep 17 00:00:00 2001 From: frank Liu Date: Fri, 2 Aug 2019 00:58:01 -0700 Subject: [PATCH 003/126] Revert "msm: defconfig: Disable IPA for sm6150 auto" This reverts commit bc979a53fa78a84566d5f571a22da8a536410699. Change-Id: I68f8abbd7bcfc74b9efb49912c68399900422831 Signed-off-by: Frank Liu --- arch/arm64/configs/vendor/sdmsteppe-auto-perf_defconfig | 6 +++++- arch/arm64/configs/vendor/sdmsteppe-auto_defconfig | 7 ++++++- 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/arch/arm64/configs/vendor/sdmsteppe-auto-perf_defconfig b/arch/arm64/configs/vendor/sdmsteppe-auto-perf_defconfig index fd0f8aa24e64..794a6f0859c9 100644 --- a/arch/arm64/configs/vendor/sdmsteppe-auto-perf_defconfig +++ b/arch/arm64/configs/vendor/sdmsteppe-auto-perf_defconfig @@ -519,7 +519,11 @@ CONFIG_QPNP_REVID=y CONFIG_SPS=y CONFIG_SPS_SUPPORT_NDP_BAM=y CONFIG_USB_BAM=y -CONFIG_GSI=y +CONFIG_IPA3=y +CONFIG_IPA_WDI_UNIFIED_API=y +CONFIG_RMNET_IPA3=y +CONFIG_RNDIS_IPA=y +CONFIG_IPA_UT=y CONFIG_MSM_11AD=m CONFIG_QCOM_MDSS_PLL=y CONFIG_SPMI_PMIC_CLKDIV=y diff --git a/arch/arm64/configs/vendor/sdmsteppe-auto_defconfig b/arch/arm64/configs/vendor/sdmsteppe-auto_defconfig index eb5cd6bf2ea5..340ec1d7283e 100644 --- a/arch/arm64/configs/vendor/sdmsteppe-auto_defconfig +++ b/arch/arm64/configs/vendor/sdmsteppe-auto_defconfig @@ -543,7 +543,12 @@ CONFIG_QPNP_REVID=y CONFIG_SPS=y CONFIG_SPS_SUPPORT_NDP_BAM=y CONFIG_USB_BAM=y -CONFIG_GSI=y +CONFIG_IPA3=y +CONFIG_IPA_DEBUG=y +CONFIG_IPA_WDI_UNIFIED_API=y +CONFIG_RMNET_IPA3=y +CONFIG_RNDIS_IPA=y +CONFIG_IPA_UT=y CONFIG_MSM_11AD=m CONFIG_QCOM_MDSS_PLL=y CONFIG_SPMI_PMIC_CLKDIV=y From bacdb990cc0a00952efe17c2e5803efc1550c6bb Mon Sep 17 00:00:00 2001 From: Vijayakumar Badiger Date: Mon, 29 Apr 2019 17:49:17 -0700 Subject: [PATCH 004/126] Add sdmshrike for supported platform Add condtion for supporing new camera cpas version. Change-Id: Ib8a9f517b651ed516931a0fe47c63b24ce4791eb Signed-off-by: Vijayakumar Badiger --- .../media/platform/msm/ais/cam_cpas/cpas_top/cam_cpastop_hw.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/media/platform/msm/ais/cam_cpas/cpas_top/cam_cpastop_hw.c b/drivers/media/platform/msm/ais/cam_cpas/cpas_top/cam_cpastop_hw.c index fac614ace6f2..547b93a0f346 100644 --- a/drivers/media/platform/msm/ais/cam_cpas/cpas_top/cam_cpastop_hw.c +++ b/drivers/media/platform/msm/ais/cam_cpas/cpas_top/cam_cpastop_hw.c @@ -107,6 +107,10 @@ static int cam_cpastop_get_hw_info(struct cam_hw_info *cpas_hw, (hw_caps->cpas_version.minor == 0) && (hw_caps->cpas_version.incr == 1)) soc_info->hw_version = CAM_CPAS_TITAN_175_V101; + else if ((hw_caps->cpas_version.major == 1) && + (hw_caps->cpas_version.minor == 1) && + (hw_caps->cpas_version.incr == 1)) + soc_info->hw_version = CAM_CPAS_TITAN_175_V101; else if ((hw_caps->cpas_version.major == 1) && (hw_caps->cpas_version.minor == 2) && (hw_caps->cpas_version.incr == 0)) From d3ff6d37db9585f7779cec6f0a304c773af4e039 Mon Sep 17 00:00:00 2001 From: Xiaowen Wu Date: Fri, 11 Oct 2019 14:38:45 -0400 Subject: [PATCH 005/126] ARM: dts: msm: fix missing header in display dtsi Add missing rpmh header in display dtsi to fix sdmshrike overlay building issue. Change-Id: Ibf49fb8af48250f66efc924ebf69408ac49581c4 Signed-off-by: Xiaowen Wu --- arch/arm64/boot/dts/qcom/sa6155-display.dtsi | 1 + arch/arm64/boot/dts/qcom/sa8155-adp-star-display.dtsi | 1 + arch/arm64/boot/dts/qcom/sa8195p-adp-star-display.dtsi | 1 + 3 files changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa6155-display.dtsi b/arch/arm64/boot/dts/qcom/sa6155-display.dtsi index 5bded584b2f3..eea45efaf9d8 100644 --- a/arch/arm64/boot/dts/qcom/sa6155-display.dtsi +++ b/arch/arm64/boot/dts/qcom/sa6155-display.dtsi @@ -11,6 +11,7 @@ */ #include +#include #include "dsi-panel-ext-bridge-1080p.dtsi" &tlmm { diff --git a/arch/arm64/boot/dts/qcom/sa8155-adp-star-display.dtsi b/arch/arm64/boot/dts/qcom/sa8155-adp-star-display.dtsi index 1e558a5a8fa4..201414db5ccb 100644 --- a/arch/arm64/boot/dts/qcom/sa8155-adp-star-display.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8155-adp-star-display.dtsi @@ -11,6 +11,7 @@ */ #include +#include &tlmm { ioexp_intr_active: ioexp_intr_active { diff --git a/arch/arm64/boot/dts/qcom/sa8195p-adp-star-display.dtsi b/arch/arm64/boot/dts/qcom/sa8195p-adp-star-display.dtsi index da26faa06524..24055df6bffb 100644 --- a/arch/arm64/boot/dts/qcom/sa8195p-adp-star-display.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8195p-adp-star-display.dtsi @@ -11,6 +11,7 @@ */ #include +#include &tlmm { ioexp_intr_active: ioexp_intr_active { From 27cb66d5c022f34918e9b41fdf73c54d63fc73e4 Mon Sep 17 00:00:00 2001 From: Veera Vegivada Date: Fri, 13 Sep 2019 13:45:06 +0530 Subject: [PATCH 006/126] clk: qcom: Add debug clock controller for sdmshrike Add the debug mux structure with inputs for measuring the clocks on sdmshrike. Change-Id: I7dfc471ca7bad7eb4be3cd04362f558a71b53b5d Signed-off-by: Veera Vegivada --- .../bindings/clock/qcom,debugcc.txt | 3 +- drivers/clk/qcom/Kconfig | 9 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/debugcc-sdmshrike.c | 890 ++++++++++++++++++ drivers/clk/qcom/gcc-sdmshrike.c | 37 + .../dt-bindings/clock/qcom,gcc-sdmshrike.h | 8 +- 6 files changed, 946 insertions(+), 2 deletions(-) create mode 100644 drivers/clk/qcom/debugcc-sdmshrike.c diff --git a/Documentation/devicetree/bindings/clock/qcom,debugcc.txt b/Documentation/devicetree/bindings/clock/qcom,debugcc.txt index 3e2c5d895210..3a60b4fed393 100644 --- a/Documentation/devicetree/bindings/clock/qcom,debugcc.txt +++ b/Documentation/devicetree/bindings/clock/qcom,debugcc.txt @@ -8,7 +8,8 @@ Required properties : "qcom,debugcc-sdmmagpie" "qcom,debugcc-sdxprairie", "qcom,debugcc-trinket", - "qcom,atoll-debugcc". + "qcom,atoll-debugcc", + "qcom,debugcc-sdmshrike". - qcom,gcc: phandle to the GCC device node. - qcom,videocc: phandle to the Video CC device node. - qcom,camcc: phandle to the Camera CC device node. diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig index c85f6e18cd25..9ac671560c08 100644 --- a/drivers/clk/qcom/Kconfig +++ b/drivers/clk/qcom/Kconfig @@ -326,6 +326,15 @@ config MSM_CAMCC_SDMSHRIKE Say Y if you want to support camera devices and functionality such as capturing pictures. +config MSM_DEBUGCC_SDMSHRIKE + tristate "SDMSHRIKE Debug Clock Controller" + depends on COMMON_CLK_QCOM + help + Support for the debug clock controller on Qualcomm Technologies, Inc + SDMSHRIKE devices. + Say Y if you want to support the clock measurement functionality for + measuring the clock frequency. + config MDM_GCC_QCS405 tristate "QCS405 Global Clock Controller" select QCOM_GDSC diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile index 84f42e13f73f..72b3e6b63418 100644 --- a/drivers/clk/qcom/Makefile +++ b/drivers/clk/qcom/Makefile @@ -37,6 +37,7 @@ obj-$(CONFIG_MSM_CAMCC_SDMMAGPIE) += camcc-sdmmagpie.o obj-$(CONFIG_MSM_CAMCC_SDMSHRIKE) += camcc-sdmshrike.o obj-$(CONFIG_MSM_CLK_AOP_QMP) += clk-aop-qmp.o obj-$(CONFIG_MSM_CLK_RPMH) += clk-rpmh.o +obj-$(CONFIG_MSM_DEBUGCC_SDMSHRIKE) += debugcc-sdmshrike.o obj-$(CONFIG_MSM_DEBUGCC_SM6150) += debugcc-sm6150.o obj-$(CONFIG_MSM_DEBUGCC_SM8150) += debugcc-sm8150.o obj-$(CONFIG_MSM_DISPCC_SM6150) += dispcc-sm6150.o diff --git a/drivers/clk/qcom/debugcc-sdmshrike.c b/drivers/clk/qcom/debugcc-sdmshrike.c new file mode 100644 index 000000000000..45aaad69509a --- /dev/null +++ b/drivers/clk/qcom/debugcc-sdmshrike.c @@ -0,0 +1,890 @@ +/* + * Copyright (c) 2019, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#define pr_fmt(fmt) "clk: %s: " fmt, __func__ + +#include +#include +#include +#include +#include + +#include "clk-debug.h" + +static struct measure_clk_data debug_mux_priv = { + .ctl_reg = 0x62038, + .status_reg = 0x6203C, + .xo_div4_cbcr = 0x43008, +}; + +static const char *const debug_mux_parent_names[] = { + "measure_only_mccc_clk", + "measure_only_cnoc_clk", + "measure_only_ipa_2x_clk", + "measure_only_snoc_clk", + "l3_clk", + "pwrcl_clk", + "perfcl_clk", + "cam_cc_bps_ahb_clk", + "cam_cc_bps_areg_clk", + "cam_cc_bps_axi_clk", + "cam_cc_bps_clk", + "cam_cc_camnoc_axi_clk", + "cam_cc_cci_0_clk", + "cam_cc_cci_1_clk", + "cam_cc_cci_2_clk", + "cam_cc_cci_3_clk", + "cam_cc_core_ahb_clk", + "cam_cc_cpas_ahb_clk", + "cam_cc_csi0phytimer_clk", + "cam_cc_csi1phytimer_clk", + "cam_cc_csi2phytimer_clk", + "cam_cc_csi3phytimer_clk", + "cam_cc_csiphy0_clk", + "cam_cc_csiphy1_clk", + "cam_cc_csiphy2_clk", + "cam_cc_csiphy3_clk", + "cam_cc_fd_core_clk", + "cam_cc_fd_core_uar_clk", + "cam_cc_icp_ahb_clk", + "cam_cc_icp_clk", + "cam_cc_ife_0_axi_clk", + "cam_cc_ife_0_clk", + "cam_cc_ife_0_cphy_rx_clk", + "cam_cc_ife_0_csid_clk", + "cam_cc_ife_0_dsp_clk", + "cam_cc_ife_1_axi_clk", + "cam_cc_ife_1_clk", + "cam_cc_ife_1_cphy_rx_clk", + "cam_cc_ife_1_csid_clk", + "cam_cc_ife_1_dsp_clk", + "cam_cc_ife_2_axi_clk", + "cam_cc_ife_2_clk", + "cam_cc_ife_2_cphy_rx_clk", + "cam_cc_ife_2_csid_clk", + "cam_cc_ife_2_dsp_clk", + "cam_cc_ife_3_axi_clk", + "cam_cc_ife_3_clk", + "cam_cc_ife_3_cphy_rx_clk", + "cam_cc_ife_3_csid_clk", + "cam_cc_ife_3_dsp_clk", + "cam_cc_ife_lite_0_clk", + "cam_cc_ife_lite_0_cphy_rx_clk", + "cam_cc_ife_lite_0_csid_clk", + "cam_cc_ife_lite_1_clk", + "cam_cc_ife_lite_1_cphy_rx_clk", + "cam_cc_ife_lite_1_csid_clk", + "cam_cc_ife_lite_2_clk", + "cam_cc_ife_lite_2_cphy_rx_clk", + "cam_cc_ife_lite_2_csid_clk", + "cam_cc_ife_lite_3_clk", + "cam_cc_ife_lite_3_cphy_rx_clk", + "cam_cc_ife_lite_3_csid_clk", + "cam_cc_ipe_0_ahb_clk", + "cam_cc_ipe_0_areg_clk", + "cam_cc_ipe_0_axi_clk", + "cam_cc_ipe_0_clk", + "cam_cc_ipe_1_ahb_clk", + "cam_cc_ipe_1_areg_clk", + "cam_cc_ipe_1_axi_clk", + "cam_cc_ipe_1_clk", + "cam_cc_jpeg_clk", + "cam_cc_lrme_clk", + "cam_cc_mclk0_clk", + "cam_cc_mclk1_clk", + "cam_cc_mclk2_clk", + "cam_cc_mclk3_clk", + "cam_cc_mclk4_clk", + "cam_cc_mclk5_clk", + "cam_cc_mclk6_clk", + "cam_cc_mclk7_clk", + "disp_cc_mdss_ahb_clk", + "disp_cc_mdss_byte0_clk", + "disp_cc_mdss_byte0_intf_clk", + "disp_cc_mdss_byte1_clk", + "disp_cc_mdss_byte1_intf_clk", + "disp_cc_mdss_dp_crypto1_clk", + "disp_cc_mdss_dp_crypto_clk", + "disp_cc_mdss_dp_link1_clk", + "disp_cc_mdss_dp_link1_intf_clk", + "disp_cc_mdss_dp_link_clk", + "disp_cc_mdss_dp_link_intf_clk", + "disp_cc_mdss_dp_pixel1_clk", + "disp_cc_mdss_dp_pixel2_clk", + "disp_cc_mdss_dp_pixel_clk", + "disp_cc_mdss_edp_link_clk", + "disp_cc_mdss_edp_link_intf_clk", + "disp_cc_mdss_edp_pixel_clk", + "disp_cc_mdss_mdp_clk", + "disp_cc_mdss_mdp_lut_clk", + "disp_cc_mdss_non_gdsc_ahb_clk", + "disp_cc_mdss_pclk0_clk", + "disp_cc_mdss_pclk1_clk", + "disp_cc_mdss_rot_clk", + "disp_cc_mdss_rscc_ahb_clk", + "gcc_aggre_ufs_card_2_axi_clk", + "gcc_aggre_ufs_card_axi_clk", + "gcc_aggre_ufs_phy_axi_clk", + "gcc_aggre_usb3_mp_axi_clk", + "gcc_aggre_usb3_prim_axi_clk", + "gcc_aggre_usb3_sec_axi_clk", + "gcc_cfg_noc_usb3_mp_axi_clk", + "gcc_cfg_noc_usb3_prim_axi_clk", + "gcc_cfg_noc_usb3_sec_axi_clk", + "gcc_cpuss_ahb_clk", + "gcc_emac_ptp_clk", + "gcc_emac_rgmii_clk", + "gcc_gp1_clk", + "gcc_gp2_clk", + "gcc_gp3_clk", + "gcc_gp4_clk", + "gcc_gp5_clk", + "gcc_gpu_gpll0_clk_src", + "gcc_gpu_gpll0_div_clk_src", + "gcc_npu_axi_clk", + "gcc_npu_gpll0_clk_src", + "gcc_npu_gpll0_div_clk_src", + "gcc_pcie0_phy_refgen_clk", + "gcc_pcie1_phy_refgen_clk", + "gcc_pcie2_phy_refgen_clk", + "gcc_pcie3_phy_refgen_clk", + "gcc_pcie_0_aux_clk", + "gcc_pcie_1_aux_clk", + "gcc_pcie_2_aux_clk", + "gcc_pcie_2_pipe_clk", + "gcc_pcie_2_slv_axi_clk", + "gcc_pcie_2_slv_q2a_axi_clk", + "gcc_pcie_3_aux_clk", + "gcc_pcie_3_cfg_ahb_clk", + "gcc_pcie_3_mstr_axi_clk", + "gcc_pcie_3_pipe_clk", + "gcc_pcie_3_slv_axi_clk", + "gcc_pcie_3_slv_q2a_axi_clk", + "gcc_pcie_phy_aux_clk", + "gcc_pdm2_clk", + "gcc_pdm_ahb_clk", + "gcc_prng_ahb_clk", + "gcc_qspi_1_cnoc_periph_ahb_clk", + "gcc_qspi_1_core_clk", + "gcc_qspi_cnoc_periph_ahb_clk", + "gcc_qspi_core_clk", + "gcc_qupv3_wrap0_core_2x_clk", + "gcc_qupv3_wrap0_core_clk", + "gcc_qupv3_wrap0_s0_clk", + "gcc_qupv3_wrap0_s1_clk", + "gcc_qupv3_wrap0_s2_clk", + "gcc_qupv3_wrap0_s3_clk", + "gcc_qupv3_wrap0_s4_clk", + "gcc_qupv3_wrap0_s5_clk", + "gcc_qupv3_wrap0_s6_clk", + "gcc_qupv3_wrap0_s7_clk", + "gcc_qupv3_wrap1_core_2x_clk", + "gcc_qupv3_wrap1_core_clk", + "gcc_qupv3_wrap1_s0_clk", + "gcc_qupv3_wrap1_s1_clk", + "gcc_qupv3_wrap1_s2_clk", + "gcc_qupv3_wrap1_s3_clk", + "gcc_qupv3_wrap1_s4_clk", + "gcc_qupv3_wrap1_s5_clk", + "gcc_qupv3_wrap2_core_2x_clk", + "gcc_qupv3_wrap2_core_clk", + "gcc_qupv3_wrap2_s0_clk", + "gcc_qupv3_wrap2_s1_clk", + "gcc_qupv3_wrap2_s2_clk", + "gcc_qupv3_wrap2_s3_clk", + "gcc_qupv3_wrap2_s4_clk", + "gcc_qupv3_wrap2_s5_clk", + "gcc_sdcc2_ahb_clk", + "gcc_sdcc2_apps_clk", + "gcc_sdcc4_ahb_clk", + "gcc_sdcc4_apps_clk", + "gcc_sys_noc_cpuss_ahb_clk", + "gcc_tsif_ahb_clk", + "gcc_tsif_ref_clk", + "gcc_ufs_card_2_ahb_clk", + "gcc_ufs_card_2_axi_clk", + "gcc_ufs_card_2_ice_core_clk", + "gcc_ufs_card_2_phy_aux_clk", + "gcc_ufs_card_2_rx_symbol_0_clk", + "gcc_ufs_card_2_rx_symbol_1_clk", + "gcc_ufs_card_2_tx_symbol_0_clk", + "gcc_ufs_card_2_unipro_core_clk", + "gcc_ufs_card_ahb_clk", + "gcc_ufs_card_axi_clk", + "gcc_ufs_card_ice_core_clk", + "gcc_ufs_card_rx_symbol_0_clk", + "gcc_ufs_card_rx_symbol_1_clk", + "gcc_ufs_card_tx_symbol_0_clk", + "gcc_ufs_card_unipro_core_clk", + "gcc_ufs_phy_ahb_clk", + "gcc_ufs_phy_axi_clk", + "gcc_ufs_phy_ice_core_clk", + "gcc_ufs_phy_rx_symbol_0_clk", + "gcc_ufs_phy_rx_symbol_1_clk", + "gcc_ufs_phy_tx_symbol_0_clk", + "gcc_ufs_phy_unipro_core_clk", + "gcc_usb30_mp_master_clk", + "gcc_usb30_mp_mock_utmi_clk", + "gcc_usb30_prim_master_clk", + "gcc_usb30_prim_mock_utmi_clk", + "gcc_usb30_sec_master_clk", + "gcc_usb30_sec_mock_utmi_clk", + "gcc_usb3_mp_phy_com_aux_clk", + "gcc_usb3_mp_phy_pipe_0_clk", + "gcc_usb3_mp_phy_pipe_1_clk", + "gcc_usb3_prim_phy_pipe_clk", + "gcc_usb3_sec_phy_pipe_clk", + "gcc_video_ahb_clk", + "gcc_video_axi0_clk", + "gcc_video_axi1_clk", + "gcc_video_axic_clk", + "gpu_cc_ahb_clk", + "gpu_cc_cx_apb_clk", + "gpu_cc_cx_gmu_clk", + "gpu_cc_cx_qdss_at_clk", + "gpu_cc_cx_qdss_trig_clk", + "gpu_cc_cx_snoc_dvm_clk", + "gpu_cc_gx_gmu_clk", + "gpu_cc_gx_vsense_clk", + "npu_cc_armwic_core_clk", + "npu_cc_cal_dp_cdc_clk", + "npu_cc_cal_dp_clk", + "npu_cc_comp_noc_axi_clk", + "npu_cc_conf_noc_ahb_clk", + "npu_cc_npu_core_atb_clk", + "npu_cc_npu_core_clk", + "npu_cc_npu_core_cti_clk", + "npu_cc_npu_cpc_clk", + "npu_cc_perf_cnt_clk", + "video_cc_iris_ahb_clk", + "video_cc_mvs0_core_clk", + "video_cc_mvs1_core_clk", + "video_cc_mvsc_core_clk", +}; + +static struct clk_debug_mux gcc_debug_mux = { + .priv = &debug_mux_priv, + .debug_offset = 0x62000, + .post_div_offset = 0x62004, + .cbcr_offset = 0x62008, + .src_sel_mask = 0x3FF, + .src_sel_shift = 0, + .post_div_mask = 0xF, + .post_div_shift = 0, + .period_offset = 0x50, + MUX_SRC_LIST( + { "measure_only_mccc_clk", 0xC2, 2, MC_CC, + 0xC2, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "measure_only_cnoc_clk", 0x15, 2, GCC, + 0x15, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "measure_only_ipa_2x_clk", 0x128, 2, GCC, + 0x128, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "measure_only_snoc_clk", 0x7, 2, GCC, + 0x7, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "l3_clk", 0xD6, 2, CPU_CC, + 0x46, 0x7F, 4, 0xF, 11, 1, 0x0, 0x0, U32_MAX, 16 }, + { "pwrcl_clk", 0xD6, 2, CPU_CC, + 0x44, 0x7F, 4, 0xF, 11, 1, 0x0, 0x0, U32_MAX, 16 }, + { "perfcl_clk", 0xD6, 2, CPU_CC, + 0x45, 0x7F, 4, 0xF, 11, 1, 0x0, 0x0, U32_MAX, 16 }, + { "cam_cc_bps_ahb_clk", 0x46, 2, CAM_CC, + 0xE, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_bps_areg_clk", 0x46, 2, CAM_CC, + 0xD, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_bps_axi_clk", 0x46, 2, CAM_CC, + 0xC, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_bps_clk", 0x46, 2, CAM_CC, + 0xB, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_camnoc_axi_clk", 0x46, 2, CAM_CC, + 0x27, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_cci_0_clk", 0x46, 2, CAM_CC, + 0x2A, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_cci_1_clk", 0x46, 2, CAM_CC, + 0x3B, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_cci_2_clk", 0x46, 2, CAM_CC, + 0x5B, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_cci_3_clk", 0x46, 2, CAM_CC, + 0x5C, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_core_ahb_clk", 0x46, 2, CAM_CC, + 0x2E, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_cpas_ahb_clk", 0x46, 2, CAM_CC, + 0x2C, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_csi0phytimer_clk", 0x46, 2, CAM_CC, + 0x5, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_csi1phytimer_clk", 0x46, 2, CAM_CC, + 0x7, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_csi2phytimer_clk", 0x46, 2, CAM_CC, + 0x9, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_csi3phytimer_clk", 0x46, 2, CAM_CC, + 0x35, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_csiphy0_clk", 0x46, 2, CAM_CC, + 0x6, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_csiphy1_clk", 0x46, 2, CAM_CC, + 0x8, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_csiphy2_clk", 0x46, 2, CAM_CC, + 0xA, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_csiphy3_clk", 0x46, 2, CAM_CC, + 0x36, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_fd_core_clk", 0x46, 2, CAM_CC, + 0x28, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_fd_core_uar_clk", 0x46, 2, CAM_CC, + 0x29, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_icp_ahb_clk", 0x46, 2, CAM_CC, + 0x37, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_icp_clk", 0x46, 2, CAM_CC, + 0x26, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_0_axi_clk", 0x46, 2, CAM_CC, + 0x1B, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_0_clk", 0x46, 2, CAM_CC, + 0x17, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_0_cphy_rx_clk", 0x46, 2, CAM_CC, + 0x1A, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_0_csid_clk", 0x46, 2, CAM_CC, + 0x19, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_0_dsp_clk", 0x46, 2, CAM_CC, + 0x18, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_1_axi_clk", 0x46, 2, CAM_CC, + 0x21, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_1_clk", 0x46, 2, CAM_CC, + 0x1D, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_1_cphy_rx_clk", 0x46, 2, CAM_CC, + 0x20, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_1_csid_clk", 0x46, 2, CAM_CC, + 0x1F, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_1_dsp_clk", 0x46, 2, CAM_CC, + 0x1E, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_2_axi_clk", 0x46, 2, CAM_CC, + 0x4A, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_2_clk", 0x46, 2, CAM_CC, + 0x44, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_2_cphy_rx_clk", 0x46, 2, CAM_CC, + 0x49, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_2_csid_clk", 0x46, 2, CAM_CC, + 0x47, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_2_dsp_clk", 0x46, 2, CAM_CC, + 0x46, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_3_axi_clk", 0x46, 2, CAM_CC, + 0x51, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_3_clk", 0x46, 2, CAM_CC, + 0x4B, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_3_cphy_rx_clk", 0x46, 2, CAM_CC, + 0x50, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_3_csid_clk", 0x46, 2, CAM_CC, + 0x4E, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_3_dsp_clk", 0x46, 2, CAM_CC, + 0x4D, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_lite_0_clk", 0x46, 2, CAM_CC, + 0x22, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_lite_0_cphy_rx_clk", 0x46, 2, CAM_CC, + 0x24, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_lite_0_csid_clk", 0x46, 2, CAM_CC, + 0x23, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_lite_1_clk", 0x46, 2, CAM_CC, + 0x38, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_lite_1_cphy_rx_clk", 0x46, 2, CAM_CC, + 0x3A, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_lite_1_csid_clk", 0x46, 2, CAM_CC, + 0x39, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_lite_2_clk", 0x46, 2, CAM_CC, + 0x55, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_lite_2_cphy_rx_clk", 0x46, 2, CAM_CC, + 0x57, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_lite_2_csid_clk", 0x46, 2, CAM_CC, + 0x56, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_lite_3_clk", 0x46, 2, CAM_CC, + 0x58, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_lite_3_cphy_rx_clk", 0x46, 2, CAM_CC, + 0x5A, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ife_lite_3_csid_clk", 0x46, 2, CAM_CC, + 0x59, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ipe_0_ahb_clk", 0x46, 2, CAM_CC, + 0x12, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ipe_0_areg_clk", 0x46, 2, CAM_CC, + 0x11, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ipe_0_axi_clk", 0x46, 2, CAM_CC, + 0x10, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ipe_0_clk", 0x46, 2, CAM_CC, + 0xF, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ipe_1_ahb_clk", 0x46, 2, CAM_CC, + 0x16, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ipe_1_areg_clk", 0x46, 2, CAM_CC, + 0x15, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ipe_1_axi_clk", 0x46, 2, CAM_CC, + 0x14, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_ipe_1_clk", 0x46, 2, CAM_CC, + 0x13, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_jpeg_clk", 0x46, 2, CAM_CC, + 0x25, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_lrme_clk", 0x46, 2, CAM_CC, + 0x2B, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_mclk0_clk", 0x46, 2, CAM_CC, + 0x1, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_mclk1_clk", 0x46, 2, CAM_CC, + 0x2, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_mclk2_clk", 0x46, 2, CAM_CC, + 0x3, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_mclk3_clk", 0x46, 2, CAM_CC, + 0x4, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_mclk4_clk", 0x46, 2, CAM_CC, + 0x5D, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_mclk5_clk", 0x46, 2, CAM_CC, + 0x5E, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_mclk6_clk", 0x46, 2, CAM_CC, + 0x5F, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "cam_cc_mclk7_clk", 0x46, 2, CAM_CC, + 0x60, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 }, + { "disp_cc_mdss_ahb_clk", 0x47, 2, DISP_CC, + 0x2B, 0xFF, 0, 0x3, 0, 4, 0x7000, 0x5008, 0x500C }, + { "disp_cc_mdss_byte0_clk", 0x47, 2, DISP_CC, + 0x15, 0xFF, 0, 0x3, 0, 4, 0x7000, 0x5008, 0x500C }, + { "disp_cc_mdss_byte0_intf_clk", 0x47, 2, DISP_CC, + 0x16, 0xFF, 0, 0x3, 0, 4, 0x7000, 0x5008, 0x500C }, + { "disp_cc_mdss_byte1_clk", 0x47, 2, DISP_CC, + 0x17, 0xFF, 0, 0x3, 0, 4, 0x7000, 0x5008, 0x500C }, + { "disp_cc_mdss_byte1_intf_clk", 0x47, 2, DISP_CC, + 0x18, 0xFF, 0, 0x3, 0, 4, 0x7000, 0x5008, 0x500C }, + { "disp_cc_mdss_dp_crypto1_clk", 0x47, 2, DISP_CC, + 0x24, 0xFF, 0, 0x3, 0, 4, 0x7000, 0x5008, 0x500C }, + { "disp_cc_mdss_dp_crypto_clk", 0x47, 2, DISP_CC, + 0x1D, 0xFF, 0, 0x3, 0, 4, 0x7000, 0x5008, 0x500C }, + { "disp_cc_mdss_dp_link1_clk", 0x47, 2, DISP_CC, + 0x22, 0xFF, 0, 0x3, 0, 4, 0x7000, 0x5008, 0x500C }, + { "disp_cc_mdss_dp_link1_intf_clk", 0x47, 2, DISP_CC, + 0x23, 0xFF, 0, 0x3, 0, 4, 0x7000, 0x5008, 0x500C }, + { "disp_cc_mdss_dp_link_clk", 0x47, 2, DISP_CC, + 0x1B, 0xFF, 0, 0x3, 0, 4, 0x7000, 0x5008, 0x500C }, + { "disp_cc_mdss_dp_link_intf_clk", 0x47, 2, DISP_CC, + 0x1C, 0xFF, 0, 0x3, 0, 4, 0x7000, 0x5008, 0x500C }, + { "disp_cc_mdss_dp_pixel1_clk", 0x47, 2, DISP_CC, + 0x1F, 0xFF, 0, 0x3, 0, 4, 0x7000, 0x5008, 0x500C }, + { "disp_cc_mdss_dp_pixel2_clk", 0x47, 2, DISP_CC, + 0x21, 0xFF, 0, 0x3, 0, 4, 0x7000, 0x5008, 0x500C }, + { "disp_cc_mdss_dp_pixel_clk", 0x47, 2, DISP_CC, + 0x1E, 0xFF, 0, 0x3, 0, 4, 0x7000, 0x5008, 0x500C }, + { "disp_cc_mdss_edp_link_clk", 0x47, 2, DISP_CC, + 0x27, 0xFF, 0, 0x3, 0, 4, 0x7000, 0x5008, 0x500C }, + { "disp_cc_mdss_edp_link_intf_clk", 0x47, 2, DISP_CC, + 0x28, 0xFF, 0, 0x3, 0, 4, 0x7000, 0x5008, 0x500C }, + { "disp_cc_mdss_edp_pixel_clk", 0x47, 2, DISP_CC, + 0x26, 0xFF, 0, 0x3, 0, 4, 0x7000, 0x5008, 0x500C }, + { "disp_cc_mdss_mdp_clk", 0x47, 2, DISP_CC, + 0x11, 0xFF, 0, 0x3, 0, 4, 0x7000, 0x5008, 0x500C }, + { "disp_cc_mdss_mdp_lut_clk", 0x47, 2, DISP_CC, + 0x13, 0xFF, 0, 0x3, 0, 4, 0x7000, 0x5008, 0x500C }, + { "disp_cc_mdss_non_gdsc_ahb_clk", 0x47, 2, DISP_CC, + 0x2C, 0xFF, 0, 0x3, 0, 4, 0x7000, 0x5008, 0x500C }, + { "disp_cc_mdss_pclk0_clk", 0x47, 2, DISP_CC, + 0xF, 0xFF, 0, 0x3, 0, 4, 0x7000, 0x5008, 0x500C }, + { "disp_cc_mdss_pclk1_clk", 0x47, 2, DISP_CC, + 0x10, 0xFF, 0, 0x3, 0, 4, 0x7000, 0x5008, 0x500C }, + { "disp_cc_mdss_rot_clk", 0x47, 2, DISP_CC, + 0x12, 0xFF, 0, 0x3, 0, 4, 0x7000, 0x5008, 0x500C }, + { "disp_cc_mdss_rscc_ahb_clk", 0x47, 2, DISP_CC, + 0x2E, 0xFF, 0, 0x3, 0, 4, 0x7000, 0x5008, 0x500C }, + { "gcc_aggre_ufs_card_2_axi_clk", 0x1CD, 2, GCC, + 0x1CD, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_aggre_ufs_card_axi_clk", 0x11E, 2, GCC, + 0x11E, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_aggre_ufs_phy_axi_clk", 0x11D, 2, GCC, + 0x11D, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_aggre_usb3_mp_axi_clk", 0x1C8, 2, GCC, + 0x1C8, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_aggre_usb3_prim_axi_clk", 0x11B, 2, GCC, + 0x11B, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_aggre_usb3_sec_axi_clk", 0x11C, 2, GCC, + 0x11C, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_cfg_noc_usb3_mp_axi_clk", 0x1C7, 2, GCC, + 0x1C7, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_cfg_noc_usb3_prim_axi_clk", 0x1D, 2, GCC, + 0x1D, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_cfg_noc_usb3_sec_axi_clk", 0x1E, 2, GCC, + 0x1E, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_cpuss_ahb_clk", 0xCE, 2, GCC, + 0xCE, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_emac_ptp_clk", 0x1D3, 2, GCC, + 0x1D3, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_emac_rgmii_clk", 0x16A, 2, GCC, + 0x16A, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_gp1_clk", 0xDE, 2, GCC, + 0xDE, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_gp2_clk", 0xDF, 2, GCC, + 0xDF, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_gp3_clk", 0xE0, 2, GCC, + 0xE0, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_gp4_clk", 0x17F, 2, GCC, + 0x17F, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_gp5_clk", 0x180, 2, GCC, + 0x180, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_gpu_gpll0_clk_src", 0x148, 2, GCC, + 0x148, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_gpu_gpll0_div_clk_src", 0x149, 2, GCC, + 0x149, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_npu_axi_clk", 0x1E9, 2, GCC, + 0x1E9, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_npu_gpll0_clk_src", 0x1A1, 2, GCC, + 0x1A1, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_npu_gpll0_div_clk_src", 0x1A2, 2, GCC, + 0x1A2, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_pcie0_phy_refgen_clk", 0x1F3, 2, GCC, + 0x1F3, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_pcie1_phy_refgen_clk", 0x164, 2, GCC, + 0x164, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_pcie2_phy_refgen_clk", 0x163, 2, GCC, + 0x163, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_pcie3_phy_refgen_clk", 0x162, 2, GCC, + 0x162, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_pcie_0_aux_clk", 0xE5, 2, GCC, + 0xE5, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_pcie_1_aux_clk", 0xEC, 2, GCC, + 0xEC, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_pcie_2_aux_clk", 0x175, 2, GCC, + 0x175, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_pcie_2_pipe_clk", 0x176, 2, GCC, + 0x176, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_pcie_2_slv_axi_clk", 0x172, 2, GCC, + 0x172, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_pcie_2_slv_q2a_axi_clk", 0x171, 2, GCC, + 0x171, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_pcie_3_aux_clk", 0x17C, 2, GCC, + 0x17C, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_pcie_3_cfg_ahb_clk", 0x17B, 2, GCC, + 0x17B, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_pcie_3_mstr_axi_clk", 0x17A, 2, GCC, + 0x17A, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_pcie_3_pipe_clk", 0x17D, 2, GCC, + 0x17D, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_pcie_3_slv_axi_clk", 0x179, 2, GCC, + 0x179, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_pcie_3_slv_q2a_axi_clk", 0x178, 2, GCC, + 0x178, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_pcie_phy_aux_clk", 0xEF, 2, GCC, + 0xEF, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_pdm2_clk", 0x8E, 2, GCC, + 0x8E, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_pdm_ahb_clk", 0x8C, 2, GCC, + 0x8C, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_prng_ahb_clk", 0x8F, 2, GCC, + 0x8F, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_qspi_1_cnoc_periph_ahb_clk", 0x16F, 2, GCC, + 0x16F, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_qspi_1_core_clk", 0x170, 2, GCC, + 0x170, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_qspi_cnoc_periph_ahb_clk", 0x168, 2, GCC, + 0x168, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_qspi_core_clk", 0x169, 2, GCC, + 0x169, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_qupv3_wrap0_core_2x_clk", 0x77, 2, GCC, + 0x77, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_qupv3_wrap0_core_clk", 0x76, 2, GCC, + 0x76, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_qupv3_wrap0_s0_clk", 0x78, 2, GCC, + 0x78, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_qupv3_wrap0_s1_clk", 0x79, 2, GCC, + 0x79, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_qupv3_wrap0_s2_clk", 0x7A, 2, GCC, + 0x7A, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_qupv3_wrap0_s3_clk", 0x7B, 2, GCC, + 0x7B, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_qupv3_wrap0_s4_clk", 0x7C, 2, GCC, + 0x7C, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_qupv3_wrap0_s5_clk", 0x7D, 2, GCC, + 0x7D, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_qupv3_wrap0_s6_clk", 0x7E, 2, GCC, + 0x7E, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_qupv3_wrap0_s7_clk", 0x1DA, 2, GCC, + 0x1DA, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_qupv3_wrap1_core_2x_clk", 0x83, 2, GCC, + 0x83, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_qupv3_wrap1_core_clk", 0x82, 2, GCC, + 0x82, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_qupv3_wrap1_s0_clk", 0x84, 2, GCC, + 0x84, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_qupv3_wrap1_s1_clk", 0x85, 2, GCC, + 0x85, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_qupv3_wrap1_s2_clk", 0x86, 2, GCC, + 0x86, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_qupv3_wrap1_s3_clk", 0x87, 2, GCC, + 0x87, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_qupv3_wrap1_s4_clk", 0x88, 2, GCC, + 0x88, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_qupv3_wrap1_s5_clk", 0x89, 2, GCC, + 0x89, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_qupv3_wrap2_core_2x_clk", 0x198, 2, GCC, + 0x198, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_qupv3_wrap2_core_clk", 0x197, 2, GCC, + 0x197, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_qupv3_wrap2_s0_clk", 0x199, 2, GCC, + 0x199, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_qupv3_wrap2_s1_clk", 0x19A, 2, GCC, + 0x19A, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_qupv3_wrap2_s2_clk", 0x19B, 2, GCC, + 0x19B, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_qupv3_wrap2_s3_clk", 0x19C, 2, GCC, + 0x19C, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_qupv3_wrap2_s4_clk", 0x19D, 2, GCC, + 0x19D, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_qupv3_wrap2_s5_clk", 0x19E, 2, GCC, + 0x19E, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_sdcc2_ahb_clk", 0x71, 2, GCC, + 0x71, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_sdcc2_apps_clk", 0x70, 2, GCC, + 0x70, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_sdcc4_ahb_clk", 0x73, 2, GCC, + 0x73, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_sdcc4_apps_clk", 0x72, 2, GCC, + 0x72, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_sys_noc_cpuss_ahb_clk", 0xC, 2, GCC, + 0xC, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_tsif_ahb_clk", 0x90, 2, GCC, + 0x90, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_tsif_ref_clk", 0x91, 2, GCC, + 0x91, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_ufs_card_2_ahb_clk", 0x18B, 2, GCC, + 0x18B, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_ufs_card_2_axi_clk", 0x18A, 2, GCC, + 0x18A, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_ufs_card_2_ice_core_clk", 0x191, 2, GCC, + 0x191, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_ufs_card_2_phy_aux_clk", 0x192, 2, GCC, + 0x192, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_ufs_card_2_rx_symbol_0_clk", 0x18D, 2, GCC, + 0x18D, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_ufs_card_2_rx_symbol_1_clk", 0x193, 2, GCC, + 0x193, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_ufs_card_2_tx_symbol_0_clk", 0x18C, 2, GCC, + 0x18C, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_ufs_card_2_unipro_core_clk", 0x190, 2, GCC, + 0x190, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_ufs_card_ahb_clk", 0xF1, 2, GCC, + 0xF1, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_ufs_card_axi_clk", 0xF0, 2, GCC, + 0xF0, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_ufs_card_ice_core_clk", 0xF7, 2, GCC, + 0xF7, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_ufs_card_rx_symbol_0_clk", 0xF3, 2, GCC, + 0xF3, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_ufs_card_rx_symbol_1_clk", 0xF9, 2, GCC, + 0xF9, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_ufs_card_tx_symbol_0_clk", 0xF2, 2, GCC, + 0xF2, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_ufs_card_unipro_core_clk", 0xF6, 2, GCC, + 0xF6, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_ufs_phy_ahb_clk", 0xFC, 2, GCC, + 0xFC, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_ufs_phy_axi_clk", 0xFB, 2, GCC, + 0xFB, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_ufs_phy_ice_core_clk", 0x102, 2, GCC, + 0x102, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_ufs_phy_rx_symbol_0_clk", 0xFE, 2, GCC, + 0xFE, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_ufs_phy_rx_symbol_1_clk", 0x104, 2, GCC, + 0x104, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_ufs_phy_tx_symbol_0_clk", 0xFD, 2, GCC, + 0xFD, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_ufs_phy_unipro_core_clk", 0x101, 2, GCC, + 0x101, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_usb30_mp_master_clk", 0x1AF, 2, GCC, + 0x1AF, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_usb30_mp_mock_utmi_clk", 0x1B1, 2, GCC, + 0x1B1, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_usb30_prim_master_clk", 0x5F, 2, GCC, + 0x5F, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_usb30_prim_mock_utmi_clk", 0x61, 2, GCC, + 0x61, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_usb30_sec_master_clk", 0x65, 2, GCC, + 0x65, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_usb30_sec_mock_utmi_clk", 0x67, 2, GCC, + 0x67, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_usb3_mp_phy_aux_clk", 0x1BD, 2, GCC, + 0x1BD, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_usb3_mp_phy_com_aux_clk", 0x1BE, 2, GCC, + 0x1BE, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_usb3_mp_phy_pipe_0_clk", 0x1BF, 2, GCC, + 0x1BF, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_usb3_mp_phy_pipe_1_clk", 0x1C0, 2, GCC, + 0x1C0, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_usb3_prim_phy_pipe_clk", 0x64, 2, GCC, + 0x64, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_usb3_sec_phy_pipe_clk", 0x6A, 2, GCC, + 0x6A, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_video_ahb_clk", 0x39, 2, GCC, + 0x39, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_video_axi0_clk", 0x3F, 2, GCC, + 0x3F, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_video_axi1_clk", 0x1A7, 2, GCC, + 0x1A7, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gcc_video_axic_clk", 0x1A8, 2, GCC, + 0x1A8, 0x3FF, 0, 0xF, 0, 2, 0x62000, 0x62004, 0x62008 }, + { "gpu_cc_ahb_clk", 0x144, 2, GPU_CC, + 0x10, 0xFF, 0, 0x3, 0, 2, 0x1568, 0x10FC, 0x1100 }, + { "gpu_cc_cx_apb_clk", 0x144, 2, GPU_CC, + 0x14, 0xFF, 0, 0x3, 0, 2, 0x1568, 0x10FC, 0x1100 }, + { "gpu_cc_cx_gmu_clk", 0x144, 2, GPU_CC, + 0x18, 0xFF, 0, 0x3, 0, 2, 0x1568, 0x10FC, 0x1100 }, + { "gpu_cc_cx_qdss_at_clk", 0x144, 2, GPU_CC, + 0x12, 0xFF, 0, 0x3, 0, 2, 0x1568, 0x10FC, 0x1100 }, + { "gpu_cc_cx_qdss_trig_clk", 0x144, 2, GPU_CC, + 0x17, 0xFF, 0, 0x3, 0, 2, 0x1568, 0x10FC, 0x1100 }, + { "gpu_cc_cx_snoc_dvm_clk", 0x144, 2, GPU_CC, + 0x15, 0xFF, 0, 0x3, 0, 2, 0x1568, 0x10FC, 0x1100 }, + { "gpu_cc_gx_gmu_clk", 0x144, 2, GPU_CC, + 0xF, 0xFF, 0, 0x3, 0, 2, 0x1568, 0x10FC, 0x1100 }, + { "gpu_cc_gx_vsense_clk", 0x144, 2, GPU_CC, + 0xC, 0xFF, 0, 0x3, 0, 2, 0x1568, 0x10FC, 0x1100 }, + { "npu_cc_armwic_core_clk", 0x1C6, 2, NPU_CC, + 0x4, 0xFF, 0, 0x3, 0, 2, 0x4000, 0x3004, 0x3008 }, + { "npu_cc_cal_dp_cdc_clk", 0x1C6, 2, NPU_CC, + 0x8, 0xFF, 0, 0x3, 0, 2, 0x4000, 0x3004, 0x3008 }, + { "npu_cc_cal_dp_clk", 0x1C6, 2, NPU_CC, + 0x1, 0xFF, 0, 0x3, 0, 2, 0x4000, 0x3004, 0x3008 }, + { "npu_cc_comp_noc_axi_clk", 0x1C6, 2, NPU_CC, + 0x9, 0xFF, 0, 0x3, 0, 2, 0x4000, 0x3004, 0x3008 }, + { "npu_cc_conf_noc_ahb_clk", 0x1C6, 2, NPU_CC, + 0xA, 0xFF, 0, 0x3, 0, 2, 0x4000, 0x3004, 0x3008 }, + { "npu_cc_npu_core_atb_clk", 0x1C6, 2, NPU_CC, + 0xB, 0xFF, 0, 0x3, 0, 2, 0x4000, 0x3004, 0x3008 }, + { "npu_cc_npu_core_clk", 0x1C6, 2, NPU_CC, + 0x2, 0xFF, 0, 0x3, 0, 2, 0x4000, 0x3004, 0x3008 }, + { "npu_cc_npu_core_cti_clk", 0x1C6, 2, NPU_CC, + 0xC, 0xFF, 0, 0x3, 0, 2, 0x4000, 0x3004, 0x3008 }, + { "npu_cc_npu_cpc_clk", 0x1C6, 2, NPU_CC, + 0x3, 0xFF, 0, 0x3, 0, 2, 0x4000, 0x3004, 0x3008 }, + { "npu_cc_perf_cnt_clk", 0x1C6, 2, NPU_CC, + 0x10, 0xFF, 0, 0x3, 0, 2, 0x4000, 0x3004, 0x3008 }, + { "video_cc_iris_ahb_clk", 0x48, 2, VIDEO_CC, + 0x7, 0x3F, 0, 0x7, 0, 5, 0xA4C, 0x938, 0x940 }, + { "video_cc_mvs0_core_clk", 0x48, 2, VIDEO_CC, + 0x3, 0x3F, 0, 0x7, 0, 5, 0xA4C, 0x938, 0x940 }, + { "video_cc_mvs1_core_clk", 0x48, 2, VIDEO_CC, + 0x5, 0x3F, 0, 0x7, 0, 5, 0xA4C, 0x938, 0x940 }, + { "video_cc_mvsc_core_clk", 0x48, 2, VIDEO_CC, + 0x1, 0x3F, 0, 0x7, 0, 5, 0xA4C, 0x938, 0x940 }, + ), + .hw.init = &(struct clk_init_data){ + .name = "gcc_debug_mux", + .ops = &clk_debug_mux_ops, + .parent_names = debug_mux_parent_names, + .num_parents = ARRAY_SIZE(debug_mux_parent_names), + .flags = CLK_IS_MEASURE, + }, +}; + +static const struct of_device_id clk_debug_match_table[] = { + { .compatible = "qcom,debugcc-sdmshrike" }, + { } +}; + +static int map_debug_bases(struct platform_device *pdev, char *base, int cc) +{ + if (!of_get_property(pdev->dev.of_node, base, NULL)) + return -ENODEV; + + gcc_debug_mux.regmap[cc] = + syscon_regmap_lookup_by_phandle(pdev->dev.of_node, + base); + if (IS_ERR(gcc_debug_mux.regmap[cc])) { + pr_err("Failed to map %s (ret=%ld)\n", base, + PTR_ERR(gcc_debug_mux.regmap[cc])); + return PTR_ERR(gcc_debug_mux.regmap[cc]); + } + + return 0; +} + +static int clk_debug_sdmshrike_probe(struct platform_device *pdev) +{ + struct clk *clk; + int ret; + + clk = devm_clk_get(&pdev->dev, "cxo"); + if (IS_ERR(clk)) { + if (PTR_ERR(clk) != -EPROBE_DEFER) + dev_err(&pdev->dev, "Unable to get xo clock\n"); + return PTR_ERR(clk); + } + + debug_mux_priv.cxo = clk; + + gcc_debug_mux.regmap = devm_kcalloc(&pdev->dev, MAX_NUM_CC, + sizeof(*gcc_debug_mux.regmap), GFP_KERNEL); + if (!gcc_debug_mux.regmap) + return -ENOMEM; + + ret = map_debug_bases(pdev, "qcom,gcc", GCC); + if (ret) + return ret; + + ret = map_debug_bases(pdev, "qcom,dispcc", DISP_CC); + if (ret) + return ret; + + ret = map_debug_bases(pdev, "qcom,videocc", VIDEO_CC); + if (ret) + return ret; + + ret = map_debug_bases(pdev, "qcom,camcc", CAM_CC); + if (ret) + return ret; + + ret = map_debug_bases(pdev, "qcom,npucc", NPU_CC); + if (ret) + return ret; + + ret = map_debug_bases(pdev, "qcom,gpucc", GPU_CC); + if (ret) + return ret; + + ret = map_debug_bases(pdev, "qcom,cpucc", CPU_CC); + if (ret) + return ret; + + ret = map_debug_bases(pdev, "qcom,mccc", MC_CC); + if (ret) + return ret; + + clk = devm_clk_register(&pdev->dev, &gcc_debug_mux.hw); + if (IS_ERR(clk)) { + dev_err(&pdev->dev, "Unable to register GCC debug mux\n"); + return PTR_ERR(clk); + } + + ret = clk_debug_measure_register(&gcc_debug_mux.hw); + if (ret) + dev_err(&pdev->dev, "Could not register Measure clock\n"); + + return ret; +} + +static struct platform_driver clk_debug_driver = { + .probe = clk_debug_sdmshrike_probe, + .driver = { + .name = "debugcc-sdmshrike", + .of_match_table = clk_debug_match_table, + }, +}; + +static int __init clk_debug_sdmshrike_init(void) +{ + return platform_driver_register(&clk_debug_driver); +} +fs_initcall(clk_debug_sdmshrike_init); + +static void __exit clk_debug_sdmshrike_exit(void) +{ + platform_driver_unregister(&clk_debug_driver); +} +module_exit(clk_debug_sdmshrike_exit); + +MODULE_DESCRIPTION("QTI DEBUG CC sdmshrike Driver"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:debugcc-sdmshrike"); diff --git a/drivers/clk/qcom/gcc-sdmshrike.c b/drivers/clk/qcom/gcc-sdmshrike.c index 617d10fa0445..ea68c1f02bd7 100644 --- a/drivers/clk/qcom/gcc-sdmshrike.c +++ b/drivers/clk/qcom/gcc-sdmshrike.c @@ -202,6 +202,39 @@ static const char * const gcc_parent_names_8[] = { "core_bi_pll_test_se", }; +static struct clk_dummy measure_only_cnoc_clk = { + .rrate = 1000, + .hw.init = &(struct clk_init_data){ + .name = "measure_only_cnoc_clk", + .ops = &clk_dummy_ops, + }, +}; + +static struct clk_dummy measure_only_snoc_clk = { + .rrate = 1000, + .hw.init = &(struct clk_init_data){ + .name = "measure_only_snoc_clk", + .ops = &clk_dummy_ops, + }, +}; + +static struct clk_dummy measure_only_mccc_clk = { + .rrate = 1000, + .hw.init = &(struct clk_init_data){ + .name = "measure_only_mccc_clk", + .ops = &clk_dummy_ops, + }, +}; + + +static struct clk_dummy measure_only_ipa_2x_clk = { + .rrate = 1000, + .hw.init = &(struct clk_init_data){ + .name = "measure_only_ipa_2x_clk", + .ops = &clk_dummy_ops, + }, +}; + /* Only used to cast a vote on the MMCX rail until late_initcall_sync */ static struct clk_dummy mmcx_clk = { .rrate = 1000, @@ -4742,6 +4775,10 @@ static struct clk_branch gcc_video_xo_clk = { }; struct clk_hw *gcc_sdmshrike_hws[] = { + [MEASURE_ONLY_SNOC_CLK] = &measure_only_snoc_clk.hw, + [MEASURE_ONLY_CNOC_CLK] = &measure_only_cnoc_clk.hw, + [MEASURE_ONLY_MCCC_CLK] = &measure_only_mccc_clk.hw, + [MEASURE_ONLY_IPA_2X_CLK] = &measure_only_ipa_2x_clk.hw, [MMCX_CLK] = &mmcx_clk.hw, }; diff --git a/include/dt-bindings/clock/qcom,gcc-sdmshrike.h b/include/dt-bindings/clock/qcom,gcc-sdmshrike.h index d1905dc61429..bf23602cb931 100644 --- a/include/dt-bindings/clock/qcom,gcc-sdmshrike.h +++ b/include/dt-bindings/clock/qcom,gcc-sdmshrike.h @@ -307,5 +307,11 @@ #define GCC_VIDEO_AXI0_CLK_BCR 42 #define GCC_VIDEO_AXI1_CLK_BCR 43 -#define MMCX_CLK 0 +/* Dummy clocks for rate measurement */ +#define MEASURE_ONLY_SNOC_CLK 0 +#define MEASURE_ONLY_CNOC_CLK 1 +#define MEASURE_ONLY_MCCC_CLK 2 +#define MEASURE_ONLY_IPA_2X_CLK 3 +#define MMCX_CLK 4 + #endif From 25f428ea61dcb37efbae1a7a45ae8609e1ef330c Mon Sep 17 00:00:00 2001 From: Veera Vegivada Date: Fri, 13 Sep 2019 13:50:40 +0530 Subject: [PATCH 007/126] ARM: dts: msm: Add the clock_debugcc node on sdmshrike Enable clock measurement support from debugfs. Change-Id: Id1f4aef53d411b4ff40e136ebf0a41338bfd4bde Signed-off-by: Veera Vegivada --- arch/arm64/boot/dts/qcom/sdmshrike.dtsi | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sdmshrike.dtsi b/arch/arm64/boot/dts/qcom/sdmshrike.dtsi index db9dc83e8ea3..cccc70849f3c 100644 --- a/arch/arm64/boot/dts/qcom/sdmshrike.dtsi +++ b/arch/arm64/boot/dts/qcom/sdmshrike.dtsi @@ -1549,7 +1549,7 @@ }; clock_dispcc: qcom,dispcc@af00000 { - compatible = "qcom,dispcc-sm8150"; + compatible = "qcom,dispcc-sm8150", "syscon"; reg = <0xaf00000 0x20000>; reg-names = "cc_base"; vdd_mm-supply = <&VDD_MMCX_LEVEL>; @@ -1603,6 +1603,26 @@ reg = <0x182a0018 0x4>; }; + mccc_debug: syscon@90b0000 { + compatible = "syscon"; + reg = <0x90b0000 0x1000>; + }; + + clock_debugcc: qcom,cc-debug { + compatible = "qcom,debugcc-sdmshrike"; + qcom,gcc = <&clock_gcc>; + qcom,videocc = <&clock_videocc>; + qcom,camcc = <&clock_camcc>; + qcom,dispcc = <&clock_dispcc>; + qcom,gpucc = <&clock_gpucc>; + qcom,cpucc = <&cpucc_debug>; + qcom,npucc = <&clock_npucc>; + qcom,mccc = <&mccc_debug>; + clocks = <&clock_rpmh RPMH_CXO_CLK>; + clock-names = "cxo"; + #clock-cells = <1>; + }; + tsens0: tsens@c222000 { compatible = "qcom,tsens24xx"; reg = <0xc222000 0x4>, From 3783303fc7f9e56441d1fe88cf744ed4b4a20f0e Mon Sep 17 00:00:00 2001 From: Veera Vegivada Date: Thu, 19 Sep 2019 10:24:26 +0530 Subject: [PATCH 008/126] defconfig: Enable debug clock controller for sdmshrike Enable Debug clock controller driver support. Change-Id: Ie56b428ea63b3136c8f6f87a04d163ff5ea6cc5c Signed-off-by: Veera Vegivada --- arch/arm64/configs/vendor/sdmshrike-perf_defconfig | 1 + arch/arm64/configs/vendor/sdmshrike_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm64/configs/vendor/sdmshrike-perf_defconfig b/arch/arm64/configs/vendor/sdmshrike-perf_defconfig index df3b04bcccb7..73dbf3b4ab53 100644 --- a/arch/arm64/configs/vendor/sdmshrike-perf_defconfig +++ b/arch/arm64/configs/vendor/sdmshrike-perf_defconfig @@ -502,6 +502,7 @@ CONFIG_MSM_CLK_RPMH=y CONFIG_MSM_GPUCC_SM8150=y CONFIG_MSM_GCC_SDMSHRIKE=y CONFIG_MSM_CAMCC_SDMSHRIKE=y +CONFIG_MSM_DEBUGCC_SDMSHRIKE=y CONFIG_HWSPINLOCK=y CONFIG_HWSPINLOCK_QCOM=y CONFIG_QCOM_APCS_IPC=y diff --git a/arch/arm64/configs/vendor/sdmshrike_defconfig b/arch/arm64/configs/vendor/sdmshrike_defconfig index 415ff0c6156e..2becf6b6aea9 100644 --- a/arch/arm64/configs/vendor/sdmshrike_defconfig +++ b/arch/arm64/configs/vendor/sdmshrike_defconfig @@ -525,6 +525,7 @@ CONFIG_MSM_CLK_RPMH=y CONFIG_MSM_GPUCC_SM8150=y CONFIG_MSM_GCC_SDMSHRIKE=y CONFIG_MSM_CAMCC_SDMSHRIKE=y +CONFIG_MSM_DEBUGCC_SDMSHRIKE=y CONFIG_HWSPINLOCK=y CONFIG_HWSPINLOCK_QCOM=y CONFIG_QCOM_APCS_IPC=y From dcc3c29eea86b257dc22dcd86cb5853e93a5d454 Mon Sep 17 00:00:00 2001 From: Ramachandran Venkataramani Date: Thu, 31 Oct 2019 15:56:36 -0700 Subject: [PATCH 009/126] defconfig: sdmshrike: Enable QFPROM driver for sdmshrike Enable QFPROM for sdmshrike to support nvmem read/write access. Change-Id: I00377db618e88775abb216ac5fbf442224c655c4 Signed-off-by: Ramachandran Venkataramani --- arch/arm64/configs/vendor/sdmshrike-perf_defconfig | 1 + arch/arm64/configs/vendor/sdmshrike_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm64/configs/vendor/sdmshrike-perf_defconfig b/arch/arm64/configs/vendor/sdmshrike-perf_defconfig index 73dbf3b4ab53..71311d65c2e0 100644 --- a/arch/arm64/configs/vendor/sdmshrike-perf_defconfig +++ b/arch/arm64/configs/vendor/sdmshrike-perf_defconfig @@ -583,6 +583,7 @@ CONFIG_QCOM_LLCC_PMU=y CONFIG_RAS=y CONFIG_ANDROID=y CONFIG_ANDROID_BINDER_IPC=y +CONFIG_QCOM_QFPROM=y CONFIG_NVMEM_SPMI_SDAM=y CONFIG_SENSORS_SSC=y CONFIG_ESOC=y diff --git a/arch/arm64/configs/vendor/sdmshrike_defconfig b/arch/arm64/configs/vendor/sdmshrike_defconfig index 2becf6b6aea9..1d2ad92d68a6 100644 --- a/arch/arm64/configs/vendor/sdmshrike_defconfig +++ b/arch/arm64/configs/vendor/sdmshrike_defconfig @@ -610,6 +610,7 @@ CONFIG_QCOM_LLCC_PMU=y CONFIG_RAS=y CONFIG_ANDROID=y CONFIG_ANDROID_BINDER_IPC=y +CONFIG_QCOM_QFPROM=y CONFIG_NVMEM_SPMI_SDAM=y CONFIG_SENSORS_SSC=y CONFIG_ESOC=y From a55b6199a1605993a44aa074f2ff7622f2c80c3b Mon Sep 17 00:00:00 2001 From: Ramachandran Venkataramani Date: Thu, 31 Oct 2019 16:10:22 -0700 Subject: [PATCH 010/126] ARM: dts: msm: Add qfprom node for SA8195p Add qfprom node for reading of fuse bits to differentiate between SA8195p SoCs with feature supported capabilities. Change-Id: Ia0272037df54de9254acf0f667d288660ffbfc16 Signed-off-by: Ramachandran Venkataramani --- arch/arm64/boot/dts/qcom/sa8195p.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8195p.dtsi b/arch/arm64/boot/dts/qcom/sa8195p.dtsi index 42ca2adcd2a1..61115dee37fc 100644 --- a/arch/arm64/boot/dts/qcom/sa8195p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8195p.dtsi @@ -229,6 +229,15 @@ mbox-desc-offset = <0x2000>; #mbox-cells = <1>; }; + + qfprom: qfprom@780130 { + compatible = "qcom,qfprom"; + reg = <0x00780130 0x4>; + #address-cells = <1>; + #size-cells = <1>; + read-only; + ranges; + }; }; &usb1 { From 2d22dd41e1717f633f22f6ee3dfd82f9b93b7ce6 Mon Sep 17 00:00:00 2001 From: Vivek Kumar Date: Mon, 11 Nov 2019 17:26:49 +0530 Subject: [PATCH 011/126] iommu: arm-smmu: Make restore of smmu-context runtime detectable Update the logic to restore smmu-context-bank registers using an additional 'smmu_restore' flag which is only set during hibernation restore, which makes the logic runtime along with the compile-time hibernation flag. Change-Id: Ic62442601c9dc7ceff4745fdc70b6dc3f56769d7 Signed-off-by: Vivek Kumar --- drivers/iommu/arm-smmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index faaca3f61c07..001b4e2967b5 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -4253,7 +4253,7 @@ static void arm_smmu_device_reset(struct arm_smmu_device *smmu) * invalid and all S2CRn as bypass unless overridden. */ if (!(smmu->options & ARM_SMMU_OPT_SKIP_INIT) || - IS_ENABLED(CONFIG_HIBERNATION)) { + (IS_ENABLED(CONFIG_HIBERNATION) && smmu->smmu_restore)) { for (i = 0; i < smmu->num_mapping_groups; ++i) arm_smmu_write_sme(smmu, i); From 27742596b755384b7e5d5bd9f046c64ed2d56a90 Mon Sep 17 00:00:00 2001 From: Venkata Rao Kakani Date: Thu, 14 Nov 2019 11:18:34 +0530 Subject: [PATCH 012/126] defconfig: sdmshrike: Enable Android Lowmemory killer Enable Android lowmemory killer for safe killing during memory pressure. Change-Id: Id192b0b3eb1984f30bde89b03e7cd623fe70ea05 Signed-off-by: Venkata Rao Kakani --- arch/arm64/configs/vendor/sdmshrike-perf_defconfig | 1 + arch/arm64/configs/vendor/sdmshrike_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm64/configs/vendor/sdmshrike-perf_defconfig b/arch/arm64/configs/vendor/sdmshrike-perf_defconfig index 71311d65c2e0..8c99511a8f27 100644 --- a/arch/arm64/configs/vendor/sdmshrike-perf_defconfig +++ b/arch/arm64/configs/vendor/sdmshrike-perf_defconfig @@ -475,6 +475,7 @@ CONFIG_UIO=y CONFIG_UIO_MSM_SHAREDMEM=y CONFIG_STAGING=y CONFIG_ASHMEM=y +CONFIG_ANDROID_LOW_MEMORY_KILLER=y CONFIG_ION=y CONFIG_QCOM_GENI_SE=y CONFIG_QPNP_REVID=y diff --git a/arch/arm64/configs/vendor/sdmshrike_defconfig b/arch/arm64/configs/vendor/sdmshrike_defconfig index 1d2ad92d68a6..2722d8f4656a 100644 --- a/arch/arm64/configs/vendor/sdmshrike_defconfig +++ b/arch/arm64/configs/vendor/sdmshrike_defconfig @@ -497,6 +497,7 @@ CONFIG_UIO=y CONFIG_UIO_MSM_SHAREDMEM=y CONFIG_STAGING=y CONFIG_ASHMEM=y +CONFIG_ANDROID_LOW_MEMORY_KILLER=y CONFIG_ION=y CONFIG_QCOM_GENI_SE=y CONFIG_QPNP_REVID=y From 2531469cbd815025ba4218b4a80e61ab16b07838 Mon Sep 17 00:00:00 2001 From: Venkata Rao Kakani Date: Wed, 13 Nov 2019 18:11:31 +0530 Subject: [PATCH 013/126] defconfig: sa8155: Enable Android Low memory killer Enable Android low memory killer to avoid OOM killing critical android services. Change-Id: Ia46dd41fa6faf6c1cdcddedb383759a4cdf61d60 Signed-off-by: Venkata Rao Kakani --- arch/arm64/configs/vendor/sa8155-perf_defconfig | 1 + arch/arm64/configs/vendor/sa8155_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm64/configs/vendor/sa8155-perf_defconfig b/arch/arm64/configs/vendor/sa8155-perf_defconfig index 0f4c4b7a14de..3962ae512edb 100644 --- a/arch/arm64/configs/vendor/sa8155-perf_defconfig +++ b/arch/arm64/configs/vendor/sa8155-perf_defconfig @@ -495,6 +495,7 @@ CONFIG_UIO=y CONFIG_UIO_MSM_SHAREDMEM=y CONFIG_STAGING=y CONFIG_ASHMEM=y +CONFIG_ANDROID_LOW_MEMORY_KILLER=y CONFIG_ION=y CONFIG_QCOM_GENI_SE=y CONFIG_QPNP_REVID=y diff --git a/arch/arm64/configs/vendor/sa8155_defconfig b/arch/arm64/configs/vendor/sa8155_defconfig index b146209ae9de..2c82d6bce5e1 100644 --- a/arch/arm64/configs/vendor/sa8155_defconfig +++ b/arch/arm64/configs/vendor/sa8155_defconfig @@ -519,6 +519,7 @@ CONFIG_UIO=y CONFIG_UIO_MSM_SHAREDMEM=y CONFIG_STAGING=y CONFIG_ASHMEM=y +CONFIG_ANDROID_LOW_MEMORY_KILLER=y CONFIG_ION=y CONFIG_QCOM_GENI_SE=y CONFIG_QPNP_REVID=y From 24f4e64006bbbf55341a35210b82bee80a8423d9 Mon Sep 17 00:00:00 2001 From: Author Nitesh Kataria Date: Thu, 7 Nov 2019 12:46:49 +0530 Subject: [PATCH 014/126] ARM: dts: msm: Added sdmshrike-pm Changes to enable APSS power collapse for sdm-shrike. Change-Id: I2264950c68b163b068d66d199ec99c757cfbe0e5 Signed-off-by: Nitesh Kataria --- arch/arm64/boot/dts/qcom/sdmshrike-pm.dtsi | 124 +++++++++++++++++++++ arch/arm64/boot/dts/qcom/sdmshrike.dtsi | 2 +- 2 files changed, 125 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/boot/dts/qcom/sdmshrike-pm.dtsi diff --git a/arch/arm64/boot/dts/qcom/sdmshrike-pm.dtsi b/arch/arm64/boot/dts/qcom/sdmshrike-pm.dtsi new file mode 100644 index 000000000000..3363a927248b --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdmshrike-pm.dtsi @@ -0,0 +1,124 @@ +/* Copyright (c) 2019, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#include + +&soc { + qcom,lpm-levels { + compatible = "qcom,lpm-levels"; + qcom,use-psci; + #address-cells = <1>; + #size-cells = <0>; + qcom,pm-cluster@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + label = "L3"; + qcom,clstr-tmr-add = <1000>; + qcom,psci-mode-shift = <4>; + qcom,psci-mode-mask = <0xfff>; + + qcom,pm-cluster-level@0 { /* D1 */ + reg = <0>; + label = "l3-wfi"; + qcom,psci-mode = <0x1>; + qcom,entry-latency-us = <48>; + qcom,exit-latency-us = <51>; + qcom,min-residency-us = <99>; + + }; + + qcom,pm-cluster-level@1 { /* LLCC off, AOSS sleep */ + reg = <1>; + label = "llcc-off"; + qcom,psci-mode = <0xA24>; + qcom,entry-latency-us = <3263>; + qcom,exit-latency-us = <6562>; + qcom,min-residency-us = <9987>; + qcom,min-child-idx = <1>; + qcom,is-reset; + qcom,notify-rpm; + }; + + qcom,pm-cpu@0 { + #address-cells = <1>; + #size-cells = <0>; + qcom,psci-mode-shift = <0>; + qcom,psci-mode-mask = <0xf>; + qcom,ref-stddev = <500>; + qcom,tmr-add = <1000>; + qcom,ref-premature-cnt = <1>; + qcom,cpu = <&CPU0 &CPU1 &CPU2 &CPU3>; + + qcom,pm-cpu-level@0 { /* C1 */ + reg = <0>; + label = "wfi"; + qcom,psci-cpu-mode = <0x1>; + qcom,entry-latency-us = <57>; + qcom,exit-latency-us = <43>; + qcom,min-residency-us = <100>; + }; + + qcom,pm-cpu-level@1 { /* C4 */ + reg = <1>; + label = "rail-pc"; + qcom,psci-cpu-mode = <0x4>; + qcom,entry-latency-us = <355>; + qcom,exit-latency-us = <909>; + qcom,min-residency-us = <3934>; + qcom,is-reset; + qcom,use-broadcast-timer; + }; + }; + + qcom,pm-cpu@1 { + #address-cells = <1>; + #size-cells = <0>; + qcom,psci-mode-shift = <0>; + qcom,psci-mode-mask = <0xf>; + qcom,cpu = <&CPU4 &CPU5 &CPU6 &CPU7>; + + qcom,pm-cpu-level@0 { /* C1 */ + reg = <0>; + label = "wfi"; + qcom,psci-cpu-mode = <0x1>; + qcom,entry-latency-us = <57>; + qcom,exit-latency-us = <43>; + qcom,min-residency-us = <83>; + }; + + qcom,pm-cpu-level@1 { /* C4 */ + reg = <1>; + label = "rail-pc"; + qcom,psci-cpu-mode = <0x4>; + qcom,entry-latency-us = <241>; + qcom,exit-latency-us = <1461>; + qcom,min-residency-us = <4488>; + qcom,is-reset; + qcom,use-broadcast-timer; + }; + }; + }; + }; + + qcom,rpm-stats@c300000 { + compatible = "qcom,rpm-stats"; + reg = <0xc300000 0x1000>, <0xc3f0004 0x4>; + reg-names = "phys_addr_base", "offset_addr"; + qcom,num-records = <3>; + }; + + qcom,rpmh-master-stats@b221200 { + compatible = "qcom,rpmh-master-stats-v1"; + reg = <0xb221200 0x60>; + }; +}; + diff --git a/arch/arm64/boot/dts/qcom/sdmshrike.dtsi b/arch/arm64/boot/dts/qcom/sdmshrike.dtsi index cccc70849f3c..8bb5da765adc 100644 --- a/arch/arm64/boot/dts/qcom/sdmshrike.dtsi +++ b/arch/arm64/boot/dts/qcom/sdmshrike.dtsi @@ -2534,6 +2534,6 @@ #include "sdmshrike-qupv3.dtsi" #include "sm8150-audio.dtsi" #include "sm8150-vidc.dtsi" -#include "sm8150-pm.dtsi" +#include "sdmshrike-pm.dtsi" #include "sdmshrike-gpu.dtsi" #include "sdmshrike-thermal.dtsi" From c8729fdab140107fd6568fb0c7c814c50daf617d Mon Sep 17 00:00:00 2001 From: Jia Ding Date: Fri, 15 Nov 2019 14:08:35 +0800 Subject: [PATCH 015/126] msm: ipa: fix ipa_disable_apps_wan_cons_deaggr declaration ipa_disable_apps_wan_cons_deaggr() has different declarations when CONFIG_IPA or CONFIG_IPA3 are not set. Thus fix the declaration to align with CONFIG_IPA or CONFIG_IPA3 enabled one. Change-Id: Ic09cac2484c9cfbcd0833583c05c6fc19a3c2aed Signed-off-by: jiad --- include/linux/ipa.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/linux/ipa.h b/include/linux/ipa.h index 783e085d3a8c..19113b259daf 100644 --- a/include/linux/ipa.h +++ b/include/linux/ipa.h @@ -2483,7 +2483,8 @@ static inline int ipa_release_wdi_mapping(u32 num_buffers, return -EINVAL; } -static inline int ipa_disable_apps_wan_cons_deaggr(void) +static inline int ipa_disable_apps_wan_cons_deaggr(uint32_t agg_size, + uint32_t agg_count) { return -EINVAL; } From 0f816e4444aa03a94f8bccb558b0ba539dea469d Mon Sep 17 00:00:00 2001 From: Madhanraj Chelladurai Date: Fri, 13 Dec 2019 16:07:19 +0530 Subject: [PATCH 016/126] arm64: dts: qcom: Drive strength reduction for GNSS UART GPIOs Change UART, GPIO drive strength to an optimal value to save power. Change-Id: I57199bb9c37d3b7bdc58ed1fd23f79942737675c Signed-off-by: Madhanraj Chelladurai --- arch/arm64/boot/dts/qcom/sm8150-pinctrl.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150-pinctrl.dtsi b/arch/arm64/boot/dts/qcom/sm8150-pinctrl.dtsi index 7e4318b5a102..b1928d55cf51 100644 --- a/arch/arm64/boot/dts/qcom/sm8150-pinctrl.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150-pinctrl.dtsi @@ -843,7 +843,7 @@ config { pins = "gpio11", "gpio39"; - drive-strength = <16>; /* 16 mA */ + drive-strength = <2>; /* 2 mA */ bias-pull-up; output-high; }; @@ -857,9 +857,9 @@ config { pins = "gpio11", "gpio39"; - drive-strength = <16>; /* 16 mA */ - bias-pull-up; - output-high; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; + output-low; }; }; }; @@ -934,7 +934,7 @@ config { pins = "gpio41", "gpio42"; - drive-strength = <16>; + drive-strength = <2>; bias-disable; }; }; @@ -947,7 +947,7 @@ config { pins = "gpio41", "gpio42"; - drive-strength = <16>; + drive-strength = <2>; bias-disable; }; }; From 11ddeaaed6e111a9c917c41d3dabe33d07e3ac9d Mon Sep 17 00:00:00 2001 From: Singa Reddy Dasari Date: Mon, 6 Jan 2020 18:02:17 +0530 Subject: [PATCH 017/126] Revert "ARM: dts: qcom: Added metadata partition for UDC" This reverts commit 6123ecb45d77fffa25cf011ec6c962934e02dcdb. This change was causing boot up issue. Same change has now been done in fstab to achieve the functionality. Change-Id: I4a2091c4aea5139886254967831a8f99bc70fab8 Signed-off-by: Singa Reddy Dasari --- arch/arm64/boot/dts/qcom/sa8155.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sa8155.dtsi b/arch/arm64/boot/dts/qcom/sa8155.dtsi index 78c9105d505b..f31e14a50d2a 100644 --- a/arch/arm64/boot/dts/qcom/sa8155.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8155.dtsi @@ -1,4 +1,4 @@ -/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. +/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and From fa7dcef4d8c70393394baf19fc428463d7d39707 Mon Sep 17 00:00:00 2001 From: Madhanraj Chelladurai Date: Fri, 13 Dec 2019 16:18:58 +0530 Subject: [PATCH 018/126] gnss: sirf: KPI marker for GNSS driver KPI marker added to find boot up time of driver Change-Id: Iaec9c35a0881db59d9327b74c37e5896f735b216 Signed-off-by: Madhanraj Chelladurai --- drivers/gnsssirf/gnss_sirf.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/gnsssirf/gnss_sirf.c b/drivers/gnsssirf/gnss_sirf.c index 5281cecb6f15..76dcc7547cda 100644 --- a/drivers/gnsssirf/gnss_sirf.c +++ b/drivers/gnsssirf/gnss_sirf.c @@ -39,9 +39,9 @@ #include #include #include +#include #include "gnss_sirf.h" - static int resetPin; static int onOffPin; @@ -190,6 +190,7 @@ static int gnss_sirf_probe(struct platform_device *pdev) { int ret = -ENODEV; struct device *dev; + char boot_marker[40]; dev = &pdev->dev; dev_info(dev, "%s", __func__); @@ -219,8 +220,12 @@ static int gnss_sirf_probe(struct platform_device *pdev) gpio_direction_output(onOffPin, 1); if (gnss_sirf_init_ports() < 0) pr_err("gnss_sirf_init_ports failed\n"); - else + else { ret = 0; + snprintf(boot_marker, sizeof(boot_marker), + "M - DRIVER GNSS Ready"); + place_marker(boot_marker); + } } } return ret; From 5fc4ee0a8ac2755deac7174cf2ee05d8b18e8ff9 Mon Sep 17 00:00:00 2001 From: Madhanraj Chelladurai Date: Thu, 9 Jan 2020 18:05:19 +0530 Subject: [PATCH 019/126] drivers: gnss: Suspend, resume handling for GNSS driver Suspend, resume operations are handled rightly to toggle the GPIO pins used by GNSS driver. Change-Id: Ie859c320cf41db26b1d39622fccfbe08717b19fa Signed-off-by: Madhanraj Chelladurai --- drivers/gnsssirf/gnss_sirf.c | 125 ++++++++++++++++++++++++++--------- 1 file changed, 95 insertions(+), 30 deletions(-) diff --git a/drivers/gnsssirf/gnss_sirf.c b/drivers/gnsssirf/gnss_sirf.c index 76dcc7547cda..2deccd93449d 100644 --- a/drivers/gnsssirf/gnss_sirf.c +++ b/drivers/gnsssirf/gnss_sirf.c @@ -2,7 +2,7 @@ * * SiRF GNSS Driver * - * Copyright (c) 2019, The Linux Foundation. All rights reserved. + * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -49,6 +49,7 @@ static dev_t gnssDev; static struct cdev c_dev; static struct class *devClass; +static int configurePins(struct platform_device *pdev); static int gnss_sirf_driver_open(struct inode *inode, struct file *filp); static ssize_t gnss_sirf_driver_read(struct file *filp, char *buf, size_t count, loff_t *f_pos); @@ -60,7 +61,8 @@ static long gnss_sirf_driver_ioctl(struct file *file, unsigned int cmd, static int gnss_sirf_probe(struct platform_device *pdev); static int gnss_sirf_remove(struct platform_device *pdev); - +static int gnss_sirf_suspend(struct platform_device *pdev, pm_message_t state); +static int gnss_sirf_resume(struct platform_device *pdev); static const struct of_device_id gnss_sirf_match_table[] = { { .compatible = "gnss_sirf" }, @@ -82,8 +84,10 @@ static struct platform_driver gnss_sirf_drv = { .of_match_table = gnss_sirf_match_table, .owner = THIS_MODULE, }, - .probe = gnss_sirf_probe, - .remove = gnss_sirf_remove, + .probe = gnss_sirf_probe, + .remove = gnss_sirf_remove, + .suspend = gnss_sirf_suspend, + .resume = gnss_sirf_resume, }; static int gnss_sirf_driver_open(struct inode *inode, struct file *filp) @@ -139,8 +143,8 @@ static long gnss_sirf_driver_ioctl(struct file *file, static int gnss_sirf_init_ports(void) { - gpio_direction_output(resetPin, 1); - gpio_direction_output(onOffPin, 1); + gpio_direction_output(resetPin, 0); + gpio_direction_output(onOffPin, 0); return 0; } @@ -186,6 +190,39 @@ static int gnss_sirf_delete_device(void) return 0; } +static int configurePins(struct platform_device *pdev) +{ + int ret = -ENODEV; + struct device *dev; + + dev = &pdev->dev; + dev_info(dev, "%s Reset and InputOutput", __func__); + + if (gpio_is_valid(resetPin)) { + ret = gpio_request(resetPin, "ssVreset-gpio"); + if (ret < 0) { + pr_err("failed to request gpio %d: error:%d\n", + resetPin, ret); + return ret; + } + } + if (gpio_is_valid(onOffPin)) { + ret = gpio_request(onOffPin, "ssVonoff-gpio"); + if (ret < 0) { + pr_err("failed to request gpio %d: error:%d\n", + onOffPin, ret); + return ret; + } + } + gpio_direction_output(resetPin, 1); + gpio_direction_output(onOffPin, 1); + if (gnss_sirf_init_ports() < 0) + pr_err("gnss_sirf_init_ports failed\n"); + else + ret = 0; + return ret; +} + static int gnss_sirf_probe(struct platform_device *pdev) { int ret = -ENODEV; @@ -200,28 +237,8 @@ static int gnss_sirf_probe(struct platform_device *pdev) "ssVreset-gpio", 0); onOffPin = of_get_named_gpio(pdev->dev.of_node, "ssVonoff-gpio", 0); - if (gpio_is_valid(resetPin)) { - ret = gpio_request(resetPin, "ssVreset-gpio"); - if (ret < 0) { - pr_err("failed to request gpio %d: error:%d\n", - resetPin, ret); - return ret; - } - } - if (gpio_is_valid(onOffPin)) { - ret = gpio_request(onOffPin, "ssVonoff-gpio"); - if (ret < 0) { - pr_err("failed to request gpio %d: error:%d\n", - onOffPin, ret); - return ret; - } - } - gpio_direction_output(resetPin, 1); - gpio_direction_output(onOffPin, 1); - if (gnss_sirf_init_ports() < 0) - pr_err("gnss_sirf_init_ports failed\n"); - else { - ret = 0; + ret = configurePins(pdev); + if (ret == 0) { snprintf(boot_marker, sizeof(boot_marker), "M - DRIVER GNSS Ready"); place_marker(boot_marker); @@ -234,6 +251,10 @@ static int gnss_sirf_probe(struct platform_device *pdev) static int gnss_sirf_remove(struct platform_device *pdev) { + struct device *dev; + + dev = &pdev->dev; + dev_info(&pdev->dev, "%s", __func__); gnss_sirf_delete_device(); if (gnss_sirf_deInit_sirf_ports() < 0) { @@ -243,6 +264,50 @@ static int gnss_sirf_remove(struct platform_device *pdev) return 0; } +static int gnss_sirf_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct device *dev; + int ret = -ENODEV; + + dev = &pdev->dev; + dev_info(dev, "%s", __func__); + dev_info(dev, "%s Initial Freeing resetPin", __func__); + gpio_free(resetPin); + ret = gpio_request_one(resetPin, 1, "ssVreset-gpio"); + dev_info(dev, "%s Config resetPin as Input", __func__); + if (ret < 0) { + pr_err("failed to request gpio %d: error:%d\n", + resetPin, ret); + return ret; + } + gpio_direction_input(resetPin); + dev_info(dev, "%s Final Freeing resetPin", __func__); + gpio_free(resetPin); + + dev_info(dev, "%s Initial Freeing onOffPin", __func__); + gpio_free(onOffPin); + dev_info(dev, "%s Config onOffPin as Input", __func__); + ret = gpio_request(onOffPin, "ssVonoff-gpio"); + if (ret < 0) { + pr_err("failed to request gpio %d: error:%d\n", + onOffPin, ret); + return ret; + } + gpio_direction_input(onOffPin); + dev_info(dev, "%s Final Freeing onOffPin", __func__); + gpio_free(onOffPin); + + return 0; +} +static int gnss_sirf_resume(struct platform_device *pdev) +{ + struct device *dev; + + dev = &pdev->dev; + dev_info(dev, "%s", __func__); + configurePins(pdev); + return 0; +} static int __init gnss_sirf_init(void) { @@ -250,7 +315,7 @@ static int __init gnss_sirf_init(void) retVal = platform_driver_register(&gnss_sirf_drv); if (retVal) { - pr_err("GNSS platform driver registation Failed !!!!\n"); + pr_err("GNSS platform driver registration Failed !!!!\n"); return retVal; } @@ -269,4 +334,4 @@ module_init(gnss_sirf_init); module_exit(gnss_sirf_exit); MODULE_LICENSE("GPL v2"); -MODULE_DESCRIPTION("SIRF GNSS reciver control driver"); +MODULE_DESCRIPTION("SIRF GNSS receiver control driver"); From daba51e78969c4673a8b8dffe04ae618a8e4673a Mon Sep 17 00:00:00 2001 From: Xiaowen Wu Date: Thu, 9 Jan 2020 11:22:36 -0500 Subject: [PATCH 020/126] ARM: dts: msm: update macro tile mode for sdmshrike display Update macro tile mode for sdmshrike display. Change-Id: Idf53e3bc5c8f40450c9e5317dcd68880c595cf54 Signed-off-by: Xiaowen Wu Signed-off-by: Jim Wang --- arch/arm64/boot/dts/qcom/sdmshrike-sde.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sdmshrike-sde.dtsi b/arch/arm64/boot/dts/qcom/sdmshrike-sde.dtsi index 87c6b6c036c0..7f9f4bc2cacf 100644 --- a/arch/arm64/boot/dts/qcom/sdmshrike-sde.dtsi +++ b/arch/arm64/boot/dts/qcom/sdmshrike-sde.dtsi @@ -1,4 +1,4 @@ -/* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved. +/* Copyright (c) 2016-2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -144,6 +144,7 @@ qcom,sde-highest-bank-bit = <0x2>; qcom,sde-ubwc-version = <0x300>; qcom,sde-ubwc-bw-calc-version = <0x1>; + qcom,sde-macrotile-mode = <0x1>; qcom,sde-panic-per-pipe; qcom,sde-has-cdp; qcom,sde-has-src-split; From 6c4b3ba84eff7bc682330f0a98925a4ea24f9f75 Mon Sep 17 00:00:00 2001 From: Jim Wang Date: Tue, 21 Jan 2020 10:20:46 -0500 Subject: [PATCH 021/126] ARM: dts: msm: update UBWC highest bank bit for sdmshrike display Sync up the UBWC highest bank bit for display with the GPU/VIDEO output setting, especially for 8K mode. Change-Id: I704ca00bef8bc3cd46b717befd1e5d0508299b49 Signed-off-by: Jim Wang --- arch/arm64/boot/dts/qcom/sdmshrike-sde.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdmshrike-sde.dtsi b/arch/arm64/boot/dts/qcom/sdmshrike-sde.dtsi index 7f9f4bc2cacf..ca4bc4e7843d 100644 --- a/arch/arm64/boot/dts/qcom/sdmshrike-sde.dtsi +++ b/arch/arm64/boot/dts/qcom/sdmshrike-sde.dtsi @@ -141,7 +141,7 @@ qcom,sde-sspp-linewidth = <4096>; qcom,sde-wb-linewidth = <4096>; qcom,sde-mixer-blendstages = <0xb>; - qcom,sde-highest-bank-bit = <0x2>; + qcom,sde-highest-bank-bit = <0x3>; qcom,sde-ubwc-version = <0x300>; qcom,sde-ubwc-bw-calc-version = <0x1>; qcom,sde-macrotile-mode = <0x1>; @@ -403,7 +403,7 @@ #list-cells = <1>; qcom,mdss-rot-mode = <1>; - qcom,mdss-highest-bank-bit = <0x2>; + qcom,mdss-highest-bank-bit = <0x3>; /* Bus Scale Settings */ qcom,msm-bus,name = "mdss_rotator"; From a3f68c54764b9154de147aebec1dbdd554f070c3 Mon Sep 17 00:00:00 2001 From: E V Ravi Date: Sat, 1 Feb 2020 20:06:54 +0530 Subject: [PATCH 022/126] msm: ais: Fix power up sequence of cci Fix the power up sequence order of platform resources in cci hw for camera. Change-Id: I173909c95af536f5147e1631276aa461656c8622 Signed-off-by: E V Ravi --- arch/arm64/boot/dts/qcom/sm6150-camera.dtsi | 10 ++++------ .../cam_sensor_module/cam_cci/cam_cci_soc.c | 18 +++++++++--------- 2 files changed, 13 insertions(+), 15 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm6150-camera.dtsi b/arch/arm64/boot/dts/qcom/sm6150-camera.dtsi index dee2b7f4a71f..f4c5a4e7fcc1 100644 --- a/arch/arm64/boot/dts/qcom/sm6150-camera.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6150-camera.dtsi @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. + * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -139,21 +139,19 @@ status = "ok"; gdscr-supply = <&titan_top_gdsc>; regulator-names = "gdscr"; - clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>, - <&clock_camcc CAM_CC_SOC_AHB_CLK>, + clocks =<&clock_camcc CAM_CC_SOC_AHB_CLK>, <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, <&clock_camcc CAM_CC_CPAS_AHB_CLK>, <&clock_camcc CAM_CC_CCI_CLK>, <&clock_camcc CAM_CC_CCI_CLK_SRC>; - clock-names = "camnoc_axi_clk", - "soc_ahb_clk", + clock-names ="soc_ahb_clk", "slow_ahb_src_clk", "cpas_ahb_clk", "cci_clk", "cci_clk_src"; src-clock-name = "cci_clk_src"; clock-cntl-level = "lowsvs"; - clock-rates = <0 0 0 0 0 37500000>; + clock-rates = <0 0 0 0 37500000>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cci0_active &cci1_active>; pinctrl-1 = <&cci0_suspend &cci1_suspend>; diff --git a/drivers/media/platform/msm/ais/cam_sensor_module/cam_cci/cam_cci_soc.c b/drivers/media/platform/msm/ais/cam_sensor_module/cam_cci/cam_cci_soc.c index f66d86ce091e..1a336e030ab6 100644 --- a/drivers/media/platform/msm/ais/cam_sensor_module/cam_cci/cam_cci_soc.c +++ b/drivers/media/platform/msm/ais/cam_sensor_module/cam_cci/cam_cci_soc.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. +/* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -85,6 +85,14 @@ int cam_cci_init(struct v4l2_subdev *sd, axi_vote.compressed_bw_ab = CAM_CPAS_DEFAULT_AXI_BW; axi_vote.uncompressed_bw = CAM_CPAS_DEFAULT_AXI_BW; + /* Enable Regulators and IRQ*/ + rc = cam_soc_util_enable_platform_resource(soc_info, true, + CAM_LOWSVS_VOTE, true); + if (rc < 0) { + CAM_ERR(CAM_CCI, "request platform resources failed"); + goto platform_enable_failed; + } + rc = cam_cpas_start(cci_dev->cpas_handle, &ahb_vote, &axi_vote); if (rc != 0) @@ -99,14 +107,6 @@ int cam_cci_init(struct v4l2_subdev *sd, reinit_completion( &cci_dev->cci_master_info[master].report_q[i]); - /* Enable Regulators and IRQ*/ - rc = cam_soc_util_enable_platform_resource(soc_info, true, - CAM_LOWSVS_VOTE, true); - if (rc < 0) { - CAM_DBG(CAM_CCI, "request platform resources failed"); - goto platform_enable_failed; - } - cci_dev->hw_version = cam_io_r_mb(base + CCI_HW_VERSION_ADDR); CAM_DBG(CAM_CCI, "hw_version = 0x%x", cci_dev->hw_version); From 6b910911de20748482da6f752a9968de5cc04cde Mon Sep 17 00:00:00 2001 From: Ajay Agarwal Date: Wed, 22 Apr 2020 14:54:50 +0530 Subject: [PATCH 023/126] ARM: dts: msm: Allow PM suspend irrespective of host RT state on SA8195 Add device tree flag 'qcom,ignore-wakeup-src-in-hostmode' to USB nodes on SA8195 platform to allow system suspend in host mode irrespective of the runtimePM state. Change-Id: Ic76eed85b0db4b4298366e4cae11de8fd958b098 Signed-off-by: Ajay Agarwal --- arch/arm64/boot/dts/qcom/sa8195p.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8195p.dtsi b/arch/arm64/boot/dts/qcom/sa8195p.dtsi index 2f7e55c00cca..288ed80768cb 100644 --- a/arch/arm64/boot/dts/qcom/sa8195p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8195p.dtsi @@ -274,10 +274,12 @@ &usb0 { qcom,default-mode-none; + qcom,ignore-wakeup-src-in-hostmode; }; &usb1 { qcom,default-mode-host; + qcom,ignore-wakeup-src-in-hostmode; status = "ok"; }; From e3a1bcca4e46c3b10a219930b09ff489e46c3319 Mon Sep 17 00:00:00 2001 From: "Jason A. Donenfeld" Date: Fri, 22 May 2020 21:37:27 -0600 Subject: [PATCH 024/126] qemu: support fetching kernels for arbitrary URLs Signed-off-by: Jason A. Donenfeld --- src/tests/qemu/Makefile | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/src/tests/qemu/Makefile b/src/tests/qemu/Makefile index c08e32487534..c9179557b242 100644 --- a/src/tests/qemu/Makefile +++ b/src/tests/qemu/Makefile @@ -43,13 +43,23 @@ $(DISTFILES_PATH)/$(1): flock -x $$@.lock -c '[ -f $$@ ] && exit 0; wget -O $$@ $(MIRROR)$(1) || wget -t inf --retry-on-http-error=404 -O $$@ $(2)$(1) || rm -f $$@' endef +ifneq ($(findstring https://,$(KERNEL_VERSION)),) +KERNEL_URL := $(word 1,$(KERNEL_VERSION)) +KERNEL_NAME := $(word 2,$(KERNEL_VERSION)) +KERNEL_TAR := $(DISTFILES_PATH)/linux-$(KERNEL_NAME)-$(notdir $(KERNEL_URL)) +KERNEL_PATH := $(BUILD_PATH)/linux-$(KERNEL_NAME) +KERNEL_VERSION := $(KERNEL_NAME) +$(KERNEL_TAR): + mkdir -p $(DISTFILES_PATH) + flock -x $@.lock -c '[ -f $@ ] && exit 0; wget -O $@ $(KERNEL_URL) || rm -f $@' +else ifeq ($(findstring -rc,$(KERNEL_VERSION)),) KERNEL_URL_DIRECTORY := https://cdn.kernel.org/pub/linux/kernel/v$(firstword $(subst ., ,$(KERNEL_VERSION:-debug=))).x/ else KERNEL_URL_DIRECTORY := https://git.kernel.org/torvalds/t/ endif - $(eval $(call tar_download,KERNEL,linux,$(KERNEL_VERSION),.tar.gz,$(KERNEL_URL_DIRECTORY))) +endif $(eval $(call tar_download,MUSL,musl,1.1.24,.tar.gz,https://www.musl-libc.org/releases/)) $(eval $(call tar_download,LIBMNL,libmnl,1.0.4,.tar.bz2,https://www.netfilter.org/projects/libmnl/files/)) $(eval $(call tar_download,IPERF,iperf,3.7,.tar.gz,https://downloads.es.net/pub/iperf/)) From db02cf0f74b65c7f1230406e44ef78bbd4b5e3a5 Mon Sep 17 00:00:00 2001 From: "Jason A. Donenfeld" Date: Fri, 22 May 2020 22:54:15 -0600 Subject: [PATCH 025/126] qemu: patch in UTS_UBUNTU_RELEASE_ABI for Ubuntu detection This kind of thing really makes me queezy and upset, but there's little that can be done about such situations when dealing with Canonical's kernel. Signed-off-by: Jason A. Donenfeld --- src/tests/qemu/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/src/tests/qemu/Makefile b/src/tests/qemu/Makefile index c9179557b242..0708f999784c 100644 --- a/src/tests/qemu/Makefile +++ b/src/tests/qemu/Makefile @@ -275,6 +275,7 @@ $(KERNEL_PATH)/.installed: $(KERNEL_TAR) sed -i "/printf '\\\\#/d" $(KERNEL_PATH)/tools/build/Build.include || true sed -i '/jmp early_idt_handler$$/a .fill early_idt_handlers + i*9 - ., 1, 0xcc' $(KERNEL_PATH)/arch/x86/kernel/head_{64,32}.S || true printf 'ifdef CONFIG_X86_64\nLDFLAGS += $$(call ld-option, -z max-page-size=0x200000)\nendif\n' >> $(KERNEL_PATH)/arch/x86/Makefile + if grep -qr UTS_UBUNTU_RELEASE_ABI $(KERNEL_PATH)/debian/rules.d; then echo 'KBUILD_CFLAGS += -DUTS_UBUNTU_RELEASE_ABI=0' >> $(KERNEL_PATH)/Makefile; fi sed -i "/^if INET\$$/a source \"net/wireguard/Kconfig\"" $(KERNEL_PATH)/net/Kconfig sed -i "/^obj-\$$(CONFIG_NETFILTER).*+=/a obj-\$$(CONFIG_WIREGUARD) += wireguard/" $(KERNEL_PATH)/net/Makefile ln -sfT $(shell readlink -f ../..) $(KERNEL_PATH)/net/wireguard From e24c9a9265af40781fa27b5de11dd5b78925c5be Mon Sep 17 00:00:00 2001 From: "Jason A. Donenfeld" Date: Fri, 22 May 2020 23:33:48 -0600 Subject: [PATCH 026/126] compat: ubuntu appears to have backported ipv6_dst_lookup_flow Signed-off-by: Jason A. Donenfeld --- src/compat/compat.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/compat/compat.h b/src/compat/compat.h index afe020e30f96..d80b0ef37ac9 100644 --- a/src/compat/compat.h +++ b/src/compat/compat.h @@ -26,6 +26,8 @@ #define ISUBUNTU1404 #elif LINUX_VERSION_CODE < KERNEL_VERSION(4, 5, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 4, 0) #define ISUBUNTU1604 +#elif LINUX_VERSION_CODE < KERNEL_VERSION(4, 16, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 15, 0) +#define ISUBUNTU1804 #elif LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 3, 0) #define ISUBUNTU1910 #endif @@ -98,7 +100,7 @@ #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 17, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(3, 16, 83) #define ipv6_dst_lookup_flow(a, b, c, d) ipv6_dst_lookup_flow(b, c, d) -#elif (LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 5) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(5, 3, 18) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 20, 0)) || ((!defined(ISRHEL8) || defined(ISCENTOS8)) && !defined(ISDEBIAN) && LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 119) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 15, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(4, 14, 181) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 10, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(4, 9, 224) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 5, 0)) || LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 224) +#elif (LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 5) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(5, 3, 18) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 20, 0)) || ((!defined(ISRHEL8) || defined(ISCENTOS8)) && !defined(ISDEBIAN) && !defined(ISUBUNTU1804) && LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 119) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 15, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(4, 14, 181) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 10, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(4, 9, 224) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 5, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 224) && !defined(ISUBUNTU1604)) #define ipv6_dst_lookup_flow(a, b, c, d) ipv6_dst_lookup(a, b, &dst, c) + (void *)0 ?: dst #endif From feb89cab65c6ab1a6cbeeaaeb11b1a174772cea8 Mon Sep 17 00:00:00 2001 From: "Jason A. Donenfeld" Date: Sat, 23 May 2020 18:59:54 -0600 Subject: [PATCH 027/126] qemu: work around broken centos8 kernel RHEL needs to apply https://lore.kernel.org/patchwork/patch/974664/ before we can revert this monstrosity. Signed-off-by: Jason A. Donenfeld --- src/tests/qemu/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/src/tests/qemu/Makefile b/src/tests/qemu/Makefile index 0708f999784c..e894be2e4e36 100644 --- a/src/tests/qemu/Makefile +++ b/src/tests/qemu/Makefile @@ -275,6 +275,7 @@ $(KERNEL_PATH)/.installed: $(KERNEL_TAR) sed -i "/printf '\\\\#/d" $(KERNEL_PATH)/tools/build/Build.include || true sed -i '/jmp early_idt_handler$$/a .fill early_idt_handlers + i*9 - ., 1, 0xcc' $(KERNEL_PATH)/arch/x86/kernel/head_{64,32}.S || true printf 'ifdef CONFIG_X86_64\nLDFLAGS += $$(call ld-option, -z max-page-size=0x200000)\nendif\n' >> $(KERNEL_PATH)/arch/x86/Makefile + sed -i 's/pages = generic_max_swapfile_size();/pages = IS_ENABLED(CONFIG_SWAP) ? generic_max_swapfile_size() : 0;/' $(KERNEL_PATH)/arch/x86/mm/init.c || true if grep -qr UTS_UBUNTU_RELEASE_ABI $(KERNEL_PATH)/debian/rules.d; then echo 'KBUILD_CFLAGS += -DUTS_UBUNTU_RELEASE_ABI=0' >> $(KERNEL_PATH)/Makefile; fi sed -i "/^if INET\$$/a source \"net/wireguard/Kconfig\"" $(KERNEL_PATH)/net/Kconfig sed -i "/^obj-\$$(CONFIG_NETFILTER).*+=/a obj-\$$(CONFIG_WIREGUARD) += wireguard/" $(KERNEL_PATH)/net/Makefile From b5e824a5a2da5aa179f03183ac501a154346348d Mon Sep 17 00:00:00 2001 From: "Jason A. Donenfeld" Date: Sat, 23 May 2020 22:27:12 -0600 Subject: [PATCH 028/126] qemu: mark per_cpu_load_addr as static for gcc-10 Signed-off-by: Jason A. Donenfeld --- src/tests/qemu/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/src/tests/qemu/Makefile b/src/tests/qemu/Makefile index e894be2e4e36..75d0368cd1d9 100644 --- a/src/tests/qemu/Makefile +++ b/src/tests/qemu/Makefile @@ -275,6 +275,7 @@ $(KERNEL_PATH)/.installed: $(KERNEL_TAR) sed -i "/printf '\\\\#/d" $(KERNEL_PATH)/tools/build/Build.include || true sed -i '/jmp early_idt_handler$$/a .fill early_idt_handlers + i*9 - ., 1, 0xcc' $(KERNEL_PATH)/arch/x86/kernel/head_{64,32}.S || true printf 'ifdef CONFIG_X86_64\nLDFLAGS += $$(call ld-option, -z max-page-size=0x200000)\nendif\n' >> $(KERNEL_PATH)/arch/x86/Makefile + sed -i 's/^Elf_Addr per_cpu_load_addr;$$/static \0/' $(KERNEL_PATH)/arch/x86/tools/relocs.c || true sed -i 's/pages = generic_max_swapfile_size();/pages = IS_ENABLED(CONFIG_SWAP) ? generic_max_swapfile_size() : 0;/' $(KERNEL_PATH)/arch/x86/mm/init.c || true if grep -qr UTS_UBUNTU_RELEASE_ABI $(KERNEL_PATH)/debian/rules.d; then echo 'KBUILD_CFLAGS += -DUTS_UBUNTU_RELEASE_ABI=0' >> $(KERNEL_PATH)/Makefile; fi sed -i "/^if INET\$$/a source \"net/wireguard/Kconfig\"" $(KERNEL_PATH)/net/Kconfig From 96e82f21e1e5022b10bac855b5793370720f6359 Mon Sep 17 00:00:00 2001 From: "Jason A. Donenfeld" Date: Thu, 28 May 2020 00:58:36 -0600 Subject: [PATCH 029/126] compat: bionic-hwe-5.0/disco kernel backported skb_reset_redirect and ipv6 flow Signed-off-by: Jason A. Donenfeld --- src/compat/compat.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/compat/compat.h b/src/compat/compat.h index d80b0ef37ac9..a20929f96930 100644 --- a/src/compat/compat.h +++ b/src/compat/compat.h @@ -28,6 +28,8 @@ #define ISUBUNTU1604 #elif LINUX_VERSION_CODE < KERNEL_VERSION(4, 16, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 15, 0) #define ISUBUNTU1804 +#elif LINUX_VERSION_CODE < KERNEL_VERSION(5, 1, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 0, 0) +#define ISUBUNTU1904 #elif LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 3, 0) #define ISUBUNTU1910 #endif @@ -100,7 +102,7 @@ #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 17, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(3, 16, 83) #define ipv6_dst_lookup_flow(a, b, c, d) ipv6_dst_lookup_flow(b, c, d) -#elif (LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 5) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(5, 3, 18) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 20, 0)) || ((!defined(ISRHEL8) || defined(ISCENTOS8)) && !defined(ISDEBIAN) && !defined(ISUBUNTU1804) && LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 119) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 15, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(4, 14, 181) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 10, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(4, 9, 224) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 5, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 224) && !defined(ISUBUNTU1604)) +#elif (LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 5) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(5, 3, 18) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 20, 0) && !defined(ISUBUNTU1904)) || ((!defined(ISRHEL8) || defined(ISCENTOS8)) && !defined(ISDEBIAN) && !defined(ISUBUNTU1804) && LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 119) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 15, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(4, 14, 181) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 10, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(4, 9, 224) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 5, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 224) && !defined(ISUBUNTU1604)) #define ipv6_dst_lookup_flow(a, b, c, d) ipv6_dst_lookup(a, b, &dst, c) + (void *)0 ?: dst #endif @@ -1021,7 +1023,7 @@ out: #define COMPAT_CANNOT_USE_MAX_MTU #endif -#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 5, 14) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 5, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 29) && !defined(ISUBUNTU1910)) +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 5, 14) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 5, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 29) && !defined(ISUBUNTU1910) && !defined(ISUBUNTU1904)) #include #include static inline void skb_reset_redirect(struct sk_buff *skb) From ec7f581e34d9be1fe195a48897bfda41274f060d Mon Sep 17 00:00:00 2001 From: Rohith Kollalsi Date: Fri, 24 Apr 2020 17:16:34 +0530 Subject: [PATCH 030/126] usb: f_cdev: USB remote wake up feature implementation for DUN Implement usb remote wake up feature for DUN on sdx55. For super speed this feature supports wake up of a particular function from suspend, where as for high speed, remote wakeup doesn't support wakeup of a particular function from suspend, but entire usb bus needs to wakeup. Change-Id: Ia4392fbb65c9302926d26f13f7f776d6bdbdccaf Signed-off-by: Rohith Kollalsi --- drivers/usb/gadget/function/f_cdev.c | 148 ++++++++++++++++++++++++--- 1 file changed, 131 insertions(+), 17 deletions(-) diff --git a/drivers/usb/gadget/function/f_cdev.c b/drivers/usb/gadget/function/f_cdev.c index 2152220d6cc1..7c87e5821d86 100644 --- a/drivers/usb/gadget/function/f_cdev.c +++ b/drivers/usb/gadget/function/f_cdev.c @@ -107,6 +107,7 @@ struct f_cdev { struct list_head read_pool; struct list_head read_queued; struct list_head write_pool; + struct list_head write_pending; /* current active USB RX request */ struct usb_request *current_rx_req; @@ -130,6 +131,8 @@ struct f_cdev { struct workqueue_struct *fcdev_wq; bool is_connected; bool port_open; + bool is_suspended; + bool pending_state_notify; unsigned long nbytes_from_host; unsigned long nbytes_to_host; @@ -538,6 +541,52 @@ static int usb_cser_set_alt(struct usb_function *f, unsigned int intf, return rc; } +static int port_notify_serial_state(struct cserial *cser); + +static void usb_cser_resume(struct usb_function *f) +{ + struct f_cdev *port = func_to_port(f); + unsigned long flags; + int ret; + + struct usb_request *req, *t; + struct usb_ep *in; + + pr_debug("%s\n", __func__); + port->is_suspended = false; + + /* process pending state notifications */ + if (port->pending_state_notify) + port_notify_serial_state(&port->port_usb); + + spin_lock_irqsave(&port->port_lock, flags); + in = port->port_usb.in; + /* process any pending requests */ + list_for_each_entry_safe(req, t, &port->write_pending, list) { + list_del_init(&req->list); + spin_unlock_irqrestore(&port->port_lock, flags); + + ret = usb_ep_queue(in, req, GFP_KERNEL); + spin_lock_irqsave(&port->port_lock, flags); + if (ret) { + pr_err("EP QUEUE failed:%d\n", ret); + list_add(&req->list, &port->write_pool); + } else { + port->nbytes_from_port_bridge += req->length; + } + } + + spin_unlock_irqrestore(&port->port_lock, flags); +} + +static void usb_cser_suspend(struct usb_function *f) +{ + struct f_cdev *port = func_to_port(f); + + pr_debug("%s\n", __func__); + port->is_suspended = true; +} + static int usb_cser_func_suspend(struct usb_function *f, u8 options) { bool func_wakeup_allowed; @@ -547,15 +596,28 @@ static int usb_cser_func_suspend(struct usb_function *f, u8 options) f->func_wakeup_allowed = func_wakeup_allowed; if (options & FUNC_SUSPEND_OPT_SUSP_MASK) { - if (!f->func_is_suspended) + if (!f->func_is_suspended) { + usb_cser_suspend(f); f->func_is_suspended = true; + } } else { - if (f->func_is_suspended) + if (f->func_is_suspended) { f->func_is_suspended = false; + usb_cser_resume(f); + } } return 0; } +static int usb_cser_get_remote_wakeup_capable(struct usb_function *f, + struct usb_gadget *g) +{ + + return ((g->speed >= USB_SPEED_SUPER && f->func_wakeup_allowed) || + (g->speed < USB_SPEED_SUPER && g->remote_wakeup)); + +} + static int usb_cser_get_status(struct usb_function *f) { bool remote_wakeup_en_status = f->func_wakeup_allowed ? 1 : 0; @@ -630,7 +692,17 @@ static int port_notify_serial_state(struct cserial *cser) unsigned long flags; struct usb_composite_dev *cdev = port->port_usb.func.config->cdev; + + if (port->is_suspended) { + port->pending_state_notify = true; + pr_debug("%s: port is suspended\n", __func__); + return 0; + } + spin_lock_irqsave(&port->port_lock, flags); + if (port->pending_state_notify) + port->pending_state_notify = false; + if (!port->port_usb.pending) { port->port_usb.pending = true; spin_unlock_irqrestore(&port->port_lock, flags); @@ -1095,6 +1167,7 @@ static void usb_cser_stop_io(struct f_cdev *port) usb_cser_free_requests(out, &port->read_queued); usb_cser_free_requests(out, &port->read_pool); usb_cser_free_requests(in, &port->write_pool); + usb_cser_free_requests(in, &port->write_pending); spin_unlock_irqrestore(&port->port_lock, flags); } @@ -1266,6 +1339,9 @@ ssize_t f_cdev_write(struct file *file, struct list_head *pool; unsigned int xfer_size; struct usb_ep *in; + struct cserial *cser; + struct usb_function *func; + struct usb_gadget *gadget; port = file->private_data; if (!port) { @@ -1273,6 +1349,9 @@ ssize_t f_cdev_write(struct file *file, return -EINVAL; } + cser = &port->port_usb; + func = &cser->func; + spin_lock_irqsave(&port->port_lock, flags); pr_debug("write on port(%s)(%pK)\n", port->name, port); @@ -1304,9 +1383,40 @@ ssize_t f_cdev_write(struct file *file, if (ret) { pr_err("copy_from_user failed: err %d\n", ret); ret = -EFAULT; - } else { - req->length = xfer_size; - req->zero = 1; + goto err_exit; + } + + req->length = xfer_size; + req->zero = 1; + if (port->is_suspended) { + gadget = cser->func.config->cdev->gadget; + if (!usb_cser_get_remote_wakeup_capable(func, gadget)) { + pr_debug("%s remote-wakeup not capable\n", + __func__); + ret = -EOPNOTSUPP; + goto err_exit; + } + + spin_lock_irqsave(&port->port_lock, flags); + list_add(&req->list, &port->write_pending); + spin_unlock_irqrestore(&port->port_lock, flags); + + if (gadget->speed >= USB_SPEED_SUPER + && func->func_is_suspended) + ret = usb_func_wakeup(func); + else + ret = usb_gadget_wakeup(gadget); + + if (ret < 0 && ret != -EACCES) { + pr_err("Remote wakeup failed:%d\n", ret); + spin_lock_irqsave(&port->port_lock, flags); + req = list_first_entry(&port->write_pending, + struct usb_request, list); + list_del(&req->list); + spin_unlock_irqrestore(&port->port_lock, flags); + goto err_exit; + } + } else { ret = usb_ep_queue(in, req, GFP_KERNEL); if (ret) { pr_err("EP QUEUE failed:%d\n", ret); @@ -1318,19 +1428,18 @@ ssize_t f_cdev_write(struct file *file, spin_unlock_irqrestore(&port->port_lock, flags); } -err_exit: - if (ret) { - spin_lock_irqsave(&port->port_lock, flags); - /* USB cable is connected, add it back otherwise free request */ - if (port->is_connected) - list_add(&req->list, &port->write_pool); - else - usb_cser_free_req(in, req); - spin_unlock_irqrestore(&port->port_lock, flags); - return ret; - } - return xfer_size; + +err_exit: + spin_lock_irqsave(&port->port_lock, flags); + /* USB cable is connected, add it back otherwise free request */ + if (port->is_connected) + list_add(&req->list, &port->write_pool); + else + usb_cser_free_req(in, req); + spin_unlock_irqrestore(&port->port_lock, flags); + + return ret; } static unsigned int f_cdev_poll(struct file *file, poll_table *wait) @@ -1566,6 +1675,8 @@ int usb_cser_connect(struct f_cdev *port) cser->pending = false; cser->q_again = false; port->is_connected = true; + port->pending_state_notify = false; + port->is_suspended = false; spin_unlock_irqrestore(&port->port_lock, flags); usb_cser_start_io(port); @@ -1759,6 +1870,7 @@ static struct f_cdev *f_cdev_alloc(char *func_name, int portno) INIT_LIST_HEAD(&port->read_pool); INIT_LIST_HEAD(&port->read_queued); INIT_LIST_HEAD(&port->write_pool); + INIT_LIST_HEAD(&port->write_pending); port->fcdev_wq = create_singlethread_workqueue(port->name); if (!port->fcdev_wq) { @@ -2053,6 +2165,8 @@ static struct usb_function *cser_alloc(struct usb_function_instance *fi) port->port_usb.func.func_suspend = usb_cser_func_suspend; port->port_usb.func.get_status = usb_cser_get_status; port->port_usb.func.free_func = usb_cser_free_func; + port->port_usb.func.resume = usb_cser_resume; + port->port_usb.func.suspend = usb_cser_suspend; return &port->port_usb.func; } From 2c949e199bf2394c769823fe2b3cc9f17ba3d67d Mon Sep 17 00:00:00 2001 From: Ashish Kori Date: Tue, 2 Jun 2020 14:48:31 +0530 Subject: [PATCH 031/126] ARM: dts: msm: Correct pinctrl console UART setting Change UART sleep state bias configuration to bias-pull-down to save power in system suspend state. Change-Id: I0ed2b7c314a373d6a6fabd29b5386cf2f3de3098 Signed-off-by: Ashish Kori --- arch/arm64/boot/dts/qcom/sdmshrike-pinctrl.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sdmshrike-pinctrl.dtsi b/arch/arm64/boot/dts/qcom/sdmshrike-pinctrl.dtsi index d401ac179daf..bf2ec94a56b7 100644 --- a/arch/arm64/boot/dts/qcom/sdmshrike-pinctrl.dtsi +++ b/arch/arm64/boot/dts/qcom/sdmshrike-pinctrl.dtsi @@ -5001,7 +5001,7 @@ config { pins = "gpio85", "gpio86"; drive-strength = <2>; - bias-disable; + bias-pull-down; }; }; }; From 27669dcffb91f407ee0ce0a8d184ff815785278a Mon Sep 17 00:00:00 2001 From: Ajay Prathi Date: Thu, 21 May 2020 11:47:10 +0530 Subject: [PATCH 032/126] ARM: dts: msm: Fix register offset to read PHY status Fix register offset used to check the PHY status after enabling the PCIe pipe clock. Access to the DBI registers requires an active pipe clock and the status register indicates if the PHY is ready. Change-Id: I8a50835e698714bf96b56735b0b17af60adb535c Signed-off-by: Siddartha Mohanadoss Signed-off-by: Ajay Prathi --- arch/arm64/boot/dts/qcom/sdxprairie.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sdxprairie.dtsi b/arch/arm64/boot/dts/qcom/sdxprairie.dtsi index 4282950bec5e..b2e0fb5853bf 100644 --- a/arch/arm64/boot/dts/qcom/sdxprairie.dtsi +++ b/arch/arm64/boot/dts/qcom/sdxprairie.dtsi @@ -1236,7 +1236,7 @@ qcom,pcie-active-config; qcom,pcie-aggregated-irq; qcom,pcie-mhi-a7-irq; - qcom,phy-status-reg = <0x814>; + qcom,phy-status-reg2 = <0x1214>; qcom,mhi-soc-reset-offset = <0xb01b8>; qcom,phy-init = <0x1240 0x001 0x0 0x1 From 55385041a8cb74188be566e65d80bf9baecdd2e7 Mon Sep 17 00:00:00 2001 From: "Jason A. Donenfeld" Date: Thu, 4 Jun 2020 01:54:34 -0600 Subject: [PATCH 033/126] compat: remove stale suse support The 42.x series is no longer supported, and the 15.2 kernel is getting a proper backport, so at the moment, we only care about supporting 15.1. Eventually we'll drop that too. Signed-off-by: Jason A. Donenfeld --- src/compat/compat.h | 14 +++----------- 1 file changed, 3 insertions(+), 11 deletions(-) diff --git a/src/compat/compat.h b/src/compat/compat.h index a20929f96930..060ad6949d19 100644 --- a/src/compat/compat.h +++ b/src/compat/compat.h @@ -34,17 +34,9 @@ #define ISUBUNTU1910 #endif #endif -#ifdef CONFIG_SUSE_KERNEL -#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 5, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 4, 0) -#define ISOPENSUSE42 -#endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 12, 0) +#if defined(CONFIG_SUSE_KERNEL) && LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 12, 0) #define ISOPENSUSE15 #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 3, 0) -#define ISOPENSUSE152 -#endif -#endif #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0) #error "WireGuard requires Linux >= 3.10" @@ -119,7 +111,7 @@ static const struct ipv6_stub_type ipv6_stub_impl = { static const struct ipv6_stub_type *ipv6_stub = &ipv6_stub_impl; #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 8, 0) && IS_ENABLED(CONFIG_IPV6) && !defined(ISOPENSUSE42) && !defined(ISRHEL7) +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 8, 0) && IS_ENABLED(CONFIG_IPV6) && !defined(ISRHEL7) #include static inline bool ipv6_mod_enabled(void) { @@ -860,7 +852,7 @@ static inline void skb_mark_not_on_list(struct sk_buff *skb) #endif #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 5, 0) && !defined(ISOPENSUSE152) +#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 5, 0) #define genl_dumpit_info(cb) ({ \ struct { struct nlattr **attrs; } *a = (void *)((u8 *)cb->args + offsetofend(struct dump_ctx, next_allowedip)); \ BUILD_BUG_ON(sizeof(cb->args) < offsetofend(struct dump_ctx, next_allowedip) + sizeof(*a)); \ From d35f4c7921c4149b828055eb55829e2477ede70f Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Thu, 18 Jan 2018 17:51:59 -0800 Subject: [PATCH 034/126] drm: Check for lessee in DROP_MASTER ioctl Don't let a lessee control what the current DRM master is set to; that's the job of the "real" master. Otherwise, the lessee would disable all access to master operations for the owner and all lessees under it. This matches the same check made in the SET_MASTER ioctl. Change-Id: I0c7208bceecd456ee1deb249fc86a609d08169ea Signed-off-by: Keith Packard Fixes: 2ed077e467ee ("drm: Add drm_object lease infrastructure [v5]") Cc: # v4.15+ Signed-off-by: Daniel Vetter Link: https://patchwork.freedesktop.org/patch/msgid/20180119015159.1606-1-keithp@keithp.com Git-commit: 761e05a702f5d537ffcca1ba933f9f0a968aa022 Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git Signed-off-by: Xiaowen Wu --- drivers/gpu/drm/drm_auth.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/drm_auth.c b/drivers/gpu/drm/drm_auth.c index 2ab6516665cc..1669c42c40ed 100644 --- a/drivers/gpu/drm/drm_auth.c +++ b/drivers/gpu/drm/drm_auth.c @@ -232,6 +232,12 @@ int drm_dropmaster_ioctl(struct drm_device *dev, void *data, if (!dev->master) goto out_unlock; + if (file_priv->master->lessor != NULL) { + DRM_DEBUG_LEASE("Attempt to drop lessee %d as master\n", file_priv->master->lessee_id); + ret = -EINVAL; + goto out_unlock; + } + ret = 0; drm_drop_master(dev, file_priv); out_unlock: From decc40cefa1969531c82a419eaf4704d276b9a45 Mon Sep 17 00:00:00 2001 From: Bhaumik Bhatt Date: Thu, 4 Jun 2020 14:45:42 -0700 Subject: [PATCH 035/126] mhi: cntrl: qcom: Add EDL image to the firmware table Some devices support Emergency Download Mode or EDL and could enter EDL which requires host firmware load path to push the EDL image to the device. Allow this for tests and debug mode on all devices except sdx50m as there is no expected use case for it. Change-Id: I662520a11f04fa5cf4080e73947389a7e07db83b Signed-off-by: Bhaumik Bhatt --- drivers/bus/mhi/controllers/mhi_qcom.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/bus/mhi/controllers/mhi_qcom.c b/drivers/bus/mhi/controllers/mhi_qcom.c index 81a7ee796487..26811368e6c3 100644 --- a/drivers/bus/mhi/controllers/mhi_qcom.c +++ b/drivers/bus/mhi/controllers/mhi_qcom.c @@ -33,13 +33,16 @@ struct firmware_info { }; static const struct firmware_info firmware_table[] = { - {.dev_id = 0x308, .fw_image = "sdx65m/sbl1.mbn"}, - {.dev_id = 0x307, .fw_image = "sdx60m/sbl1.mbn"}, - {.dev_id = 0x306, .fw_image = "sdx55m/sbl1.mbn"}, + {.dev_id = 0x308, .fw_image = "sdx65m/sbl1.mbn", + .edl_image = "sdx65m/edl.mbn"}, + {.dev_id = 0x307, .fw_image = "sdx60m/sbl1.mbn", + .edl_image = "sdx60m/edl.mbn"}, + {.dev_id = 0x306, .fw_image = "sdx55m/sbl1.mbn", + .edl_image = "sdx55m/edl.mbn"}, {.dev_id = 0x305, .fw_image = "sdx50m/sbl1.mbn"}, {.dev_id = 0x304, .fw_image = "sbl.mbn", .edl_image = "edl.mbn"}, /* default, set to debug.mbn */ - {.fw_image = "debug.mbn"}, + {.fw_image = "debug.mbn", .edl_image = "debug.mbn"}, }; static int debug_mode; From f4c681c6b7c58aec0f85aa1560311d9e462e7091 Mon Sep 17 00:00:00 2001 From: Manaf Meethalavalappu Pallikunhi Date: Wed, 1 Apr 2020 16:51:39 +0530 Subject: [PATCH 036/126] ARM: dts: msm: Remove low temperature monitor thermal zones for SA8155 Remove low temperature monitor thermal zones for SA8155 as per latest recommendation. Change-Id: Ifdd660a4a9d45b2b431e491dd61d26d8d572d0a0 Signed-off-by: Manaf Meethalavalappu Pallikunhi --- .../arm64/boot/dts/qcom/sa8155-regulator.dtsi | 24 +------------------ arch/arm64/boot/dts/qcom/sa8155.dtsi | 24 ++++--------------- 2 files changed, 5 insertions(+), 43 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sa8155-regulator.dtsi b/arch/arm64/boot/dts/qcom/sa8155-regulator.dtsi index 33e45516d62d..994c4bf4eb71 100644 --- a/arch/arm64/boot/dts/qcom/sa8155-regulator.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8155-regulator.dtsi @@ -1,4 +1,4 @@ -/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. +/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -459,13 +459,6 @@ = ; qcom,min-dropout-voltage-level = <(-1)>; }; - - cx_cdev: regulator-cdev { - compatible = "qcom,rpmh-reg-cdev"; - mboxes = <&qmp_aop 0>; - qcom,reg-resource-name = "cx"; - #cooling-cells = <2>; - }; }; /* PM8150_2 S10 = VDD_MX supply */ @@ -497,14 +490,6 @@ qcom,init-voltage-level = ; }; - - mx_cdev: mx-cdev-lvl { - compatible = "qcom,regulator-cooling-device"; - regulator-cdev-supply = <&VDD_MX_LEVEL>; - regulator-levels = ; - #cooling-cells = <2>; - }; }; rpmh-regulator-ldoc1 { @@ -617,13 +602,6 @@ qcom,init-voltage-level = ; }; - - ebi_cdev: regulator-cdev { - compatible = "qcom,rpmh-reg-cdev"; - mboxes = <&qmp_aop 0>; - qcom,reg-resource-name = "ebi"; - #cooling-cells = <2>; - }; }; rpmh-regulator-ldoc12 { diff --git a/arch/arm64/boot/dts/qcom/sa8155.dtsi b/arch/arm64/boot/dts/qcom/sa8155.dtsi index c41c5e788f1a..68b14f4a71bd 100644 --- a/arch/arm64/boot/dts/qcom/sa8155.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8155.dtsi @@ -221,26 +221,10 @@ }; &thermal_zones { - cpu-1-7-lowf { - cooling-maps { - /delete-node/ mmcx_vdd_cdev; - }; - }; - gpuss-0-lowf { - cooling-maps { - /delete-node/ mmcx_vdd_cdev; - }; - }; - camera-lowf { - cooling-maps { - /delete-node/ mmcx_vdd_cdev; - }; - }; - mdm-scl-lowf { - cooling-maps { - /delete-node/ mmcx_vdd_cdev; - }; - }; + /delete-node/ cpu-1-7-lowf; + /delete-node/ gpuss-0-lowf; + /delete-node/ camera-lowf; + /delete-node/ mdm-scl-lowf; lmh-dcvs-01 { trips { From 379abf34617ab40bed4256c985b236d53434f37a Mon Sep 17 00:00:00 2001 From: Nagireddy Annem Date: Mon, 8 Jun 2020 20:12:07 +0530 Subject: [PATCH 037/126] arm: Make COMMAND_LINE_SIZE a kernel config option Make COMMAND_LINE_SIZE a kernel config option to configure command line size as required per target. Change-Id: I1fe01812fd04940987230286381b9ed11d630f19 Signed-off-by: Nagireddy Annem --- arch/arm/Kconfig | 6 ++++++ arch/arm/include/uapi/asm/setup.h | 4 +++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9d2001edb7b2..7e23076b2817 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1471,6 +1471,12 @@ config PAGE_OFFSET default 0xB0000000 if VMSPLIT_3G_OPT default 0xC0000000 +config COMMAND_LINE_SIZE + int "Maximum size of the command line." + default "1024" + help + This is the per architecture maximum command line size. + config NR_CPUS int "Maximum number of CPUs (2-32)" range 2 32 diff --git a/arch/arm/include/uapi/asm/setup.h b/arch/arm/include/uapi/asm/setup.h index 6b335a9ff8c8..977373fa9992 100644 --- a/arch/arm/include/uapi/asm/setup.h +++ b/arch/arm/include/uapi/asm/setup.h @@ -17,7 +17,9 @@ #include -#define COMMAND_LINE_SIZE 1024 +#ifdef CONFIG_COMMAND_LINE_SIZE +#define COMMAND_LINE_SIZE CONFIG_COMMAND_LINE_SIZE +#endif /* The list ends with an ATAG_NONE node. */ #define ATAG_NONE 0x00000000 From c18da7fa06ca56135517f5573317ec90dbf60231 Mon Sep 17 00:00:00 2001 From: Nagireddy Annem Date: Mon, 8 Jun 2020 20:42:25 +0530 Subject: [PATCH 038/126] defconfig: Increase command line size to 2048 for SDM429 BG Increase Command line size to 2048 to accommodate avb2.0 boot arguemnets. Change-Id: I59ff896ac112641a5db239d4b10da39daf549ffa Signed-off-by: Nagireddy Annem --- arch/arm/configs/vendor/sdm429-bg-perf_defconfig | 1 + arch/arm/configs/vendor/sdm429-bg_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm/configs/vendor/sdm429-bg-perf_defconfig b/arch/arm/configs/vendor/sdm429-bg-perf_defconfig index c885f8a5de34..f7b1fbb3a6ab 100644 --- a/arch/arm/configs/vendor/sdm429-bg-perf_defconfig +++ b/arch/arm/configs/vendor/sdm429-bg-perf_defconfig @@ -59,6 +59,7 @@ CONFIG_ARCH_SDM429W=y CONFIG_PCI_MSM=y CONFIG_SMP=y CONFIG_SCHED_MC=y +CONFIG_COMMAND_LINE_SIZE=2048 CONFIG_NR_CPUS=8 CONFIG_ARM_PSCI=y CONFIG_PREEMPT=y diff --git a/arch/arm/configs/vendor/sdm429-bg_defconfig b/arch/arm/configs/vendor/sdm429-bg_defconfig index dccf0a684ba5..072e44e45f2e 100644 --- a/arch/arm/configs/vendor/sdm429-bg_defconfig +++ b/arch/arm/configs/vendor/sdm429-bg_defconfig @@ -59,6 +59,7 @@ CONFIG_ARCH_SDM429W=y # CONFIG_VDSO is not set CONFIG_SMP=y CONFIG_SCHED_MC=y +CONFIG_COMMAND_LINE_SIZE=2048 CONFIG_NR_CPUS=8 CONFIG_ARM_PSCI=y CONFIG_PREEMPT=y From 01c2f19797c24f2176c5a15a63eae3dc154b8d26 Mon Sep 17 00:00:00 2001 From: Sivasri Kumar Vanka Date: Tue, 9 Jun 2020 10:01:35 +0530 Subject: [PATCH 039/126] usb: gadget: notify suspend clear to usb phy in udc When usb composition switch happens from composition containing adb eg. 9025 to non adb compositions like 905B/9063, usb goes to lpm in middle of MBIM/RNDIS protocol transaction. PCNOC crash happens when MBIM/RNDIS call ep_queue. When usb composition switch happens from non adb composition like F000 to non adb compositions like 905B/9063, then usb goes to lpm before usb composition switch complete. Also MBIM/RNDIS protocol transactions do not happen. By notify suspend clear to usb phy in udc, solves the problem. Change-Id: Ibe7df918b22ca8422d50e3cc76ade1e14f4a5312 Signed-off-by: Sivasri Kumar Vanka --- drivers/usb/gadget/ci13xxx_udc.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/usb/gadget/ci13xxx_udc.c b/drivers/usb/gadget/ci13xxx_udc.c index be3172e385b5..3a61ee06e201 100644 --- a/drivers/usb/gadget/ci13xxx_udc.c +++ b/drivers/usb/gadget/ci13xxx_udc.c @@ -3543,6 +3543,15 @@ static int ci13xxx_pullup(struct usb_gadget *_gadget, int is_active) hw_device_state(udc->ep0out.qh.dma); } else { hw_device_state(0); + if (udc->suspended) { + if (udc->udc_driver->notify_event) + udc->udc_driver->notify_event(udc, + CI13XXX_CONTROLLER_RESUME_EVENT); + if (udc->transceiver) + usb_phy_set_suspend(udc->transceiver, 0); + udc->driver->resume(&udc->gadget); + udc->suspended = 0; + } spin_unlock_irqrestore(udc->lock, flags); _gadget_stop_activity(&udc->gadget); spin_lock_irqsave(udc->lock, flags); From c0dbf3be0891622c5c7abcef26361f934575e7d4 Mon Sep 17 00:00:00 2001 From: Sridhar Arra Date: Tue, 9 Jun 2020 12:58:11 +0530 Subject: [PATCH 040/126] ARM: dts: msm: Retain the copyright year Retain the copyright year for commit 731696ac2986 ("ARM: dts: msm: Add eMMC and SD card support on QCS410"). Change-Id: I54122e336b183c75e6379c0ae628020ada4749fd Signed-off-by: Sridhar Arra --- arch/arm64/boot/dts/qcom/qcs410-iot.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/qcs410-iot.dtsi b/arch/arm64/boot/dts/qcom/qcs410-iot.dtsi index 96fb1d37b317..2d35d00c1847 100644 --- a/arch/arm64/boot/dts/qcom/qcs410-iot.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs410-iot.dtsi @@ -1,4 +1,4 @@ -/* Copyright (c) 2020, The Linux Foundation. All rights reserved. +/* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and From 1cdff5beebf7959a360891355c321bf9a6204c4e Mon Sep 17 00:00:00 2001 From: Sneh Shah Date: Tue, 26 May 2020 22:11:33 +0530 Subject: [PATCH 041/126] arm: dts: msm: set descriptor count to 512 for IPA channel Add dt entry to set desciprot count to 512 for IPA channel. Change-Id: I9c4ba59f8efa79465d76a9d0468ba2375d74875e Signed-off-by: sneh shah --- arch/arm64/boot/dts/qcom/sa515m-ccard.dtsi | 2 ++ arch/arm64/boot/dts/qcom/sa515m-v2-ttp.dtsi | 5 +++++ 2 files changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa515m-ccard.dtsi b/arch/arm64/boot/dts/qcom/sa515m-ccard.dtsi index f7a7966cd9d2..e0d03885f69d 100644 --- a/arch/arm64/boot/dts/qcom/sa515m-ccard.dtsi +++ b/arch/arm64/boot/dts/qcom/sa515m-ccard.dtsi @@ -246,6 +246,8 @@ pinctrl-1 = <&emac_pin_pps_0>; pinctrl-2 = <&emac_pin_pps_1>; qcom,phy-reset-delay-msecs = <10>; + ipa-dma-rx-desc-cnt = <512>; + ipa-dma-tx-desc-cnt = <512>; }; &vreg_rgmii_io_pads { diff --git a/arch/arm64/boot/dts/qcom/sa515m-v2-ttp.dtsi b/arch/arm64/boot/dts/qcom/sa515m-v2-ttp.dtsi index 8fac0f31e969..ff584090a004 100644 --- a/arch/arm64/boot/dts/qcom/sa515m-v2-ttp.dtsi +++ b/arch/arm64/boot/dts/qcom/sa515m-v2-ttp.dtsi @@ -59,6 +59,11 @@ status = "disabled"; }; +ðqos_hw { + ipa-dma-rx-desc-cnt = <512>; + ipa-dma-tx-desc-cnt = <512>; +}; + &soc { bluetooth: bt_qca6390 { compatible = "qca,qca6390"; From ee94052b11c8ee351a9c3046d52ed9c7768e9872 Mon Sep 17 00:00:00 2001 From: Pradeep P V K Date: Tue, 9 Jun 2020 19:10:40 +0530 Subject: [PATCH 042/126] mtd: msm_qpic_nand: Add a check to read an ONFI parameter page Add support to read an ONFI parameter page from the device on QPIC 2.0 controllers. Change-Id: I30e8696c17733dc745c6857c0dcb436764f229e2 Signed-off-by: Pradeep P V K --- drivers/mtd/devices/msm_qpic_nand.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/devices/msm_qpic_nand.c b/drivers/mtd/devices/msm_qpic_nand.c index e094673f9cac..ea6c4ed2c1f8 100644 --- a/drivers/mtd/devices/msm_qpic_nand.c +++ b/drivers/mtd/devices/msm_qpic_nand.c @@ -881,10 +881,12 @@ static int msm_nand_flash_onfi_probe(struct msm_nand_info *info) struct version nandc_version = {0}; ret = msm_nand_version_check(info, &nandc_version); - if (!ret && !(nandc_version.nand_major == 1 && + if (!ret && !((nandc_version.nand_major == 1 && nandc_version.nand_minor >= 5 && nandc_version.qpic_major == 1 && - nandc_version.qpic_minor >= 5)) { + nandc_version.qpic_minor >= 5) || + (nandc_version.nand_major >= 2 && + nandc_version.qpic_major >= 2))) { ret = -EPERM; goto out; } From 17db480695c50cae58b099775161b999e13e4da4 Mon Sep 17 00:00:00 2001 From: Sunil Paidimarri Date: Thu, 21 May 2020 14:56:46 -0700 Subject: [PATCH 043/126] net: stmmac: Fix reading IOMACRO por values Support reading por values for different EMAC versions. Change-Id: I17f8e9c4d461abec29761bc96dfc1e701771de08 Acked-by: Rahul Kawadgave Signed-off-by: Sunil Paidimarri --- .../stmicro/stmmac/dwmac-qcom-ethqos.c | 35 +++++++++++++++++-- .../stmicro/stmmac/dwmac-qcom-ethqos.h | 21 +++-------- 2 files changed, 36 insertions(+), 20 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c index f1626e102e50..25c05007c20a 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c @@ -33,6 +33,20 @@ static unsigned long tlmm_central_base_addr; bool phy_intr_en; +static struct ethqos_emac_por emac_por[] = { + { .offset = RGMII_IO_MACRO_CONFIG, .value = 0x0 }, + { .offset = SDCC_HC_REG_DLL_CONFIG, .value = 0x0 }, + { .offset = SDCC_HC_REG_DDR_CONFIG, .value = 0x0 }, + { .offset = SDCC_HC_REG_DLL_CONFIG2, .value = 0x0 }, + { .offset = SDCC_USR_CTL, .value = 0x0 }, + { .offset = RGMII_IO_MACRO_CONFIG2, .value = 0x0}, +}; + +static struct ethqos_emac_driver_data emac_por_data = { + .por = emac_por, + .num_por = ARRAY_SIZE(emac_por), +}; + struct qcom_ethqos *pethqos; struct stmmac_emb_smmu_cb_ctx stmmac_emb_smmu_ctx = {0}; @@ -48,6 +62,21 @@ static struct qmp_pkt pkt; static char qmp_buf[MAX_QMP_MSG_SIZE + 1] = {0}; static struct ip_params pparams = {"", "", "", ""}; +static void qcom_ethqos_read_iomacro_por_values(struct qcom_ethqos *ethqos) +{ + int i; + + ethqos->por = emac_por_data.por; + ethqos->num_por = emac_por_data.num_por; + + /* Read to POR values and enable clk */ + for (i = 0; i < ethqos->num_por; i++) + ethqos->por[i].value = + readl_relaxed( + ethqos->rgmii_base + + ethqos->por[i].offset); +} + static inline unsigned int dwmac_qcom_get_eth_type(unsigned char *buf) { return @@ -1045,7 +1074,7 @@ static void ethqos_pps_irq_config(struct qcom_ethqos *ethqos) } static const struct of_device_id qcom_ethqos_match[] = { - { .compatible = "qcom,sdxprairie-ethqos", .data = &emac_v2_3_2_por}, + { .compatible = "qcom,sdxprairie-ethqos",}, { .compatible = "qcom,emac-smmu-embedded", }, { .compatible = "qcom,stmmac-ethqos", }, {} @@ -1771,8 +1800,6 @@ static int qcom_ethqos_probe(struct platform_device *pdev) goto err_mem; } - ethqos->por = of_device_get_match_data(&pdev->dev); - ethqos->rgmii_clk = devm_clk_get(&pdev->dev, "rgmii"); if (!ethqos->rgmii_clk) { ret = -ENOMEM; @@ -1880,6 +1907,8 @@ static int qcom_ethqos_probe(struct platform_device *pdev) pethqos = ethqos; ethqos_create_debugfs(ethqos); + qcom_ethqos_read_iomacro_por_values(ethqos); + ndev = dev_get_drvdata(ðqos->pdev->dev); priv = netdev_priv(ndev); diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.h b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.h index 73849621f46e..5b06145c6e8e 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.h @@ -380,22 +380,9 @@ struct ethqos_emac_por { unsigned int value; }; -static const struct ethqos_emac_por emac_v2_3_0_por[] = { - { .offset = RGMII_IO_MACRO_CONFIG, .value = 0x00C01343 }, - { .offset = SDCC_HC_REG_DLL_CONFIG, .value = 0x2004642C }, - { .offset = SDCC_HC_REG_DDR_CONFIG, .value = 0x00000000 }, - { .offset = SDCC_HC_REG_DLL_CONFIG2, .value = 0x00200000 }, - { .offset = SDCC_USR_CTL, .value = 0x00010800 }, - { .offset = RGMII_IO_MACRO_CONFIG2, .value = 0x00002060 }, -}; - -static const struct ethqos_emac_por emac_v2_3_2_por[] = { - { .offset = RGMII_IO_MACRO_CONFIG, .value = 0x00C01343 }, - { .offset = SDCC_HC_REG_DLL_CONFIG, .value = 0x2004642C }, - { .offset = SDCC_HC_REG_DDR_CONFIG, .value = 0x80040800 }, - { .offset = SDCC_HC_REG_DLL_CONFIG2, .value = 0x00200000 }, - { .offset = SDCC_USR_CTL, .value = 0x00010800 }, - { .offset = RGMII_IO_MACRO_CONFIG2, .value = 0x00002060 }, +struct ethqos_emac_driver_data { + struct ethqos_emac_por *por; + unsigned int num_por; }; struct qcom_ethqos { @@ -415,7 +402,7 @@ struct qcom_ethqos { /* Work struct for handling phy interrupt */ struct work_struct emac_phy_work; - const struct ethqos_emac_por *por; + struct ethqos_emac_por *por; unsigned int num_por; unsigned int emac_ver; From f3f51ded1c4ab6d6171a4b1951dc28e097fd2f50 Mon Sep 17 00:00:00 2001 From: Pradeep P V K Date: Thu, 19 Mar 2020 19:18:13 +0800 Subject: [PATCH 044/126] block, bfq: fix use-after-free in bfq_idle_slice_timer_body In bfq_idle_slice_timer func, bfqq = bfqd->in_service_queue is not in bfqd-lock critical section. The bfqq, which is not equal to NULL in bfq_idle_slice_timer, may be freed after passing to bfq_idle_slice_timer_body. So we will access the freed memory. In addition, considering the bfqq may be in race, we should firstly check whether bfqq is in service before doing something on it in bfq_idle_slice_timer_body func. If the bfqq in race is not in service, it means the bfqq has been expired through __bfq_bfqq_expire func, and wait_request flags has been cleared in __bfq_bfqd_reset_in_service func. So we do not need to re-clear the wait_request of bfqq which is not in service. KASAN log is given as follows: [13058.354613] ============================================================== [13058.354640] BUG: KASAN: use-after-free in bfq_idle_slice_timer+0xac/0x290 [13058.354644] Read of size 8 at addr ffffa02cf3e63f78 by task fork13/19767 [13058.354646] [13058.354655] CPU: 96 PID: 19767 Comm: fork13 [13058.354661] Call trace: [13058.354667] dump_backtrace+0x0/0x310 [13058.354672] show_stack+0x28/0x38 [13058.354681] dump_stack+0xd8/0x108 [13058.354687] print_address_description+0x68/0x2d0 [13058.354690] kasan_report+0x124/0x2e0 [13058.354697] __asan_load8+0x88/0xb0 [13058.354702] bfq_idle_slice_timer+0xac/0x290 [13058.354707] __hrtimer_run_queues+0x298/0x8b8 [13058.354710] hrtimer_interrupt+0x1b8/0x678 [13058.354716] arch_timer_handler_phys+0x4c/0x78 [13058.354722] handle_percpu_devid_irq+0xf0/0x558 [13058.354731] generic_handle_irq+0x50/0x70 [13058.354735] __handle_domain_irq+0x94/0x110 [13058.354739] gic_handle_irq+0x8c/0x1b0 [13058.354742] el1_irq+0xb8/0x140 [13058.354748] do_wp_page+0x260/0xe28 [13058.354752] __handle_mm_fault+0x8ec/0x9b0 [13058.354756] handle_mm_fault+0x280/0x460 [13058.354762] do_page_fault+0x3ec/0x890 [13058.354765] do_mem_abort+0xc0/0x1b0 [13058.354768] el0_da+0x24/0x28 [13058.354770] [13058.354773] Allocated by task 19731: [13058.354780] kasan_kmalloc+0xe0/0x190 [13058.354784] kasan_slab_alloc+0x14/0x20 [13058.354788] kmem_cache_alloc_node+0x130/0x440 [13058.354793] bfq_get_queue+0x138/0x858 [13058.354797] bfq_get_bfqq_handle_split+0xd4/0x328 [13058.354801] bfq_init_rq+0x1f4/0x1180 [13058.354806] bfq_insert_requests+0x264/0x1c98 [13058.354811] blk_mq_sched_insert_requests+0x1c4/0x488 [13058.354818] blk_mq_flush_plug_list+0x2d4/0x6e0 [13058.354826] blk_flush_plug_list+0x230/0x548 [13058.354830] blk_finish_plug+0x60/0x80 [13058.354838] read_pages+0xec/0x2c0 [13058.354842] __do_page_cache_readahead+0x374/0x438 [13058.354846] ondemand_readahead+0x24c/0x6b0 [13058.354851] page_cache_sync_readahead+0x17c/0x2f8 [13058.354858] generic_file_buffered_read+0x588/0xc58 [13058.354862] generic_file_read_iter+0x1b4/0x278 [13058.354965] ext4_file_read_iter+0xa8/0x1d8 [ext4] [13058.354972] __vfs_read+0x238/0x320 [13058.354976] vfs_read+0xbc/0x1c0 [13058.354980] ksys_read+0xdc/0x1b8 [13058.354984] __arm64_sys_read+0x50/0x60 [13058.354990] el0_svc_common+0xb4/0x1d8 [13058.354994] el0_svc_handler+0x50/0xa8 [13058.354998] el0_svc+0x8/0xc [13058.354999] [13058.355001] Freed by task 19731: [13058.355007] __kasan_slab_free+0x120/0x228 [13058.355010] kasan_slab_free+0x10/0x18 [13058.355014] kmem_cache_free+0x288/0x3f0 [13058.355018] bfq_put_queue+0x134/0x208 [13058.355022] bfq_exit_icq_bfqq+0x164/0x348 [13058.355026] bfq_exit_icq+0x28/0x40 [13058.355030] ioc_exit_icq+0xa0/0x150 [13058.355035] put_io_context_active+0x250/0x438 [13058.355038] exit_io_context+0xd0/0x138 [13058.355045] do_exit+0x734/0xc58 [13058.355050] do_group_exit+0x78/0x220 [13058.355054] __wake_up_parent+0x0/0x50 [13058.355058] el0_svc_common+0xb4/0x1d8 [13058.355062] el0_svc_handler+0x50/0xa8 [13058.355066] el0_svc+0x8/0xc. Change-Id: I510c704a6f2324741d70db33f0350e14642fe92f Acked-by: Paolo Valente Reported-by: Wang Wang Signed-off-by: Zhiqiang Liu Signed-off-by: Feilong Lin Signed-off-by: Jens Axboe Git-commit: 2f95fa5c955d0a9987ffdc3a095e2f4e62c5f2a9 Git-repo: https://git.kernel.org/pub/scm/linux/kernel/git/axboe/linux-block Signed-off-by: Pradeep P V K --- block/bfq-iosched.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/block/bfq-iosched.c b/block/bfq-iosched.c index 93863c6173e6..959bee9fa911 100644 --- a/block/bfq-iosched.c +++ b/block/bfq-iosched.c @@ -4541,20 +4541,28 @@ static void bfq_prepare_request(struct request *rq, struct bio *bio) spin_unlock_irq(&bfqd->lock); } -static void bfq_idle_slice_timer_body(struct bfq_queue *bfqq) +static void +bfq_idle_slice_timer_body(struct bfq_data *bfqd, struct bfq_queue *bfqq) { - struct bfq_data *bfqd = bfqq->bfqd; enum bfqq_expiration reason; unsigned long flags; spin_lock_irqsave(&bfqd->lock, flags); - bfq_clear_bfqq_wait_request(bfqq); + /* + * Considering that bfqq may be in race, we should firstly check + * whether bfqq is in service before doing something on it. If + * the bfqq in race is not in service, it has already been expired + * through __bfq_bfqq_expire func and its wait_request flags has + * been cleared in __bfq_bfqd_reset_in_service func. + */ if (bfqq != bfqd->in_service_queue) { spin_unlock_irqrestore(&bfqd->lock, flags); return; } + bfq_clear_bfqq_wait_request(bfqq); + if (bfq_bfqq_budget_timeout(bfqq)) /* * Also here the queue can be safely expired @@ -4599,7 +4607,7 @@ static enum hrtimer_restart bfq_idle_slice_timer(struct hrtimer *timer) * early. */ if (bfqq) - bfq_idle_slice_timer_body(bfqq); + bfq_idle_slice_timer_body(bfqd, bfqq); return HRTIMER_NORESTART; } From 716746dad5e5a1532c36ad903e9a671fc76a91e7 Mon Sep 17 00:00:00 2001 From: Shilun Wan Date: Mon, 25 May 2020 14:45:01 +0800 Subject: [PATCH 045/126] drm/msm/sde: fix potential array index out of bounds The num_encoders may exceed the max_encoders, so add one safe condition to avoid this case. Change-Id: I38454678f18cb26616ff82eb6f418f2fc0d22fa5 Signed-off-by: Shilun Wan --- drivers/gpu/drm/msm/sde/sde_kms.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/sde/sde_kms.c b/drivers/gpu/drm/msm/sde/sde_kms.c index 1c75a5948f59..9da771981d2e 100644 --- a/drivers/gpu/drm/msm/sde/sde_kms.c +++ b/drivers/gpu/drm/msm/sde/sde_kms.c @@ -1591,7 +1591,8 @@ static int _sde_kms_setup_displays(struct drm_device *dev, /* update display cap to MST_MODE for DP MST encoders */ info.capabilities |= MSM_DISPLAY_CAP_MST_MODE; sde_kms->dp_stream_count = dp_display_get_num_of_streams(); - for (idx = 0; idx < sde_kms->dp_stream_count; idx++) { + for (idx = 0; idx < sde_kms->dp_stream_count && + priv->num_encoders < max_encoders; idx++) { info.h_tile_instance[0] = idx; encoder = sde_encoder_init(dev, &info); if (IS_ERR_OR_NULL(encoder)) { From 7550c2942bef2b24f8c447a6194272c80b173c6d Mon Sep 17 00:00:00 2001 From: Shilun Wan Date: Mon, 25 May 2020 15:00:25 +0800 Subject: [PATCH 046/126] drm/msm/shd: fix null pointer dereferenced Add one safe judging condition for the variable 'm' to avoid null pointer dereferenced. Change-Id: I0848b3e56f3d77f0783789b09b4b9e20955dc6a0 Signed-off-by: Shilun Wan --- drivers/gpu/drm/msm/shd/shd_drm.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/msm/shd/shd_drm.c b/drivers/gpu/drm/msm/shd/shd_drm.c index 4e069760be0c..5799bb1fbfd8 100644 --- a/drivers/gpu/drm/msm/shd/shd_drm.c +++ b/drivers/gpu/drm/msm/shd/shd_drm.c @@ -616,6 +616,8 @@ static int shd_connector_get_modes(struct drm_connector *connector, drm_mode.vtotal = drm_mode.vsync_end; m = drm_mode_duplicate(disp->drm_dev, &drm_mode); + if (!m) + return 0; drm_mode_set_name(m); drm_mode_probed_add(connector, m); rc = shd_drm_update_edid_name(&edid, disp->name); From b1535c878f4e130b131cb926c7b3c1237d8f542f Mon Sep 17 00:00:00 2001 From: Venkata Rao Kakani Date: Fri, 29 May 2020 18:41:59 +0530 Subject: [PATCH 047/126] ARM: dts: msm: update board-id for different linux variants Add board-id for different linux guest variants to recognize and load from host. Change-Id: I34607b7c76a295d81a38368a9bfa55c2e5b27e82 Signed-off-by: Venkata Rao Kakani --- arch/arm64/boot/dts/qcom/sa6155p-vm-la.dts | 2 +- arch/arm64/boot/dts/qcom/sa8155-vm-la-mt.dts | 2 +- arch/arm64/boot/dts/qcom/sa8155-vm-la.dts | 2 +- arch/arm64/boot/dts/qcom/sa8155-vm-lv-mt.dts | 2 +- arch/arm64/boot/dts/qcom/sa8155-vm-lv.dts | 2 +- arch/arm64/boot/dts/qcom/sa8195-vm-la-mt.dts | 2 +- arch/arm64/boot/dts/qcom/sa8195-vm-la.dts | 2 +- arch/arm64/boot/dts/qcom/sa8195-vm-lv-mt.dts | 2 +- arch/arm64/boot/dts/qcom/sa8195-vm-lv.dts | 2 +- 9 files changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sa6155p-vm-la.dts b/arch/arm64/boot/dts/qcom/sa6155p-vm-la.dts index 8a2835a735dc..ba1dc8d7dc83 100644 --- a/arch/arm64/boot/dts/qcom/sa6155p-vm-la.dts +++ b/arch/arm64/boot/dts/qcom/sa6155p-vm-la.dts @@ -19,5 +19,5 @@ model = "Qualcomm Technologies, Inc. SA6155P Virtual Machine"; compatible = "qcom,sa6155p"; qcom,pmic-name = "PM6150"; - qcom,board-id = <0 0>; + qcom,board-id = <0x1000001 0>; }; diff --git a/arch/arm64/boot/dts/qcom/sa8155-vm-la-mt.dts b/arch/arm64/boot/dts/qcom/sa8155-vm-la-mt.dts index d544cb066f2f..0e2e5d138d32 100644 --- a/arch/arm64/boot/dts/qcom/sa8155-vm-la-mt.dts +++ b/arch/arm64/boot/dts/qcom/sa8155-vm-la-mt.dts @@ -19,5 +19,5 @@ model = "Qualcomm Technologies, Inc. SA8155 Multi LA Virtual Machine"; compatible = "qcom,sa8155"; qcom,pmic-name = "PM8150"; - qcom,board-id = <0 0>; + qcom,board-id = <0x2000001 0>; }; diff --git a/arch/arm64/boot/dts/qcom/sa8155-vm-la.dts b/arch/arm64/boot/dts/qcom/sa8155-vm-la.dts index ae614ef9b5f7..30cffa4f8ea3 100644 --- a/arch/arm64/boot/dts/qcom/sa8155-vm-la.dts +++ b/arch/arm64/boot/dts/qcom/sa8155-vm-la.dts @@ -20,5 +20,5 @@ model = "Qualcomm Technologies, Inc. SA8155 Single LA Virtual Machine"; compatible = "qcom,sa8155"; qcom,pmic-name = "PM8150"; - qcom,board-id = <0 0>; + qcom,board-id = <0x1000001 0>; }; diff --git a/arch/arm64/boot/dts/qcom/sa8155-vm-lv-mt.dts b/arch/arm64/boot/dts/qcom/sa8155-vm-lv-mt.dts index aefc080f6b71..7c5562bf00f4 100644 --- a/arch/arm64/boot/dts/qcom/sa8155-vm-lv-mt.dts +++ b/arch/arm64/boot/dts/qcom/sa8155-vm-lv-mt.dts @@ -19,5 +19,5 @@ model = "Qualcomm Technologies, Inc. SA8155 Multi LV Virtual Machine"; compatible = "qcom,sa8155"; qcom,pmic-name = "PM8150"; - qcom,board-id = <0 0>; + qcom,board-id = <0x2000002 0>; }; diff --git a/arch/arm64/boot/dts/qcom/sa8155-vm-lv.dts b/arch/arm64/boot/dts/qcom/sa8155-vm-lv.dts index 7eec6fa776fd..46b3281f8716 100644 --- a/arch/arm64/boot/dts/qcom/sa8155-vm-lv.dts +++ b/arch/arm64/boot/dts/qcom/sa8155-vm-lv.dts @@ -19,6 +19,6 @@ model = "Qualcomm Technologies, Inc. SA8155 Single LV Virtual Machine"; compatible = "qcom,sa8155"; qcom,pmic-name = "PM8150"; - qcom,board-id = <0 0>; + qcom,board-id = <0x1000002 0>; }; diff --git a/arch/arm64/boot/dts/qcom/sa8195-vm-la-mt.dts b/arch/arm64/boot/dts/qcom/sa8195-vm-la-mt.dts index 69fc9ed11e9b..c59921d1b4c5 100644 --- a/arch/arm64/boot/dts/qcom/sa8195-vm-la-mt.dts +++ b/arch/arm64/boot/dts/qcom/sa8195-vm-la-mt.dts @@ -19,5 +19,5 @@ model = "Qualcomm Technologies, Inc. SA8195 Multi LA Virtual Machine"; compatible = "qcom,sa8195p"; qcom,pmic-name = "PM8195"; - qcom,board-id = <0 0>; + qcom,board-id = <0x2000001 0>; }; diff --git a/arch/arm64/boot/dts/qcom/sa8195-vm-la.dts b/arch/arm64/boot/dts/qcom/sa8195-vm-la.dts index 1d54538f77f9..bb721e12b648 100644 --- a/arch/arm64/boot/dts/qcom/sa8195-vm-la.dts +++ b/arch/arm64/boot/dts/qcom/sa8195-vm-la.dts @@ -19,5 +19,5 @@ model = "Qualcomm Technologies, Inc. SA8195 Single LA Virtual Machine"; compatible = "qcom,sa8195p"; qcom,pmic-name = "PM8195"; - qcom,board-id = <0 0>; + qcom,board-id = <0x1000001 0>; }; diff --git a/arch/arm64/boot/dts/qcom/sa8195-vm-lv-mt.dts b/arch/arm64/boot/dts/qcom/sa8195-vm-lv-mt.dts index 4a570f9897d9..76a24b42f78e 100644 --- a/arch/arm64/boot/dts/qcom/sa8195-vm-lv-mt.dts +++ b/arch/arm64/boot/dts/qcom/sa8195-vm-lv-mt.dts @@ -19,5 +19,5 @@ model = "Qualcomm Technologies, Inc. SA8195 Multi LV Virtual Machine"; compatible = "qcom,sa8195p"; qcom,pmic-name = "PM8195"; - qcom,board-id = <0 0>; + qcom,board-id = <0x2000002 0>; }; diff --git a/arch/arm64/boot/dts/qcom/sa8195-vm-lv.dts b/arch/arm64/boot/dts/qcom/sa8195-vm-lv.dts index 10b40d2c3e50..107d2016c9c9 100644 --- a/arch/arm64/boot/dts/qcom/sa8195-vm-lv.dts +++ b/arch/arm64/boot/dts/qcom/sa8195-vm-lv.dts @@ -19,5 +19,5 @@ model = "Qualcomm Technologies, Inc. SA8195 Single LV Virtual Machine"; compatible = "qcom,sa8195p"; qcom,pmic-name = "PM8195"; - qcom,board-id = <0 0>; + qcom,board-id = <0x1000002 0>; }; From ae1039250482b4bcb9e04ef2906b024d2a2b4572 Mon Sep 17 00:00:00 2001 From: Arun Prakash Date: Tue, 9 Jun 2020 13:38:42 +0530 Subject: [PATCH 048/126] ARM: dts: msm: Add smp2p based shutdown-ack Add smp2p based shutdown-ack support for both cdsp and adsp sub system as qmi based indication failing in graceful shutdown case. Change-Id: I01f0be88999a1219df61fc2178b795fe94d07e1b Signed-off-by: Arun Prakash --- arch/arm64/boot/dts/qcom/sm6150.dtsi | 12 ++++++++---- arch/arm64/boot/dts/qcom/sm8150.dtsi | 12 ++++++++---- 2 files changed, 16 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm6150.dtsi b/arch/arm64/boot/dts/qcom/sm6150.dtsi index 4eed5815d029..4cac5c0ccb46 100644 --- a/arch/arm64/boot/dts/qcom/sm6150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6150.dtsi @@ -2387,13 +2387,15 @@ <&adsp_smp2p_in 0 0>, <&adsp_smp2p_in 2 0>, <&adsp_smp2p_in 1 0>, - <&adsp_smp2p_in 3 0>; + <&adsp_smp2p_in 3 0>, + <&adsp_smp2p_in 7 0>; interrupt-names = "qcom,wdog", "qcom,err-fatal", "qcom,proxy-unvote", "qcom,err-ready", - "qcom,stop-ack"; + "qcom,stop-ack", + "qcom,shutdown-ack"; /* Outputs to lpass */ qcom,smem-states = <&adsp_smp2p_out 0>; @@ -2478,13 +2480,15 @@ <&cdsp_smp2p_in 0 0>, <&cdsp_smp2p_in 2 0>, <&cdsp_smp2p_in 1 0>, - <&cdsp_smp2p_in 3 0>; + <&cdsp_smp2p_in 3 0>, + <&cdsp_smp2p_in 7 0>; interrupt-names = "qcom,wdog", "qcom,err-fatal", "qcom,proxy-unvote", "qcom,err-ready", - "qcom,stop-ack"; + "qcom,stop-ack", + "qcom,shutdown-ack"; /* Outputs to turing */ qcom,smem-states = <&cdsp_smp2p_out 0>; diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index f4db2d9f7441..aa0d882dad60 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -1736,13 +1736,15 @@ <&adsp_smp2p_in 0 0>, <&adsp_smp2p_in 2 0>, <&adsp_smp2p_in 1 0>, - <&adsp_smp2p_in 3 0>; + <&adsp_smp2p_in 3 0>, + <&adsp_smp2p_in 7 0>; interrupt-names = "qcom,wdog", "qcom,err-fatal", "qcom,proxy-unvote", "qcom,err-ready", - "qcom,stop-ack"; + "qcom,stop-ack", + "qcom,shutdown-ack"; /* Outputs to lpass */ qcom,smem-states = <&adsp_smp2p_out 0>; @@ -1893,13 +1895,15 @@ <&cdsp_smp2p_in 0 0>, <&cdsp_smp2p_in 2 0>, <&cdsp_smp2p_in 1 0>, - <&cdsp_smp2p_in 3 0>; + <&cdsp_smp2p_in 3 0>, + <&cdsp_smp2p_in 7 0>; interrupt-names = "qcom,wdog", "qcom,err-fatal", "qcom,proxy-unvote", "qcom,err-ready", - "qcom,stop-ack"; + "qcom,stop-ack", + "qcom,shutdown-ack"; /* Outputs to turing */ qcom,smem-states = <&cdsp_smp2p_out 0>; From 8dba8a95d5e7b9db86b5f5dda8503521d98214fd Mon Sep 17 00:00:00 2001 From: Yuanfang Zhang Date: Thu, 11 Jun 2020 11:12:30 +0800 Subject: [PATCH 049/126] coresight: etx4x: sysfs: fix spinlock unlock issue If an error is detected in addr_range_show() or addr_range_store(), need to unlock spinlock and then return. Change-Id: I84be54a1906fd3a9d5f24946a7941e87595e95c1 Signed-off-by: Yuanfang Zhang --- drivers/hwtracing/coresight/coresight-etm4x-sysfs.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c index 19d33fbdb6f6..7d79f0dfd01d 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c @@ -964,8 +964,11 @@ static ssize_t addr_range_show(struct device *dev, spin_lock(&drvdata->spinlock); idx = config->addr_idx; - if (idx >= ETM_MAX_SINGLE_ADDR_CMP) + if (idx >= ETM_MAX_SINGLE_ADDR_CMP) { + spin_unlock(&drvdata->spinlock); return -EINVAL; + } + if (idx % 2 != 0) { spin_unlock(&drvdata->spinlock); return -EPERM; @@ -1002,8 +1005,11 @@ static ssize_t addr_range_store(struct device *dev, spin_lock(&drvdata->spinlock); idx = config->addr_idx; - if (idx >= ETM_MAX_SINGLE_ADDR_CMP) + if (idx >= ETM_MAX_SINGLE_ADDR_CMP) { + spin_unlock(&drvdata->spinlock); return -EINVAL; + } + if (idx % 2 != 0) { spin_unlock(&drvdata->spinlock); return -EPERM; From b363f7aeeb02137d911c128a90ba5a619c8df1a1 Mon Sep 17 00:00:00 2001 From: Lipsa Rout Date: Wed, 10 Jun 2020 15:14:54 +0530 Subject: [PATCH 050/126] drm: msm: dsi-staging: Fix dsi-te-using-wd during POMS Currently, in POMS case TE register is getting programmed before is_te_using_watchdog_timer flag is set. So, on switching the mode, since the TE register is not programmed properly, TE check fails. This change sets the flag is_te_using_watchdog_timer before register programming. Change-Id: I8ff39d8d5ab7391fca94d7678301dd46402809d5 Signed-off-by: Lipsa Rout --- drivers/gpu/drm/msm/dsi-staging/dsi_display.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_display.c b/drivers/gpu/drm/msm/dsi-staging/dsi_display.c index 5b25cbeaa9b9..982c4afde5e9 100644 --- a/drivers/gpu/drm/msm/dsi-staging/dsi_display.c +++ b/drivers/gpu/drm/msm/dsi-staging/dsi_display.c @@ -6071,8 +6071,12 @@ int dsi_display_get_info(struct drm_connector *connector, case DSI_OP_VIDEO_MODE: info->curr_panel_mode = MSM_DISPLAY_VIDEO_MODE; info->capabilities |= MSM_DISPLAY_CAP_VID_MODE; - if (display->panel->panel_mode_switch_enabled) + if (display->panel->panel_mode_switch_enabled) { info->capabilities |= MSM_DISPLAY_CAP_CMD_MODE; + info->is_te_using_watchdog_timer = + display->panel->te_using_watchdog_timer | + display->sw_te_using_wd; + } break; case DSI_OP_CMD_MODE: info->curr_panel_mode = MSM_DISPLAY_CMD_MODE; From 5c7f3c52b7d750d6f19fc0df158cd62f2227b336 Mon Sep 17 00:00:00 2001 From: Yadu MG Date: Sat, 30 May 2020 01:39:28 +0530 Subject: [PATCH 051/126] ARM: dts: msm: Add coresight nodes for sdmshrike Enable coresight components for tracing APPS ATB source. Change-Id: Iaf0107e0773c6b51073837a92f285c9264ec1afc Signed-off-by: Yadu MG --- .../boot/dts/qcom/sdmshrike-coresight.dtsi | 1088 +++++++++++++++++ arch/arm64/boot/dts/qcom/sdmshrike.dtsi | 1 + 2 files changed, 1089 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sdmshrike-coresight.dtsi diff --git a/arch/arm64/boot/dts/qcom/sdmshrike-coresight.dtsi b/arch/arm64/boot/dts/qcom/sdmshrike-coresight.dtsi new file mode 100644 index 000000000000..8f4e7a9c8d4a --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdmshrike-coresight.dtsi @@ -0,0 +1,1088 @@ +/* Copyright (c) 2020, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&soc { + csr: csr@0x6001000 { + compatible = "qcom,coresight-csr"; + reg = <0x6001000 0x1000>; + reg-names = "csr-base"; + + coresight-name = "coresight-csr"; + qcom,usb-bam-support; + qcom,hwctrl-set-support; + qcom,set-byte-cntr-support; + + qcom,blk-size = <1>; + }; + + replicator_qdss: replicator@6046000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b909>; + + reg = <0x6046000 0x1000>; + reg-names = "replicator-base"; + + coresight-name = "coresight-replicator-qdss"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + replicator0_out_tmc_etr: endpoint { + remote-endpoint= + <&tmc_etr_in_replicator0>; + }; + }; + + port@2 { + reg = <0>; + replicator0_in_tmc_etf: endpoint { + slave-mode; + remote-endpoint= + <&tmc_etf_out_replicator0>; + }; + }; + }; + }; + + tmc_etr: tmc@6048000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b961>; + + reg = <0x6048000 0x1000>, + <0x6064000 0x15000>; + reg-names = "tmc-base", "bam-base"; + + qcom,smmu-s1-bypass; + iommus = <&apps_smmu 0x05e0 0>, + <&apps_smmu 0x04a0 0>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + arm,buffer-size = <0x400000>; + + coresight-name = "coresight-tmc-etr"; + coresight-ctis = <&cti0>; + coresight-csr = <&csr>; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + interrupts = ; + interrupt-names = "byte-cntr-irq"; + + port { + tmc_etr_in_replicator0: endpoint { + slave-mode; + remote-endpoint = <&replicator0_out_tmc_etr>; + }; + }; + }; + + tmc_etf: tmc@6047000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b961>; + + reg = <0x6047000 0x1000>; + reg-names = "tmc-base"; + + coresight-name = "coresight-tmc-etf"; + coresight-ctis = <&cti0>; + coresight-csr = <&csr>; + arm,default-sink; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + tmc_etf_out_replicator0: endpoint { + remote-endpoint = + <&replicator0_in_tmc_etf>; + }; + }; + + port@1 { + reg = <0>; + tmc_etf_in_funnel_merg: endpoint { + slave-mode; + remote-endpoint = + <&funnel_merg_out_tmc_etf>; + }; + }; + }; + + }; + + funnel_merg: funnel@6045000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b908>; + + reg = <0x6045000 0x1000>; + reg-names = "funnel-base"; + + coresight-name = "coresight-funnel-merg"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + funnel_merg_out_tmc_etf: endpoint { + remote-endpoint = + <&tmc_etf_in_funnel_merg>; + }; + }; + + port@2 { + reg = <1>; + funnel_merg_in_funnel_in1: endpoint { + slave-mode; + remote-endpoint = + <&funnel_in1_out_funnel_merg>; + }; + }; + }; + }; + + funnel_in1: funnel@0x6042000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b908>; + + reg = <0x6042000 0x1000>; + reg-names = "funnel-base"; + + coresight-name = "coresight-funnel-in1"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + funnel_in1_out_funnel_merg: endpoint { + remote-endpoint = + <&funnel_merg_in_funnel_in1>; + }; + }; + + port@3 { + reg = <4>; + funnel_in1_in_funnel_apss_merg: endpoint { + slave-mode; + remote-endpoint = + <&funnel_apss_merg_out_funnel_in1>; + }; + }; + }; + }; + + funnel_apss_merg: funnel@7810000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b908>; + + reg = <0x7810000 0x1000>; + reg-names = "funnel-base"; + + coresight-name = "coresight-funnel-apss-merg"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + funnel_apss_merg_out_funnel_in1: endpoint { + remote-endpoint = + <&funnel_in1_in_funnel_apss_merg>; + }; + }; + + port@1 { + reg = <0>; + funnel_apss_merg_in_funnel_apss: endpoint { + slave-mode; + remote-endpoint = + <&funnel_apss_out_funnel_apss_merg>; + }; + }; + + port@2 { + reg = <2>; + funnel_apss_merg_in_tpda_olc: endpoint { + slave-mode; + remote-endpoint = + <&tpda_olc_out_funnel_apss_merg>; + }; + }; + + port@3 { + reg = <3>; + funnel_apss_merg_in_tpda_llm_silver: endpoint { + slave-mode; + remote-endpoint = + <&tpda_llm_silver_out_funnel_apss_merg>; + }; + }; + + port@4 { + reg = <4>; + funnel_apss_merg_in_tpda_llm_gold: endpoint { + slave-mode; + remote-endpoint = + <&tpda_llm_gold_out_funnel_apss_merg>; + }; + }; + + port@5 { + reg = <5>; + funnel_apss_merg_in_tpda_apss: endpoint { + slave-mode; + remote-endpoint = + <&tpda_apss_out_funnel_apss_merg>; + }; + }; + }; + }; + + tpda_olc: tpda@7832000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b969>; + reg = <0x7832000 0x1000>; + reg-names = "tpda-base"; + + coresight-name = "coresight-tpda-olc"; + + qcom,tpda-atid = <69>; + qcom,cmb-elem-size = <0 64>; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + tpda_olc_out_funnel_apss_merg: endpoint { + remote-endpoint = + <&funnel_apss_merg_in_tpda_olc>; + }; + }; + + port@1 { + reg = <0>; + tpda_olc_in_tpdm_olc: endpoint { + slave-mode; + remote-endpoint = + <&tpdm_olc_out_tpda_olc>; + }; + }; + }; + }; + + tpdm_olc: tpdm@7830000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b968>; + reg = <0x7830000 0x1000>; + reg-names = "tpdm-base"; + + coresight-name = "coresight-tpdm-olc"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + port{ + tpdm_olc_out_tpda_olc: endpoint { + remote-endpoint = <&tpda_olc_in_tpdm_olc>; + }; + }; + }; + + tpda_apss: tpda@7862000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b969>; + reg = <0x7862000 0x1000>; + reg-names = "tpda-base"; + + coresight-name = "coresight-tpda-apss"; + + qcom,tpda-atid = <66>; + qcom,dsb-elem-size = <0 32>; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + tpda_apss_out_funnel_apss_merg: endpoint { + remote-endpoint = + <&funnel_apss_merg_in_tpda_apss>; + }; + }; + + port@1 { + reg = <0>; + tpda_apss_in_tpdm_apss: endpoint { + slave-mode; + remote-endpoint = + <&tpdm_apss_out_tpda_apss>; + }; + }; + }; + }; + + tpdm_apss: tpdm@7860000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b968>; + reg = <0x7860000 0x1000>; + reg-names = "tpdm-base"; + + coresight-name = "coresight-tpdm-apss"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + port { + tpdm_apss_out_tpda_apss: endpoint { + remote-endpoint = <&tpda_apss_in_tpdm_apss>; + }; + }; + }; + + tpda_llm_silver: tpda@78c0000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b969>; + reg = <0x78c0000 0x1000>; + reg-names = "tpda-base"; + + coresight-name = "coresight-tpda-llm-silver"; + + qcom,tpda-atid = <72>; + qcom,cmb-elem-size = <0 32>; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + tpda_llm_silver_out_funnel_apss_merg: endpoint { + remote-endpoint = + <&funnel_apss_merg_in_tpda_llm_silver>; + }; + }; + + port@1 { + reg = <0>; + tpda_llm_silver_in_tpdm_llm_silver: endpoint { + slave-mode; + remote-endpoint = + <&tpdm_llm_silver_out_tpda_llm_silver>; + }; + }; + }; + }; + + tpdm_llm_silver: tpdm@78a0000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b968>; + reg = <0x78a0000 0x1000>; + reg-names = "tpdm-base"; + + coresight-name = "coresight-tpdm-llm-silver"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + port { + tpdm_llm_silver_out_tpda_llm_silver: endpoint { + remote-endpoint = + <&tpda_llm_silver_in_tpdm_llm_silver>; + }; + }; + }; + + tpda_llm_gold: tpda@78d0000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b969>; + reg = <0x78d0000 0x1000>; + reg-names = "tpda-base"; + + coresight-name = "coresight-tpda-llm-gold"; + + qcom,tpda-atid = <73>; + qcom,cmb-elem-size = <0 32>; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + tpda_llm_gold_out_funnel_apss_merg: endpoint { + remote-endpoint = + <&funnel_apss_merg_in_tpda_llm_gold>; + }; + }; + + port@1 { + reg = <0>; + tpda_llm_gold_in_tpdm_llm_gold: endpoint { + slave-mode; + remote-endpoint = + <&tpdm_llm_gold_out_tpda_llm_gold>; + }; + }; + }; + }; + + tpdm_llm_gold: tpdm@78b0000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b968>; + reg = <0x78b0000 0x1000>; + reg-names = "tpdm-base"; + + coresight-name = "coresight-tpdm-llm-gold"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + port { + tpdm_llm_gold_out_tpda_llm_gold: endpoint { + remote-endpoint = + <&tpda_llm_gold_in_tpdm_llm_gold>; + }; + }; + }; + + funnel_apss: funnel@7800000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b908>; + + reg = <0x7800000 0x1000>; + reg-names = "funnel-base"; + + coresight-name = "coresight-funnel-apss"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + funnel_apss_out_funnel_apss_merg: endpoint { + remote-endpoint = + <&funnel_apss_merg_in_funnel_apss>; + }; + }; + + port@1 { + reg = <0>; + funnel_apss_in_etm0: endpoint { + slave-mode; + remote-endpoint = + <&etm0_out_funnel_apss>; + }; + }; + + port@2 { + reg = <1>; + funnel_apss_in_etm1: endpoint { + slave-mode; + remote-endpoint = + <&etm1_out_funnel_apss>; + }; + }; + + port@3 { + reg = <2>; + funnel_apss_in_etm2: endpoint { + slave-mode; + remote-endpoint = + <&etm2_out_funnel_apss>; + }; + }; + + port@4 { + reg = <3>; + funnel_apss_in_etm3: endpoint { + slave-mode; + remote-endpoint = + <&etm3_out_funnel_apss>; + }; + }; + + port@5 { + reg = <4>; + funnel_apss_in_etm4: endpoint { + slave-mode; + remote-endpoint = + <&etm4_out_funnel_apss>; + }; + }; + + port@6 { + reg = <5>; + funnel_apss_in_etm5: endpoint { + slave-mode; + remote-endpoint = + <&etm5_out_funnel_apss>; + }; + }; + + port@7 { + reg = <6>; + funnel_apss_in_etm6: endpoint { + slave-mode; + remote-endpoint = + <&etm6_out_funnel_apss>; + }; + }; + + port@8 { + reg = <7>; + funnel_apss_in_etm7: endpoint { + slave-mode; + remote-endpoint = + <&etm7_out_funnel_apss>; + }; + }; + }; + }; + + etm0: etm@7040000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb95d>; + + reg = <0x7040000 0x1000>; + cpu = <&CPU0>; + + coresight-name = "coresight-etm0"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; + + port { + etm0_out_funnel_apss: endpoint { + remote-endpoint = <&funnel_apss_in_etm0>; + }; + }; + }; + + etm1: etm@7140000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb95d>; + + reg = <0x7140000 0x1000>; + cpu = <&CPU1>; + + qcom,tupwr-disable; + coresight-name = "coresight-etm1"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + port { + etm1_out_funnel_apss: endpoint { + remote-endpoint = <&funnel_apss_in_etm1>; + }; + }; + }; + + etm2: etm@7240000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb95d>; + + reg = <0x7240000 0x1000>; + cpu = <&CPU2>; + + qcom,tupwr-disable; + coresight-name = "coresight-etm2"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + port { + etm2_out_funnel_apss: endpoint { + remote-endpoint = <&funnel_apss_in_etm2>; + }; + }; + }; + + etm3: etm@7340000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb95d>; + + reg = <0x7340000 0x1000>; + cpu = <&CPU3>; + + qcom,tupwr-disable; + coresight-name = "coresight-etm3"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + port { + etm3_out_funnel_apss: endpoint { + remote-endpoint = <&funnel_apss_in_etm3>; + }; + }; + }; + + etm4: etm@7440000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb95d>; + + reg = <0x7440000 0x1000>; + cpu = <&CPU4>; + + qcom,tupwr-disable; + coresight-name = "coresight-etm4"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + port { + etm4_out_funnel_apss: endpoint { + remote-endpoint = <&funnel_apss_in_etm4>; + }; + }; + }; + + etm5: etm@7540000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb95d>; + + reg = <0x7540000 0x1000>; + cpu = <&CPU5>; + + qcom,tupwr-disable; + coresight-name = "coresight-etm5"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + port { + etm5_out_funnel_apss: endpoint { + remote-endpoint = <&funnel_apss_in_etm5>; + }; + }; + }; + + etm6: etm@7640000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb95d>; + + reg = <0x7640000 0x1000>; + cpu = <&CPU6>; + + qcom,tupwr-disable; + coresight-name = "coresight-etm6"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + port { + etm6_out_funnel_apss: endpoint { + remote-endpoint = <&funnel_apss_in_etm6>; + }; + }; + }; + + etm7: etm@7740000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x000bb95d>; + + reg = <0x7740000 0x1000>; + cpu = <&CPU7>; + + qcom,tupwr-disable; + coresight-name = "coresight-etm7"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + port { + etm7_out_funnel_apss: endpoint { + remote-endpoint = <&funnel_apss_in_etm7>; + }; + }; + }; + + cti0_apss: cti@78e0000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x78e0000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-apss_cti0"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti1_apss: cti@78f0000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x78f0000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-apss_cti1"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti2_apss: cti@7900000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x7900000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-apss_cti2"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti0: cti@6010000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x6010000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti0"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti1: cti@6011000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x6011000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti1"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti2: cti@6012000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x6012000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti2"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti3: cti@6013000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x6013000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti3"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti4: cti@6014000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x6014000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti4"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti5: cti@6015000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x6015000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti5"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti6: cti@6016000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x6016000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti6"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti7: cti@6017000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x6017000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti7"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti8: cti@6018000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x6018000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti8"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti9: cti@6019000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x6019000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti9"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti10: cti@601a000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x601a000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti10"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti11: cti@601b000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x601b000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti11"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti12: cti@601c000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x601c000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti12"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti13: cti@601d000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x601d000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti13"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti14: cti@601e000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x601e000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti14"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti15: cti@601f000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x601f000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti15"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti_cpu0: cti@7020000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x7020000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-cpu0"; + cpu = <&CPU0>; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti_cpu1: cti@7120000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x7120000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-cpu1"; + cpu = <&CPU1>; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti_cpu2: cti@7220000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x7220000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-cpu2"; + cpu = <&CPU2>; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti_cpu3: cti@7320000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x7320000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-cpu3"; + cpu = <&CPU3>; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti_cpu4: cti@7420000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x7420000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-cpu4"; + cpu = <&CPU4>; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti_cpu5: cti@7520000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x7520000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-cpu5"; + cpu = <&CPU5>; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti_cpu6: cti@7620000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x7620000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-cpu6"; + cpu = <&CPU6>; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + cti_cpu7: cti@7720000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b966>; + reg = <0x7720000 0x1000>; + reg-names = "cti-base"; + + coresight-name = "coresight-cti-cpu7"; + cpu = <&CPU7>; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/sdmshrike.dtsi b/arch/arm64/boot/dts/qcom/sdmshrike.dtsi index d967177aec66..d417ff891224 100644 --- a/arch/arm64/boot/dts/qcom/sdmshrike.dtsi +++ b/arch/arm64/boot/dts/qcom/sdmshrike.dtsi @@ -2841,6 +2841,7 @@ #include "sdmshrike-regulators.dtsi" #include "sdmshrike-ion.dtsi" #include "sdmshrike-bus.dtsi" +#include "sdmshrike-coresight.dtsi" #include "msm-arm-smmu-sdmshrike.dtsi" #include "sdmshrike-usb.dtsi" #include "sdmshrike-qupv3.dtsi" From daf77adb47a32b24631caa37248d7b003cc418ed Mon Sep 17 00:00:00 2001 From: Yadu MG Date: Thu, 4 Jun 2020 18:26:34 +0530 Subject: [PATCH 052/126] ARM: dts: msm: Enable hwevents coresight nodes for sdmshrike Add coresight hwevent node to enable tracing of hardware events Change-Id: I65a2ac9ac583e31807cc31fc04918255897aea22 Signed-off-by: Yadu MG --- .../boot/dts/qcom/sdmshrike-coresight.dtsi | 22 +++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdmshrike-coresight.dtsi b/arch/arm64/boot/dts/qcom/sdmshrike-coresight.dtsi index 8f4e7a9c8d4a..ef5a2ca7ff51 100644 --- a/arch/arm64/boot/dts/qcom/sdmshrike-coresight.dtsi +++ b/arch/arm64/boot/dts/qcom/sdmshrike-coresight.dtsi @@ -1085,4 +1085,26 @@ clocks = <&clock_aop QDSS_CLK>; clock-names = "apb_pclk"; }; + + hwevent: hwevent@91866f0 { + compatible = "qcom,coresight-hwevent"; + reg = <0x091866f0 0x4>, + <0x91966f0 0x4>, + <0x9186038 0x4>, + <0x9196038 0x4>, + <0x17e00034 0x4>, + <0x18200050 0x80>, + <0x02c8d050 0x80>, + <0x0af20050 0x80>; + reg-names = "ddr-ch0-cfg", "ddr-ch23-cfg", "ddr-ch0-ctrl", + "ddr-ch23-ctrl", "apss-testbus-mux-cfg", + "apss-rsc-hwevent-mux0-select", + "gpu-rsc-hwevent-mux0-select", + "sde-rsc-hwevent-mux0-select"; + + coresight-name = "coresight-hwevent"; + coresight-csr = <&csr>; + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + }; }; From 2333e49532ee65c62b5ac8a6b4fd7df2fed7d071 Mon Sep 17 00:00:00 2001 From: Yadu MG Date: Thu, 4 Jun 2020 18:47:59 +0530 Subject: [PATCH 053/126] ARM: dts: msm: Enable ddr coresight nodes for sdmshrike Enable coresight components for tracing DDR ATB source Change-Id: Ia4c9c4241ed1d9da8e8dca63191bf6a0a63da2e9 Signed-off-by: Yadu MG --- .../boot/dts/qcom/sdmshrike-coresight.dtsi | 185 ++++++++++++++++++ 1 file changed, 185 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdmshrike-coresight.dtsi b/arch/arm64/boot/dts/qcom/sdmshrike-coresight.dtsi index ef5a2ca7ff51..e5404fa19d8b 100644 --- a/arch/arm64/boot/dts/qcom/sdmshrike-coresight.dtsi +++ b/arch/arm64/boot/dts/qcom/sdmshrike-coresight.dtsi @@ -157,6 +157,15 @@ }; }; + port@1 { + reg = <0>; + funnel_merg_in_funnel_in0: endpoint { + slave-mode; + remote-endpoint = + <&funnel_in0_out_funnel_merg>; + }; + }; + port@2 { reg = <1>; funnel_merg_in_funnel_in1: endpoint { @@ -168,6 +177,41 @@ }; }; + funnel_in0: funnel@6041000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b908>; + + reg = <0x6041000 0x1000>; + reg-names = "funnel-base"; + + coresight-name = "coresight-funnel-in0"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + funnel_in0_out_funnel_merg: endpoint { + remote-endpoint = + <&funnel_merg_in_funnel_in0>; + }; + }; + + port@1 { + reg = <6>; + funnel_in0_in_funnel_qatb: endpoint { + slave-mode; + remote-endpoint = + <&funnel_qatb_out_funnel_in0>; + }; + }; + }; + }; + funnel_in1: funnel@0x6042000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b908>; @@ -1107,4 +1151,145 @@ clocks = <&clock_aop QDSS_CLK>; clock-names = "apb_pclk"; }; + + funnel_qatb: funnel@6005000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b908>; + + reg = <0x6005000 0x1000>; + reg-names = "funnel-base"; + + coresight-name = "coresight-funnel-qatb"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + funnel_qatb_out_funnel_in0: endpoint { + remote-endpoint = + <&funnel_in0_in_funnel_qatb>; + }; + }; + + port@1 { + reg = <0>; + funnel_qatb_in_tpda: endpoint { + slave-mode; + remote-endpoint = + <&tpda_out_funnel_qatb>; + }; + }; + }; + }; + + tpda: tpda@6004000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b969>; + reg = <0x6004000 0x1000>; + reg-names = "tpda-base"; + + coresight-name = "coresight-tpda"; + + qcom,tpda-atid = <65>; + qcom,bc-elem-size = <10 32>, + <13 32>; + qcom,tc-elem-size = <13 32>; + qcom,dsb-elem-size = <0 32>, + <2 32>, + <3 32>, + <5 32>, + <6 32>, + <10 32>, + <11 32>, + <13 32>; + qcom,cmb-elem-size = <3 64>, + <7 64>, + <13 64>; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + tpda_out_funnel_qatb: endpoint { + remote-endpoint = + <&funnel_qatb_in_tpda>; + }; + + }; + + port@1 { + reg = <5>; + tpda_in_funnel_ddr_0: endpoint { + slave-mode; + remote-endpoint = + <&funnel_ddr_0_out_tpda>; + }; + }; + }; + }; + + funnel_ddr_0: funnel@6a05000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b908>; + + reg = <0x6a05000 0x1000>; + reg-names = "funnel-base"; + + coresight-name = "coresight-funnel-ddr-0"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + funnel_ddr_0_out_tpda: endpoint { + remote-endpoint = + <&tpda_in_funnel_ddr_0>; + }; + }; + + port@1 { + reg = <0>; + funnel_ddr_0_in_tpdm_ddr: endpoint { + slave-mode; + remote-endpoint = + <&tpdm_ddr_out_funnel_ddr_0>; + }; + }; + }; + }; + + tpdm_ddr: tpdm@6a00000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b968>; + reg = <0x6a00000 0x1000>; + reg-names = "tpdm-base"; + + coresight-name = "coresight-tpdm-ddr"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + qcom,msr-fix-req; + + port { + tpdm_ddr_out_funnel_ddr_0: endpoint { + remote-endpoint = <&funnel_ddr_0_in_tpdm_ddr>; + }; + }; + }; }; From 10406d23889ef337a8366ac67137d1e7b2d7f8c7 Mon Sep 17 00:00:00 2001 From: Yadu MG Date: Thu, 4 Jun 2020 20:54:50 +0530 Subject: [PATCH 054/126] ARM: dts: msm: Enable STM coresight node for sdmshrike Enable system trace macrocell coresight component for software instrumented trace. Change-Id: I00e4b88f3d92c1be0ecaf29635eaa10731e90c17 Signed-off-by: Yadu MG --- .../boot/dts/qcom/sdmshrike-coresight.dtsi | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdmshrike-coresight.dtsi b/arch/arm64/boot/dts/qcom/sdmshrike-coresight.dtsi index e5404fa19d8b..9305469824e9 100644 --- a/arch/arm64/boot/dts/qcom/sdmshrike-coresight.dtsi +++ b/arch/arm64/boot/dts/qcom/sdmshrike-coresight.dtsi @@ -209,6 +209,14 @@ <&funnel_qatb_out_funnel_in0>; }; }; + + port@2 { + reg = <7>; + funnel_in0_in_stm: endpoint { + slave-mode; + remote-endpoint = <&stm_out_funnel_in0>; + }; + }; }; }; @@ -1292,4 +1300,25 @@ }; }; }; + + stm: stm@6002000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0003b962>; + + reg = <0x6002000 0x1000>, + <0x16280000 0x180000>, + <0x7820f0 0x4>; + reg-names = "stm-base", "stm-stimulus-base", "stm-debug-status"; + + coresight-name = "coresight-stm"; + + clocks = <&clock_aop QDSS_CLK>; + clock-names = "apb_pclk"; + + port { + stm_out_funnel_in0: endpoint { + remote-endpoint = <&funnel_in0_in_stm>; + }; + }; + }; }; From dbfce70cece48c5a5292771226ecec9f60e081cf Mon Sep 17 00:00:00 2001 From: "Jason A. Donenfeld" Date: Thu, 11 Jun 2020 02:17:19 -0600 Subject: [PATCH 055/126] version: bump Signed-off-by: Jason A. Donenfeld --- src/dkms.conf | 2 +- src/version.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/dkms.conf b/src/dkms.conf index d7420f4c6ba0..1136a274a542 100644 --- a/src/dkms.conf +++ b/src/dkms.conf @@ -1,5 +1,5 @@ PACKAGE_NAME="wireguard" -PACKAGE_VERSION="1.0.20200520" +PACKAGE_VERSION="1.0.20200611" AUTOINSTALL=yes BUILT_MODULE_NAME="wireguard" diff --git a/src/version.h b/src/version.h index d29b2e34f0df..b8361d4b38cc 100644 --- a/src/version.h +++ b/src/version.h @@ -1,3 +1,3 @@ #ifndef WIREGUARD_VERSION -#define WIREGUARD_VERSION "1.0.20200520" +#define WIREGUARD_VERSION "1.0.20200611" #endif From 98acb1b5c983a3d6a7c201b911db45be9cf95662 Mon Sep 17 00:00:00 2001 From: Ritesh Kumar Date: Sun, 25 Aug 2019 00:02:38 +0530 Subject: [PATCH 056/126] clk: qcom: mdss: Improve logging for 10nm dsi pll Avoid warning of slave pll unavailable for chipsets not having slave pll. Change-Id: Id32af235f2fbefa4869b5c8236436e8e6ed84d60 Signed-off-by: Ritesh Kumar --- drivers/clk/qcom/mdss/mdss-dsi-pll-10nm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/qcom/mdss/mdss-dsi-pll-10nm.c b/drivers/clk/qcom/mdss/mdss-dsi-pll-10nm.c index ab44b3964f71..e549ef13f578 100644 --- a/drivers/clk/qcom/mdss/mdss-dsi-pll-10nm.c +++ b/drivers/clk/qcom/mdss/mdss-dsi-pll-10nm.c @@ -470,7 +470,7 @@ static void dsi_pll_config_slave(struct mdss_pll_resources *rsc) rsc->slave = NULL; if (!orsc) { - pr_warn("slave PLL unavilable, assuming standalone config\n"); + pr_debug("slave PLL unavilable, assuming standalone config\n"); return; } From 0639025a7cb1fa9c2747c0321efd55e72d84011b Mon Sep 17 00:00:00 2001 From: Sundara Vinayagam Date: Tue, 27 Mar 2018 16:48:53 +0530 Subject: [PATCH 057/126] input: qpnp-power-on: Add a property to force hard-reset offset Some (PON gen2) platforms still use legacy hard-reset offset [7:2] of the PON_RB_SPARE register. Add a DT property to support it. Change-Id: I8fd3434bcc064965b11aaf3e9c7fcbf694145d21 Signed-off-by: Sundara Vinayagam --- Documentation/devicetree/bindings/input/qpnp-power-on.txt | 3 +++ drivers/input/misc/qpnp-power-on.c | 6 +++++- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/input/qpnp-power-on.txt b/Documentation/devicetree/bindings/input/qpnp-power-on.txt index a78f088b7e0e..e13669a6acbd 100644 --- a/Documentation/devicetree/bindings/input/qpnp-power-on.txt +++ b/Documentation/devicetree/bindings/input/qpnp-power-on.txt @@ -116,6 +116,9 @@ Optional properties: configured to support TWM modes. - qcom,pbs-client: Phandle of the PBS client node. Should be defined if 'qcom,support-twm-config' is present. +- qcom,use-legacy-hard-reset-offset Boolean property to support legacy + hard-reset offset of the PON_RB_SPARE register for + some (PON gen2) platforms. Optional Sub-nodes: - qcom,pon_1 ... qcom,pon_n: These PON child nodes correspond to features diff --git a/drivers/input/misc/qpnp-power-on.c b/drivers/input/misc/qpnp-power-on.c index df9fa421072f..d930b6b451b9 100644 --- a/drivers/input/misc/qpnp-power-on.c +++ b/drivers/input/misc/qpnp-power-on.c @@ -242,6 +242,7 @@ struct qpnp_pon { bool resin_pon_reset; ktime_t kpdpwr_last_release_time; struct notifier_block pon_nb; + bool legacy_hard_reset_offset; }; static int pon_ship_mode_en; @@ -423,7 +424,7 @@ int qpnp_pon_set_restart_reason(enum pon_restart_reason reason) if (!pon->store_hard_reset_reason) return 0; - if (is_pon_gen2(pon)) + if (is_pon_gen2(pon) && !pon->legacy_hard_reset_offset) rc = qpnp_pon_masked_write(pon, QPNP_PON_SOFT_RB_SPARE(pon), GENMASK(7, 1), (reason << 1)); else @@ -2416,6 +2417,9 @@ static int qpnp_pon_probe(struct platform_device *pdev) pon->store_hard_reset_reason = of_property_read_bool(dev->of_node, "qcom,store-hard-reset-reason"); + pon->legacy_hard_reset_offset = of_property_read_bool(pdev->dev.of_node, + "qcom,use-legacy-hard-reset-offset"); + if (of_property_read_bool(dev->of_node, "qcom,secondary-pon-reset")) { if (sys_reset) { dev_err(dev, "qcom,system-reset property shouldn't be used along with qcom,secondary-pon-reset property\n"); From c07dc62f3a98e7ddd8855ec093fd01f6b5ae2757 Mon Sep 17 00:00:00 2001 From: Akshay Pandit Date: Thu, 11 Jun 2020 08:21:56 -0700 Subject: [PATCH 058/126] Revert "ARM: dts: msm: Move pil region of ipa fws for SA8155 VM " This reverts commit 731bbd35dd811950d513da70e2002f47895f2023. Change-Id: Id0cc5f69f0f02cfd5af67063d49db22f08060df2 Signed-off-by: Akshay Pandit --- arch/arm64/boot/dts/qcom/sa8155-vm-la.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sa8155-vm-la.dtsi b/arch/arm64/boot/dts/qcom/sa8155-vm-la.dtsi index f15391179db0..edf3146af5e8 100644 --- a/arch/arm64/boot/dts/qcom/sa8155-vm-la.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8155-vm-la.dtsi @@ -30,7 +30,7 @@ pil_ipa_fw_mem: pil_ipa_fw_region { compatible = "removed-dma-pool"; no-map; - reg = <0x0 0x99700000 0x0 0x10000>; + reg = <0x0 0x98700000 0x0 0x10000>; }; pil_ipa_gsi_mem: pil_ipa_gsi_region { From 8e2c8f593f8029d417dab55c4fddf89734c56e1d Mon Sep 17 00:00:00 2001 From: Dundi Raviteja Date: Fri, 22 May 2020 16:52:00 +0530 Subject: [PATCH 059/126] wcnss: Include header file for show_stack() Definition of show_stack() is moved to debug.h in 4.14 kernel. Include sched/debug.h to use this API. Change-Id: I21e5e2b97b3034e9d711a048d4f67f065798fe49 CRs-Fixed: 2708804 Signed-off-by: Dundi Raviteja --- drivers/soc/qcom/wcnss/wcnss_wlan.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/soc/qcom/wcnss/wcnss_wlan.c b/drivers/soc/qcom/wcnss/wcnss_wlan.c index 5ae9596daab4..fba3dc744061 100644 --- a/drivers/soc/qcom/wcnss/wcnss_wlan.c +++ b/drivers/soc/qcom/wcnss/wcnss_wlan.c @@ -39,6 +39,7 @@ #include #include #include +#include #include #include #include From 959a0eb938d708cc1857230416489521ee1aaa0e Mon Sep 17 00:00:00 2001 From: Kassey Li Date: Wed, 20 May 2020 17:43:00 +0530 Subject: [PATCH 060/126] sched: Fix out of bounds issue in for_each_cluster macro [ 31.504753] ================================================================= [ 31.512215] BUG: KASAN: global-out-of-bounds in core_ctl_set_boost+0x554/0x558 [ 31.519637] Read of size 4 at addr ffffffd0327c18f4 by task init/456 [ 31.526160] [ 31.527707] CPU: 1 PID: 456 Comm: init Tainted: G S W 5.4.12-qgki-debug-gdc9adf3559a6-dirty #25 [ 31.537793] Hardware name: Qualcomm Technologies, Inc. 8350 venus (DT) [ 31.544499] Call trace: [ 31.547026] dump_backtrace+0x0/0x2e0 [ 31.550797] show_stack+0x14/0x20 [ 31.554220] dump_stack+0xf0/0x144 [ 31.557732] print_address_description.isra.7+0x3c/0x3d8 [ 31.563190] __kasan_report+0x158/0x23c [ 31.567144] kasan_report+0xc/0x18 [ 31.570649] __asan_report_load4_noabort+0x18/0x20 [ 31.575572] core_ctl_set_boost+0x554/0x558 [ 31.579881] z3d22747cee+0x14/0x58 [ 31.583385] z991cee001b+0x884/0xd70 [ 31.587071] sched_boost_handler+0xe4/0x108 [ 31.591381] proc_sys_call_handler+0x384/0x420 [ 31.595954] proc_sys_write+0x10/0x18 [ 31.599728] __vfs_write+0x54/0xe8 [ 31.603232] vfs_write+0x15c/0x430 [ 31.606736] ksys_write+0xe8/0x1c0 [ 31.610241] __arm64_sys_write+0x68/0x98 [ 31.614282] el0_svc_common.constprop.0+0x1c0/0x370 [ 31.619302] el0_svc_handler+0xd4/0x178 [ 31.623257] el0_svc+0x8/0xc Change-Id: I71e71d61e080c1ce948bd0400f9ebb0705a2210b Signed-off-by: Kassey Li Signed-off-by: Lingutla Chandrasekhar --- kernel/sched/core_ctl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/kernel/sched/core_ctl.c b/kernel/sched/core_ctl.c index 40734c356c96..da18b81348af 100644 --- a/kernel/sched/core_ctl.c +++ b/kernel/sched/core_ctl.c @@ -74,8 +74,8 @@ static struct cluster_data cluster_state[MAX_CLUSTERS]; static unsigned int num_clusters; #define for_each_cluster(cluster, idx) \ - for ((cluster) = &cluster_state[idx]; (idx) < num_clusters;\ - (idx)++, (cluster) = &cluster_state[idx]) + for (; (idx) < num_clusters && ((cluster) = &cluster_state[idx]);\ + (idx)++) static DEFINE_SPINLOCK(state_lock); static void apply_need(struct cluster_data *state); From e9bebdf08cb6289b1f27cdd8b12143d216d942f3 Mon Sep 17 00:00:00 2001 From: Lipsa Rout Date: Fri, 12 Jun 2020 00:25:38 +0530 Subject: [PATCH 061/126] drm/msm/dsi-staging: Set transfer time to zero as per mode of timing node Currently, mdp_transfer_time_us is being set to zero for video mode panels. This leads to zero mdp_transfer_time_us for command mode in case of video mode panels supporting panel operating mode switch. As a result, there is miscalculation of clock to zero when command mode doesn't support dynamic clock switch. This change sets the mdp_transfer_time_us to zero for video modes. Change-Id: I6e798125921db9ea2d76b76853a28cd981747617 Signed-off-by: Lipsa Rout --- drivers/gpu/drm/msm/dsi-staging/dsi_panel.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c b/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c index df1fe38a81f0..5d510f492ed4 100644 --- a/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c +++ b/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c @@ -3637,9 +3637,6 @@ int dsi_panel_get_mode(struct dsi_panel *panel, goto parse_fail; } - if (panel->panel_mode == DSI_OP_VIDEO_MODE) - mode->priv_info->mdp_transfer_time_us = 0; - rc = dsi_panel_parse_dsc_params(mode, utils); if (rc) { pr_err("failed to parse dsc params, rc=%d\n", rc); @@ -3692,6 +3689,9 @@ int dsi_panel_get_mode(struct dsi_panel *panel, } else { mode->panel_mode = panel->panel_mode; } + + if (mode->panel_mode == DSI_OP_VIDEO_MODE) + mode->priv_info->mdp_transfer_time_us = 0; } goto done; From 3b449fb6a5926dd3731cfaad4bb24b2dd8545174 Mon Sep 17 00:00:00 2001 From: Vishwanath Raju K Date: Wed, 29 Apr 2020 21:12:14 +0530 Subject: [PATCH 062/126] ARM: dts: msm: update to memory map v1 for QCS610 and QCS410 Memory map of qcs610 and qcs410 has been changed,these changes are mainly in pil subsystem. Change-Id: Ifae0d6b65d3012a2068651738d22f5d84ef7cce2 Signed-off-by: Vishwanath Raju K --- arch/arm64/boot/dts/qcom/qcs410-iot.dtsi | 30 +++++++++++++++++++++++- arch/arm64/boot/dts/qcom/qcs610-iot.dtsi | 28 ++++++++++++++++++++++ 2 files changed, 57 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/qcs410-iot.dtsi b/arch/arm64/boot/dts/qcom/qcs410-iot.dtsi index 96fb1d37b317..8442845503e8 100644 --- a/arch/arm64/boot/dts/qcom/qcs410-iot.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs410-iot.dtsi @@ -1,4 +1,4 @@ -/* Copyright (c) 2020, The Linux Foundation. All rights reserved. +/* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -185,6 +185,34 @@ reg = <0 0x8fd00000 0 0x3100000>; }; +&pil_video_mem { + reg = <0 0x92e00000 0 0x500000>; +}; + +&wlan_msa_mem { + reg = <0 0x93300000 0 0x200000>; +}; + +&pil_cdsp_mem { + reg = <0 0x93500000 0 0x1e00000>; +}; + +&pil_adsp_mem { + reg = <0 0x95300000 0 0x1e00000>; +}; + +&pil_ipa_fw_mem { + reg = <0 0x97100000 0 0x10000>; +}; + +&pil_ipa_gsi_mem { + reg = <0 0x97110000 0 0x5000>; +}; + +&pil_gpu_mem { + reg = <0 0x97115000 0 0x2000>; +}; + &L16A { regulator-max-microvolt = <3304000>; }; diff --git a/arch/arm64/boot/dts/qcom/qcs610-iot.dtsi b/arch/arm64/boot/dts/qcom/qcs610-iot.dtsi index 63a8139732ba..0486fd6dbcec 100644 --- a/arch/arm64/boot/dts/qcom/qcs610-iot.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs610-iot.dtsi @@ -275,6 +275,34 @@ reg = <0 0x8fd00000 0 0x3100000>; }; +&pil_video_mem { + reg = <0 0x92e00000 0 0x500000>; +}; + +&wlan_msa_mem { + reg = <0 0x93300000 0 0x200000>; +}; + +&pil_cdsp_mem { + reg = <0 0x93500000 0 0x1e00000>; +}; + +&pil_adsp_mem { + reg = <0 0x95300000 0 0x1e00000>; +}; + +&pil_ipa_fw_mem { + reg = <0 0x97100000 0 0x10000>; +}; + +&pil_ipa_gsi_mem { + reg = <0 0x97110000 0 0x5000>; +}; + +&pil_gpu_mem { + reg = <0 0x97115000 0 0x2000>; +}; + &sdhc_1 { vdd-supply = <&pm6150l_l11>; qcom,vdd-voltage-level = <2950000 2950000>; From fe1695be5ac76e973f0fd1d7cfd0177e4422ec55 Mon Sep 17 00:00:00 2001 From: Prudhvi Yarlagadda Date: Wed, 10 Jun 2020 17:57:38 +0530 Subject: [PATCH 063/126] ARM: dts: msm: Correct the spi pinctrl active node name Correct the name of the spi dtsi node pinctrl active property. Change-Id: Iad71a412cda96c3f2d6d087deeba086d7895778e Signed-off-by: Prudhvi Yarlagadda --- arch/arm64/boot/dts/qcom/sdm429-blsp.dtsi | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm429-blsp.dtsi b/arch/arm64/boot/dts/qcom/sdm429-blsp.dtsi index 61a2fc581993..06f9e76d7983 100644 --- a/arch/arm64/boot/dts/qcom/sdm429-blsp.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm429-blsp.dtsi @@ -152,7 +152,7 @@ qcom,bam-producer-pipe-index = <5>; qcom,master-id = <86>; qcom,use-pinctrl; - pinctrl-names = "spi_active", "spi_sleep"; + pinctrl-names = "spi_default", "spi_sleep"; pinctrl-0 = <&spi_1_active>; pinctrl-1 = <&spi_1_sleep>; clock-names = "iface_clk", "core_clk"; @@ -178,7 +178,7 @@ qcom,bam-producer-pipe-index = <7>; qcom,master-id = <86>; qcom,use-pinctrl; - pinctrl-names = "spi_active", "spi_sleep"; + pinctrl-names = "spi_default", "spi_sleep"; pinctrl-0 = <&spi_2_active>; pinctrl-1 = <&spi_2_sleep>; clock-names = "iface_clk", "core_clk"; @@ -204,7 +204,7 @@ qcom,bam-producer-pipe-index = <9>; qcom,master-id = <86>; qcom,use-pinctrl; - pinctrl-names = "spi_active", "spi_sleep"; + pinctrl-names = "spi_default", "spi_sleep"; pinctrl-0 = <&spi_3_active>; pinctrl-1 = <&spi_3_sleep>; clock-names = "iface_clk", "core_clk"; @@ -230,7 +230,7 @@ qcom,bam-producer-pipe-index = <11>; qcom,master-id = <86>; qcom,use-pinctrl; - pinctrl-names = "spi_active", "spi_sleep"; + pinctrl-names = "spi_default", "spi_sleep"; pinctrl-0 = <&spi_4_active>; pinctrl-1 = <&spi_4_sleep>; clock-names = "iface_clk", "core_clk"; @@ -393,7 +393,7 @@ qcom,bam-producer-pipe-index = <5>; qcom,master-id = <84>; qcom,use-pinctrl; - pinctrl-names = "spi_active", "spi_sleep"; + pinctrl-names = "spi_default", "spi_sleep"; pinctrl-0 = <&spi_5_active>; pinctrl-1 = <&spi_5_sleep>; clock-names = "iface_clk", "core_clk"; @@ -419,7 +419,7 @@ qcom,bam-producer-pipe-index = <7>; qcom,master-id = <84>; qcom,use-pinctrl; - pinctrl-names = "spi_active", "spi_sleep"; + pinctrl-names = "spi_default", "spi_sleep"; pinctrl-0 = <&spi_6_active>; pinctrl-1 = <&spi_6_sleep>; clock-names = "iface_clk", "core_clk"; @@ -445,7 +445,7 @@ qcom,bam-producer-pipe-index = <9>; qcom,master-id = <84>; qcom,use-pinctrl; - pinctrl-names = "spi_active", "spi_sleep"; + pinctrl-names = "spi_default", "spi_sleep"; pinctrl-0 = <&spi_7_active>; pinctrl-1 = <&spi_7_sleep>; clock-names = "iface_clk", "core_clk"; @@ -471,7 +471,7 @@ qcom,bam-producer-pipe-index = <11>; qcom,master-id = <84>; qcom,use-pinctrl; - pinctrl-names = "spi_active", "spi_sleep"; + pinctrl-names = "spi_default", "spi_sleep"; pinctrl-0 = <&spi_8_active>; pinctrl-1 = <&spi_8_sleep>; clock-names = "iface_clk", "core_clk"; From fec255408d0d03b016a10caf14423b370a5272df Mon Sep 17 00:00:00 2001 From: Gopala Krishna Nuthaki Date: Mon, 15 Jun 2020 11:58:59 +0530 Subject: [PATCH 064/126] ARM: dts: msm: Add a flag to enable TSENS re-init Add a boolean flag to enable the re-initialization of TSENS controller when goes to bad state while reading temperature for sdmmagpie. Change-Id: I3458cc71f9f941d0493fd6eb1663697e1d792f90 Signed-off-by: Ajay Prathi Signed-off-by: Gopala Krishna Nuthaki --- arch/arm64/boot/dts/qcom/sdmmagpie.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdmmagpie.dtsi b/arch/arm64/boot/dts/qcom/sdmmagpie.dtsi index e5d0292f5518..86098aa8ccba 100644 --- a/arch/arm64/boot/dts/qcom/sdmmagpie.dtsi +++ b/arch/arm64/boot/dts/qcom/sdmmagpie.dtsi @@ -1470,6 +1470,7 @@ "tsens_tm_physical"; interrupts = <0 506 0>, <0 508 0>; interrupt-names = "tsens-upper-lower", "tsens-critical"; + tsens-reinit-wa; #thermal-sensor-cells = <1>; }; @@ -1481,6 +1482,7 @@ "tsens_tm_physical"; interrupts = <0 507 0>, <0 509 0>; interrupt-names = "tsens-upper-lower", "tsens-critical"; + tsens-reinit-wa; #thermal-sensor-cells = <1>; }; From 20b8d6cad37491a5d4d22566c7747502f7b9c190 Mon Sep 17 00:00:00 2001 From: Sneh Shah Date: Mon, 13 Apr 2020 11:38:40 +0530 Subject: [PATCH 065/126] net: stmmac: read descriptor count for IPA rx/tx from dt entry Add support to read descriptor count for IPA ch from dt entry. Change-Id: Ice9a4034275904abef374800c99b01abce44c908 Signed-off-by: Sneh Shah --- .../ethernet/stmicro/stmmac/dwmac-qcom-ipa.c | 26 ++++++++++++++++--- .../ethernet/stmicro/stmmac/dwmac-qcom-ipa.h | 7 +++-- 2 files changed, 27 insertions(+), 6 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ipa.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ipa.c index 3abe32c5842d..b0f23d70fe87 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ipa.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ipa.c @@ -95,7 +95,7 @@ static int ethqos_alloc_ipa_tx_queue_struct(struct qcom_ethqos *ethqos) goto err_out_tx_q_alloc_failed; } - eth_ipa_ctx.tx_queue->desc_cnt = IPA_TX_DESC_CNT; + eth_ipa_ctx.tx_queue->desc_cnt = eth_ipa_ctx.ipa_dma_tx_desc_cnt; /* Allocate tx_desc_ptrs */ eth_ipa_ctx.tx_queue->tx_desc_ptrs = @@ -224,7 +224,7 @@ static int ethqos_alloc_ipa_rx_queue_struct(struct qcom_ethqos *ethqos) goto err_out_rx_q_alloc_failed; } - eth_ipa_ctx.rx_queue->desc_cnt = IPA_RX_DESC_CNT; + eth_ipa_ctx.rx_queue->desc_cnt = eth_ipa_ctx.ipa_dma_rx_desc_cnt; /* Allocate rx_desc_ptrs */ eth_ipa_ctx.rx_queue->rx_desc_ptrs = @@ -1630,8 +1630,8 @@ static int ethqos_ipa_create_debugfs(struct qcom_ethqos *ethqos) debugfs_create_file("dma_stats", 0600, ethqos->debugfs_dir, ethqos, &fops_ntn_dma_stats); - if (!eth_ipa->debugfs_suspend_ipa_offload || - IS_ERR(eth_ipa->debugfs_suspend_ipa_offload)) { + if (!eth_ipa->debugfs_dma_stats || + IS_ERR(eth_ipa->debugfs_dma_stats)) { ETHQOSERR("Cannot create debugfs_dma_stats %d\n", (int)eth_ipa->debugfs_dma_stats); goto fail; @@ -2159,11 +2159,29 @@ static int ethqos_ipa_uc_ready(struct qcom_ethqos *pdata) void ethqos_ipa_offload_event_handler(void *data, int ev) { + int ret; ETHQOSDBG("Enter: event=%d\n", ev); if (ev == EV_PROBE_INIT) { eth_ipa_ctx.ethqos = data; mutex_init(ð_ipa_ctx.ipa_lock); + ret = + of_property_read_u32(eth_ipa_ctx.ethqos->pdev->dev.of_node, + "ipa-dma-rx-desc-cnt", + ð_ipa_ctx.ipa_dma_rx_desc_cnt); + if (ret) { + ETHQOSDBG(":resource ipa-dma-rx-desc-cnt not in dt\n"); + eth_ipa_ctx.ipa_dma_rx_desc_cnt = IPA_RX_DESC_CNT; + } + + ret = + of_property_read_u32(eth_ipa_ctx.ethqos->pdev->dev.of_node, + "ipa-dma-tx-desc-cnt", + ð_ipa_ctx.ipa_dma_tx_desc_cnt); + if (ret) { + ETHQOSDBG(":resource ipa-dma-tx-desc-cnt not in dt\n"); + eth_ipa_ctx.ipa_dma_tx_desc_cnt = IPA_TX_DESC_CNT; + } return; } diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ipa.h b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ipa.h index fd6dd0b2a335..419f54da1b75 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ipa.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ipa.h @@ -79,8 +79,8 @@ static char * const IPA_OFFLOAD_EVENT_string[] = { #define ETHQOS_ETH_FRAME_LEN_IPA ((1 << 11)) /*IPA can support 2KB max length*/ -#define IPA_TX_DESC_CNT 128 /*Increase TX desc count to 128 for IPA offload*/ -#define IPA_RX_DESC_CNT 128 /*Increase RX desc count to 128 for IPA offload*/ +#define IPA_TX_DESC_CNT 128 /*Default TX desc count to 128 for IPA offload*/ +#define IPA_RX_DESC_CNT 128 /*Default RX desc count to 128 for IPA offload*/ #define BASE_ADDRESS (ethqos->ioaddr) @@ -647,6 +647,9 @@ struct ethqos_prv_ipa_data { phys_addr_t uc_db_tx_addr; u32 ipa_client_hndl; + u32 ipa_dma_tx_desc_cnt; + u32 ipa_dma_rx_desc_cnt; + /* IPA state variables */ /* State of EMAC HW initialization */ bool emac_dev_ready; From 1f4ad9270d25ae912790fe2e76183fc27d5d3dc8 Mon Sep 17 00:00:00 2001 From: "Jason A. Donenfeld" Date: Mon, 15 Jun 2020 16:41:10 -0600 Subject: [PATCH 066/126] compat: drop centos 8.1 support as 8.2 is now out Signed-off-by: Jason A. Donenfeld --- src/compat/compat.h | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/src/compat/compat.h b/src/compat/compat.h index 060ad6949d19..cd1773a7cb33 100644 --- a/src/compat/compat.h +++ b/src/compat/compat.h @@ -16,9 +16,6 @@ #define ISRHEL7 #elif RHEL_MAJOR == 8 #define ISRHEL8 -#if RHEL_MINOR == 1 -#define ISCENTOS8 -#endif #endif #endif #ifdef UTS_UBUNTU_RELEASE_ABI @@ -94,7 +91,7 @@ #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 17, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(3, 16, 83) #define ipv6_dst_lookup_flow(a, b, c, d) ipv6_dst_lookup_flow(b, c, d) -#elif (LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 5) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(5, 3, 18) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 20, 0) && !defined(ISUBUNTU1904)) || ((!defined(ISRHEL8) || defined(ISCENTOS8)) && !defined(ISDEBIAN) && !defined(ISUBUNTU1804) && LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 119) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 15, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(4, 14, 181) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 10, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(4, 9, 224) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 5, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 224) && !defined(ISUBUNTU1604)) +#elif (LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 5) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(5, 3, 18) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 20, 0) && !defined(ISUBUNTU1904)) || (!defined(ISRHEL8) && !defined(ISDEBIAN) && !defined(ISUBUNTU1804) && LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 119) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 15, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(4, 14, 181) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 10, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(4, 9, 224) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 5, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 224) && !defined(ISUBUNTU1604)) #define ipv6_dst_lookup_flow(a, b, c, d) ipv6_dst_lookup(a, b, &dst, c) + (void *)0 ?: dst #endif @@ -785,7 +782,7 @@ struct __kernel_timespec { #endif #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 1, 0) && (!defined(ISRHEL8) || defined(ISCENTOS8)) +#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 1, 0) && !defined(ISRHEL8) #include #define skb_probe_transport_header(a) skb_probe_transport_header(a, 0) #endif @@ -794,7 +791,7 @@ struct __kernel_timespec { #define ignore_df local_df #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 1, 0) && (!defined(ISRHEL8) || defined(ISCENTOS8)) +#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 1, 0) && !defined(ISRHEL8) /* Note that all intentional uses of the non-_bh variety need to explicitly * undef these, conditionalized on COMPAT_CANNOT_DEPRECIATE_BH_RCU. */ @@ -836,7 +833,7 @@ static inline void skb_mark_not_on_list(struct sk_buff *skb) #if LINUX_VERSION_CODE < KERNEL_VERSION(4, 20, 0) && !defined(ISRHEL8) #define NLA_EXACT_LEN NLA_UNSPEC #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 2, 0) && (!defined(ISRHEL8) || defined(ISCENTOS8)) +#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 2, 0) && !defined(ISRHEL8) #define NLA_MIN_LEN NLA_UNSPEC #define COMPAT_CANNOT_INDIVIDUAL_NETLINK_OPS_POLICY #endif From 692bb300ed2f4a8447742da7955082dae2d7618d Mon Sep 17 00:00:00 2001 From: Sunil Paidimarri Date: Tue, 2 Jun 2020 11:30:49 -0700 Subject: [PATCH 067/126] net: stmmac: Fix type casting for tlmm addr Fix type casting for tlmm addr. Change-Id: I3244ab394db6fef3d78cba6c17ffb9a12534d4cb Acked-by: Rahul Kawadgave Signed-off-by: Sunil Paidimarri --- drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c index f1626e102e50..671906b04af1 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c @@ -30,7 +30,7 @@ #include "stmmac_ptp.h" #include "dwmac-qcom-ipa-offload.h" -static unsigned long tlmm_central_base_addr; +static void __iomem *tlmm_central_base_addr; bool phy_intr_en; struct qcom_ethqos *pethqos; @@ -1417,9 +1417,9 @@ static int ethqos_update_rgmii_tx_drv_strength(struct qcom_ethqos *ethqos) ETHQOSDBG("tlmm_central_base = 0x%x, size = 0x%x\n", tlmm_central_base, tlmm_central_size); - tlmm_central_base_addr = (unsigned long)ioremap( + tlmm_central_base_addr = ioremap( tlmm_central_base, tlmm_central_size); - if ((void __iomem *)!tlmm_central_base_addr) { + if (!tlmm_central_base_addr) { ETHQOSERR("cannot map dwc_tlmm_central reg memory, aborting\n"); ret = -EIO; goto err_out; @@ -1459,7 +1459,7 @@ static int ethqos_update_rgmii_tx_drv_strength(struct qcom_ethqos *ethqos) err_out: if (tlmm_central_base_addr) - iounmap((void __iomem *)tlmm_central_base_addr); + iounmap(tlmm_central_base_addr); return ret; } From 8da9587b76c6743c54e60dcb719ce8d27a7b8c01 Mon Sep 17 00:00:00 2001 From: Sunil Paidimarri Date: Wed, 6 May 2020 11:06:57 -0700 Subject: [PATCH 068/126] defconfig: sa2150p: Enable STMMAC driver Enable STMMAC driver for EMAC HW. Change-Id: Id53ac552e477da0e321f5b64060938bf481176ae Acked-by: Rahul Kawadgave Signed-off-by: Sunil Paidimarri --- arch/arm64/configs/vendor/sa2150p-perf_defconfig | 4 +++- arch/arm64/configs/vendor/sa2150p_defconfig | 4 +++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm64/configs/vendor/sa2150p-perf_defconfig b/arch/arm64/configs/vendor/sa2150p-perf_defconfig index 1effd0037e87..f5e65eed857b 100644 --- a/arch/arm64/configs/vendor/sa2150p-perf_defconfig +++ b/arch/arm64/configs/vendor/sa2150p-perf_defconfig @@ -249,6 +249,9 @@ CONFIG_DM_VERITY_FEC=y CONFIG_NETDEVICES=y CONFIG_DUMMY=y CONFIG_TUN=y +CONFIG_STMMAC_ETH=y +# CONFIG_DWMAC_GENERIC is not set +# CONFIG_DWMAC_IPQ806X is not set CONFIG_AT803X_PHY=y CONFIG_MICREL_PHY=y CONFIG_PPP=y @@ -290,7 +293,6 @@ CONFIG_SPI_QUP=y CONFIG_SPMI=y CONFIG_SLIMBUS_MSM_NGD=y CONFIG_PPS_CLIENT_GPIO=y -CONFIG_PTP_1588_CLOCK=y CONFIG_PINCTRL_QCS405=y CONFIG_FRAGMENTED_GPIO_ADDRESS_SPACE=y CONFIG_PINCTRL_QCOM_SPMI_PMIC=y diff --git a/arch/arm64/configs/vendor/sa2150p_defconfig b/arch/arm64/configs/vendor/sa2150p_defconfig index 74fdcd58b816..3ed8ba7dce30 100644 --- a/arch/arm64/configs/vendor/sa2150p_defconfig +++ b/arch/arm64/configs/vendor/sa2150p_defconfig @@ -255,6 +255,9 @@ CONFIG_DM_VERITY_FEC=y CONFIG_NETDEVICES=y CONFIG_DUMMY=y CONFIG_TUN=y +CONFIG_STMMAC_ETH=y +# CONFIG_DWMAC_GENERIC is not set +# CONFIG_DWMAC_IPQ806X is not set CONFIG_AT803X_PHY=y CONFIG_MICREL_PHY=y CONFIG_PPP=y @@ -300,7 +303,6 @@ CONFIG_SPMI=y CONFIG_SPMI_MSM_PMIC_ARB_DEBUG=y CONFIG_SLIMBUS_MSM_NGD=y CONFIG_PPS_CLIENT_GPIO=y -CONFIG_PTP_1588_CLOCK=y CONFIG_PINCTRL_QCS405=y CONFIG_FRAGMENTED_GPIO_ADDRESS_SPACE=y CONFIG_PINCTRL_QCOM_SPMI_PMIC=y From bcec534d22ddace156bded0bf401d59943a4c634 Mon Sep 17 00:00:00 2001 From: Ajay Prathi Date: Tue, 2 Jun 2020 10:58:56 +0530 Subject: [PATCH 069/126] msm: ep_pcie: Update bit to read if the PHY is ready Update status bit to check if PHY is ready. Change-Id: I39d1c292c1c7a98e155b0ae94103455f5c8b0e3a Signed-off-by: Siddartha Mohanadoss Signed-off-by: Ajay Prathi --- .../devicetree/bindings/pci/msm_ep_pcie.txt | 2 ++ drivers/platform/msm/ep_pcie/ep_pcie_com.h | 1 + drivers/platform/msm/ep_pcie/ep_pcie_core.c | 15 +++++++++++++++ drivers/platform/msm/ep_pcie/ep_pcie_phy.c | 4 ++-- 4 files changed, 20 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/msm_ep_pcie.txt b/Documentation/devicetree/bindings/pci/msm_ep_pcie.txt index 8883f779bcd6..c364f472cc0b 100644 --- a/Documentation/devicetree/bindings/pci/msm_ep_pcie.txt +++ b/Documentation/devicetree/bindings/pci/msm_ep_pcie.txt @@ -48,6 +48,8 @@ Optional Properties: - qcom,phy-init: The initialization sequence to bring up the PCIe PHY. Should be specified in groups (offset, value, delay, direction). - qcom,phy-status-reg: Register offset for PHY status. + - qcom,phy-status-reg2: For sdxprairie and above use only + qcom,phy-status-reg2 as register offset for PHY status. - qcom,dbi-base-reg: Register offset for DBI base address. - qcom,slv-space-reg: Register offset for slave address space size. - qcom,pcie-vendor-id: Vendor id to be written to the Vendor ID register. diff --git a/drivers/platform/msm/ep_pcie/ep_pcie_com.h b/drivers/platform/msm/ep_pcie/ep_pcie_com.h index a6044f85c39d..e77734e1b476 100644 --- a/drivers/platform/msm/ep_pcie/ep_pcie_com.h +++ b/drivers/platform/msm/ep_pcie/ep_pcie_com.h @@ -372,6 +372,7 @@ struct ep_pcie_dev_t { u32 dbi_base_reg; u32 slv_space_reg; u32 phy_status_reg; + u32 phy_status_bit_mask_bit; u32 phy_init_len; u32 mhi_soc_reset_offset; struct ep_pcie_phy_info_t *phy_init; diff --git a/drivers/platform/msm/ep_pcie/ep_pcie_core.c b/drivers/platform/msm/ep_pcie/ep_pcie_core.c index e087bd4c93bf..7372114c6fa8 100644 --- a/drivers/platform/msm/ep_pcie/ep_pcie_core.c +++ b/drivers/platform/msm/ep_pcie/ep_pcie_core.c @@ -3074,6 +3074,21 @@ static int ep_pcie_probe(struct platform_device *pdev) EP_PCIE_DBG(&ep_pcie_dev, "PCIe V%d: phy-status-reg:0x%x\n", ep_pcie_dev.rev, ep_pcie_dev.phy_status_reg); + ep_pcie_dev.phy_status_bit_mask_bit = BIT(6); + + ret = of_property_read_u32((&pdev->dev)->of_node, + "qcom,phy-status-reg2", + &ep_pcie_dev.phy_status_reg); + if (ret) { + EP_PCIE_DBG(&ep_pcie_dev, + "PCIe V%d: phy-status-reg2 does not exist\n", + ep_pcie_dev.rev); + } else { + EP_PCIE_DBG(&ep_pcie_dev, "PCIe V%d: phy-status-reg2:0x%x\n", + ep_pcie_dev.rev, ep_pcie_dev.phy_status_reg); + ep_pcie_dev.phy_status_bit_mask_bit = BIT(7); + } + ep_pcie_dev.phy_rev = 1; ret = of_property_read_u32((&pdev->dev)->of_node, "qcom,pcie-phy-ver", diff --git a/drivers/platform/msm/ep_pcie/ep_pcie_phy.c b/drivers/platform/msm/ep_pcie/ep_pcie_phy.c index 89562ef33cea..0b95947ba3d9 100644 --- a/drivers/platform/msm/ep_pcie/ep_pcie_phy.c +++ b/drivers/platform/msm/ep_pcie/ep_pcie_phy.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. +/* Copyright (c) 2015-2018, 2019-2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -158,7 +158,7 @@ bool ep_pcie_phy_is_ready(struct ep_pcie_dev_t *dev) else offset = PCIE_PHY_PCS_STATUS; - if (readl_relaxed(dev->phy + offset) & BIT(6)) + if (readl_relaxed(dev->phy + offset) & dev->phy_status_bit_mask_bit) return false; else return true; From 38346899188a424a6eeac683249ab87fe60965cc Mon Sep 17 00:00:00 2001 From: Rishi Gupta Date: Sun, 14 Jun 2020 17:22:30 +0530 Subject: [PATCH 070/126] ARM: dts: msm: add override nodes for SA515M CDP board This commit adds device tree overrides for PMIC, thermal, USB, SPMI, NAND and UART as applicable for SA515M CDP platform for telematics. Change-Id: I122a03d2d4093f467912dab81ed6ea378845f26b Signed-off-by: Rishi Gupta --- .../boot/dts/qcom/sdxprairie-v2-dsda-cdp.dts | 45 ++++++++++++++++++- 1 file changed, 43 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdxprairie-v2-dsda-cdp.dts b/arch/arm64/boot/dts/qcom/sdxprairie-v2-dsda-cdp.dts index af338a7787c5..81dfac855db4 100644 --- a/arch/arm64/boot/dts/qcom/sdxprairie-v2-dsda-cdp.dts +++ b/arch/arm64/boot/dts/qcom/sdxprairie-v2-dsda-cdp.dts @@ -16,9 +16,50 @@ #include "sdxprairie-cdp.dtsi" / { - model = "Qualcomm Technologies, Inc. SDXPRAIRIE v2 CDP - TELEMATICS AU DSDA"; + model = "Qualcomm Technologies, Inc. SDXPRAIRIE v2 CDP TEL AU DSDA"; compatible = "qcom,sdxprairie-cdp", "qcom,sdxprairie", "qcom,cdp"; qcom,board-id = <0x6010001 0x0>; }; + +/* delete pm8150b nodes */ +&thermal_zones { + /delete-node/ pm8150b-wp-therm; + /delete-node/ pm8150b_tz; + /delete-node/ pm8150b-ibat-lvl0; + /delete-node/ pm8150b-ibat-lvl1; + /delete-node/ pm8150b-vbat-lvl0; + /delete-node/ pm8150b-vbat-lvl1; + /delete-node/ pm8150b-vbat-lvl2; + /delete-node/ pm8150b-bcl-lvl0; + /delete-node/ pm8150b-bcl-lvl1; + /delete-node/ pm8150b-bcl-lvl2; + /delete-node/ soc; +}; + +&usb { + extcon = <&vbus_detect>; +}; + +&spmi_bus { + /delete-node/ qpnp,fg; + /delete-node/ bcl@1d00; + /delete-node/ qcom,usb-pdphy@1700; + /delete-node/ qcom,qpnp-smb5; + /delete-node/ adc_tm@3500; + /delete-node/ vadc@3100; + /delete-node/ qcom,pm8150b@2; + /delete-node/ qcom,pm8150b@3; +}; + +&qnand_1 { + status = "ok"; +}; + +&blsp1_uart2b_hs { + status = "okay"; +}; + +&vbus_detect { + status = "okay"; +}; From e5bb061e21cf18db30086a32c9c17412eb9a318e Mon Sep 17 00:00:00 2001 From: Lipsa Rout Date: Tue, 16 Jun 2020 10:34:58 +0530 Subject: [PATCH 071/126] disp: msm: dsi: Add support to skip constant fps for command mode VFP or HFP is adjusted to achieve constant fps during dynamic DSI clock switch. This feature is not supported for command mode. So, add check to skip porch calculation for command mode. Change-Id: I5fa76d6536a55b2a19f24c0e14b6861e1f4c8f25 Signed-off-by: Lipsa Rout --- drivers/gpu/drm/msm/dsi-staging/dsi_display.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_display.c b/drivers/gpu/drm/msm/dsi-staging/dsi_display.c index 0342dc80ee99..61ea8fd89b84 100644 --- a/drivers/gpu/drm/msm/dsi-staging/dsi_display.c +++ b/drivers/gpu/drm/msm/dsi-staging/dsi_display.c @@ -6127,6 +6127,10 @@ static void dsi_display_adjust_mode_timing(struct dsi_display *display, struct dsi_dyn_clk_caps *dyn_clk_caps; u32 bits_per_symbol = 16, num_of_symbols = 7; /* For Cphy */ + /* Constant FPS is not supported on command mode */ + if (dsi_mode->panel_mode == DSI_OP_CMD_MODE) + return; + dyn_clk_caps = &(display->panel->dyn_clk_caps); if (!dyn_clk_caps->maintain_const_fps) return; From 7102e74c11806696a3982ddd32445e57838babba Mon Sep 17 00:00:00 2001 From: Lipsa Rout Date: Tue, 16 Jun 2020 10:24:15 +0530 Subject: [PATCH 072/126] disp: msm: dsi: Fix the total number of modes calculation This change updates the parsing of timing nodes to check the mode of operation as video or command. In command mode, for each timing node, num of supported dfps rate is always one. Accordingly, update the num_dfps_rate to 1 for command mode. Change-Id: I5098c7e0d4d2320609d6e10031eaef78c1d8b3c1 Signed-off-by: Lipsa Rout --- drivers/gpu/drm/msm/dsi-staging/dsi_display.c | 5 +++-- drivers/gpu/drm/msm/dsi-staging/dsi_panel.c | 6 ++---- 2 files changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_display.c b/drivers/gpu/drm/msm/dsi-staging/dsi_display.c index 0342dc80ee99..aac41b4cbe40 100644 --- a/drivers/gpu/drm/msm/dsi-staging/dsi_display.c +++ b/drivers/gpu/drm/msm/dsi-staging/dsi_display.c @@ -6295,8 +6295,6 @@ int dsi_display_get_modes(struct dsi_display *display, dyn_clk_caps = &(display->panel->dyn_clk_caps); - num_dfps_rates = !dfps_caps.dfps_support ? 1 : dfps_caps.dfps_list_len; - timing_mode_count = display->panel->num_timing_nodes; for (mode_idx = 0; mode_idx < timing_mode_count; mode_idx++) { @@ -6319,6 +6317,9 @@ int dsi_display_get_modes(struct dsi_display *display, is_cmd_mode = (display_mode.panel_mode == DSI_OP_CMD_MODE); + num_dfps_rates = ((!dfps_caps.dfps_support || + is_cmd_mode) ? 1 : dfps_caps.dfps_list_len); + is_split_link = host->split_link.split_link_enabled; sublinks_count = host->split_link.num_sublinks; if (is_split_link && sublinks_count > 1) { diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c b/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c index e0a0b049043a..b9dfe7f79926 100644 --- a/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c +++ b/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c @@ -3500,7 +3500,6 @@ int dsi_panel_get_mode_count(struct dsi_panel *panel) int num_dfps_rates, num_bit_clks; int num_video_modes = 0, num_cmd_modes = 0; int count, rc = 0; - void *utils_data = NULL; if (!panel) { pr_err("invalid params\n"); @@ -3537,10 +3536,9 @@ int dsi_panel_get_mode_count(struct dsi_panel *panel) panel->num_timing_nodes = count; dsi_for_each_child_node(timings_np, child_np) { - utils_data = child_np; - if (utils->read_bool(utils->data, "qcom,mdss-dsi-video-mode")) + if (utils->read_bool(child_np, "qcom,mdss-dsi-video-mode")) num_video_modes++; - else if (utils->read_bool(utils->data, + else if (utils->read_bool(child_np, "qcom,mdss-dsi-cmd-mode")) num_cmd_modes++; else if (panel->panel_mode == DSI_OP_VIDEO_MODE) From 18e258f7365b3b0ca89a1aae843ec9ad2294b936 Mon Sep 17 00:00:00 2001 From: Lipsa Rout Date: Tue, 16 Jun 2020 10:32:28 +0530 Subject: [PATCH 073/126] disp: msm: dsi: Update mode population logic for POMS feature This change adds support to populate one command mode for video mode panels supporting panel operating mode switch feature. Change-Id: I850b889ebfa8c2ee1406ad946061b96143537b09 Signed-off-by: Lipsa Rout --- drivers/gpu/drm/msm/dsi-staging/dsi_display.c | 11 +++++++++-- drivers/gpu/drm/msm/dsi-staging/dsi_panel.c | 18 +++++++++++++++--- 2 files changed, 24 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_display.c b/drivers/gpu/drm/msm/dsi-staging/dsi_display.c index aac41b4cbe40..868fe3f844e5 100644 --- a/drivers/gpu/drm/msm/dsi-staging/dsi_display.c +++ b/drivers/gpu/drm/msm/dsi-staging/dsi_display.c @@ -6372,9 +6372,16 @@ int dsi_display_get_modes(struct dsi_display *display, } end = array_idx; /* - * if dynamic clk switch is supported then update all the bit - * clk rates. + * if POMS is enabled and boot up mode is video mode, + * skip bit clk rates update for command mode, + * else if dynamic clk switch is supported then update all + * the bit clk rates. */ + + if (is_cmd_mode && + (display->panel->panel_mode == DSI_OP_VIDEO_MODE)) + continue; + _dsi_display_populate_bit_clks(display, start, end, &array_idx); } diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c b/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c index b9dfe7f79926..a5e98e1656d5 100644 --- a/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c +++ b/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c @@ -3553,9 +3553,21 @@ int dsi_panel_get_mode_count(struct dsi_panel *panel) num_bit_clks = !panel->dyn_clk_caps.dyn_clk_support ? 1 : panel->dyn_clk_caps.bit_clk_list_len; - /* Inflate num_of_modes by fps and bit clks in dfps */ - panel->num_display_modes = (num_cmd_modes * num_bit_clks) + - (num_video_modes * num_bit_clks * num_dfps_rates); + /* + * Inflate num_of_modes by fps and bit clks in dfps + * Single command mode for video mode panels supporting + * panel operating mode switch. + */ + + num_video_modes = num_video_modes * num_bit_clks * num_dfps_rates; + + if ((panel->panel_mode == DSI_OP_VIDEO_MODE) && + (panel->panel_mode_switch_enabled)) + num_cmd_modes = 1; + else + num_cmd_modes = num_cmd_modes * num_bit_clks; + + panel->num_display_modes = num_video_modes + num_cmd_modes; error: return rc; From e0259f65113136d4e216d987310e584de94eecea Mon Sep 17 00:00:00 2001 From: Charan Teja Reddy Date: Tue, 12 May 2020 11:39:06 +0530 Subject: [PATCH 074/126] dma-buf: fill dmabuf->name in dma_buf_export From 5.3+ kernels we have an option that users of the dmabuf can provide unique name to the dmabuf object which is stored in the ->name field of dma_buf structure. The change, commit bf93f26d49dc ("UPSTREAM: dma-buf: add DMA_BUF_SET_NAME ioctls"), brought as an LSK merges can break some users. These users, say display, relies on the readlink() to get the dmabuf name which is used to uniquely identify the dmabuf exported buffers and thus take some decissions, Eg: Whether to redraw the eglimage. But this LSK change will always give the "/dmabuf:" as name for all the dmabuf objects thus breaking such users. This can be avoided by filling the dmabuf->name with the default unique name, thus the dma_buf->buf_name,name will share the common name till the user overrides it. This fix also indirectly solves the memory leak issue associated with the dmabuf->buf_name filled in the dma_buf_export(). Change-Id: If4ba945b49c98f1d109ec83400299af12dac1232 Fixes: bf93f26d49dc ("UPSTREAM: dma-buf: add DMA_BUF_SET_NAME ioctls") Signed-off-by: Charan Teja Reddy --- drivers/dma-buf/dma-buf.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/dma-buf/dma-buf.c b/drivers/dma-buf/dma-buf.c index a9c82e9b8892..75db633cbe88 100644 --- a/drivers/dma-buf/dma-buf.c +++ b/drivers/dma-buf/dma-buf.c @@ -607,6 +607,7 @@ struct dma_buf *dma_buf_export(const struct dma_buf_export_info *exp_info) dmabuf->cb_excl.poll = dmabuf->cb_shared.poll = &dmabuf->poll; dmabuf->cb_excl.active = dmabuf->cb_shared.active = 0; dmabuf->buf_name = bufname; + dmabuf->name = bufname; dmabuf->ktime = ktime_get(); if (!resv) { From a2806137d27572f04bed5434da7a88b0f165daf9 Mon Sep 17 00:00:00 2001 From: Rama Krishna Phani A Date: Tue, 9 Jun 2020 22:27:49 +0530 Subject: [PATCH 075/126] msm: ep_pcie: Vote for pipe clk for early init case Few usecases will have early init feature enabled where PCIe link is established in PBL. In such cases EP PCIe driver is not voting for pipe clk but unvoting it as part of PCIe link suspend, causing unbalanced voting for that clk. Update logic to vote for PCIe pipe clk for early init case. Change-Id: Ibb26e88b1b3fb4426a2c03bf3031633e3fb4639f Signed-off-by: Rama Krishna Phani A --- drivers/platform/msm/ep_pcie/ep_pcie_core.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/platform/msm/ep_pcie/ep_pcie_core.c b/drivers/platform/msm/ep_pcie/ep_pcie_core.c index e087bd4c93bf..c7e8f28cb91b 100644 --- a/drivers/platform/msm/ep_pcie/ep_pcie_core.c +++ b/drivers/platform/msm/ep_pcie/ep_pcie_core.c @@ -1712,6 +1712,15 @@ int ep_pcie_core_enable_endpoint(enum ep_pcie_options opt) ep_pcie_core_init(dev, true); dev->link_status = EP_PCIE_LINK_UP; dev->l23_ready = false; + + /* enable pipe clock for early link init case*/ + ret = ep_pcie_pipe_clk_init(dev); + if (ret) { + EP_PCIE_ERR(dev, + "PCIe V%d: failed to enable pipe clock\n", + dev->rev); + goto pipe_clk_fail; + } goto checkbme; } else { ltssm_en = readl_relaxed(dev->parf From 9367fc75428d24f656ad84253aaedec43aca0087 Mon Sep 17 00:00:00 2001 From: Veera Vegivada Date: Thu, 28 May 2020 15:56:36 +0530 Subject: [PATCH 076/126] clk: Add prepare lock in clk_populate_clock_opp_table After enabling CONFIG_PROVE_LOCKING, observed dumpstacks in the boot time. Call trace: clk_core_round_rate_nolock+0xd4/0xe0 clk_hw_round_rate+0x4c/0x80 clk_populate_clock_opp_table+0x168/0x318 devm_clk_hw_register+0x88/0x9c devm_clk_register_regmap+0x54/0x60 qcom_cc_really_probe+0x114/0x208 clk_hw_round_rate() required to be called with prepare lock held. So acquire prepare lock before invoking clk_hw_round_rate(). Change-Id: I608e9e7cfe7a5a43fa0e0543b909cefe59030067 Signed-off-by: Veera Vegivada --- drivers/clk/clk.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index f5a48671389b..20ac4135620a 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -4109,6 +4109,7 @@ static int clk_add_and_print_opp(struct clk_hw *hw, unsigned long rate, int uv, int n) { struct clk_core *core = hw->core; + unsigned long rrate; int j, ret = 0; for (j = 0; j < count; j++) { @@ -4119,8 +4120,11 @@ static int clk_add_and_print_opp(struct clk_hw *hw, return ret; } - if (n == 0 || n == core->num_rate_max - 1 || - rate == clk_hw_round_rate(hw, INT_MAX)) + clk_prepare_lock(); + rrate = clk_hw_round_rate(hw, INT_MAX); + clk_prepare_unlock(); + + if (n == 0 || n == core->num_rate_max - 1 || rate == rrate) pr_info("%s: set OPP pair(%lu Hz: %u uV) on %s\n", core->name, rate, uv, dev_name(device_list[j])); @@ -4175,7 +4179,9 @@ static void clk_populate_clock_opp_table(struct device_node *np, } for (n = 0; ; n++) { + clk_prepare_lock(); rrate = clk_hw_round_rate(hw, rate + 1); + clk_prepare_unlock(); if (!rrate) { pr_err("clk_round_rate failed for %s\n", core->name); From 6257f5b1dee06a7c474893a3d1f9050fe43c7dc0 Mon Sep 17 00:00:00 2001 From: Narender Ankam Date: Mon, 11 May 2020 16:01:02 +0530 Subject: [PATCH 077/126] ARM: dts: msm: Update display ram dump memory size Update display ram dump memory size to be same as splash memory size. Change-Id: Ic1eb959046f9be6a6ca8686fe2b7b5acbe71b502 Signed-off-by: Narender Ankam --- arch/arm64/boot/dts/qcom/sm6150.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm6150.dtsi b/arch/arm64/boot/dts/qcom/sm6150.dtsi index 4eed5815d029..7b832f717929 100644 --- a/arch/arm64/boot/dts/qcom/sm6150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6150.dtsi @@ -634,7 +634,7 @@ }; disp_rdump_memory: disp_rdump_region@9c000000 { - reg = <0x0 0x9c000000 0x0 0x01000000>; + reg = <0x0 0x9c000000 0x0 0x0f00000>; label = "disp_rdump_region"; }; From 530a18767265aff9bdef876a4d7b1d9e1fec9aa7 Mon Sep 17 00:00:00 2001 From: Pradeep P V K Date: Tue, 9 Jun 2020 23:03:01 +0530 Subject: [PATCH 078/126] mtd: msm_qpic_nand: check for page_erased bit along with op_err Due to a hardware bug in ECC-Engine, ECC-Engine couldn't able to set OP_ERR bit in flash_status regesiter whenever an erased page encounters bitflips. Due to this, ECC-Engine is trying to correct the bitflips on an erased page and leading to data corruption. So, a check for PAGE_ERASED bit is added prior to OP_ERR bit for an erased page detection logic. Change-Id: I570625123fe828450dade06570f782ebe93d39f1 Signed-off-by: Pradeep P V K --- drivers/mtd/devices/msm_qpic_nand.c | 62 +++++++++++++++++++++++++++-- drivers/mtd/devices/msm_qpic_nand.h | 8 +++- 2 files changed, 64 insertions(+), 6 deletions(-) diff --git a/drivers/mtd/devices/msm_qpic_nand.c b/drivers/mtd/devices/msm_qpic_nand.c index e094673f9cac..3b94bc33bcd1 100644 --- a/drivers/mtd/devices/msm_qpic_nand.c +++ b/drivers/mtd/devices/msm_qpic_nand.c @@ -1993,7 +1993,7 @@ free_dma: if (last_pos < ecc_bytes_percw_in_bits) num_zero_bits++; - if (num_zero_bits > 4) { + if (num_zero_bits > MAX_ECC_BIT_FLIPS) { *erased_page = false; goto free_mem; } @@ -2005,7 +2005,7 @@ free_dma: ecc_temp += chip->ecc_parity_bytes; } - if ((n == cwperpage) && (num_zero_bits <= 4)) + if ((n == cwperpage) && (num_zero_bits <= MAX_ECC_BIT_FLIPS)) *erased_page = true; free_mem: kfree(ecc); @@ -2228,6 +2228,33 @@ static int msm_nand_read_pagescope(struct mtd_info *mtd, loff_t from, goto free_dma; /* Check for flash status errors */ pageerr = rawerr = 0; + + /* + * PAGE_ERASED bit will set only if all + * CODEWORD_ERASED bit of all codewords + * of the page is set. + * + * PAGE_ERASED bit is a 'logical and' of all + * CODEWORD_ERASED bit of all codewords i.e. + * even if one codeword is detected as not + * an erased codeword, PAGE_ERASED bit will unset. + */ + for (n = rw_params.start_sector; n < cwperpage; n++) { + if ((dma_buffer->result[n].erased_cw_status & + (1 << PAGE_ERASED)) && + (dma_buffer->result[n].buffer_status & + NUM_ERRORS)) { + err = msm_nand_is_erased_page_ps(mtd, + from, ops, + &rw_params, + &erased_page); + if (err) + goto free_dma; + if (erased_page) + rawerr = -EIO; + break; + } + } for (n = rw_params.start_sector; n < cwperpage; n++) { if (dma_buffer->result[n].flash_status & (FS_OP_ERR | FS_MPU_ERR)) { @@ -2633,7 +2660,7 @@ free_dma: if (last_pos < ecc_bytes_percw_in_bits) num_zero_bits++; - if (num_zero_bits > 4) { + if (num_zero_bits > MAX_ECC_BIT_FLIPS) { *erased_page = false; goto free_mem; } @@ -2645,7 +2672,7 @@ free_dma: ecc_temp += chip->ecc_parity_bytes; } - if ((n == cwperpage) && (num_zero_bits <= 4)) + if ((n == cwperpage) && (num_zero_bits <= MAX_ECC_BIT_FLIPS)) *erased_page = true; free_mem: kfree(ecc); @@ -2840,6 +2867,33 @@ static int msm_nand_read_oob(struct mtd_info *mtd, loff_t from, goto free_dma; /* Check for flash status errors */ pageerr = rawerr = 0; + + /* + * PAGE_ERASED bit will set only if all + * CODEWORD_ERASED bit of all codewords + * of the page is set. + * + * PAGE_ERASED bit is a 'logical and' of all + * CODEWORD_ERASED bit of all codewords i.e. + * even if one codeword is detected as not + * an erased codeword, PAGE_ERASED bit will unset. + */ + for (n = rw_params.start_sector; n < cwperpage; n++) { + if ((dma_buffer->result[n].erased_cw_status & + (1 << PAGE_ERASED)) && + (dma_buffer->result[n].buffer_status & + NUM_ERRORS)) { + err = msm_nand_is_erased_page(mtd, + from, ops, + &rw_params, + &erased_page); + if (err) + goto free_dma; + if (erased_page) + rawerr = -EIO; + break; + } + } for (n = rw_params.start_sector; n < cwperpage; n++) { if (dma_buffer->result[n].flash_status & (FS_OP_ERR | FS_MPU_ERR)) { diff --git a/drivers/mtd/devices/msm_qpic_nand.h b/drivers/mtd/devices/msm_qpic_nand.h index d6c6d4080e48..b48272a552f1 100644 --- a/drivers/mtd/devices/msm_qpic_nand.h +++ b/drivers/mtd/devices/msm_qpic_nand.h @@ -1,6 +1,6 @@ /* * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2012-2019 The Linux Foundation. All rights reserved. + * Copyright (c) 2012-2020 The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -165,7 +165,10 @@ #define RESET_ERASED_DET (1 << AUTO_DETECT_RES) #define ACTIVE_ERASED_DET (0 << AUTO_DETECT_RES) #define CLR_ERASED_PAGE_DET (RESET_ERASED_DET | MASK_ECC) -#define SET_ERASED_PAGE_DET (ACTIVE_ERASED_DET | MASK_ECC) +#define SET_ERASED_PAGE_DET (ACTIVE_ERASED_DET | MASK_ECC | SET_N_MAX_ZEROS) +#define N_MAX_ZEROS 2 +#define MAX_ECC_BIT_FLIPS 4 +#define SET_N_MAX_ZEROS (MAX_ECC_BIT_FLIPS << N_MAX_ZEROS) #define MSM_NAND_ERASED_CW_DETECT_STATUS(info) MSM_NAND_REG(info, 0x300EC) #define PAGE_ALL_ERASED 7 @@ -174,6 +177,7 @@ #define CODEWORD_ERASED 4 #define ERASED_PAGE ((1 << PAGE_ALL_ERASED) | (1 << PAGE_ERASED)) #define ERASED_CW ((1 << CODEWORD_ALL_ERASED) | (1 << CODEWORD_ERASED)) +#define NUM_ERRORS 0x1f #define MSM_NAND_CTRL(info) MSM_NAND_REG(info, 0x30F00) #define BAM_MODE_EN 0 From 3aadff47cc1419e6fa5acc5f3055bb400db7a62a Mon Sep 17 00:00:00 2001 From: Rohith Kollalsi Date: Tue, 16 Jun 2020 21:15:09 +0530 Subject: [PATCH 079/126] usb: pd: Use break instead of return after soft reset is done After soft reset is done from PE_SRC_SEND_CAPABILITIES use break to exit from the switch case instead of returning from the function. Change-Id: I36e3f34cf90b6620dd6ac8b9c9a503cf336e47c5 Signed-off-by: Rohith Kollalsi --- drivers/usb/pd/policy_engine.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/usb/pd/policy_engine.c b/drivers/usb/pd/policy_engine.c index d24adaca9524..ba49796d2fd5 100644 --- a/drivers/usb/pd/policy_engine.c +++ b/drivers/usb/pd/policy_engine.c @@ -2691,7 +2691,7 @@ static void usbpd_sm(struct work_struct *w) if (ret) { if (pd->pd_connected) { usbpd_set_state(pd, PE_SEND_SOFT_RESET); - return; + break; } pd->caps_count++; if (pd->caps_count >= PD_CAPS_COUNT) { From 5cb8f5adb8d9128a6a098bd7ee78c0b8d5b7e355 Mon Sep 17 00:00:00 2001 From: Archit Saxena Date: Wed, 3 Jun 2020 14:51:07 +0530 Subject: [PATCH 080/126] ARM: dts: msm: Add restart driver to sdm429 Add restart driver node to sdm429W. Change-Id: I8405e786b2ce7be49ed679f11126c66cbd26812a Signed-off-by: Archit Saxena --- arch/arm64/boot/dts/qcom/sdm429.dtsi | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sdm429.dtsi b/arch/arm64/boot/dts/qcom/sdm429.dtsi index e41a1c3e5c35..9e709b8e2c27 100644 --- a/arch/arm64/boot/dts/qcom/sdm429.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm429.dtsi @@ -259,6 +259,14 @@ }; }; + + restart@4ab000 { + compatible = "qcom,pshold"; + reg = <0x4ab000 0x4>, + <0x193d100 0x4>; + reg-names = "pshold-base", "tcsr-boot-misc-detect"; + }; + clocks { xo_board { compatible = "fixed-clock"; @@ -335,7 +343,6 @@ qcom,ipi-ping; qcom,wakeup-enable; qcom,scandump-size = <0x40000>; - status = "disabled"; }; rpm_bus: qcom,rpm-smd { From a2fda05a2966ed365a6847396e362f9df7b846e2 Mon Sep 17 00:00:00 2001 From: Akshay Pandit Date: Wed, 17 Jun 2020 00:04:52 +0530 Subject: [PATCH 081/126] ipa3: Wait for IPA post init for 1000 msec before return If ipa receives ioctl and post init is not completed, wait for 1000 msec before timing out and returning error. The changes are made specific to msmnile gvm target. Change-Id: Icc63939840af469d1a79960927e6d343a336dcc9 Signed-off-by: Akshay Pandit --- drivers/platform/msm/ipa/ipa_v3/ipa.c | 20 +++++++++++++++++++- drivers/platform/msm/ipa/ipa_v3/ipa_i.h | 3 +++ 2 files changed, 22 insertions(+), 1 deletion(-) diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa.c b/drivers/platform/msm/ipa/ipa_v3/ipa.c index e2f6cb039253..be5c72374a45 100644 --- a/drivers/platform/msm/ipa/ipa_v3/ipa.c +++ b/drivers/platform/msm/ipa/ipa_v3/ipa.c @@ -1014,7 +1014,16 @@ static long ipa3_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) if (!ipa3_is_ready()) { IPAERR("IPA not ready, waiting for init completion\n"); - wait_for_completion(&ipa3_ctx->init_completion_obj); + if (ipa3_ctx->manual_fw_load) { + if (!wait_for_completion_timeout( + &ipa3_ctx->init_completion_obj, + msecs_to_jiffies(1000))) { + IPAERR("IPA not ready, return\n"); + return -ETIME; + } + } else { + wait_for_completion(&ipa3_ctx->init_completion_obj); + } } IPA_ACTIVE_CLIENTS_INC_SIMPLE(); @@ -6891,6 +6900,7 @@ static int ipa3_pre_init(const struct ipa3_plat_drv_res *resource_p, ipa3_ctx->uc_act_tbl_total = 0; ipa3_ctx->uc_act_tbl_next_index = 0; ipa3_ctx->ipa_config_is_auto = resource_p->ipa_config_is_auto; + ipa3_ctx->manual_fw_load = resource_p->manual_fw_load; if (ipa3_ctx->secure_debug_check_action == USE_SCM) { if (ipa_is_mem_dump_allowed()) @@ -7556,6 +7566,7 @@ static int get_ipa_dts_configuration(struct platform_device *pdev, ipa_drv_res->ipa_fltrt_not_hashable = false; ipa_drv_res->ipa_endp_delay_wa = false; ipa_drv_res->ipa_config_is_auto = false; + ipa_drv_res->manual_fw_load = false; /* Get IPA HW Version */ result = of_property_read_u32(pdev->dev.of_node, "qcom,ipa-hw-ver", @@ -7965,6 +7976,13 @@ static int get_ipa_dts_configuration(struct platform_device *pdev, IPADBG(": secure-debug-check-action = %d\n", ipa_drv_res->secure_debug_check_action); + ipa_drv_res->manual_fw_load = + of_property_read_bool(pdev->dev.of_node, + "qcom,manual-fw-load"); + IPADBG(": manual-fw-load (%s)\n", + ipa_drv_res->manual_fw_load + ? "True" : "False"); + return 0; } diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa_i.h b/drivers/platform/msm/ipa/ipa_v3/ipa_i.h index 6dd01a7a843a..a064074ea0df 100644 --- a/drivers/platform/msm/ipa/ipa_v3/ipa_i.h +++ b/drivers/platform/msm/ipa/ipa_v3/ipa_i.h @@ -1840,6 +1840,7 @@ struct ipa3_app_clock_vote { * @app_vote: holds userspace application clock vote count * IPA context - holds all relevant info about IPA driver and its state * @coal_cmd_pyld: holds the coslescing close frame command payload + * @manual_fw_load: bool,if fw load is done manually */ struct ipa3_context { struct ipa3_char_device_context cdev; @@ -2019,6 +2020,7 @@ struct ipa3_context { struct mutex act_tbl_lock; int uc_act_tbl_total; int uc_act_tbl_next_index; + bool manual_fw_load; }; struct ipa3_plat_drv_res { @@ -2068,6 +2070,7 @@ struct ipa3_plat_drv_res { u32 secure_debug_check_action; bool ipa_mhi_proxy; bool ipa_wan_skb_page; + bool manual_fw_load; }; /** From 4a732119f707fc916acc7cf71e5750908ed4033e Mon Sep 17 00:00:00 2001 From: Sunil Paidimarri Date: Mon, 4 May 2020 22:38:03 -0700 Subject: [PATCH 082/126] ARM: dts: msm: Add STMMAC node for qcs405 Add STMMAC node for qcs405. Change-Id: I8d2c1dfc081bc547cb38959119486a6f19a96b4a Acked-by: Rahul Kawadgave Signed-off-by: Sunil Paidimarri --- arch/arm64/boot/dts/qcom/qcs405.dtsi | 146 ++++++++++++++++++++ arch/arm64/boot/dts/qcom/sa2150p-ccard.dtsi | 17 +++ 2 files changed, 163 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs405.dtsi b/arch/arm64/boot/dts/qcom/qcs405.dtsi index 67e3ed1fd95f..e405bf8a6226 100644 --- a/arch/arm64/boot/dts/qcom/qcs405.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs405.dtsi @@ -1548,6 +1548,152 @@ < 1401600 MHZ_TO_MBPS( 710, 8) >; }; + mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use = <4>; + snps,rx-sched-sp; + + queue0 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x0>; + snps,route-up; + snps,priority = <0x1>; + }; + + queue1 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x1>; + snps,route-ptp; + }; + + queue2 { + snps,avb-algorithm; + snps,map-to-dma-channel = <0x2>; + snps,route-avcp; + }; + + queue3 { + snps,avb-algorithm; + snps,map-to-dma-channel = <0x3>; + snps,priority = <0xC>; + }; + }; + + mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use = <5>; + snps,tx-sched-sp; + queue0 { + snps,dcb-algorithm; + }; + + queue1 { + snps,dcb-algorithm; + }; + + queue2 { + snps,avb-algorithm; + snps,send_slope = <0x1000>; + snps,idle_slope = <0x1000>; + snps,high_credit = <0x3E800>; + snps,low_credit = <0xFFC18000>; + }; + + queue3 { + snps,avb-algorithm; + snps,send_slope = <0x1000>; + snps,idle_slope = <0x1000>; + snps,high_credit = <0x3E800>; + snps,low_credit = <0xFFC18000>; + }; + }; + + ethqos_hw: qcom,ethernet@00020000 { + compatible = "qcom,stmmac-ethqos"; + reg = <0x07A80000 0x10000>, + <0x7A96000 0x100>; + qcom,arm-smmu; + reg-names = "stmmaceth", "rgmii"; + dma-bit-mask = <32>; + emac-core-version = <0x20030000>; + interrupts-extended = <&wakegic 0 56 4>, <&wakegic 0 55 4>, + <&tlmm 61 2>, <&wakegic 0 300 4>, + <&wakegic 0 301 4>, <&wakegic 0 302 4>, + <&wakegic 0 303 4>, <&wakegic 0 304 4>, + <&wakegic 0 305 4>, <&wakegic 0 306 4>, + <&wakegic 0 307 4>, <&wakegic 0 308 4>; + interrupt-names = "macirq", "eth_lpi", + "phy-intr", "tx-ch0-intr", + "tx-ch1-intr", "tx-ch2-intr", + "tx-ch3-intr", "tx-ch4-intr", + "rx-ch0-intr", "rx-ch1-intr", + "rx-ch2-intr", "rx-ch3-intr"; + qcom,msm-bus,name = "emac"; + qcom,msm-bus,num-cases = <4>; + qcom,msm-bus,num-paths = <2>; + qcom,msm-bus,vectors-KBps = + <98 512 0 0>, <1 781 0 0>, /* No vote */ + <98 512 2500 0>, <1 781 0 40000>, /* 10Mbps vote */ + <98 512 25000 0>, <1 781 0 40000>, /* 100Mbps vote */ + <98 512 250000 0>, <1 781 0 40000>; /* 1000Mbps vote */ + qcom,bus-vector-names = "0", "10", "100", "1000"; + snps,tso; + snps,pbl = <32>; + mac-address = [00 55 7B B5 7D f7]; + clocks = <&clock_gcc GCC_ETH_AXI_CLK>, + <&clock_gcc GCC_ETH_SLAVE_AHB_CLK>, + <&clock_gcc GCC_ETH_PTP_CLK>, + <&clock_gcc GCC_ETH_RGMII_CLK>; + clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii"; + snps,ptp-ref-clk-rate = <230400000>; + snps,ptp-req-clk-rate = <57600000>; + snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_HIGH>; + qcom,phy-intr-redirect = <&tlmm 61 GPIO_ACTIVE_LOW>; + /*gdsc_emac-supply = <&emac_gdsc>;*/ + rx-fifo-depth = <16384>; + tx-fifo-depth = <20480>; + snps,mtl-rx-config = <&mtl_rx_setup>; + snps,mtl-tx-config = <&mtl_tx_setup>; + + pinctrl-names = "dev-emac-mdc", "dev-emac-mdio", + "dev-emac-rgmii_txd0_state", "dev-emac-rgmii_txd1_state", + "dev-emac-rgmii_txd2_state", "dev-emac-rgmii_txd3_state", + "dev-emac-rgmii_txc_state", "dev-emac-rgmii_tx_ctl_state", + "dev-emac-rgmii_rxd0_state", "dev-emac-rgmii_rxd1_state", + "dev-emac-rgmii_rxd2_state", "dev-emac-rgmii_rxd3_state", + "dev-emac-rgmii_rxc_state", "dev-emac-rgmii_rx_ctl_state", + "dev-emac-phy_intr"; + + pinctrl-0 = <&emac_mdc>; + pinctrl-1 = <&emac_mdio>; + pinctrl-2 = <&emac_rgmii_txd0>; + pinctrl-3 = <&emac_rgmii_txd1>; + pinctrl-4 = <&emac_rgmii_txd2>; + pinctrl-5 = <&emac_rgmii_txd3>; + pinctrl-6 = <&emac_rgmii_txc>; + pinctrl-7 = <&emac_rgmii_tx_ctl>; + pinctrl-8 = <&emac_rgmii_rxd0>; + pinctrl-9 = <&emac_rgmii_rxd1>; + pinctrl-10 = <&emac_rgmii_rxd2>; + pinctrl-11 = <&emac_rgmii_rxd3>; + pinctrl-12 = <&emac_rgmii_rxc>; + pinctrl-13 = <&emac_rgmii_rx_ctl>; + pinctrl-14 = <&emac_phy_intr>; + + snps,reset-active-low; + snps,reset-delays-us = <0 10000 100000>; + phy-mode = "rgmii"; + + io-macro-info { + io-macro-bypass-mode = <0>; + io-interface = "rgmii"; + }; + + ethqos_emb_smmu: ethqos_emb_smmu { + compatible = "qcom,emac-smmu-embedded"; + iommus = <&apps_smmu 0x1400 0x0>; + qcom,iova-mapping = <0x80000000 0x40000000>; + }; + }; + emac_hw: qcom,emac@07A80000 { compatible = "qcom,emac-dwc-eqos"; reg = <0x07A80000 0x10000>, diff --git a/arch/arm64/boot/dts/qcom/sa2150p-ccard.dtsi b/arch/arm64/boot/dts/qcom/sa2150p-ccard.dtsi index accae59b393a..304357a3195e 100644 --- a/arch/arm64/boot/dts/qcom/sa2150p-ccard.dtsi +++ b/arch/arm64/boot/dts/qcom/sa2150p-ccard.dtsi @@ -192,6 +192,23 @@ extcon = <&usb2_extcon>; }; +ðqos_hw { + status = "okay"; + vreg_emac_phy-supply = <&vreg_emac_phy>; + vreg_rgmii_io_pads-supply = <&vreg_rgmii_io_pads>; + rxc-skew-ps = <0>; + + pinctrl-names = "dev-emac-mdc", "dev-emac-mdio", + "dev-emac-rgmii_txd0_state", "dev-emac-rgmii_txd1_state", + "dev-emac-rgmii_txd2_state", "dev-emac-rgmii_txd3_state", + "dev-emac-rgmii_txc_state", "dev-emac-rgmii_tx_ctl_state", + "dev-emac-rgmii_rxd0_state", "dev-emac-rgmii_rxd1_state", + "dev-emac-rgmii_rxd2_state", "dev-emac-rgmii_rxd3_state", + "dev-emac-rgmii_rxc_state", "dev-emac-rgmii_rx_ctl_state", + "dev-emac-phy_intr", "dev-emac-phy_reset_state"; + pinctrl-15 = <&emac_phy_reset_state>; +}; + &emac_hw { status = "okay"; vreg_emac_phy-supply = <&vreg_emac_phy>; From 026c827dec4b4192c9b252ab01d9b3203405c541 Mon Sep 17 00:00:00 2001 From: Lipsa Rout Date: Tue, 16 Jun 2020 17:49:44 +0530 Subject: [PATCH 083/126] drm/msm/dsi-staging: disallow backlight update during panel mode switch DSI controller and clock will be disabled/enabled during panel mode switch, so disallow backlight update during panel mode switch to avoiding DSI exception. Change-Id: I37e2f3c9aa929555593ffb53950521150ee7698f Signed-off-by: Lei Chen Signed-off-by: Lipsa Rout --- drivers/gpu/drm/msm/dsi-staging/dsi_drm.c | 19 +++++++-------- drivers/gpu/drm/msm/sde/sde_connector.c | 28 +++++++++++++++-------- 2 files changed, 26 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_drm.c b/drivers/gpu/drm/msm/dsi-staging/dsi_drm.c index 3275f47ef5ba..47fc722190b3 100644 --- a/drivers/gpu/drm/msm/dsi-staging/dsi_drm.c +++ b/drivers/gpu/drm/msm/dsi-staging/dsi_drm.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved. + * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -263,6 +263,7 @@ static void dsi_bridge_disable(struct drm_bridge *bridge) int rc = 0; struct dsi_display *display; struct dsi_bridge *c_bridge = to_dsi_bridge(bridge); + int private_flags; if (!bridge) { pr_err("Invalid params\n"); @@ -270,17 +271,13 @@ static void dsi_bridge_disable(struct drm_bridge *bridge) } display = c_bridge->display; + private_flags = + bridge->encoder->crtc->state->adjusted_mode.private_flags; + if (display && display->drm_conn) { - if (bridge->encoder->crtc->state->adjusted_mode.private_flags & - MSM_MODE_FLAG_SEAMLESS_POMS) { - display->poms_pending = true; - /* Disable ESD thread, during panel mode switch */ - sde_connector_schedule_status_work(display->drm_conn, - false); - } else { - display->poms_pending = false; - sde_connector_helper_bridge_disable(display->drm_conn); - } + display->poms_pending = + private_flags & MSM_MODE_FLAG_SEAMLESS_POMS; + sde_connector_helper_bridge_disable(display->drm_conn); } rc = dsi_display_pre_disable(c_bridge->display); diff --git a/drivers/gpu/drm/msm/sde/sde_connector.c b/drivers/gpu/drm/msm/sde/sde_connector.c index 49061de5b559..b268ac780ff6 100644 --- a/drivers/gpu/drm/msm/sde/sde_connector.c +++ b/drivers/gpu/drm/msm/sde/sde_connector.c @@ -92,8 +92,7 @@ static int sde_backlight_device_update_status(struct backlight_device *bd) if (!bl_lvl && brightness) bl_lvl = 1; - if (display->panel->bl_config.bl_update == - BL_UPDATE_DELAY_UNTIL_FIRST_FRAME && !c_conn->allow_bl_update) { + if (!c_conn->allow_bl_update) { c_conn->unset_bl_level = bl_lvl; return 0; } @@ -480,8 +479,7 @@ static int _sde_connector_update_bl_scale(struct sde_connector *c_conn) bl_config = &dsi_display->panel->bl_config; - if (dsi_display->panel->bl_config.bl_update == - BL_UPDATE_DELAY_UNTIL_FIRST_FRAME && !c_conn->allow_bl_update) { + if (!c_conn->allow_bl_update) { c_conn->unset_bl_level = bl_config->bl_level; return 0; } @@ -666,21 +664,31 @@ void sde_connector_helper_bridge_disable(struct drm_connector *connector) { int rc; struct sde_connector *c_conn = NULL; + struct dsi_display *display; + bool poms_pending = false; if (!connector) return; - rc = _sde_connector_update_dirty_properties(connector); - if (rc) { - SDE_ERROR("conn %d final pre kickoff failed %d\n", - connector->base.id, rc); - SDE_EVT32(connector->base.id, SDE_EVTLOG_ERROR); + c_conn = to_sde_connector(connector); + + if (c_conn->connector_type == DRM_MODE_CONNECTOR_DSI) { + display = (struct dsi_display *) c_conn->display; + poms_pending = display->poms_pending; + } + + if (!poms_pending) { + rc = _sde_connector_update_dirty_properties(connector); + if (rc) { + SDE_ERROR("conn %d final pre kickoff failed %d\n", + connector->base.id, rc); + SDE_EVT32(connector->base.id, SDE_EVTLOG_ERROR); + } } /* Disable ESD thread */ sde_connector_schedule_status_work(connector, false); - c_conn = to_sde_connector(connector); if (c_conn->bl_device) { c_conn->bl_device->props.power = FB_BLANK_POWERDOWN; c_conn->bl_device->props.state |= BL_CORE_FBBLANK; From 57bc3d667e8f10e0e885e226dfa08e50f01c9780 Mon Sep 17 00:00:00 2001 From: Jasleen Kalsi Date: Sat, 2 May 2020 01:22:55 +0530 Subject: [PATCH 084/126] taskstats: extended taskstats2 with acct fields Add basic accounting stats in taskstats2 struct Change-Id: Ieb5aa751381f889628eba143db3988a56ef0f096 Signed-off-by: Jasleen Kalsi --- include/uapi/linux/taskstats.h | 16 +++++++++++++- kernel/taskstats.c | 38 ++++++++++++++++++++++++++++++++++ 2 files changed, 53 insertions(+), 1 deletion(-) diff --git a/include/uapi/linux/taskstats.h b/include/uapi/linux/taskstats.h index 125b5a9488a7..ac1e1881ac89 100644 --- a/include/uapi/linux/taskstats.h +++ b/include/uapi/linux/taskstats.h @@ -35,7 +35,7 @@ #define TASKSTATS_VERSION 9 -#define TASKSTATS2_VERSION 1 +#define TASKSTATS2_VERSION 2 #define TS_COMM_LEN 32 /* should be >= TASK_COMM_LEN * in linux/sched.h */ @@ -181,6 +181,20 @@ struct taskstats2 { __u64 shmem_rss; /* KB */ __u64 unreclaimable; /* KB */ /* version 1 ends here */ + + /* version 2 begins here */ + __u64 utime; /* User CPU time [usec] */ + __u64 stime; /* System CPU time [usec] */ + __u64 cutime; /* Cumulative User CPU time [usec] */ + __u64 cstime; /* Cumulative System CPU time [usec] */ + + __u32 uid __attribute__((aligned(8))); + /* User ID */ + __u32 ppid; /* Parent process ID */ + char name[TS_COMM_LEN]; /* Command name */ + char state[TS_COMM_LEN]; /* Process state */ + /* version 2 ends here*/ + }; /* diff --git a/kernel/taskstats.c b/kernel/taskstats.c index 30750014c33b..14460de10a19 100644 --- a/kernel/taskstats.c +++ b/kernel/taskstats.c @@ -654,6 +654,13 @@ static int taskstats2_cmd_attr_pid(struct genl_info *info) size_t size; u32 pid; int rc; + u64 utime, stime; + const struct cred *tcred; +#ifdef CONFIG_CPUSETS + struct cgroup_subsys_state *css; +#endif //CONFIG_CPUSETS + unsigned long flags; + struct signal_struct *sig; size = nla_total_size_64bit(sizeof(struct taskstats2)); @@ -695,6 +702,37 @@ static int taskstats2_cmd_attr_pid(struct genl_info *info) #undef K task_unlock(p); } + + /* version 2 fields begin here */ + task_cputime(tsk, &utime, &stime); + stats->utime = div_u64(utime, NSEC_PER_USEC); + stats->stime = div_u64(stime, NSEC_PER_USEC); + + if (lock_task_sighand(tsk, &flags)) { + sig = tsk->signal; + stats->cutime = sig->cutime; + stats->cstime = sig->cstime; + unlock_task_sighand(tsk, &flags); + } + + rcu_read_lock(); + tcred = __task_cred(tsk); + stats->uid = from_kuid_munged(current_user_ns(), tcred->uid); + stats->ppid = pid_alive(tsk) ? + task_tgid_nr_ns(rcu_dereference(tsk->real_parent), + task_active_pid_ns(current)) : 0; + rcu_read_unlock(); + + strlcpy(stats->name, tsk->comm, sizeof(stats->name)); + +#ifdef CONFIG_CPUSETS + css = task_get_css(tsk, cpuset_cgrp_id); + cgroup_path_ns(css->cgroup, stats->state, sizeof(stats->state), + current->nsproxy->cgroup_ns); + css_put(css); +#endif //CONFIG_CPUSETS + /* version 2 fields end here */ + put_task_struct(tsk); return send_reply(rep_skb, info); From 8c48f981f71a0d0c7ba328a16f042e421d01bf39 Mon Sep 17 00:00:00 2001 From: Nitesh Gupta Date: Sun, 14 Jun 2020 16:51:02 +0530 Subject: [PATCH 085/126] ARM: dts: msm: Add PCIe reset support for QCS405 BCR reset will do the group or block reset associated to the clock domain. Add PCIe Block reset and PHY reset support for QCS405. Change-Id: I770d3c9cc613c5d452f4bb082c21e955287326a5 Signed-off-by: Nitesh Gupta --- arch/arm64/boot/dts/qcom/qcs405-pcie.dtsi | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/qcs405-pcie.dtsi b/arch/arm64/boot/dts/qcom/qcs405-pcie.dtsi index f0dcd69670c9..d6d5dde8eaa0 100644 --- a/arch/arm64/boot/dts/qcom/qcs405-pcie.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs405-pcie.dtsi @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019, The Linux Foundation. All rights reserved. + * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -116,8 +116,14 @@ <0>, <0>, <0>, <0>; clock-output-names = "pcie_0_pipe_clk"; - resets = <&clock_gcc GCC_PCIEPHY_0_PHY_BCR>; - reset-names = "pcie_0_phy_reset"; + + resets = <&clock_gcc GCC_PCIEPHY_0_PHY_BCR>, + <&clock_gcc GCC_PCIE_0_BCR>, + <&clock_gcc GCC_PCIE_0_PHY_BCR>; + + reset-names = "pcie_0_phy_reset", + "pcie_0_core_reset", + "pcie_phy_reset"; pcie_rc0: pcie_rc0 { #address-cells = <5>; From 781f8014536510d29b3cfc824f282a1cafbab5a7 Mon Sep 17 00:00:00 2001 From: Nitesh Gupta Date: Wed, 17 Jun 2020 22:23:47 +0530 Subject: [PATCH 086/126] ARM: dts: msm: Enable Perst Based PCIe Enumeration for SA515M Add perst_enum property to enable perst based enumeration of PCIe on SA515M. Change-Id: I386c59c7ae1cbdd7ed523a6429f99a41aa970477 Signed-off-by: Nitesh Gupta --- arch/arm64/boot/dts/qcom/sa515m-v2-ccard-pcie-ep.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sa515m-v2-ccard-pcie-ep.dts b/arch/arm64/boot/dts/qcom/sa515m-v2-ccard-pcie-ep.dts index 076abf9d0d78..bb1f2ae1b5f2 100644 --- a/arch/arm64/boot/dts/qcom/sa515m-v2-ccard-pcie-ep.dts +++ b/arch/arm64/boot/dts/qcom/sa515m-v2-ccard-pcie-ep.dts @@ -54,6 +54,7 @@ &pcie_ep { status = "ok"; + qcom,pcie-perst-enum; }; &mhi_device { From 44f1453b659595517fa4b0788f3e813d6fba753d Mon Sep 17 00:00:00 2001 From: Manohar Vavilapalli Date: Wed, 17 Jun 2020 11:28:28 +0530 Subject: [PATCH 087/126] coresight: perf: Add NULL check before using pointer sink Add NULL check to avoid potential NULL pointer dereference. Change-Id: I6e63a013f599393f9703cd9a493730181f4a68de Signed-off-by: Manohar Vavilapalli --- drivers/hwtracing/coresight/coresight-etm-perf.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index 3ba6d904ae80..03cb7721e13a 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -145,6 +145,9 @@ static void free_sink_buffer(struct etm_event_data *event_data) cpu = cpumask_first(mask); sink = coresight_get_sink(etm_event_cpu_path(event_data, cpu)); + if (!sink) + return; + sink_ops(sink)->free_buffer(event_data->snk_config); } From ff5ce2f85e356e4b8eada0516bb43453da03d98d Mon Sep 17 00:00:00 2001 From: Manohar Vavilapalli Date: Wed, 17 Jun 2020 11:40:02 +0530 Subject: [PATCH 088/126] coresight-tmc: Add NULL check before using pointer 'etr_buf->ops' Add NULL check to avoid potential NULL pointer dereference. Change-Id: Id3e6619a308b2afe2dda54255d5fb89db14b0b87 Signed-off-by: Manohar Vavilapalli --- drivers/hwtracing/coresight/coresight-tmc-etr.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index 3baf2c8cf0dc..745fcaad4348 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -883,7 +883,9 @@ static struct etr_buf *tmc_alloc_etr_buf(struct tmc_drvdata *drvdata, static void tmc_free_etr_buf(struct etr_buf *etr_buf) { - WARN_ON(!etr_buf->ops || !etr_buf->ops->free); + if (WARN_ON(!etr_buf->ops || !etr_buf->ops->free)) + return; + etr_buf->ops->free(etr_buf); kfree(etr_buf); } @@ -947,7 +949,8 @@ static void tmc_sync_etr_buf(struct tmc_drvdata *drvdata) etr_buf->full = status & TMC_STS_FULL; - WARN_ON(!etr_buf->ops || !etr_buf->ops->sync); + if (WARN_ON(!etr_buf->ops || !etr_buf->ops->sync)) + return; etr_buf->ops->sync(etr_buf, rrp, rwp); } From c653a9c150d59ab6b060291844e98e636a8d2cde Mon Sep 17 00:00:00 2001 From: Manu Gautam Date: Thu, 28 May 2020 16:03:20 +0530 Subject: [PATCH 089/126] mhi: core: add mhi_device_get_sync_atomic() to wait until M0 There is a possibility of client driver's dev_wake request as part mhi_device_get() racing with M1 state transition event processing. This can result in a scenario where client finds MHI state as M0 after mhi_device_get() returns only to be changed later as M1 event processing is still pending on different CPU core. It causes M0 -> M2 -> M0 state transition after mhi_device_get() has already returned. This isn't expected by client and currently treats that as fatal error. Also, as per MHI spec host must allow M1 -> M2 transition for device and it shouldn't abort that. However, clients can ignore that transition as device is expected to immediately move from M2 to M0 without entering deep sleep state. Hence, it must be safe to access their MMIO. To simplify this logic, introduce mhi_device_get_sync_atomic() function that can be used by clients to achieve the same and once it returns success they don't need to have any explicit MHI state checks. Change-Id: I0b4a1ad723a0444ee2402bf171fc5ffc46afcdce Signed-off-by: Manu Gautam --- drivers/bus/mhi/core/mhi_internal.h | 2 + drivers/bus/mhi/core/mhi_pm.c | 108 +++++++++++++++++++++------- include/linux/mhi.h | 24 +++++++ 3 files changed, 109 insertions(+), 25 deletions(-) diff --git a/drivers/bus/mhi/core/mhi_internal.h b/drivers/bus/mhi/core/mhi_internal.h index 1d3261855a81..3efe2ef28298 100644 --- a/drivers/bus/mhi/core/mhi_internal.h +++ b/drivers/bus/mhi/core/mhi_internal.h @@ -752,6 +752,8 @@ struct mhi_bus { /* default MHI timeout */ #define MHI_TIMEOUT_MS (1000) +#define MHI_FORCE_WAKE_DELAY_US (100) + extern struct mhi_bus mhi_bus; struct mhi_controller *find_mhi_controller_by_name(const char *name); diff --git a/drivers/bus/mhi/core/mhi_pm.c b/drivers/bus/mhi/core/mhi_pm.c index 1ae24eba7769..550d0effa98d 100644 --- a/drivers/bus/mhi/core/mhi_pm.c +++ b/drivers/bus/mhi/core/mhi_pm.c @@ -404,35 +404,42 @@ void mhi_pm_m1_transition(struct mhi_controller *mhi_cntrl) enum MHI_PM_STATE state; write_lock_irq(&mhi_cntrl->pm_lock); + /* Just check if we are racing with device_wake assertion */ + if (atomic_read(&mhi_cntrl->dev_wake)) + MHI_VERB("M2 transition request post dev_wake:%d\n", + atomic_read(&mhi_cntrl->dev_wake)); + /* if it fails, means we transition to M3 */ state = mhi_tryset_pm_state(mhi_cntrl, MHI_PM_M2); - if (state == MHI_PM_M2) { - MHI_VERB("Entered M2 State\n"); - mhi_set_mhi_state(mhi_cntrl, MHI_STATE_M2); - mhi_cntrl->dev_state = MHI_STATE_M2; - mhi_cntrl->M2++; - - write_unlock_irq(&mhi_cntrl->pm_lock); - wake_up_all(&mhi_cntrl->state_event); - - /* transfer pending, exit M2 immediately */ - if (unlikely(atomic_read(&mhi_cntrl->pending_pkts) || - atomic_read(&mhi_cntrl->dev_wake))) { - MHI_VERB( - "Exiting M2 Immediately, pending_pkts:%d dev_wake:%d\n", - atomic_read(&mhi_cntrl->pending_pkts), - atomic_read(&mhi_cntrl->dev_wake)); - read_lock_bh(&mhi_cntrl->pm_lock); - mhi_cntrl->wake_get(mhi_cntrl, true); - mhi_cntrl->wake_put(mhi_cntrl, true); - read_unlock_bh(&mhi_cntrl->pm_lock); - } else { - mhi_cntrl->status_cb(mhi_cntrl, mhi_cntrl->priv_data, - MHI_CB_IDLE); - } - } else { + if (state != MHI_PM_M2) { + /* Nothing to be done, handle M3 transition later */ write_unlock_irq(&mhi_cntrl->pm_lock); + return; } + + MHI_VERB("Entered M2 State\n"); + mhi_set_mhi_state(mhi_cntrl, MHI_STATE_M2); + mhi_cntrl->dev_state = MHI_STATE_M2; + mhi_cntrl->M2++; + + write_unlock_irq(&mhi_cntrl->pm_lock); + wake_up_all(&mhi_cntrl->state_event); + + /* transfer pending, exit M2 immediately */ + if (unlikely(atomic_read(&mhi_cntrl->pending_pkts) || + atomic_read(&mhi_cntrl->dev_wake))) { + MHI_VERB( + "Exiting M2 Immediately, pending_pkts:%d dev_wake:%d\n", + atomic_read(&mhi_cntrl->pending_pkts), + atomic_read(&mhi_cntrl->dev_wake)); + read_lock_bh(&mhi_cntrl->pm_lock); + mhi_cntrl->wake_get(mhi_cntrl, true); + mhi_cntrl->wake_put(mhi_cntrl, true); + read_unlock_bh(&mhi_cntrl->pm_lock); + return; + } + + mhi_cntrl->status_cb(mhi_cntrl, mhi_cntrl->priv_data, MHI_CB_IDLE); } int mhi_pm_m3_transition(struct mhi_controller *mhi_cntrl) @@ -1580,6 +1587,57 @@ int mhi_device_get_sync(struct mhi_device *mhi_dev, int vote) } EXPORT_SYMBOL(mhi_device_get_sync); +int mhi_device_get_sync_atomic(struct mhi_device *mhi_dev, int timeout_us) +{ + struct mhi_controller *mhi_cntrl = mhi_dev->mhi_cntrl; + + read_lock_bh(&mhi_cntrl->pm_lock); + if (MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state)) { + read_unlock_bh(&mhi_cntrl->pm_lock); + return -EIO; + } + + mhi_cntrl->wake_get(mhi_cntrl, true); + read_unlock_bh(&mhi_cntrl->pm_lock); + + atomic_inc(&mhi_dev->dev_vote); + pm_wakeup_hard_event(&mhi_cntrl->mhi_dev->dev); + mhi_cntrl->runtime_get(mhi_cntrl, mhi_cntrl->priv_data); + + /* Return if client doesn't want us to wait */ + if (!timeout_us) { + if (mhi_cntrl->pm_state != MHI_PM_M0) + MHI_ERR("Return without waiting for M0\n"); + + mhi_cntrl->runtime_put(mhi_cntrl, mhi_cntrl->priv_data); + return 0; + } + + while (mhi_cntrl->pm_state != MHI_PM_M0 && + !MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state) && + timeout_us > 0) { + udelay(MHI_FORCE_WAKE_DELAY_US); + timeout_us -= MHI_FORCE_WAKE_DELAY_US; + } + + if (MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state) || timeout_us <= 0) { + MHI_ERR("Did not enter M0 state, cur_state:%s pm_state:%s\n", + TO_MHI_STATE_STR(mhi_cntrl->dev_state), + to_mhi_pm_state_str(mhi_cntrl->pm_state)); + read_lock_bh(&mhi_cntrl->pm_lock); + mhi_cntrl->wake_put(mhi_cntrl, false); + read_unlock_bh(&mhi_cntrl->pm_lock); + atomic_dec(&mhi_dev->dev_vote); + mhi_cntrl->runtime_put(mhi_cntrl, mhi_cntrl->priv_data); + return -ETIMEDOUT; + } + + mhi_cntrl->runtime_put(mhi_cntrl, mhi_cntrl->priv_data); + + return 0; +} +EXPORT_SYMBOL(mhi_device_get_sync_atomic); + void mhi_device_put(struct mhi_device *mhi_dev, int vote) { struct mhi_controller *mhi_cntrl = mhi_dev->mhi_cntrl; diff --git a/include/linux/mhi.h b/include/linux/mhi.h index 5460fc206d7e..9c422c96b718 100644 --- a/include/linux/mhi.h +++ b/include/linux/mhi.h @@ -610,6 +610,30 @@ void mhi_device_get(struct mhi_device *mhi_dev, int vote); */ int mhi_device_get_sync(struct mhi_device *mhi_dev, int vote); +/** + * mhi_device_get_sync_atomic - Asserts device_wait and moves device to M0 + * @mhi_dev: Device associated with the channels + * @timeout_us: timeout, in micro-seconds + * + * The device_wake is asserted to keep device in M0 or bring it to M0. + * If device is not in M0 state, then this function will wait for device to + * move to M0, until @timeout_us elapses. + * However, if device's M1 state-change event races with this function + * then there is a possiblity of device moving from M0 to M2 and back + * to M0. That can't be avoided as host must transition device from M1 to M2 + * as per the spec. + * Clients can ignore that transition after this function returns as the device + * is expected to immediately move from M2 to M0 as wake is asserted and + * wouldn't enter low power state. + * + * Returns: + * 0 if operation was successful (however, M0 -> M2 -> M0 is possible later) as + * mentioned above. + * -ETIMEDOUT is device faled to move to M0 before @timeout_us elapsed + * -EIO if the MHI state is one of the ERROR states. + */ +int mhi_device_get_sync_atomic(struct mhi_device *mhi_dev, int timeout_us); + /** * mhi_device_put - re-enable low power modes * @mhi_dev: Device associated with the channels From e9c7f831eadbcb4e8938d332f0961ebf34d19289 Mon Sep 17 00:00:00 2001 From: Ping Jiang Date: Wed, 17 Jun 2020 15:46:05 +0800 Subject: [PATCH 090/126] char: virtio_fastrpc: Add profile mode support When profile mode is enabled by client, performance statistic will be collected for each invoke call. Time is in nanosecond unit. Change-Id: I0ebd3efd148d671941ee5f59c3083a2f700e9c09 Signed-off-by: Ping Jiang --- drivers/char/virtio_fastrpc.c | 197 ++++++++++++++++++++++++++++++++-- 1 file changed, 191 insertions(+), 6 deletions(-) diff --git a/drivers/char/virtio_fastrpc.c b/drivers/char/virtio_fastrpc.c index 7a6de1fc4592..845acd8c1d6c 100644 --- a/drivers/char/virtio_fastrpc.c +++ b/drivers/char/virtio_fastrpc.c @@ -61,7 +61,6 @@ #define DEBUGFS_SIZE 3072 #define PID_SIZE 10 #define UL_SIZE 25 -#define FASTRPC_STATIC_HANDLE_KERNEL 1 #define VIRTIO_FASTRPC_CMD_OPEN 1 #define VIRTIO_FASTRPC_CMD_CLOSE 2 @@ -98,6 +97,33 @@ memmove((dst), (src), (size));\ } while (0) +#define PERF_KEYS \ + "count:flush:map:copy:rpmsg:getargs:putargs:invalidate:invoke:tid:ptr" +#define FASTRPC_STATIC_HANDLE_KERNEL 1 +#define FASTRPC_STATIC_HANDLE_LISTENER 3 +#define FASTRPC_STATIC_HANDLE_MAX 20 + +#define PERF_END (void)0 + +#define PERF(enb, cnt, ff) \ + {\ + struct timespec startT = {0};\ + int64_t *counter = cnt;\ + if (enb && counter) {\ + getnstimeofday(&startT);\ + } \ + ff ;\ + if (enb && counter) {\ + *counter += getnstimediff(&startT);\ + } \ + } + +#define GET_COUNTER(perf_ptr, offset) \ + (perf_ptr != NULL ?\ + (((offset >= 0) && (offset < PERF_KEY_MAX)) ?\ + (int64_t *)(perf_ptr + offset)\ + : (int64_t *)NULL) : (int64_t *)NULL) + struct virt_msg_hdr { u32 pid; /* GVM pid */ u32 tid; /* GVM tid */ @@ -181,9 +207,37 @@ struct fastrpc_apps { struct virt_fastrpc_msg *msgtable[FASTRPC_MSG_MAX]; }; +enum fastrpc_perfkeys { + PERF_COUNT = 0, + PERF_FLUSH = 1, + PERF_MAP = 2, + PERF_COPY = 3, + PERF_LINK = 4, + PERF_GETARGS = 5, + PERF_PUTARGS = 6, + PERF_INVARGS = 7, + PERF_INVOKE = 8, + PERF_KEY_MAX = 9, +}; + +struct fastrpc_perf { + int64_t count; + int64_t flush; + int64_t map; + int64_t copy; + int64_t link; + int64_t getargs; + int64_t putargs; + int64_t invargs; + int64_t invoke; + int64_t tid; + struct hlist_node hn; +}; + struct fastrpc_file { spinlock_t hlock; struct hlist_head maps; + struct hlist_head perf; struct hlist_head remote_bufs; uint32_t mode; uint32_t profile; @@ -195,6 +249,7 @@ struct fastrpc_file { int dsp_proc_init; struct fastrpc_apps *apps; struct dentry *debugfs_file; + struct mutex perf_mutex; struct mutex map_mutex; /* Identifies the device (MINOR_NUM_DEV / MINOR_NUM_SECURE_DEV) */ int dev_minor; @@ -242,6 +297,45 @@ static inline int64_t getnstimediff(struct timespec *start) return ns; } +static inline int64_t *getperfcounter(struct fastrpc_file *fl, int key) +{ + int err = 0; + int64_t *val = NULL; + struct fastrpc_perf *perf = NULL, *fperf = NULL; + struct hlist_node *n = NULL; + + VERIFY(err, !IS_ERR_OR_NULL(fl)); + if (err) + goto bail; + + mutex_lock(&fl->perf_mutex); + hlist_for_each_entry_safe(perf, n, &fl->perf, hn) { + if (perf->tid == current->pid) { + fperf = perf; + break; + } + } + + if (IS_ERR_OR_NULL(fperf)) { + fperf = kzalloc(sizeof(*fperf), GFP_KERNEL); + + VERIFY(err, !IS_ERR_OR_NULL(fperf)); + if (err) { + mutex_unlock(&fl->perf_mutex); + kfree(fperf); + goto bail; + } + + fperf->tid = current->pid; + hlist_add_head(&fperf->hn, &fl->perf); + } + + val = ((int64_t *)fperf) + key; + mutex_unlock(&fl->perf_mutex); +bail: + return val; +} + static void *get_a_tx_buf(void) { struct fastrpc_apps *me = &gfa; @@ -486,6 +580,11 @@ static int virt_fastrpc_invoke(struct fastrpc_file *fl, uint32_t kernel, struct fastrpc_mmap **maps; size_t copylen = 0, size = 0; char *payload; + struct timespec invoket = {0}; + int64_t *perf_counter = getperfcounter(fl, PERF_COUNT); + + if (fl->profile) + getnstimeofday(&invoket); bufs = REMOTE_SCALARS_LENGTH(invoke->sc); size = bufs * sizeof(*lpra) + bufs * sizeof(*fds) @@ -508,6 +607,7 @@ static int virt_fastrpc_invoke(struct fastrpc_file *fl, uint32_t kernel, fds = NULL; } + PERF(fl->profile, GET_COUNTER(perf_counter, PERF_MAP), /* calculate len required for copying */ for (i = 0; i < inbufs + outbufs; i++) { size_t len = lpra[i].buf.len; @@ -530,6 +630,7 @@ static int virt_fastrpc_invoke(struct fastrpc_file *fl, uint32_t kernel, if (i < inbufs) outbufs_offset += len; } + PERF_END); size = bufs * sizeof(*rpra) + copylen + sizeof(*vmsg); msg = virt_alloc_msg(size); if (!msg) @@ -551,6 +652,7 @@ static int virt_fastrpc_invoke(struct fastrpc_file *fl, uint32_t kernel, rpra = (struct virt_fastrpc_buf *)vmsg->pra; payload = (char *)&rpra[bufs]; + PERF(fl->profile, GET_COUNTER(perf_counter, PERF_COPY), for (i = 0; i < inbufs + outbufs; i++) { size_t len = lpra[i].buf.len; struct sg_table *table; @@ -582,7 +684,16 @@ static int virt_fastrpc_invoke(struct fastrpc_file *fl, uint32_t kernel, payload += len; } } + PERF_END); + if (fl->profile) { + int64_t *count = GET_COUNTER(perf_counter, PERF_GETARGS); + + if (count) + *count += getnstimediff(&invoket); + } + + PERF(fl->profile, GET_COUNTER(perf_counter, PERF_LINK), sg_init_one(sg, vmsg, size); mutex_lock(&me->lock); @@ -594,6 +705,7 @@ static int virt_fastrpc_invoke(struct fastrpc_file *fl, uint32_t kernel, virtqueue_kick(me->svq); mutex_unlock(&me->lock); + PERF_END); wait_for_completion(&msg->work); @@ -605,6 +717,7 @@ static int virt_fastrpc_invoke(struct fastrpc_file *fl, uint32_t kernel, rpra = (struct virt_fastrpc_buf *)rsp->pra; payload = (char *)&rpra[bufs] + outbufs_offset; + PERF(fl->profile, GET_COUNTER(perf_counter, PERF_PUTARGS), for (i = inbufs; i < inbufs + outbufs; i++) { if (!maps[i]) { K_COPY_TO_USER(err, kernel, lpra[i].buf.pv, @@ -619,6 +732,7 @@ static int virt_fastrpc_invoke(struct fastrpc_file *fl, uint32_t kernel, } payload += rpra[i].len; } + PERF_END); bail: if (rsp) { sg_init_one(sg, rsp, me->buf_size); @@ -651,8 +765,11 @@ static int fastrpc_internal_invoke(struct fastrpc_file *fl, int domain = fl->domain; int handles, err = 0; struct timespec invoket = {0}; + int64_t *perf_counter = getperfcounter(fl, PERF_COUNT); + + if (fl->profile) + getnstimeofday(&invoket); - getnstimeofday(&invoket); if (!kernel) { VERIFY(err, invoke->handle != FASTRPC_STATIC_HANDLE_KERNEL); if (err) { @@ -679,6 +796,20 @@ static int fastrpc_internal_invoke(struct fastrpc_file *fl, } err = virt_fastrpc_invoke(fl, kernel, inv); + if (fl->profile) { + if (invoke->handle != FASTRPC_STATIC_HANDLE_LISTENER) { + int64_t *count = GET_COUNTER(perf_counter, PERF_INVOKE); + + if (count) + *count += getnstimediff(&invoket); + } + if (invoke->handle > FASTRPC_STATIC_HANDLE_MAX) { + int64_t *count = GET_COUNTER(perf_counter, PERF_COUNT); + + if (count) + *count = *count + 1; + } + } bail: return err; } @@ -703,6 +834,8 @@ static ssize_t fastrpc_debugfs_read(struct file *filp, char __user *buffer, if (fl) { len += scnprintf(fileinfo + len, DEBUGFS_SIZE - len, "\n%s %d\n", " CHANNEL =", fl->domain); + len += scnprintf(fileinfo + len, DEBUGFS_SIZE - len, + "%s %9s %d\n", "profile", ":", fl->profile); } if (len > DEBUGFS_SIZE) @@ -931,6 +1064,7 @@ static int fastrpc_open(struct inode *inode, struct file *filp) spin_lock_init(&fl->hlock); INIT_HLIST_HEAD(&fl->maps); + INIT_HLIST_HEAD(&fl->perf); INIT_HLIST_HEAD(&fl->remote_bufs); fl->tgid = current->tgid; fl->apps = me; @@ -943,12 +1077,14 @@ static int fastrpc_open(struct inode *inode, struct file *filp) fl->dsp_proc_init = 0; filp->private_data = fl; mutex_init(&fl->map_mutex); + mutex_init(&fl->perf_mutex); return 0; } static int fastrpc_file_free(struct fastrpc_file *fl) { struct fastrpc_mmap *map = NULL, *lmap = NULL; + struct fastrpc_perf *perf = NULL, *fperf = NULL; if (!fl) return 0; @@ -975,6 +1111,21 @@ static int fastrpc_file_free(struct fastrpc_file *fl) } while (lmap); mutex_unlock(&fl->map_mutex); + mutex_lock(&fl->perf_mutex); + do { + struct hlist_node *pn = NULL; + + fperf = NULL; + hlist_for_each_entry_safe(perf, pn, &fl->perf, hn) { + hlist_del_init(&perf->hn); + fperf = perf; + break; + } + kfree(fperf); + } while (fperf); + mutex_unlock(&fl->perf_mutex); + mutex_destroy(&fl->perf_mutex); + fastrpc_remote_buf_list_free(fl); mutex_destroy(&fl->map_mutex); kfree(fl); @@ -1736,8 +1887,7 @@ static long fastrpc_ioctl(struct file *file, unsigned int ioctl_num, fl->mode = (uint32_t)ioctl_param; break; case FASTRPC_MODE_PROFILE: - err = -ENOTTY; - dev_err(me->dev, "profile mode is not supported\n"); + fl->profile = (uint32_t)ioctl_param; break; case FASTRPC_MODE_SESSION: err = -ENOTTY; @@ -1749,8 +1899,43 @@ static long fastrpc_ioctl(struct file *file, unsigned int ioctl_num, } break; case FASTRPC_IOCTL_GETPERF: - err = -ENOTTY; - dev_err(me->dev, "get perf is not supported\n"); + K_COPY_FROM_USER(err, 0, &p.perf, + param, sizeof(p.perf)); + if (err) + goto bail; + p.perf.numkeys = sizeof(struct fastrpc_perf)/sizeof(int64_t); + if (p.perf.keys) { + char *keys = PERF_KEYS; + + K_COPY_TO_USER(err, 0, (void *)p.perf.keys, + keys, strlen(keys)+1); + if (err) + goto bail; + } + if (p.perf.data) { + struct fastrpc_perf *perf = NULL, *fperf = NULL; + struct hlist_node *n = NULL; + + mutex_lock(&fl->perf_mutex); + hlist_for_each_entry_safe(perf, n, &fl->perf, hn) { + if (perf->tid == current->pid) { + fperf = perf; + break; + } + } + + mutex_unlock(&fl->perf_mutex); + + if (fperf) { + K_COPY_TO_USER(err, 0, + (void *)p.perf.data, fperf, + sizeof(*fperf) - + sizeof(struct hlist_node)); + } + } + K_COPY_TO_USER(err, 0, param, &p.perf, sizeof(p.perf)); + if (err) + goto bail; break; case FASTRPC_IOCTL_CONTROL: K_COPY_FROM_USER(err, 0, &p.cp, param, From cfddd39f1a0fabe98e59fc291db8baab3b0b9433 Mon Sep 17 00:00:00 2001 From: Cong Tang Date: Thu, 18 Jun 2020 15:10:31 +0800 Subject: [PATCH 091/126] Documentation: Add documentation for audio drivers Updated for GPR,Gecko core, Gecko platform, Audio packet. PRM and Automotive machine drivers. Change-Id: Id10c02c36b6f79cef784fa7a314e69fc1fec4b5a Signed-off-by: Cong Tang --- .../bindings/sound/qcom-audio-dev.txt | 161 ++++++++++++++++++ 1 file changed, 161 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/qcom-audio-dev.txt b/Documentation/devicetree/bindings/sound/qcom-audio-dev.txt index 715855b3fa5a..e7fef3bdc4fa 100644 --- a/Documentation/devicetree/bindings/sound/qcom-audio-dev.txt +++ b/Documentation/devicetree/bindings/sound/qcom-audio-dev.txt @@ -349,6 +349,49 @@ Optional properties: This child device is added after lpass is up to invoke deferred probe devices. +* gpr + +Required properties: + + - compatible : "qcom,gpr" + This device is added to represent GPR module. + + - qcom,glink-channels: Indicates glink channel to be used. + - qcom,intents: Indicates the number of intents to be allocated. + - reg: This value provides the subsytem ID to be communicated with. + +* gecko-core-platform + +Required properties: + + - compatible : "qcom,gecko-core-platform" + This device is added to represent Gecko platform driver module. + +* gecko_core + +Required properties: + + - compatible : "qcom,gecko_core" + This device is added to represent Gecko core driver module. + - reg: Represents the service to be communicated with. + +* audio-pkt + +Required properties: + + - compatible : "qcom,audio-pkt" + This device is added to represent Audio packet driver module. + - qcom,audiopkt-ch-name: Glink channel name to be used. + - reg: Represents the service to be communicated with. + +* q6prm + +Required properties: + + - compatible : "qcom,q6prm" + This device is added to represent Q6 PRM driver module. + - reg: Represents the service to be communicated with. + * msm-ocmem-audio Required properties: @@ -1880,6 +1923,124 @@ Example: qcom,msm_audio_ssr_devs = <&audio_apr>, <&q6core>; }; +* SA8155 Gecko ASoC Machine driver + +Required properties: +- compatible : "qcom,sa8155-gecko-asoc-snd-adp-star" for auto machine driver. +- qcom,model : The user-visible name of this sound card. +- asoc-platform: This is phandle list containing the references to platform device + nodes that are used as part of the sound card dai-links. +- asoc-platform-names: This property contains list of platform names. The order of + the platform names should match to that of the phandle order + given in "asoc-platform". +- asoc-cpu: This is phandle list containing the references to cpu dai device nodes + that are used as part of the sound card dai-links. +- asoc-cpu-names: This property contains list of cpu dai names. The order of the + cpu dai names should match to that of the phandle order given + in "asoc-cpu". The cpu names are in the form of "%s.%d" form, + where the id (%d) field represents the back-end AFE port id that + this CPU dai is associated with. +- asoc-codec: This is phandle list containing the references to codec dai device + nodes that are used as part of the sound card dai-links. +- asoc-codec-names: This property contains list of codec dai names. The order of the + codec dai names should match to that of the phandle order given + in "asoc-codec". +Optional properties: +- qcom,mi2s-audio-intf : Property to specify if MI2S interface is used for the target +- qcom,auxpcm-audio-intf : Property to specify if AUX PCM interface is used for the target +- qcom,msm-mi2s-master : List of master/slave configuration for MI2S interfaces +- qcom,msm_audio_ssr_devs: List the snd event framework clients + +Example: + + sound-adp-star { + compatible = "qcom,sa8155-gecko-asoc-snd-adp-star"; + qcom,model = "sa8155-gecko-adp-star-snd-card"; + qcom,mi2s-audio-intf; + qcom,auxpcm-audio-intf; + qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>; + + asoc-platform = <&pcm0>, <&pcm1>, <&pcm2>, <&voip>, <&voice>, + <&loopback>, <&compress>, <&hostless>, + <&afe>, <&lsm>, <&routing>, <&compr>, + <&pcm_noirq>, <&loopback1>, <&pcm_dtmf>; + asoc-platform-names = "msm-pcm-dsp.0", "msm-pcm-dsp.1", + "msm-pcm-dsp.2", "msm-voip-dsp", + "msm-pcm-voice", "msm-pcm-loopback", + "msm-compress-dsp", "msm-pcm-hostless", + "msm-pcm-afe", "msm-lsm-client", + "msm-pcm-routing", "msm-compr-dsp", + "msm-pcm-dsp-noirq", "msm-pcm-loopback.1", + "msm-pcm-dtmf"; + asoc-cpu = <&dai_hdmi>, <&dai_dp>, + <&dai_mi2s0>, <&dai_mi2s1>, + <&dai_mi2s2>, <&dai_mi2s3>, + <&dai_mi2s4>, <&dai_pri_auxpcm>, + <&dai_sec_auxpcm>, <&dai_tert_auxpcm>, + <&dai_quat_auxpcm>, <&dai_quin_auxpcm>, + <&afe_pcm_rx>, <&afe_pcm_tx>, <&afe_proxy_rx>, + <&afe_proxy_tx>, <&incall_record_rx>, + <&incall_record_tx>, <&incall_music_rx>, + <&incall_music_2_rx>, + <&usb_audio_rx>, <&usb_audio_tx>, + <&dai_pri_tdm_rx_0>, <&dai_pri_tdm_rx_1>, + <&dai_pri_tdm_rx_2>, <&dai_pri_tdm_rx_3>, + <&dai_pri_tdm_tx_0>, <&dai_pri_tdm_tx_1>, + <&dai_pri_tdm_tx_2>, <&dai_pri_tdm_tx_3>, + <&dai_sec_tdm_rx_0>, <&dai_sec_tdm_rx_1>, + <&dai_sec_tdm_rx_2>, <&dai_sec_tdm_rx_3>, + <&dai_sec_tdm_tx_0>, <&dai_sec_tdm_tx_1>, + <&dai_sec_tdm_tx_2>, <&dai_sec_tdm_tx_3>, + <&dai_tert_tdm_rx_0>, <&dai_tert_tdm_rx_1>, + <&dai_tert_tdm_rx_2>, <&dai_tert_tdm_rx_3>, + <&dai_tert_tdm_rx_4>, <&dai_tert_tdm_tx_0>, + <&dai_tert_tdm_tx_1>, <&dai_tert_tdm_tx_2>, + <&dai_tert_tdm_tx_3>, <&dai_quat_tdm_rx_0>, + <&dai_quat_tdm_rx_1>, <&dai_quat_tdm_rx_2>, + <&dai_quat_tdm_rx_3>, <&dai_quat_tdm_tx_0>, + <&dai_quat_tdm_tx_1>, <&dai_quat_tdm_tx_2>, + <&dai_quat_tdm_tx_3>, <&dai_quin_tdm_rx_0>, + <&dai_quin_tdm_rx_1>, <&dai_quin_tdm_rx_2>, + <&dai_quin_tdm_rx_3>, <&dai_quin_tdm_tx_0>, + <&dai_quin_tdm_tx_1>, <&dai_quin_tdm_tx_2>, + <&dai_quin_tdm_tx_3>; + asoc-cpu-names = "msm-dai-q6-hdmi.8", "msm-dai-q6-dp.24608", + "msm-dai-q6-mi2s.0", "msm-dai-q6-mi2s.1", + "msm-dai-q6-mi2s.2", "msm-dai-q6-mi2s.3", + "msm-dai-q6-mi2s.4", "msm-dai-q6-auxpcm.1", + "msm-dai-q6-auxpcm.2", "msm-dai-q6-auxpcm.3", + "msm-dai-q6-auxpcm.4", "msm-dai-q6-auxpcm.5", + "msm-dai-q6-dev.224", "msm-dai-q6-dev.225", + "msm-dai-q6-dev.241", "msm-dai-q6-dev.240", + "msm-dai-q6-dev.32771", "msm-dai-q6-dev.32772", + "msm-dai-q6-dev.32773", "msm-dai-q6-dev.32770", + "msm-dai-q6-dev.28672", "msm-dai-q6-dev.28673", + "msm-dai-q6-tdm.36864", "msm-dai-q6-tdm.36866", + "msm-dai-q6-tdm.36868", "msm-dai-q6-tdm.36870", + "msm-dai-q6-tdm.36865", "msm-dai-q6-tdm.36867", + "msm-dai-q6-tdm.36869", "msm-dai-q6-tdm.36871", + "msm-dai-q6-tdm.36880", "msm-dai-q6-tdm.36882", + "msm-dai-q6-tdm.36884", "msm-dai-q6-tdm.36886", + "msm-dai-q6-tdm.36881", "msm-dai-q6-tdm.36883", + "msm-dai-q6-tdm.36885", "msm-dai-q6-tdm.36887", + "msm-dai-q6-tdm.36896", "msm-dai-q6-tdm.36898", + "msm-dai-q6-tdm.36900", "msm-dai-q6-tdm.36902", + "msm-dai-q6-tdm.36904", "msm-dai-q6-tdm.36897", + "msm-dai-q6-tdm.36899", "msm-dai-q6-tdm.36901", + "msm-dai-q6-tdm.36903", "msm-dai-q6-tdm.36912", + "msm-dai-q6-tdm.36914", "msm-dai-q6-tdm.36916", + "msm-dai-q6-tdm.36918", "msm-dai-q6-tdm.36913", + "msm-dai-q6-tdm.36915", "msm-dai-q6-tdm.36917", + "msm-dai-q6-tdm.36919", "msm-dai-q6-tdm.36928", + "msm-dai-q6-tdm.36930", "msm-dai-q6-tdm.36932", + "msm-dai-q6-tdm.36934", "msm-dai-q6-tdm.36929", + "msm-dai-q6-tdm.36931", "msm-dai-q6-tdm.36933", + "msm-dai-q6-tdm.36935"; + asoc-codec = <&stub_codec>; + asoc-codec-names = "msm-stub-codec.1"; + qcom,msm_audio_ssr_devs = <&audio_apr>, <&q6core>; + }; + * SDX ASoC Machine driver Required properties: From 8cb52e630a13f1334c7d6933ce6e65f286f99d1e Mon Sep 17 00:00:00 2001 From: Om Parkash Date: Thu, 18 Jun 2020 19:56:37 +0530 Subject: [PATCH 092/126] msm: camera: isp: Fix race condition b/w add and apply req There is a chance that CRM shows request as ready while request is not passed in isp pending list. Change-Id: If20ef7671c06a1d3bde7adc5a05a6a489b2622e2 Signed-off-by: Om Parkash --- .../msm/camera/cam_isp/cam_isp_context.c | 22 ++++++++++++++++--- 1 file changed, 19 insertions(+), 3 deletions(-) diff --git a/drivers/media/platform/msm/camera/cam_isp/cam_isp_context.c b/drivers/media/platform/msm/camera/cam_isp/cam_isp_context.c index d96a23da3bb8..c5dd8819d6a5 100644 --- a/drivers/media/platform/msm/camera/cam_isp/cam_isp_context.c +++ b/drivers/media/platform/msm/camera/cam_isp/cam_isp_context.c @@ -340,6 +340,23 @@ put: } } +static void __cam_isp_ctx_dequeue_request(struct cam_context *ctx, + struct cam_ctx_request *req) +{ + struct cam_ctx_request *req_current; + struct cam_ctx_request *req_prev; + + spin_lock_bh(&ctx->lock); + list_for_each_entry_safe_reverse(req_current, req_prev, + &ctx->pending_req_list, list) { + if (req->request_id == req_current->request_id) { + list_del_init(&req_current->list); + break; + } + } + spin_unlock_bh(&ctx->lock); +} + static int __cam_isp_ctx_enqueue_request_in_order( struct cam_context *ctx, struct cam_ctx_request *req) { @@ -3367,13 +3384,12 @@ static int __cam_isp_ctx_config_dev_in_top_state( add_req.dev_hdl = ctx->dev_hdl; add_req.req_id = req->request_id; add_req.skip_before_applying = 0; + __cam_isp_ctx_enqueue_request_in_order(ctx, req); rc = ctx->ctx_crm_intf->add_req(&add_req); if (rc) { CAM_ERR(CAM_ISP, "Add req failed: req id=%llu", req->request_id); - } else { - __cam_isp_ctx_enqueue_request_in_order( - ctx, req); + __cam_isp_ctx_dequeue_request(ctx, req); } } else { rc = -EINVAL; From 480c3a4e1fe7f5a92452a5b9e3592a2afec1144b Mon Sep 17 00:00:00 2001 From: Rahul Sharma Date: Sun, 7 Jun 2020 18:56:05 +0530 Subject: [PATCH 093/126] ARM: dts: msm: add link clk rcg entry on sm8150 During suspend to disk we need to set link clk parent to xo during disable. This changes adds an link_clk_rcg entry to DP device tree node. Change-Id: I0ff6e6ee5d8380107e5e19fe3540d56ccb36ec9a Acked-by: Poojashree Masthi Signed-off-by: Rahul Sharma --- arch/arm64/boot/dts/qcom/sm8150-sde.dtsi | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150-sde.dtsi b/arch/arm64/boot/dts/qcom/sm8150-sde.dtsi index fd3cd5e26b42..5bd15f44aebf 100644 --- a/arch/arm64/boot/dts/qcom/sm8150-sde.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150-sde.dtsi @@ -1,4 +1,4 @@ -/* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved. +/* Copyright (c) 2016-2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -622,13 +622,15 @@ <&clock_dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>, <&mdss_dp_pll DP_VCO_DIVIDED_CLK_SRC_MUX>, <&clock_dispcc DISP_CC_MDSS_DP_PIXEL_CLK>, - <&clock_dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>; + <&clock_dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>, + <&clock_dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>; clock-names = "core_aux_clk", "core_usb_ref_clk_src", "core_usb_ref_clk", "core_usb_pipe_clk", "link_clk", "link_iface_clk", "crypto_clk", "pixel_clk_rcg", "pixel_parent", "pixel1_clk_rcg", "pixel1_parent", - "strm0_pixel_clk", "strm1_pixel_clk"; + "strm0_pixel_clk", "strm1_pixel_clk", + "link_clk_rcg"; qcom,phy-version = <0x420>; qcom,aux-cfg0-settings = [20 00]; From e845f1e586d63a101167b30d1dae56e83c53a1d8 Mon Sep 17 00:00:00 2001 From: Rahul Sharma Date: Fri, 5 Jun 2020 11:00:53 +0530 Subject: [PATCH 094/126] ARM: dts: msm: add xo_clk for DP display on sm8150 During suspend to disk we need to set DP PCLK to xo during disable. This changes adds an xo_clk entry to DP device tree node. Change-Id: Id9dd3cf04e273484be4484d20fedd618c9e119a8 Acked-by: Poojashree Masthi Signed-off-by: Rahul Sharma --- arch/arm64/boot/dts/qcom/sm8150-sde.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150-sde.dtsi b/arch/arm64/boot/dts/qcom/sm8150-sde.dtsi index 5bd15f44aebf..172fc111907f 100644 --- a/arch/arm64/boot/dts/qcom/sm8150-sde.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150-sde.dtsi @@ -623,14 +623,15 @@ <&mdss_dp_pll DP_VCO_DIVIDED_CLK_SRC_MUX>, <&clock_dispcc DISP_CC_MDSS_DP_PIXEL_CLK>, <&clock_dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>, - <&clock_dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>; + <&clock_dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>, + <&clock_rpmh RPMH_CXO_CLK>; clock-names = "core_aux_clk", "core_usb_ref_clk_src", "core_usb_ref_clk", "core_usb_pipe_clk", "link_clk", "link_iface_clk", "crypto_clk", "pixel_clk_rcg", "pixel_parent", "pixel1_clk_rcg", "pixel1_parent", "strm0_pixel_clk", "strm1_pixel_clk", - "link_clk_rcg"; + "link_clk_rcg", "xo_clk"; qcom,phy-version = <0x420>; qcom,aux-cfg0-settings = [20 00]; From 5898eaccf34f3c5b58b7e66f18589c64654d741a Mon Sep 17 00:00:00 2001 From: "Thomas (Wonyoung) Yun" Date: Wed, 17 Jun 2020 12:46:38 -0400 Subject: [PATCH 095/126] soc: qcom: hgsl: Update hfi command data structure Sync the data structure with kgsl/gmu. Change-Id: I9820f6dab0d5dde1aede7ef22e1b22af7d9b4284 Signed-off-by: Thomas (Wonyoung) Yun --- drivers/soc/qcom/hgsl/hgsl.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/soc/qcom/hgsl/hgsl.c b/drivers/soc/qcom/hgsl/hgsl.c index 60070a4c6f01..80f9b7436ca5 100644 --- a/drivers/soc/qcom/hgsl/hgsl.c +++ b/drivers/soc/qcom/hgsl/hgsl.c @@ -226,7 +226,9 @@ struct hgsl_db_cmds { uint32_t ctx_id; uint32_t cmd_flags; uint32_t timestamp; + uint64_t user_profile_gpuaddr; uint32_t num_ibs; + uint32_t ib_desc_gmuaddr; struct hgsl_fw_ib_desc ib_descs[]; } __packed; From 178cdfffb99f2fd6fb4a5bfd2f9319461d93f53b Mon Sep 17 00:00:00 2001 From: "Jason A. Donenfeld" Date: Thu, 18 Jun 2020 17:44:56 -0600 Subject: [PATCH 096/126] Kbuild: remove -fvisibility=hidden from cflags This was originally done in 2015 as a means of decreasing module size, but it has the effect of creating JUMP11 relocations on ARM when compiled in THUMB2 mode without CONFIG_THUMB2_AVOID_R_ARM_THM_JUMP11=y, which results in `B ...` instructions being generated with jumps that are too far, rather than `B.W ...` instructions, which can handle the larger sized jump. Get rid of the old hack, which had minimum utility anyway. Signed-off-by: Jason A. Donenfeld --- src/Kbuild | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/Kbuild b/src/Kbuild index f1b4ad76fdf6..a0d433f292f3 100644 --- a/src/Kbuild +++ b/src/Kbuild @@ -2,7 +2,7 @@ # # Copyright (C) 2015-2019 Jason A. Donenfeld . All Rights Reserved. -ccflags-y := -O3 -fvisibility=hidden +ccflags-y := -O3 ccflags-$(CONFIG_WIREGUARD_DEBUG) += -DDEBUG -g ccflags-y += -D'pr_fmt(fmt)=KBUILD_MODNAME ": " fmt' ccflags-y += -Wframe-larger-than=2048 From 2c649e2a4cd29c28d0abe1fe5d81ca6172352890 Mon Sep 17 00:00:00 2001 From: Elson Roy Serrao Date: Thu, 16 Apr 2020 12:01:46 -0700 Subject: [PATCH 097/126] usb: dwc3: Add boundary check while traversing the TRB ring buffer During the dequeue operation of an usb request we traverse through the TRBs and reset the HWO bit. Without a boundary check we might iterate past the TRB ring which results in a page fault. Fix this by adding a link TRB boundary check while traversing the ring buffer. Change-Id: I7ae63ed7cc829a8105f2e81b12216af910aa253a Signed-off-by: Elson Roy Serrao --- drivers/usb/dwc3/gadget.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 9052518ff925..c6f0ce788048 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -1684,17 +1684,18 @@ static int dwc3_gadget_ep_dequeue(struct usb_ep *ep, goto out0; if (r->num_pending_sgs) { - struct dwc3_trb *trb; + struct dwc3_trb *trb = r->trb; int i = 0; for (i = 0; i < r->num_pending_sgs; i++) { - trb = r->trb + i; trb->ctrl &= ~DWC3_TRB_CTRL_HWO; dwc3_ep_inc_deq(dep); + trb++; + if (trb->ctrl & DWC3_TRBCTL_LINK_TRB) + trb = dep->trb_pool; } if (r->unaligned || r->zero) { - trb = r->trb + r->num_pending_sgs + 1; trb->ctrl &= ~DWC3_TRB_CTRL_HWO; dwc3_ep_inc_deq(dep); } @@ -1705,7 +1706,9 @@ static int dwc3_gadget_ep_dequeue(struct usb_ep *ep, dwc3_ep_inc_deq(dep); if (r->unaligned || r->zero) { - trb = r->trb + 1; + trb++; + if (trb->ctrl & DWC3_TRBCTL_LINK_TRB) + trb = dep->trb_pool; trb->ctrl &= ~DWC3_TRB_CTRL_HWO; dwc3_ep_inc_deq(dep); } From f1741950ebfddaf1b097b66c79cf5a12a75c56c1 Mon Sep 17 00:00:00 2001 From: Rahul Shahare Date: Thu, 30 Apr 2020 09:57:02 +0530 Subject: [PATCH 098/126] defconfig: trinket: Enable dm-snapshot To support virtual A/B feature, set CONFIG_DM_SNAPSHOT to enable dm-snapshot. Change-Id: I2f285a6059ad9e1c1992d1ed182d85d90f8fdbd4 Signed-off-by: Rahul Shahare --- arch/arm64/configs/vendor/trinket-perf_defconfig | 1 + arch/arm64/configs/vendor/trinket_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm64/configs/vendor/trinket-perf_defconfig b/arch/arm64/configs/vendor/trinket-perf_defconfig index 4ec93eb1019a..74a054f6473d 100644 --- a/arch/arm64/configs/vendor/trinket-perf_defconfig +++ b/arch/arm64/configs/vendor/trinket-perf_defconfig @@ -283,6 +283,7 @@ CONFIG_MD=y CONFIG_BLK_DEV_DM=y CONFIG_DM_CRYPT=y CONFIG_DM_DEFAULT_KEY=y +CONFIG_DM_SNAPSHOT=y CONFIG_DM_UEVENT=y CONFIG_DM_VERITY=y CONFIG_DM_VERITY_FEC=y diff --git a/arch/arm64/configs/vendor/trinket_defconfig b/arch/arm64/configs/vendor/trinket_defconfig index 54a087e1c4bb..0e05ff519201 100644 --- a/arch/arm64/configs/vendor/trinket_defconfig +++ b/arch/arm64/configs/vendor/trinket_defconfig @@ -294,6 +294,7 @@ CONFIG_MD=y CONFIG_BLK_DEV_DM=y CONFIG_DM_CRYPT=y CONFIG_DM_DEFAULT_KEY=y +CONFIG_DM_SNAPSHOT=y CONFIG_DM_UEVENT=y CONFIG_DM_VERITY=y CONFIG_DM_VERITY_FEC=y From c889450c443471f95f2052ec551f4deafc59ca3a Mon Sep 17 00:00:00 2001 From: Ajay Prathi Date: Thu, 9 Apr 2020 11:01:45 +0530 Subject: [PATCH 099/126] msm: sps: SPS driver changes for dummy BAM connect Added a flag (SPS_O_DUMMY_PEER) set by client, based on the flag , passed destination and destination pipe index values as peer bam values and bypassed checks related to destination bam as IPA bam is not present in this use case, to support dummy bam connection from QDSS to IPA. Change-Id: I459b89cacc76c6f9443a9a1dbe9540d78bd948fa Signed-off-by: Ajay Prathi --- drivers/platform/msm/sps/bam.c | 11 ++++++++--- drivers/platform/msm/sps/bam.h | 3 ++- drivers/platform/msm/sps/sps_bam.c | 28 ++++++++++++++++++++-------- drivers/platform/msm/sps/sps_rm.c | 25 +++++++++++++++---------- include/linux/msm-sps.h | 4 +++- 5 files changed, 48 insertions(+), 23 deletions(-) diff --git a/drivers/platform/msm/sps/bam.c b/drivers/platform/msm/sps/bam.c index c9c52f76b9fb..c2b2137185b8 100644 --- a/drivers/platform/msm/sps/bam.c +++ b/drivers/platform/msm/sps/bam.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2011-2017, The Linux Foundation. All rights reserved. +/* Copyright (c) 2011-2017, 2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -1388,8 +1388,13 @@ int bam_pipe_init(void *base, u32 pipe, struct bam_pipe_parameters *param, bam_write_reg_field(base, P_FIFO_SIZES, pipe, P_DATA_FIFO_SIZE, param->data_size); - bam_write_reg(base, P_EVNT_DEST_ADDR, pipe, peer_dest_addr); - + if (!(param->dummy_peer)) { + bam_write_reg(base, P_EVNT_DEST_ADDR, pipe, + peer_dest_addr); + } else { + bam_write_reg(base, P_EVNT_DEST_ADDR, pipe, + param->peer_phys_addr); + } SPS_DBG2(dev, "sps:bam=0x%pK(va).pipe=%d.peer_bam=0x%x.peer_pipe=%d.\n", dev->base, pipe, diff --git a/drivers/platform/msm/sps/bam.h b/drivers/platform/msm/sps/bam.h index c0e4cde35cba..60fdbff37901 100644 --- a/drivers/platform/msm/sps/bam.h +++ b/drivers/platform/msm/sps/bam.h @@ -1,4 +1,4 @@ -/* Copyright (c) 2011-2017, The Linux Foundation. All rights reserved. +/* Copyright (c) 2011-2017, 2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -83,6 +83,7 @@ struct bam_pipe_parameters { u32 peer_pipe; phys_addr_t data_base; /* Physical address of data FIFO */ u32 data_size; /* Size (bytes) of data FIFO */ + bool dummy_peer; }; /** diff --git a/drivers/platform/msm/sps/sps_bam.c b/drivers/platform/msm/sps/sps_bam.c index 92359c202102..68f4e3e91c90 100644 --- a/drivers/platform/msm/sps/sps_bam.c +++ b/drivers/platform/msm/sps/sps_bam.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2011-2017, 2019, The Linux Foundation. All rights reserved. +/* Copyright (c) 2011-2017, 2019-2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -875,13 +875,15 @@ int sps_bam_pipe_connect(struct sps_pipe *bam_pipe, } /* Determine operational mode */ - if (other_pipe->bam != NULL) { + if ((bam_pipe->connect.options & SPS_O_DUMMY_PEER) || + other_pipe->bam != NULL) { unsigned long iova; - struct sps_bam *peer_bam = (struct sps_bam *)(other_pipe->bam); + struct sps_bam *peer_bam; /* BAM-to-BAM mode */ bam_pipe->state |= BAM_STATE_BAM2BAM; hw_params.mode = BAM_PIPE_MODE_BAM2BAM; - + if (!(bam_pipe->connect.options & SPS_O_DUMMY_PEER)) + peer_bam = (struct sps_bam *)(other_pipe->bam); if (dev->props.options & SPS_BAM_SMMU_EN) { if (bam_pipe->mode == SPS_MODE_SRC) iova = bam_pipe->connect.dest_iova; @@ -892,11 +894,21 @@ int sps_bam_pipe_connect(struct sps_pipe *bam_pipe, BAM_ID(dev), pipe_index, (void *)iova); hw_params.peer_phys_addr = (u32)iova; } else { - hw_params.peer_phys_addr = peer_bam->props.phys_addr; + if (!(bam_pipe->connect.options & SPS_O_DUMMY_PEER)) + hw_params.peer_phys_addr = + peer_bam->props.phys_addr; + } + if (!(bam_pipe->connect.options & SPS_O_DUMMY_PEER)) { + hw_params.peer_phys_addr = + bam_pipe->connect.destination; + hw_params.peer_pipe = + bam_pipe->connect.dest_pipe_index; + } else { + hw_params.peer_phys_addr = + bam_pipe->connect.destination; + hw_params.peer_pipe = other_pipe->pipe_index; + hw_params.dummy_peer = true; } - - hw_params.peer_pipe = other_pipe->pipe_index; - /* Verify FIFO buffers are allocated for BAM-to-BAM pipes */ if (map->desc.phys_base == SPS_ADDR_INVALID || map->data.phys_base == SPS_ADDR_INVALID || diff --git a/drivers/platform/msm/sps/sps_rm.c b/drivers/platform/msm/sps/sps_rm.c index 593fbc1def4b..3ee057a5b7b9 100644 --- a/drivers/platform/msm/sps/sps_rm.c +++ b/drivers/platform/msm/sps/sps_rm.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2011-2015, 2017-2019, The Linux Foundation. All rights reserved. +/* Copyright (c) 2011-2015, 2017-2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -402,16 +402,20 @@ static struct sps_connection *sps_rm_create(struct sps_pipe *pipe) (void *)(&map->src.dev)); goto exit_err; } - map->src.pipe_index = SPS_BAM_PIPE_INVALID; + map->src.pipe_index = SPS_BAM_PIPE_INVALID; } - map->dest.bam = sps_h2bam(map->dest.dev); - if (map->dest.bam == NULL) { - if (map->dest.dev != SPS_DEV_HANDLE_MEM) { - SPS_ERR(sps, "sps:Invalid BAM handle: %pK", - (void *)(&map->dest.dev)); - goto exit_err; - } + + if (!(pipe->connect.options & SPS_O_DUMMY_PEER)) { + map->dest.bam = sps_h2bam(map->dest.dev); + if (map->dest.bam == NULL) { + if (map->dest.dev != SPS_DEV_HANDLE_MEM) { + SPS_ERR(sps, + "sps:Invalid BAM handle: %pK", + (void *)(&map->dest.dev)); + goto exit_err; + } map->dest.pipe_index = SPS_BAM_PIPE_INVALID; + } } /* Check the BAM device for the pipe */ @@ -504,7 +508,8 @@ static struct sps_connection *sps_rm_create(struct sps_pipe *pipe) if (map->data.size == SPSRM_CLEAR) map->data.size = data_size; } else { - map->data.size = 0; + if (!(pipe->connect.options & SPS_O_DUMMY_PEER)) + map->data.size = 0; } if (map->desc.size > SPSRM_MAX_DESC_FIFO_SIZE) { SPS_ERR(sps, "sps:Invalid desc FIFO size: 0x%x", diff --git a/include/linux/msm-sps.h b/include/linux/msm-sps.h index 719f79d50252..5002cbd00d21 100644 --- a/include/linux/msm-sps.h +++ b/include/linux/msm-sps.h @@ -1,4 +1,4 @@ -/* Copyright (c) 2011-2017, The Linux Foundation. All rights reserved. +/* Copyright (c) 2011-2017, 2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -211,6 +211,8 @@ enum sps_option { SPS_O_NO_EP_SYNC = 0x40000000, /* Allow partial polling duing IRQ mode */ SPS_O_HYBRID = 0x80000000, + /* Allow dummy BAM connection */ + SPS_O_DUMMY_PEER = 0x00000400, }; /** From 72b25c6555008928559661c60b8ed637bc4d97f7 Mon Sep 17 00:00:00 2001 From: Santosh Dronamraju Date: Fri, 19 Jun 2020 14:38:35 +0530 Subject: [PATCH 100/126] firmware: qcom: Reinitialize the ring buffer log pointer restore callback function will reinitialize the ring buffer log pointer during restoration from hibernation. Change-Id: I74b4892a9214b74fc70e561982d2f6df17191492 Signed-off-by: Santosh Dronamraju --- drivers/firmware/qcom/tz_log.c | 42 ++++++++++++++++++++++++++++++---- 1 file changed, 38 insertions(+), 4 deletions(-) diff --git a/drivers/firmware/qcom/tz_log.c b/drivers/firmware/qcom/tz_log.c index f8d3dd338506..f0887b823b84 100644 --- a/drivers/firmware/qcom/tz_log.c +++ b/drivers/firmware/qcom/tz_log.c @@ -328,6 +328,7 @@ static struct tzdbg tzdbg = { static struct tzdbg_log_t *g_qsee_log; static dma_addr_t coh_pmem; static uint32_t debug_rw_buf_size; +static bool restore_from_hibernation; /* * Debugfs data structure and functions @@ -718,6 +719,15 @@ static int _disp_tz_log_stats(size_t count) { static struct tzdbg_log_pos_t log_start = {0}; struct tzdbg_log_t *log_ptr; + /* wrap and offset are initialized to zero since tz is coldboot + * during restoration from hibernation.the reason to initialise + * the wrap and offset to zero since it contains previous boot + * values and which are invalid now. + */ + if (restore_from_hibernation) { + log_start.wrap = log_start.offset = 0; + return 0; + } log_ptr = (struct tzdbg_log_t *)((unsigned char *)tzdbg.diag_buf + tzdbg.diag_buf->ring_off - @@ -743,6 +753,16 @@ static int _disp_qsee_log_stats(size_t count) { static struct tzdbg_log_pos_t log_start = {0}; + /* wrap and offset are initialized to zero since tz is coldboot + * during restoration from hibernation. The reason to initialise + * the wrap and offset to zero since it contains previous values + * and which are invalid now. + */ + if (restore_from_hibernation) { + log_start.wrap = log_start.offset = 0; + return 0; + } + return _disp_log_stats(g_qsee_log, &log_start, QSEE_LOG_BUF_SIZE - sizeof(struct tzdbg_log_pos_t), count, TZDBG_QSEE_LOG); @@ -1144,20 +1164,34 @@ static int tz_log_remove(struct platform_device *pdev) #ifdef CONFIG_PM static int tz_log_freeze(struct device *dev) { - dma_free_coherent(dev, QSEE_LOG_BUF_SIZE, (void *)g_qsee_log, - coh_pmem); - + /* This Boolean variable is maintained to initialise the ring buffer + * log pointer to zero during restoration from hibernation + */ + restore_from_hibernation = 1; + if (g_qsee_log) + dma_free_coherent(dev, QSEE_LOG_BUF_SIZE, (void *)g_qsee_log, + coh_pmem); return 0; } static int tz_log_restore(struct device *dev) { + /* ring buffer log pointer needs to be re initialized + * during restoration from hibernation. + */ + if (restore_from_hibernation) { + _disp_tz_log_stats(0); + _disp_qsee_log_stats(0); + } /* Register the log bugger at TZ during hibernation resume. * After hibernation the log buffer is with HLOS as TZ encountered * a coldboot sequence. */ tzdbg_register_qsee_log_buf(to_platform_device(dev)); - + /* This is set back to zero after successful restoration + * from hibernation. + */ + restore_from_hibernation = 0; return 0; } From ea9eaadb9f0ff830742b347df1af6f26d94e4e39 Mon Sep 17 00:00:00 2001 From: Om Parkash Date: Thu, 18 Jun 2020 19:39:15 +0530 Subject: [PATCH 101/126] msm: camera: Remove frame id and timestamp checks for spurious SOF Remove frame id and timestamp checks for spurious SOF for recovering once spurious SOF is received. Change-Id: Iff4510fa5af4ae2e6b4c9f38a44b1f98000bf66d Signed-off-by: Om Parkash --- .../msm/camera/cam_req_mgr/cam_req_mgr_core.c | 22 ------------------- 1 file changed, 22 deletions(-) diff --git a/drivers/media/platform/msm/camera/cam_req_mgr/cam_req_mgr_core.c b/drivers/media/platform/msm/camera/cam_req_mgr/cam_req_mgr_core.c index 35790fd06405..dfbc9b07e4a4 100644 --- a/drivers/media/platform/msm/camera/cam_req_mgr/cam_req_mgr_core.c +++ b/drivers/media/platform/msm/camera/cam_req_mgr/cam_req_mgr_core.c @@ -2494,7 +2494,6 @@ static int cam_req_mgr_cb_notify_trigger( struct crm_task_payload *task_data; bool send_sof = true; int i = 0; - int64_t sof_time_diff = 0; if (!trigger_data) { CAM_ERR(CAM_CRM, "sof_data is NULL"); @@ -2514,10 +2513,6 @@ static int cam_req_mgr_cb_notify_trigger( if (link->dev_sof_evt[i].dev_hdl == trigger_data->dev_hdl) { if (link->dev_sof_evt[i].sof_done == false) { link->dev_sof_evt[i].sof_done = true; - link->dev_sof_evt[i].frame_id = - trigger_data->frame_id; - link->dev_sof_evt[i].timestamp = - trigger_data->sof_timestamp_val; } else CAM_INFO(CAM_CRM, "Received Spurious SOF"); } else if (link->dev_sof_evt[i].sof_done == false) { @@ -2527,23 +2522,6 @@ static int cam_req_mgr_cb_notify_trigger( if (!send_sof) return 0; - if (link->num_sof_src > 1) { - for (i = 0; i < (link->num_sof_src - 1); i++) { - if (link->dev_sof_evt[i].timestamp >= - link->dev_sof_evt[i+1].timestamp) { - sof_time_diff = link->dev_sof_evt[i].timestamp - - link->dev_sof_evt[i+1].timestamp; - } else { - sof_time_diff = - link->dev_sof_evt[i+1].timestamp - - link->dev_sof_evt[i].timestamp; - } - if ((link->dev_sof_evt[i].frame_id != - link->dev_sof_evt[i+1].frame_id) || - sof_time_diff > TIMESTAMP_DIFF_THRESHOLD) - return 0; - } - } for (i = 0; i < link->num_sof_src; i++) link->dev_sof_evt[i].sof_done = false; From d069041cc36ca1efeb4dcaaaf500ca3fe967a696 Mon Sep 17 00:00:00 2001 From: Subash Abhinov Kasiviswanathan Date: Fri, 19 Jun 2020 11:20:07 -0700 Subject: [PATCH 102/126] soc: qcom: Remove WQ_MEM_RECLAIM from rmnet_ps_wq Previously wq was designated as WQ_MEM_RECLAIM. Remove this as it is unnessesary and will result in all notifier work to also be designated as WQ_MEM_RECLAIM. Change-Id: I3248e3aef1594b93c16a1ab8c7c6740d53f68886 Acked-by: Raul Martinez Signed-off-by: Subash Abhinov Kasiviswanathan --- drivers/soc/qcom/qmi_rmnet.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/soc/qcom/qmi_rmnet.c b/drivers/soc/qcom/qmi_rmnet.c index 4a2c7449f46f..963bec244260 100644 --- a/drivers/soc/qcom/qmi_rmnet.c +++ b/drivers/soc/qcom/qmi_rmnet.c @@ -1162,7 +1162,7 @@ void qmi_rmnet_work_init(void *port) return; rmnet_ps_wq = alloc_workqueue("rmnet_powersave_work", - WQ_MEM_RECLAIM | WQ_CPU_INTENSIVE, 1); + WQ_CPU_INTENSIVE, 1); if (!rmnet_ps_wq) return; From c31d8f4e65f3f40683d06b9d0a45553d275aa74c Mon Sep 17 00:00:00 2001 From: Manaf Meethalavalappu Pallikunhi Date: Sun, 7 Jun 2020 22:57:55 +0530 Subject: [PATCH 103/126] ARM: dts: msm: Remove low temperature monitor thermal zones for SA8195P Remove low temperature monitor thermal zones for SA8195P as per latest recommendation. Change-Id: I04f62c54482714cd3c54f1e503c473b4aa7bbb40 Signed-off-by: Manaf Meethalavalappu Pallikunhi --- .../boot/dts/qcom/sa8195p-regulator.dtsi | 29 ------------------- arch/arm64/boot/dts/qcom/sa8195p.dtsi | 25 ++++------------ 2 files changed, 5 insertions(+), 49 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sa8195p-regulator.dtsi b/arch/arm64/boot/dts/qcom/sa8195p-regulator.dtsi index 1ca9f004c58c..9d3ff0740904 100644 --- a/arch/arm64/boot/dts/qcom/sa8195p-regulator.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8195p-regulator.dtsi @@ -41,13 +41,6 @@ qcom,init-voltage-level = ; }; - - ebi_cdev: regulator-cdev { - compatible = "qcom,rpmh-reg-cdev"; - mboxes = <&qmp_aop 0>; - qcom,reg-resource-name = "ebi"; - #cooling-cells = <2>; - }; }; /* PM8195_1 S2 = VDDCX_MM supply */ @@ -79,14 +72,6 @@ qcom,init-voltage-level = ; }; - - mm_cx_cdev: mm-cx-cdev-lvl { - compatible = "qcom,regulator-cooling-device"; - regulator-cdev-supply = <&VDD_MMCX_LEVEL_AO>; - regulator-levels = ; - #cooling-cells = <2>; - }; }; rpmh-regulator-smpa3 { @@ -188,14 +173,6 @@ qcom,init-voltage-level = ; }; - - mx_cdev: mx-cdev-lvl { - compatible = "qcom,regulator-cooling-device"; - regulator-cdev-supply = <&VDD_MX_LEVEL>; - regulator-levels = ; - #cooling-cells = <2>; - }; }; rpmh-regulator-ldoa2 { @@ -647,12 +624,6 @@ = ; qcom,min-dropout-voltage-level = <(-1)>; }; - cx_cdev: regulator-cdev { - compatible = "qcom,rpmh-reg-cdev"; - mboxes = <&qmp_aop 0>; - qcom,reg-resource-name = "cx"; - #cooling-cells = <2>; - }; }; rpmh-regulator-smpe4 { diff --git a/arch/arm64/boot/dts/qcom/sa8195p.dtsi b/arch/arm64/boot/dts/qcom/sa8195p.dtsi index 7b728de681fe..a3e491fe4102 100644 --- a/arch/arm64/boot/dts/qcom/sa8195p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8195p.dtsi @@ -425,26 +425,11 @@ }; &thermal_zones { - cpu-1-7-lowf { - cooling-maps { - /delete-node/ mmcx_vdd_cdev; - }; - }; - gpuss-0-lowf { - cooling-maps { - /delete-node/ mmcx_vdd_cdev; - }; - }; - camera-lowf { - cooling-maps { - /delete-node/ mmcx_vdd_cdev; - }; - }; - mdm-scl-lowf { - cooling-maps { - /delete-node/ mmcx_vdd_cdev; - }; - }; + /delete-node/ cpu-1-7-lowf; + /delete-node/ gpuss-0-lowf; + /delete-node/ camera-lowf; + /delete-node/ mdm-scl-lowf; + /delete-node/ pcie-lowf; lmh-dcvs-01 { trips { From d3769d8a35ad38ce93a42e0791213db390300219 Mon Sep 17 00:00:00 2001 From: Manaf Meethalavalappu Pallikunhi Date: Mon, 8 Jun 2020 00:07:19 +0530 Subject: [PATCH 104/126] ARM: dts: msm: update gpu thermal zone threshold for auto Gen 3 platforms Update gpu thermal zone threshold for sa8155 and sa8195p based on latest recommendation. Change-Id: I585ae564c14385badd99e742ae442feb6a65b5bf Signed-off-by: Manaf Meethalavalappu Pallikunhi --- arch/arm64/boot/dts/qcom/sa8155.dtsi | 2 +- arch/arm64/boot/dts/qcom/sa8195p.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sa8155.dtsi b/arch/arm64/boot/dts/qcom/sa8155.dtsi index c41c5e788f1a..a078eee6690a 100644 --- a/arch/arm64/boot/dts/qcom/sa8155.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8155.dtsi @@ -263,7 +263,7 @@ gpuss-max-step { trips { gpu-trip0 { - temperature = <100000>; + temperature = <105000>; }; }; }; diff --git a/arch/arm64/boot/dts/qcom/sa8195p.dtsi b/arch/arm64/boot/dts/qcom/sa8195p.dtsi index a3e491fe4102..863c5330d7e5 100644 --- a/arch/arm64/boot/dts/qcom/sa8195p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8195p.dtsi @@ -452,7 +452,7 @@ quad-gpuss-max-step { trips { gpu-trip0 { - temperature = <100000>; + temperature = <105000>; }; }; }; From d029cea4a59c6f377450215da42717a5e72e095e Mon Sep 17 00:00:00 2001 From: Manaf Meethalavalappu Pallikunhi Date: Thu, 4 Jun 2020 00:19:33 +0530 Subject: [PATCH 105/126] ARM: dts: msm: enable pmic alarm thermal zone mitigation for Gen3 platform Enable pmic temperature alarm sensor thermal zone mitigation for Gen3 platform targets. It monitors level 1 alarm and does cpu mitigation. Change-Id: Ia223962ea0b9aa066e7c27ebac82fd5ffb2485b3 Signed-off-by: Manaf Meethalavalappu Pallikunhi --- arch/arm64/boot/dts/qcom/pm6155.dtsi | 32 +++- arch/arm64/boot/dts/qcom/sa6155-pmic.dtsi | 60 ++++++ .../boot/dts/qcom/sa8155-pmic-overlay.dtsi | 120 ++++++++++++ arch/arm64/boot/dts/qcom/sa8195-pmic.dtsi | 174 ++++++++++++++++++ 4 files changed, 385 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/pm6155.dtsi b/arch/arm64/boot/dts/qcom/pm6155.dtsi index e96b5638ff3d..c5714d8a93a0 100644 --- a/arch/arm64/boot/dts/qcom/pm6155.dtsi +++ b/arch/arm64/boot/dts/qcom/pm6155.dtsi @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018, The Linux Foundation. All rights reserved. + * Copyright (c) 2018, 2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -173,3 +173,33 @@ #size-cells = <1>; }; }; + +&thermal_zones { + pm6155-1-tz { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-governor = "step_wise"; + thermal-sensors = <&pm6155_1_tz>; + wake-capable-sensor; + + trips { + pm6155_trip0: trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + pm6155_trip1: trip1 { + temperature = <115000>; + hysteresis = <0>; + type = "passive"; + }; + + trip2 { + temperature = <145000>; + hysteresis = <0>; + type = "passive"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/sa6155-pmic.dtsi b/arch/arm64/boot/dts/qcom/sa6155-pmic.dtsi index fb96af75665d..ccef59f575bc 100644 --- a/arch/arm64/boot/dts/qcom/sa6155-pmic.dtsi +++ b/arch/arm64/boot/dts/qcom/sa6155-pmic.dtsi @@ -335,4 +335,64 @@ }; }; }; + + pm6155-1-tz { + cooling-maps { + trip1_cpu0 { + trip = <&pm6155_trip1>; + cooling-device = + <&CPU0 (THERMAL_MAX_LIMIT-1) + (THERMAL_MAX_LIMIT-1)>; + }; + + trip1_cpu1 { + trip = <&pm6155_trip1>; + cooling-device = + <&CPU1 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu2 { + trip = <&pm6155_trip1>; + cooling-device = + <&CPU2 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu3 { + trip = <&pm6155_trip1>; + cooling-device = + <&CPU3 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu4 { + trip = <&pm6155_trip1>; + cooling-device = + <&CPU4 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu5 { + trip = <&pm6155_trip1>; + cooling-device = + <&CPU5 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu6 { + trip = <&pm6155_trip1>; + cooling-device = + <&CPU6 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu7 { + trip = <&pm6155_trip1>; + cooling-device = + <&CPU7 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + }; + }; }; diff --git a/arch/arm64/boot/dts/qcom/sa8155-pmic-overlay.dtsi b/arch/arm64/boot/dts/qcom/sa8155-pmic-overlay.dtsi index fd0725339f20..41df55dbe659 100644 --- a/arch/arm64/boot/dts/qcom/sa8155-pmic-overlay.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8155-pmic-overlay.dtsi @@ -164,6 +164,8 @@ pm8150_1_gpios: &pm8150_gpios { }; }; +#include + &thermal_zones { pm8150_2_temp_alarm: pm8150_2_tz { polling-delay-passive = <100>; @@ -189,5 +191,123 @@ pm8150_1_gpios: &pm8150_gpios { type = "passive"; }; }; + + cooling-maps { + trip1_cpu0 { + trip = <&pm8150_2_trip1>; + cooling-device = + <&CPU0 (THERMAL_MAX_LIMIT-1) + (THERMAL_MAX_LIMIT-1)>; + }; + + trip1_cpu1 { + trip = <&pm8150_2_trip1>; + cooling-device = + <&CPU1 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu2 { + trip = <&pm8150_2_trip1>; + cooling-device = + <&CPU2 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu3 { + trip = <&pm8150_2_trip1>; + cooling-device = + <&CPU3 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu4 { + trip = <&pm8150_2_trip1>; + cooling-device = + <&CPU4 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu5 { + trip = <&pm8150_2_trip1>; + cooling-device = + <&CPU5 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu6 { + trip = <&pm8150_2_trip1>; + cooling-device = + <&CPU6 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu7 { + trip = <&pm8150_2_trip1>; + cooling-device = + <&CPU7 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + }; + }; + + pm8150_tz { + cooling-maps { + trip1_cpu0 { + trip = <&pm8150_trip1>; + cooling-device = + <&CPU0 (THERMAL_MAX_LIMIT-1) + (THERMAL_MAX_LIMIT-1)>; + }; + + trip1_cpu1 { + trip = <&pm8150_trip1>; + cooling-device = + <&CPU1 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu2 { + trip = <&pm8150_trip1>; + cooling-device = + <&CPU2 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu3 { + trip = <&pm8150_trip1>; + cooling-device = + <&CPU3 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu4 { + trip = <&pm8150_trip1>; + cooling-device = + <&CPU4 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu5 { + trip = <&pm8150_trip1>; + cooling-device = + <&CPU5 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu6 { + trip = <&pm8150_trip1>; + cooling-device = + <&CPU6 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu7 { + trip = <&pm8150_trip1>; + cooling-device = + <&CPU7 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + }; }; }; diff --git a/arch/arm64/boot/dts/qcom/sa8195-pmic.dtsi b/arch/arm64/boot/dts/qcom/sa8195-pmic.dtsi index 5236ff4aa086..ebeac6853f38 100644 --- a/arch/arm64/boot/dts/qcom/sa8195-pmic.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8195-pmic.dtsi @@ -120,6 +120,64 @@ type = "passive"; }; }; + + cooling-maps { + trip1_cpu0 { + trip = <&pm8195_1_trip1>; + cooling-device = + <&CPU0 (THERMAL_MAX_LIMIT-1) + (THERMAL_MAX_LIMIT-1)>; + }; + + trip1_cpu1 { + trip = <&pm8195_1_trip1>; + cooling-device = + <&CPU1 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu2 { + trip = <&pm8195_1_trip1>; + cooling-device = + <&CPU2 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu3 { + trip = <&pm8195_1_trip1>; + cooling-device = + <&CPU3 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu4 { + trip = <&pm8195_1_trip1>; + cooling-device = + <&CPU4 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu5 { + trip = <&pm8195_1_trip1>; + cooling-device = + <&CPU5 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu6 { + trip = <&pm8195_1_trip1>; + cooling-device = + <&CPU6 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu7 { + trip = <&pm8195_1_trip1>; + cooling-device = + <&CPU7 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + }; }; pm8195_2_temp_alarm: pm8195_2_tz { @@ -146,6 +204,64 @@ type = "passive"; }; }; + + cooling-maps { + trip1_cpu0 { + trip = <&pm8195_2_trip1>; + cooling-device = + <&CPU0 (THERMAL_MAX_LIMIT-1) + (THERMAL_MAX_LIMIT-1)>; + }; + + trip1_cpu1 { + trip = <&pm8195_2_trip1>; + cooling-device = + <&CPU1 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu2 { + trip = <&pm8195_2_trip1>; + cooling-device = + <&CPU2 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu3 { + trip = <&pm8195_2_trip1>; + cooling-device = + <&CPU3 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu4 { + trip = <&pm8195_2_trip1>; + cooling-device = + <&CPU4 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu5 { + trip = <&pm8195_2_trip1>; + cooling-device = + <&CPU5 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu6 { + trip = <&pm8195_2_trip1>; + cooling-device = + <&CPU6 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu7 { + trip = <&pm8195_2_trip1>; + cooling-device = + <&CPU7 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + }; }; pm8195_3_temp_alarm: pm8195_3_tz { @@ -172,5 +288,63 @@ type = "passive"; }; }; + + cooling-maps { + trip1_cpu0 { + trip = <&pm8195_3_trip1>; + cooling-device = + <&CPU0 (THERMAL_MAX_LIMIT-1) + (THERMAL_MAX_LIMIT-1)>; + }; + + trip1_cpu1 { + trip = <&pm8195_3_trip1>; + cooling-device = + <&CPU1 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu2 { + trip = <&pm8195_3_trip1>; + cooling-device = + <&CPU2 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu3 { + trip = <&pm8195_3_trip1>; + cooling-device = + <&CPU3 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu4 { + trip = <&pm8195_3_trip1>; + cooling-device = + <&CPU4 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu5 { + trip = <&pm8195_3_trip1>; + cooling-device = + <&CPU5 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu6 { + trip = <&pm8195_3_trip1>; + cooling-device = + <&CPU6 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + + trip1_cpu7 { + trip = <&pm8195_3_trip1>; + cooling-device = + <&CPU7 THERMAL_MAX_LIMIT + THERMAL_MAX_LIMIT>; + }; + }; }; }; From 4ba4b4c9bf3a185cdfdc4313e7b2262470e20bf4 Mon Sep 17 00:00:00 2001 From: Sahitya Tummala Date: Mon, 22 Jun 2020 07:34:17 +0530 Subject: [PATCH 106/126] ARM: dts: msm: Add rmtfs_sharedmem support for SDM429W Add shared memory support to enable the rmt_storage service in userspace that allows other processor to access the primary storage device to store its data. Change-Id: If77304f54839e21b95a575994aaedd94c8513716 Signed-off-by: Sahitya Tummala --- arch/arm64/boot/dts/qcom/sdm429.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm429.dtsi b/arch/arm64/boot/dts/qcom/sdm429.dtsi index 249797712a11..3928762357c0 100644 --- a/arch/arm64/boot/dts/qcom/sdm429.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm429.dtsi @@ -338,6 +338,13 @@ status = "disabled"; }; + qcom,rmtfs_sharedmem@00000000 { + compatible = "qcom,sharedmem-uio"; + reg = <0x00000000 0x00180000>; + reg-names = "rmtfs"; + qcom,client-id = <0x00000001>; + }; + sdhc_1: sdhci@7824900 { compatible = "qcom,sdhci-msm"; reg = <0x7824900 0x500>, <0x7824000 0x800>, <0x7824e00 0x200>; From c5e19b2939d490e23b0d0ab19cdef14442910ab7 Mon Sep 17 00:00:00 2001 From: Frank Werner-Krippendorf Date: Tue, 9 Jun 2020 17:21:00 +0200 Subject: [PATCH 107/126] noise: do not assign initiation time in if condition Fixes an error condition reported by checkpatch.pl which caused by assigning a variable in an if condition in wg_noise_handshake_consume_ initiation(). Signed-off-by: Frank Werner-Krippendorf Signed-off-by: Jason A. Donenfeld --- src/noise.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/noise.c b/src/noise.c index d0987cdd5aab..5fbe06368e31 100644 --- a/src/noise.c +++ b/src/noise.c @@ -619,8 +619,8 @@ wg_noise_handshake_consume_initiation(struct message_handshake_initiation *src, memcpy(handshake->hash, hash, NOISE_HASH_LEN); memcpy(handshake->chaining_key, chaining_key, NOISE_HASH_LEN); handshake->remote_index = src->sender_index; - if ((s64)(handshake->last_initiation_consumption - - (initiation_consumption = ktime_get_coarse_boottime_ns())) < 0) + initiation_consumption = ktime_get_coarse_boottime_ns(); + if ((s64)(handshake->last_initiation_consumption - initiation_consumption) < 0) handshake->last_initiation_consumption = initiation_consumption; handshake->state = HANDSHAKE_CONSUMED_INITIATION; up_write(&handshake->lock); From b6eb1897c3f7a3179b2b77bdb28a1a3f6c1f1029 Mon Sep 17 00:00:00 2001 From: Sanjay Singh Date: Thu, 18 Jun 2020 08:25:17 +0530 Subject: [PATCH 108/126] msm: vidc: Update VP9 minimum buffer count Update VP9 output_min_count to 9. Change-Id: I920e534882846ec5e9a5b287e95c2290222fc40f Signed-off-by: Sanjay Singh --- drivers/media/platform/msm/vidc/msm_vdec.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/msm/vidc/msm_vdec.c b/drivers/media/platform/msm/vidc/msm_vdec.c index 8ba90efd6811..bb97ecb25431 100644 --- a/drivers/media/platform/msm/vidc/msm_vdec.c +++ b/drivers/media/platform/msm/vidc/msm_vdec.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2012-2019, The Linux Foundation. All rights reserved. +/* Copyright (c) 2012-2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -542,7 +542,7 @@ struct msm_vidc_format vdec_formats[] = { .type = OUTPUT_PORT, .defer_outputs = true, .input_min_count = 4, - .output_min_count = 11, + .output_min_count = 9, }, }; From 556f3df030ff7727b286aa27454e23b9faa49a22 Mon Sep 17 00:00:00 2001 From: Shadul Shaikh Date: Mon, 4 May 2020 13:38:18 +0530 Subject: [PATCH 109/126] msm: camera: Do CSID reset during CSID release Reset the CSID in release as per HW recommendation. Change-Id: I3c051b9ebc8bebefea999deac0d560de693dfebb Signed-off-by: Shadul Shaikh --- .../platform/msm/camera_v2/sensor/csid/msm_csid.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/msm/camera_v2/sensor/csid/msm_csid.c b/drivers/media/platform/msm/camera_v2/sensor/csid/msm_csid.c index 851bb261ca1b..9f0bd6f9e4f0 100644 --- a/drivers/media/platform/msm/camera_v2/sensor/csid/msm_csid.c +++ b/drivers/media/platform/msm/camera_v2/sensor/csid/msm_csid.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2011-2019, The Linux Foundation. All rights reserved. +/* Copyright (c) 2011-2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -854,6 +854,14 @@ static int msm_csid_release(struct csid_device *csid_dev) msm_camera_enable_irq(csid_dev->irq, false); + if (msm_camera_tz_is_secured( + MSM_CAMERA_TZ_IO_REGION_CSIDCORE0 + csid_dev->pdev->id) == 0) { + msm_camera_vio_w(csid_dev->ctrl_reg->csid_reg.csid_rst_stb_all, + csid_dev->base, + csid_dev->ctrl_reg->csid_reg.csid_rst_cmd_addr, + csid_dev->pdev->id); + } + msm_camera_clk_enable(&csid_dev->pdev->dev, csid_dev->csid_clk_info, csid_dev->csid_clk, From b8fbf4f4803ca1b2fa181ca3d2555cdb61f6f374 Mon Sep 17 00:00:00 2001 From: "Jason A. Donenfeld" Date: Sun, 21 Jun 2020 21:42:21 -0600 Subject: [PATCH 110/126] device: avoid circular netns references Before, we took a reference to the creating netns if the new netns was different. This caused issues with circular references, with two wireguard interfaces swapping namespaces. The solution is to rather not take any extra references at all, but instead simply invalidate the creating netns pointer when that netns is deleted. In order to prevent this from happening again, this commit improves the rough object leak tracking by allowing it to account for created and destroyed interfaces, aside from just peers and keys. That then makes it possible to check for the object leak when having two interfaces take a reference to each others' namespaces. Signed-off-by: Jason A. Donenfeld --- src/compat/compat.h | 4 ++++ src/device.c | 58 +++++++++++++++++++++------------------------ src/device.h | 3 +-- src/netlink.c | 14 +++++++---- src/socket.c | 25 +++++++++++++------ src/tests/netns.sh | 13 +++++++++- 6 files changed, 71 insertions(+), 46 deletions(-) diff --git a/src/compat/compat.h b/src/compat/compat.h index cd1773a7cb33..bf0b5898658d 100644 --- a/src/compat/compat.h +++ b/src/compat/compat.h @@ -1036,6 +1036,10 @@ static inline void skb_reset_redirect(struct sk_buff *skb) #define sw_hash ignore_df = 0; skb->nf_trace = skb->ooo_okay #endif +#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 3, 0) +#define pre_exit exit +#endif + #if defined(ISUBUNTU1604) || defined(ISRHEL7) #include #ifndef _WG_LINUX_SIPHASH_H diff --git a/src/device.c b/src/device.c index 5ea039ba305b..e0f0c48d82db 100644 --- a/src/device.c +++ b/src/device.c @@ -53,17 +53,18 @@ static int wg_open(struct net_device *dev) #endif #endif + mutex_lock(&wg->device_update_lock); ret = wg_socket_init(wg, wg->incoming_port); if (ret < 0) - return ret; - mutex_lock(&wg->device_update_lock); + goto out; list_for_each_entry(peer, &wg->peer_list, peer_list) { wg_packet_send_staged_packets(peer); if (peer->persistent_keepalive_interval) wg_packet_send_keepalive(peer); } +out: mutex_unlock(&wg->device_update_lock); - return 0; + return ret; } #ifdef CONFIG_PM_SLEEP @@ -233,6 +234,7 @@ static void wg_destruct(struct net_device *dev) list_del(&wg->device_list); rtnl_unlock(); mutex_lock(&wg->device_update_lock); + rcu_assign_pointer(wg->creating_net, NULL); wg->incoming_port = 0; wg_socket_reinit(wg, NULL, NULL); /* The final references are cleared in the below calls to destroy_workqueue. */ @@ -248,13 +250,11 @@ static void wg_destruct(struct net_device *dev) skb_queue_purge(&wg->incoming_handshakes); free_percpu(dev->tstats); free_percpu(wg->incoming_handshakes_worker); - if (wg->have_creating_net_ref) - put_net(wg->creating_net); kvfree(wg->index_hashtable); kvfree(wg->peer_hashtable); mutex_unlock(&wg->device_update_lock); - pr_debug("%s: Interface deleted\n", dev->name); + pr_debug("%s: Interface destroyed\n", dev->name); free_netdev(dev); } @@ -306,7 +306,7 @@ static int wg_newlink(struct net *src_net, struct net_device *dev, struct wg_device *wg = netdev_priv(dev); int ret = -ENOMEM; - wg->creating_net = src_net; + rcu_assign_pointer(wg->creating_net, src_net); init_rwsem(&wg->static_identity.lock); mutex_init(&wg->socket_update_lock); mutex_init(&wg->device_update_lock); @@ -407,30 +407,26 @@ static struct rtnl_link_ops link_ops __read_mostly = { .newlink = wg_newlink, }; -static int wg_netdevice_notification(struct notifier_block *nb, - unsigned long action, void *data) +static void wg_netns_pre_exit(struct net *net) { - struct net_device *dev = ((struct netdev_notifier_info *)data)->dev; - struct wg_device *wg = netdev_priv(dev); + struct wg_device *wg; - ASSERT_RTNL(); - - if (action != NETDEV_REGISTER || dev->netdev_ops != &netdev_ops) - return 0; - - if (dev_net(dev) == wg->creating_net && wg->have_creating_net_ref) { - put_net(wg->creating_net); - wg->have_creating_net_ref = false; - } else if (dev_net(dev) != wg->creating_net && - !wg->have_creating_net_ref) { - wg->have_creating_net_ref = true; - get_net(wg->creating_net); + rtnl_lock(); + list_for_each_entry(wg, &device_list, device_list) { + if (rcu_access_pointer(wg->creating_net) == net) { + pr_debug("%s: Creating namespace exiting\n", wg->dev->name); + netif_carrier_off(wg->dev); + mutex_lock(&wg->device_update_lock); + rcu_assign_pointer(wg->creating_net, NULL); + wg_socket_reinit(wg, NULL, NULL); + mutex_unlock(&wg->device_update_lock); + } } - return 0; + rtnl_unlock(); } -static struct notifier_block netdevice_notifier = { - .notifier_call = wg_netdevice_notification +static struct pernet_operations pernet_ops = { + .pre_exit = wg_netns_pre_exit }; int __init wg_device_init(void) @@ -443,18 +439,18 @@ int __init wg_device_init(void) return ret; #endif - ret = register_netdevice_notifier(&netdevice_notifier); + ret = register_pernet_device(&pernet_ops); if (ret) goto error_pm; ret = rtnl_link_register(&link_ops); if (ret) - goto error_netdevice; + goto error_pernet; return 0; -error_netdevice: - unregister_netdevice_notifier(&netdevice_notifier); +error_pernet: + unregister_pernet_device(&pernet_ops); error_pm: #ifdef CONFIG_PM_SLEEP unregister_pm_notifier(&pm_notifier); @@ -465,7 +461,7 @@ error_pm: void wg_device_uninit(void) { rtnl_link_unregister(&link_ops); - unregister_netdevice_notifier(&netdevice_notifier); + unregister_pernet_device(&pernet_ops); #ifdef CONFIG_PM_SLEEP unregister_pm_notifier(&pm_notifier); #endif diff --git a/src/device.h b/src/device.h index b15a8be9d816..4d0144e16947 100644 --- a/src/device.h +++ b/src/device.h @@ -40,7 +40,7 @@ struct wg_device { struct net_device *dev; struct crypt_queue encrypt_queue, decrypt_queue; struct sock __rcu *sock4, *sock6; - struct net *creating_net; + struct net __rcu *creating_net; struct noise_static_identity static_identity; struct workqueue_struct *handshake_receive_wq, *handshake_send_wq; struct workqueue_struct *packet_crypt_wq; @@ -56,7 +56,6 @@ struct wg_device { unsigned int num_peers, device_update_gen; u32 fwmark; u16 incoming_port; - bool have_creating_net_ref; }; int wg_device_init(void); diff --git a/src/netlink.c b/src/netlink.c index 93cdbfecfeee..3dde0ede48d3 100644 --- a/src/netlink.c +++ b/src/netlink.c @@ -509,11 +509,15 @@ static int wg_set_device(struct sk_buff *skb, struct genl_info *info) if (flags & ~__WGDEVICE_F_ALL) goto out; - ret = -EPERM; - if ((info->attrs[WGDEVICE_A_LISTEN_PORT] || - info->attrs[WGDEVICE_A_FWMARK]) && - !ns_capable(wg->creating_net->user_ns, CAP_NET_ADMIN)) - goto out; + if (info->attrs[WGDEVICE_A_LISTEN_PORT] || info->attrs[WGDEVICE_A_FWMARK]) { + struct net *net; + rcu_read_lock(); + net = rcu_dereference(wg->creating_net); + ret = !net || !ns_capable(net->user_ns, CAP_NET_ADMIN) ? -EPERM : 0; + rcu_read_unlock(); + if (ret) + goto out; + } ++wg->device_update_gen; diff --git a/src/socket.c b/src/socket.c index f9018027fc13..c33e2c81635f 100644 --- a/src/socket.c +++ b/src/socket.c @@ -347,6 +347,7 @@ static void set_sock_opts(struct socket *sock) int wg_socket_init(struct wg_device *wg, u16 port) { + struct net *net; int ret; struct udp_tunnel_sock_cfg cfg = { .sk_user_data = wg, @@ -371,37 +372,47 @@ int wg_socket_init(struct wg_device *wg, u16 port) }; #endif + rcu_read_lock(); + net = rcu_dereference(wg->creating_net); + net = net ? maybe_get_net(net) : NULL; + rcu_read_unlock(); + if (unlikely(!net)) + return -ENONET; + #if IS_ENABLED(CONFIG_IPV6) retry: #endif - ret = udp_sock_create(wg->creating_net, &port4, &new4); + ret = udp_sock_create(net, &port4, &new4); if (ret < 0) { pr_err("%s: Could not create IPv4 socket\n", wg->dev->name); - return ret; + goto out; } set_sock_opts(new4); - setup_udp_tunnel_sock(wg->creating_net, new4, &cfg); + setup_udp_tunnel_sock(net, new4, &cfg); #if IS_ENABLED(CONFIG_IPV6) if (ipv6_mod_enabled()) { port6.local_udp_port = inet_sk(new4->sk)->inet_sport; - ret = udp_sock_create(wg->creating_net, &port6, &new6); + ret = udp_sock_create(net, &port6, &new6); if (ret < 0) { udp_tunnel_sock_release(new4); if (ret == -EADDRINUSE && !port && retries++ < 100) goto retry; pr_err("%s: Could not create IPv6 socket\n", wg->dev->name); - return ret; + goto out; } set_sock_opts(new6); - setup_udp_tunnel_sock(wg->creating_net, new6, &cfg); + setup_udp_tunnel_sock(net, new6, &cfg); } #endif wg_socket_reinit(wg, new4->sk, new6 ? new6->sk : NULL); - return 0; + ret = 0; +out: + put_net(net); + return ret; } void wg_socket_reinit(struct wg_device *wg, struct sock *new4, diff --git a/src/tests/netns.sh b/src/tests/netns.sh index e4dc485b6e43..11fd7f6d3d41 100755 --- a/src/tests/netns.sh +++ b/src/tests/netns.sh @@ -590,9 +590,20 @@ ip0 link set wg0 up kill $ncat_pid ip0 link del wg0 +# Ensure there aren't circular reference loops +ip1 link add wg1 type wireguard +ip2 link add wg2 type wireguard +ip1 link set wg1 netns $netns2 +ip2 link set wg2 netns $netns1 +pp ip netns delete $netns1 +pp ip netns delete $netns2 +pp ip netns add $netns1 +pp ip netns add $netns2 + +sleep 2 # Wait for cleanup and grace periods declare -A objects while read -t 0.1 -r line 2>/dev/null || [[ $? -ne 142 ]]; do - [[ $line =~ .*(wg[0-9]+:\ [A-Z][a-z]+\ [0-9]+)\ .*(created|destroyed).* ]] || continue + [[ $line =~ .*(wg[0-9]+:\ [A-Z][a-z]+\ ?[0-9]*)\ .*(created|destroyed).* ]] || continue objects["${BASH_REMATCH[1]}"]+="${BASH_REMATCH[2]}" done < /dev/kmsg alldeleted=1 From 4941d3b34b59dc39c23250425494f8dce19eedd0 Mon Sep 17 00:00:00 2001 From: "Jason A. Donenfeld" Date: Sun, 21 Jun 2020 23:31:17 -0600 Subject: [PATCH 111/126] netns: workaround bad 5.2.y backport ca7a03c4175 was backported to 5.2 to fix 7d9e5f422150, but 7d9e5f422150 wasn't added until 5.3, so this fix for a reference underflow in 5.3 becomes a memory leak in 5.2. Signed-off-by: Jason A. Donenfeld --- src/tests/netns.sh | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/tests/netns.sh b/src/tests/netns.sh index 11fd7f6d3d41..c83ddc7aca27 100755 --- a/src/tests/netns.sh +++ b/src/tests/netns.sh @@ -346,7 +346,8 @@ ip1 -4 rule add table main suppress_prefixlength 0 if [[ $(ip1 -4 rule show all) == *suppress_prefixlength* ]]; then # Flood the pings instead of sending just one, to trigger routing table reference counting bugs. n1 ping -W 1 -c 100 -f 192.168.99.7 - n1 ping -W 1 -c 100 -f abab::1111 + # ca7a03c got ported to 5.2 when it shouldn't have. + [[ $(< /proc/version) =~ ^Linux\ version\ 5\.2[.\ ] ]] || n1 ping -W 1 -c 100 -f abab::1111 fi # Have ns2 NAT into wg0 packets from ns0, but return an icmp error along the right route. From 75148ccdc2d9e37bcce4f4151d42004220bde54e Mon Sep 17 00:00:00 2001 From: Ashok Vuyyuru Date: Tue, 2 Jun 2020 13:27:30 +0530 Subject: [PATCH 112/126] msm: ipa3: Add support to fastmap/geometry for each CB Adding changes to support enable/disable fastmap for each CB and setting geometry range for AP SMMU node. Change-Id: I4286561536cd8e41f68b91ce45913337c8ad279f Signed-off-by: Ashok Vuyyuru --- drivers/platform/msm/ipa/ipa_v3/ipa.c | 45 +++++++++++++++++++++++---- 1 file changed, 39 insertions(+), 6 deletions(-) diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa.c b/drivers/platform/msm/ipa/ipa_v3/ipa.c index be5c72374a45..a1191427c30c 100644 --- a/drivers/platform/msm/ipa/ipa_v3/ipa.c +++ b/drivers/platform/msm/ipa/ipa_v3/ipa.c @@ -145,6 +145,7 @@ static struct { bool present[IPA_SMMU_CB_MAX]; bool arm_smmu; bool fast_map; + bool fast_map_arr[IPA_SMMU_CB_MAX]; bool s1_bypass_arr[IPA_SMMU_CB_MAX]; bool use_64_bit_dma_mask; u32 ipa_base; @@ -8016,6 +8017,9 @@ static int ipa_smmu_wlan_cb_probe(struct device *dev) "dma-coherent"); cb->valid = true; + if (of_property_read_bool(dev->of_node, + "qcom,smmu-fast-map")) + smmu_info.fast_map_arr[IPA_SMMU_CB_WLAN] = true; if (of_property_read_bool(dev->of_node, "qcom,smmu-s1-bypass") || ipa3_ctx->ipa_config_is_mhi) { smmu_info.s1_bypass_arr[IPA_SMMU_CB_WLAN] = true; @@ -8043,7 +8047,8 @@ static int ipa_smmu_wlan_cb_probe(struct device *dev) } IPADBG(" WLAN SMMU ATTR ATOMIC\n"); - if (smmu_info.fast_map) { + if (smmu_info.fast_map_arr[IPA_SMMU_CB_WLAN] || + smmu_info.fast_map) { if (iommu_domain_set_attr(cb->iommu, DOMAIN_ATTR_FAST, &fast)) { @@ -8056,7 +8061,8 @@ static int ipa_smmu_wlan_cb_probe(struct device *dev) } pr_info("IPA smmu_info.s1_bypass_arr[WLAN]=%d smmu_info.fast_map=%d\n", - smmu_info.s1_bypass_arr[IPA_SMMU_CB_WLAN], smmu_info.fast_map); + smmu_info.s1_bypass_arr[IPA_SMMU_CB_WLAN], + smmu_info.fast_map_arr[IPA_SMMU_CB_WLAN]); ret = iommu_attach_device(cb->iommu, dev); if (ret) { @@ -8124,6 +8130,10 @@ static int ipa_smmu_uc_cb_probe(struct device *dev) IPAERR("Fail to read UC start/size iova addresses\n"); return ret; } + + if (of_property_read_bool(dev->of_node, + "qcom,smmu-fast-map")) + smmu_info.fast_map_arr[IPA_SMMU_CB_UC] = true; cb->va_start = iova_ap_mapping[0]; cb->va_size = iova_ap_mapping[1]; cb->va_end = cb->va_start + cb->va_size; @@ -8188,7 +8198,8 @@ static int ipa_smmu_uc_cb_probe(struct device *dev) } IPADBG("SMMU atomic set\n"); - if (smmu_info.fast_map) { + if (smmu_info.fast_map_arr[IPA_SMMU_CB_UC] || + smmu_info.fast_map) { if (iommu_domain_set_attr(cb->mapping->domain, DOMAIN_ATTR_FAST, &fast)) { @@ -8202,7 +8213,8 @@ static int ipa_smmu_uc_cb_probe(struct device *dev) } pr_info("IPA smmu_info.s1_bypass_arr[UC]=%d smmu_info.fast_map=%d\n", - smmu_info.s1_bypass_arr[IPA_SMMU_CB_UC], smmu_info.fast_map); + smmu_info.s1_bypass_arr[IPA_SMMU_CB_UC], + smmu_info.fast_map_arr[IPA_SMMU_CB_UC]); IPADBG("UC CB PROBE sub pdev=%pK attaching IOMMU device\n", dev); ret = arm_iommu_attach_device(cb->dev, cb->mapping); @@ -8251,6 +8263,8 @@ static int ipa_smmu_ap_cb_probe(struct device *dev) u32 size_p; phys_addr_t iova; phys_addr_t pa; + u32 geometry_mapping[2]; + struct iommu_domain_geometry geometry = {0}; IPADBG("AP CB probe: sub pdev=%pK\n", dev); @@ -8265,6 +8279,9 @@ static int ipa_smmu_ap_cb_probe(struct device *dev) IPAERR("Fail to read AP start/size iova addresses\n"); return result; } + if (of_property_read_bool(dev->of_node, + "qcom,smmu-fast-map")) + smmu_info.fast_map_arr[IPA_SMMU_CB_AP] = true; cb->va_start = iova_ap_mapping[0]; cb->va_size = iova_ap_mapping[1]; cb->va_end = cb->va_start + cb->va_size; @@ -8325,7 +8342,8 @@ static int ipa_smmu_ap_cb_probe(struct device *dev) } IPADBG("AP/USB SMMU atomic set\n"); - if (smmu_info.fast_map) { + if (smmu_info.fast_map_arr[IPA_SMMU_CB_AP] || + smmu_info.fast_map) { if (iommu_domain_set_attr(cb->mapping->domain, DOMAIN_ATTR_FAST, &fast)) { @@ -8335,11 +8353,26 @@ static int ipa_smmu_ap_cb_probe(struct device *dev) return -EIO; } IPADBG("SMMU fast map set\n"); + result = of_property_read_u32_array(dev->of_node, + "qcom,geometry-mapping", + geometry_mapping, 2); + if (!result) { + IPAERR("AP Geometry start = %x size= %x\n", + geometry_mapping[0], geometry_mapping[1]); + geometry.aperture_start = geometry_mapping[0]; + geometry.aperture_end = geometry_mapping[1]; + if (iommu_domain_set_attr(cb->mapping->domain, + DOMAIN_ATTR_GEOMETRY, &geometry)) { + IPAERR("Failed to set AP GEOMETRY\n"); + return -EIO; + } + } } } pr_info("IPA smmu_info.s1_bypass_arr[AP]=%d smmu_info.fast_map=%d\n", - smmu_info.s1_bypass_arr[IPA_SMMU_CB_AP], smmu_info.fast_map); + smmu_info.s1_bypass_arr[IPA_SMMU_CB_AP], + smmu_info.fast_map_arr[IPA_SMMU_CB_AP]); result = arm_iommu_attach_device(cb->dev, cb->mapping); if (result) { From b1054302cb13a61c712cc96a2be1f4ec358ff24b Mon Sep 17 00:00:00 2001 From: Ashok Vuyyuru Date: Fri, 12 Jun 2020 13:43:19 +0530 Subject: [PATCH 113/126] ARM: dts: msm: Add support to enable/disable fastmap for each CB In IPA driver till fastmap DT flag was using commonly for all nodes. Adding changes to support to enable/disable fastmap for each CB and geometry range for AP node. Change-Id: Ia93ad024e7611cdbdb1f79281d6e1d20c7d19ed4 Signed-off-by: Ashok Vuyyuru --- arch/arm64/boot/dts/qcom/sdxprairie.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sdxprairie.dtsi b/arch/arm64/boot/dts/qcom/sdxprairie.dtsi index b2e0fb5853bf..8548d20c3808 100644 --- a/arch/arm64/boot/dts/qcom/sdxprairie.dtsi +++ b/arch/arm64/boot/dts/qcom/sdxprairie.dtsi @@ -547,7 +547,6 @@ qcom,use-ipa-pm; qcom,use-xbl-boot; qcom,arm-smmu; - qcom,smmu-fast-map; qcom,wlan-ce-db-over-pcie; qcom,bandwidth-vote-for-ipa; qcom,msm-bus,name = "ipa"; @@ -608,6 +607,8 @@ /* modem tables in IMEM */ <0x14688000 0x14688000 0x3000>; qcom,ipa-q6-smem-size = <26624>; + qcom,smmu-fast-map; + qcom,geometry-mapping = <0x0 0xF0000000>; }; ipa_smmu_wlan: ipa_smmu_wlan { From 2fbaef864227150ca9bbc78b57614c313c2dac9d Mon Sep 17 00:00:00 2001 From: "Jason A. Donenfeld" Date: Tue, 23 Jun 2020 16:12:11 -0600 Subject: [PATCH 114/126] version: bump Signed-off-by: Jason A. Donenfeld --- src/dkms.conf | 2 +- src/version.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/dkms.conf b/src/dkms.conf index 1136a274a542..fd7eedbab2f4 100644 --- a/src/dkms.conf +++ b/src/dkms.conf @@ -1,5 +1,5 @@ PACKAGE_NAME="wireguard" -PACKAGE_VERSION="1.0.20200611" +PACKAGE_VERSION="1.0.20200623" AUTOINSTALL=yes BUILT_MODULE_NAME="wireguard" diff --git a/src/version.h b/src/version.h index b8361d4b38cc..3c0506acae75 100644 --- a/src/version.h +++ b/src/version.h @@ -1,3 +1,3 @@ #ifndef WIREGUARD_VERSION -#define WIREGUARD_VERSION "1.0.20200611" +#define WIREGUARD_VERSION "1.0.20200623" #endif From 6eacb79ea85da352599f9bfe25db0892c9fae2ab Mon Sep 17 00:00:00 2001 From: Richard J K Date: Mon, 29 Jun 2020 13:11:43 +0530 Subject: [PATCH 115/126] Fix compilation as part of upmerge from mainline Change-Id: Idc478ea3683b79372c87d069dfbd30694c9baacb Signed-off-by: Richard J K --- drivers/clk/qcom/scc-sm6150.c | 14 -------------- 1 file changed, 14 deletions(-) diff --git a/drivers/clk/qcom/scc-sm6150.c b/drivers/clk/qcom/scc-sm6150.c index fe04716e5e56..1790b13a993c 100644 --- a/drivers/clk/qcom/scc-sm6150.c +++ b/drivers/clk/qcom/scc-sm6150.c @@ -114,20 +114,6 @@ static const struct clk_div_table post_div_table[] = { { } }; -static struct clk_alpha_pll_postdiv scc_pll_out_aux = { - .offset = 0x0, - .width = 2, - .post_div_table = post_div_table, - .num_post_div = ARRAY_SIZE(post_div_table), - .postdiv = POSTDIV_ODD, - .clkr.hw.init = &(struct clk_init_data){ - .name = "scc_pll_out_aux", - .parent_names = (const char *[]){ "scc_pll_out_aux2" }, - .num_parents = 1, - .ops = &clk_alpha_pll_postdiv_ops, - }, -}; - static const struct freq_tbl ftbl_scc_main_rcg_clk_src[] = { F(100000000, P_SCC_PLL_OUT_AUX, 2, 0, 0), F(200000000, P_SCC_PLL_OUT_AUX, 1, 0, 0), From 3917d7135cc605da3d607df089f16f9773aa67f9 Mon Sep 17 00:00:00 2001 From: "Jason A. Donenfeld" Date: Wed, 24 Jun 2020 16:06:03 -0600 Subject: [PATCH 116/126] receive: account for napi_gro_receive never returning GRO_DROP The napi_gro_receive function no longer returns GRO_DROP ever, making handling GRO_DROP dead code. This commit removes that dead code. Further, it's not even clear that device drivers have any business in taking action after passing off received packets; that's arguably out of their hands. Signed-off-by: Jason A. Donenfeld --- src/receive.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/src/receive.c b/src/receive.c index 055d3dd58077..4f7141afa776 100644 --- a/src/receive.c +++ b/src/receive.c @@ -419,14 +419,8 @@ static void wg_packet_consume_data_done(struct wg_peer *peer, if (unlikely(routed_peer != peer)) goto dishonest_packet_peer; - if (unlikely(napi_gro_receive(&peer->napi, skb) == GRO_DROP)) { - ++dev->stats.rx_dropped; - net_dbg_ratelimited("%s: Failed to give packet to userspace from peer %llu (%pISpfsc)\n", - dev->name, peer->internal_id, - &peer->endpoint.addr); - } else { - update_rx_stats(peer, message_data_len(len_before_trim)); - } + napi_gro_receive(&peer->napi, skb); + update_rx_stats(peer, message_data_len(len_before_trim)); return; dishonest_packet_peer: From 7adc5ff9285ed79f255aafcde3bc5ae71005e013 Mon Sep 17 00:00:00 2001 From: "Jason A. Donenfeld" Date: Fri, 26 Jun 2020 04:34:29 -0600 Subject: [PATCH 117/126] compat: rhel 8.3 backported skb_reset_redirect Reported-by: Vladimir Benes Signed-off-by: Jason A. Donenfeld --- src/compat/compat.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/compat/compat.h b/src/compat/compat.h index bf0b5898658d..b7650c410e3d 100644 --- a/src/compat/compat.h +++ b/src/compat/compat.h @@ -16,6 +16,9 @@ #define ISRHEL7 #elif RHEL_MAJOR == 8 #define ISRHEL8 +#if RHEL_MINOR == 2 +#define ISCENTOS8 +#endif #endif #endif #ifdef UTS_UBUNTU_RELEASE_ABI @@ -1012,7 +1015,7 @@ out: #define COMPAT_CANNOT_USE_MAX_MTU #endif -#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 5, 14) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 5, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 29) && !defined(ISUBUNTU1910) && !defined(ISUBUNTU1904)) +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 5, 14) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 5, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 29) && !defined(ISUBUNTU1910) && !defined(ISUBUNTU1904) && (!defined(ISRHEL8) || defined(ISCENTOS8))) #include #include static inline void skb_reset_redirect(struct sk_buff *skb) From ae2212da560cffe0daec1878fefde46a83906f24 Mon Sep 17 00:00:00 2001 From: "Jason A. Donenfeld" Date: Mon, 29 Jun 2020 16:29:47 -0600 Subject: [PATCH 118/126] compat: SUSE 15.1 is the final SUSE we need to support >=15.2 is in SUSE's kernel now. Signed-off-by: Jason A. Donenfeld --- src/compat/compat.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/src/compat/compat.h b/src/compat/compat.h index b7650c410e3d..06d2666d2d0e 100644 --- a/src/compat/compat.h +++ b/src/compat/compat.h @@ -35,7 +35,7 @@ #endif #endif #if defined(CONFIG_SUSE_KERNEL) && LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 12, 0) -#define ISOPENSUSE15 +#define ISOPENSUSE151 #endif #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0) @@ -284,7 +284,7 @@ static const struct in6_addr __compat_in6addr_any = IN6ADDR_ANY_INIT; #define in6addr_any __compat_in6addr_any #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 2, 0) && !defined(ISOPENSUSE15) +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 2, 0) && !defined(ISOPENSUSE151) #include #include #include @@ -380,7 +380,7 @@ static inline bool rng_is_initialized(void) } #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && !defined(ISOPENSUSE15) +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && !defined(ISOPENSUSE151) static inline int get_random_bytes_wait(void *buf, int nbytes) { int ret = wait_for_random_bytes(); @@ -523,7 +523,7 @@ static inline void __compat_kvfree(const void *addr) #define priv_destructor destructor #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && !defined(ISOPENSUSE15) +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && !defined(ISOPENSUSE151) #define wg_newlink(a,b,c,d,e) wg_newlink(a,b,c,d) #endif @@ -662,12 +662,12 @@ struct __compat_dummy_container { char dev; }; #define COMPAT_CANNOT_USE_AVX512 #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) && !defined(ISOPENSUSE15) +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) && !defined(ISOPENSUSE151) #include #define genl_dump_check_consistent(a, b) genl_dump_check_consistent(a, b, &genl_family) #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && !defined(ISRHEL7) && !defined(ISOPENSUSE15) +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && !defined(ISRHEL7) && !defined(ISOPENSUSE151) static inline void *skb_put_data(struct sk_buff *skb, const void *data, unsigned int len) { void *tmp = skb_put(skb, len); @@ -724,7 +724,7 @@ static inline void cpu_to_le32_array(u32 *buf, unsigned int words) } #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 14, 0) && !defined(ISOPENSUSE15) +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 14, 0) && !defined(ISOPENSUSE151) #include static inline void crypto_xor_cpy(u8 *dst, const u8 *src1, const u8 *src2, unsigned int size) @@ -826,7 +826,7 @@ static __always_inline void old_rcu_barrier(void) #define COMPAT_CANNOT_DEPRECIATE_BH_RCU #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 10) && !defined(ISRHEL8) && !defined(ISOPENSUSE15) +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 10) && !defined(ISRHEL8) && !defined(ISOPENSUSE151) static inline void skb_mark_not_on_list(struct sk_buff *skb) { skb->next = NULL; From 6af810721785ecae09a50ebf28d4c8234f67b163 Mon Sep 17 00:00:00 2001 From: "Jason A. Donenfeld" Date: Mon, 29 Jun 2020 19:06:20 -0600 Subject: [PATCH 119/126] device: implement header_ops->parse_protocol for AF_PACKET WireGuard uses skb->protocol to determine packet type, and bails out if it's not set or set to something it's not expecting. For AF_PACKET injection, we need to support its call chain of: packet_sendmsg -> packet_snd -> packet_parse_headers -> dev_parse_header_protocol -> parse_protocol Without a valid parse_protocol, this returns zero, and wireguard then rejects the skb. So, this wires up the ip_tunnel handler for layer 3 packets for that case. Reported-by: Hans Wippel Signed-off-by: Jason A. Donenfeld --- src/device.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/device.c b/src/device.c index e0f0c48d82db..1155783a8f10 100644 --- a/src/device.c +++ b/src/device.c @@ -270,6 +270,7 @@ static void wg_setup(struct net_device *dev) max(sizeof(struct ipv6hdr), sizeof(struct iphdr)); dev->netdev_ops = &netdev_ops; + dev->header_ops = &ip_tunnel_header_ops; dev->hard_header_len = 0; dev->addr_len = 0; dev->needed_headroom = DATA_PACKET_HEAD_ROOM; From f4367ebaef9244fc777875be2c765cc03a1b5b72 Mon Sep 17 00:00:00 2001 From: "Jason A. Donenfeld" Date: Tue, 30 Jun 2020 17:12:06 -0600 Subject: [PATCH 120/126] queueing: make use of ip_tunnel_parse_protocol Now that wg_examine_packet_protocol has been added for general consumption as ip_tunnel_parse_protocol, it's possible to remove wg_examine_packet_protocol and simply use the new ip_tunnel_parse_protocol function directly. Signed-off-by: Jason A. Donenfeld --- src/queueing.h | 19 ++----------------- src/receive.c | 2 +- 2 files changed, 3 insertions(+), 18 deletions(-) diff --git a/src/queueing.h b/src/queueing.h index e88eb93af9d8..bab170b95938 100644 --- a/src/queueing.h +++ b/src/queueing.h @@ -11,6 +11,7 @@ #include #include #include +#include struct wg_device; struct wg_peer; @@ -65,25 +66,9 @@ struct packet_cb { #define PACKET_CB(skb) ((struct packet_cb *)((skb)->cb)) #define PACKET_PEER(skb) (PACKET_CB(skb)->keypair->entry.peer) -/* Returns either the correct skb->protocol value, or 0 if invalid. */ -static inline __be16 wg_examine_packet_protocol(struct sk_buff *skb) -{ - if (skb_network_header(skb) >= skb->head && - (skb_network_header(skb) + sizeof(struct iphdr)) <= - skb_tail_pointer(skb) && - ip_hdr(skb)->version == 4) - return htons(ETH_P_IP); - if (skb_network_header(skb) >= skb->head && - (skb_network_header(skb) + sizeof(struct ipv6hdr)) <= - skb_tail_pointer(skb) && - ipv6_hdr(skb)->version == 6) - return htons(ETH_P_IPV6); - return 0; -} - static inline bool wg_check_packet_protocol(struct sk_buff *skb) { - __be16 real_protocol = wg_examine_packet_protocol(skb); + __be16 real_protocol = ip_tunnel_parse_protocol(skb); return real_protocol && skb->protocol == real_protocol; } diff --git a/src/receive.c b/src/receive.c index 4f7141afa776..172ef823d327 100644 --- a/src/receive.c +++ b/src/receive.c @@ -392,7 +392,7 @@ static void wg_packet_consume_data_done(struct wg_peer *peer, #ifndef COMPAT_CANNOT_USE_CSUM_LEVEL skb->csum_level = ~0; /* All levels */ #endif - skb->protocol = wg_examine_packet_protocol(skb); + skb->protocol = ip_tunnel_parse_protocol(skb); if (skb->protocol == htons(ETH_P_IP)) { len = ntohs(ip_hdr(skb)->tot_len); if (unlikely(len < sizeof(struct iphdr))) From d9e60cad625e96a916b7950e9706f7fa3c563c60 Mon Sep 17 00:00:00 2001 From: "Jason A. Donenfeld" Date: Tue, 30 Jun 2020 17:15:34 -0600 Subject: [PATCH 121/126] compat: backport ip_tunnel_parse_protocol and ip_tunnel_header_ops These are required for moving wg_examine_packet_protocol out of wireguard and into upstream. Signed-off-by: Jason A. Donenfeld --- src/compat/compat.h | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/src/compat/compat.h b/src/compat/compat.h index 06d2666d2d0e..ea6d624c2bc5 100644 --- a/src/compat/compat.h +++ b/src/compat/compat.h @@ -1043,6 +1043,28 @@ static inline void skb_reset_redirect(struct sk_buff *skb) #define pre_exit exit #endif +#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 8, 0) +#include +static inline __be16 ip_tunnel_parse_protocol(const struct sk_buff *skb) +{ + if (skb_network_header(skb) >= skb->head && + (skb_network_header(skb) + sizeof(struct iphdr)) <= skb_tail_pointer(skb) && + ip_hdr(skb)->version == 4) + return htons(ETH_P_IP); + if (skb_network_header(skb) >= skb->head && + (skb_network_header(skb) + sizeof(struct ipv6hdr)) <= skb_tail_pointer(skb) && + ipv6_hdr(skb)->version == 6) + return htons(ETH_P_IPV6); + return 0; +} +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 1, 0) || defined(ISRHEL8) +static const struct header_ops ip_tunnel_header_ops = { .parse_protocol = ip_tunnel_parse_protocol }; +#else +#define header_ops hard_header_len +#define ip_tunnel_header_ops *(char *)0 - (char *)0 +#endif +#endif + #if defined(ISUBUNTU1604) || defined(ISRHEL7) #include #ifndef _WG_LINUX_SIPHASH_H From d553aa7c52ac78c1963886afb74ba861b0b7b0fc Mon Sep 17 00:00:00 2001 From: "Jason A. Donenfeld" Date: Sun, 12 Jul 2020 21:27:57 -0600 Subject: [PATCH 122/126] version: bump Signed-off-by: Jason A. Donenfeld --- src/dkms.conf | 2 +- src/version.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/dkms.conf b/src/dkms.conf index fd7eedbab2f4..8653841329f2 100644 --- a/src/dkms.conf +++ b/src/dkms.conf @@ -1,5 +1,5 @@ PACKAGE_NAME="wireguard" -PACKAGE_VERSION="1.0.20200623" +PACKAGE_VERSION="1.0.20200712" AUTOINSTALL=yes BUILT_MODULE_NAME="wireguard" diff --git a/src/version.h b/src/version.h index 3c0506acae75..c495ef5e59a3 100644 --- a/src/version.h +++ b/src/version.h @@ -1,3 +1,3 @@ #ifndef WIREGUARD_VERSION -#define WIREGUARD_VERSION "1.0.20200623" +#define WIREGUARD_VERSION "1.0.20200712" #endif From 2a1b895ec2f529a75a6bc63fd5b6baee2b1735b3 Mon Sep 17 00:00:00 2001 From: "Jason A. Donenfeld" Date: Sun, 12 Jul 2020 22:00:10 -0600 Subject: [PATCH 123/126] compat: drop support for SUSE 15.1 Now that WireGuard is properly supported by 15.2 and people have had sufficient time to upgrade, we can drop support for 15.1 in this compat module. Signed-off-by: Jason A. Donenfeld --- src/compat/compat.h | 17 +++++++---------- 1 file changed, 7 insertions(+), 10 deletions(-) diff --git a/src/compat/compat.h b/src/compat/compat.h index ea6d624c2bc5..dbb798934e89 100644 --- a/src/compat/compat.h +++ b/src/compat/compat.h @@ -34,9 +34,6 @@ #define ISUBUNTU1910 #endif #endif -#if defined(CONFIG_SUSE_KERNEL) && LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 12, 0) -#define ISOPENSUSE151 -#endif #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0) #error "WireGuard requires Linux >= 3.10" @@ -284,7 +281,7 @@ static const struct in6_addr __compat_in6addr_any = IN6ADDR_ANY_INIT; #define in6addr_any __compat_in6addr_any #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 2, 0) && !defined(ISOPENSUSE151) +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 2, 0) #include #include #include @@ -380,7 +377,7 @@ static inline bool rng_is_initialized(void) } #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && !defined(ISOPENSUSE151) +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) static inline int get_random_bytes_wait(void *buf, int nbytes) { int ret = wait_for_random_bytes(); @@ -523,7 +520,7 @@ static inline void __compat_kvfree(const void *addr) #define priv_destructor destructor #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && !defined(ISOPENSUSE151) +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) #define wg_newlink(a,b,c,d,e) wg_newlink(a,b,c,d) #endif @@ -662,12 +659,12 @@ struct __compat_dummy_container { char dev; }; #define COMPAT_CANNOT_USE_AVX512 #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) && !defined(ISOPENSUSE151) +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) #include #define genl_dump_check_consistent(a, b) genl_dump_check_consistent(a, b, &genl_family) #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && !defined(ISRHEL7) && !defined(ISOPENSUSE151) +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && !defined(ISRHEL7) static inline void *skb_put_data(struct sk_buff *skb, const void *data, unsigned int len) { void *tmp = skb_put(skb, len); @@ -724,7 +721,7 @@ static inline void cpu_to_le32_array(u32 *buf, unsigned int words) } #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 14, 0) && !defined(ISOPENSUSE151) +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 14, 0) #include static inline void crypto_xor_cpy(u8 *dst, const u8 *src1, const u8 *src2, unsigned int size) @@ -826,7 +823,7 @@ static __always_inline void old_rcu_barrier(void) #define COMPAT_CANNOT_DEPRECIATE_BH_RCU #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 10) && !defined(ISRHEL8) && !defined(ISOPENSUSE151) +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 10) && !defined(ISRHEL8) static inline void skb_mark_not_on_list(struct sk_buff *skb) { skb->next = NULL; From 0b9091cb454082873ed0bdcbb927233d59ca5e67 Mon Sep 17 00:00:00 2001 From: UtsavBalar1231 Date: Tue, 14 Jul 2020 09:10:36 +0530 Subject: [PATCH 124/126] drm: msm: silence FOD related logging Signed-off-by: UtsavBalar1231 --- drivers/gpu/drm/msm/dsi-staging/dsi_display.c | 3 --- drivers/gpu/drm/msm/dsi-staging/dsi_panel.c | 4 ++-- drivers/gpu/drm/msm/sde/sde_crtc.c | 2 +- 3 files changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_display.c b/drivers/gpu/drm/msm/dsi-staging/dsi_display.c index 78c3745f99d0..289cef8ab476 100644 --- a/drivers/gpu/drm/msm/dsi-staging/dsi_display.c +++ b/drivers/gpu/drm/msm/dsi-staging/dsi_display.c @@ -239,9 +239,6 @@ int dsi_display_set_backlight(struct drm_connector *connector, rc = dsi_panel_set_backlight(panel, (u32)bl_temp); if (rc) pr_err("unable to set backlight\n"); - else - pr_info("set backlight successfully at: bl_scale = %u, bl_scale_ad = %u, bl_lvl = %u\n", - bl_scale, bl_scale_ad, (u32)bl_temp); rc = dsi_display_clk_ctrl(dsi_display->dsi_clk_handle, DSI_CORE_CLK, DSI_CLK_OFF); diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c b/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c index 57fcbea00fe3..5a8e94efce2e 100644 --- a/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c +++ b/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c @@ -871,12 +871,12 @@ int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl) } if (bl_lvl > 0 && panel->last_bl_lvl == 0) { - pr_info("crc off when quickly power on\n"); + pr_debug("crc off when quickly power on\n"); rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_DISP_CRC_OFF); } if (bl_lvl == 0) { - pr_info("DC off when last backlight is 0\n"); + pr_debug("DC off when last backlight is 0\n"); panel->dc_enable = false; } panel->last_bl_lvl = bl_lvl; diff --git a/drivers/gpu/drm/msm/sde/sde_crtc.c b/drivers/gpu/drm/msm/sde/sde_crtc.c index 4007e662efda..82e3c2f6885a 100644 --- a/drivers/gpu/drm/msm/sde/sde_crtc.c +++ b/drivers/gpu/drm/msm/sde/sde_crtc.c @@ -3230,7 +3230,7 @@ void sde_crtc_fod_ui_ready(struct drm_crtc *crtc, finger_down = cstate->finger_down; notify_data.data = &finger_down; notify_data.is_primary = true; - pr_err("fingerprint status: %s", + pr_debug("fingerprint status: %s", finger_down ? "pressed" : "up"); dsi_display->panel->fod_ui_ready = finger_down; sysfs_notify(&dsi_display->drm_conn->kdev->kobj, NULL, "fod_ui_ready"); From bb56551c339e6baae139f0c707aa6eaacbdc5577 Mon Sep 17 00:00:00 2001 From: UtsavBalar1231 Date: Tue, 14 Jul 2020 09:11:07 +0530 Subject: [PATCH 125/126] dsp: q6afe: silence port id related logging Signed-off-by: UtsavBalar1231 --- techpack/audio/dsp/q6afe.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/techpack/audio/dsp/q6afe.c b/techpack/audio/dsp/q6afe.c index 6a357dba197a..05d842f21a1d 100644 --- a/techpack/audio/dsp/q6afe.c +++ b/techpack/audio/dsp/q6afe.c @@ -3478,10 +3478,10 @@ int afe_tdm_port_start(u16 port_id, struct afe_tdm_port_config *tdm_port, if (cal_block != NULL) { afe_top = (struct audio_cal_info_afe_top *)cal_block->cal_info; - pr_info("%s: top_id:%x acdb_id:%d port_id:0x%x\n", + pr_debug("%s: top_id:%x acdb_id:%d port_id:0x%x\n", __func__, afe_top->topology, afe_top->acdb_id, port_id); } else { - pr_info("%s: port_id:0x%x\n", __func__, port_id); + pr_debug("%s: port_id:0x%x\n", __func__, port_id); } ret = afe_send_cmd_port_start(port_id); @@ -4502,10 +4502,10 @@ static int __afe_port_start(u16 port_id, union afe_port_config *afe_config, if (cal_block != NULL) { afe_top = (struct audio_cal_info_afe_top *)cal_block->cal_info; - pr_info("%s: top_id:%x acdb_id:%d port_id:0x%x\n", + pr_debug("%s: top_id:%x acdb_id:%d port_id:0x%x\n", __func__, afe_top->topology, afe_top->acdb_id, port_id); } else { - pr_info("%s: port_id:0x%x\n", __func__, port_id); + pr_debug("%s: port_id:0x%x\n", __func__, port_id); } ret = afe_send_cmd_port_start(port_id); @@ -7117,7 +7117,7 @@ int afe_close(int port_id) ret = -EINVAL; goto fail_cmd; } - pr_info("%s: port_id = 0x%x\n", __func__, port_id); + pr_debug("%s: port_id = 0x%x\n", __func__, port_id); if ((port_id == RT_PROXY_DAI_001_RX) || (port_id == RT_PROXY_DAI_002_TX)) { pr_debug("%s: before decrementing pcm_afe_instance %d\n", From 553842b69ac0253f9ad43f47b61a67115d737c89 Mon Sep 17 00:00:00 2001 From: UtsavBalar1231 Date: Tue, 14 Jul 2020 09:11:29 +0530 Subject: [PATCH 126/126] printk: filter out some spam Signed-off-by: UtsavBalar1231 --- kernel/printk/printk.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/kernel/printk/printk.c b/kernel/printk/printk.c index 3da683b6ad75..7f63d4f20055 100644 --- a/kernel/printk/printk.c +++ b/kernel/printk/printk.c @@ -824,6 +824,9 @@ static ssize_t devkmsg_write(struct kiocb *iocb, struct iov_iter *from) /* QG-D */ if (strstr(line, "healthd")|| strstr(line, "cacert") || + strstr(line, "ueventd") || + strstr(line, "logd") || + strstr(line, "CSPL") || !strcmp(line, "CP: Couldn't")) goto free; }