The NAND based sa2150p SOM has a level shifter which is enabled through GPIO 16. This commit configures GPIO 16 to low state by-default to enable the shifter. Change-Id: I770e6b49e9dca2e9d7f6076ef772a279a4c2a25e Signed-off-by: Rishi Gupta <rishgupt@codeaurora.org>
114 lines
2.3 KiB
Plaintext
114 lines
2.3 KiB
Plaintext
/* Copyright (c) 2020, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/dts-v1/;
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#include "sa2145p-ccard.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. SA2145P CCARD NAND DC";
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compatible = "qcom,sa2145p-ccard", "qcom,qcs403", "qcom,sa2145p",
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"qcom,ccard";
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qcom,board-id = <25 2>, <25 0x102>;
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};
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&qnand_1 {
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status = "okay";
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};
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&sdhc_1 {
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status = "disabled";
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};
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&blsp1_uart1_hs {
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status = "ok";
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};
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&blsp1_uart4_hs {
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status = "disabled";
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};
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&wlan_fw_mem {
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reg = <0x0 0x86400000 0x0 0x100000>;
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};
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&qseecom_mem {
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size = <0 0x400000>;
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};
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&soc {
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/delete-node/ qcom,wlan_dsp@7000000;
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/delete-node/ qcom,icnss@18800000;
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};
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&reserved_mem {
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/delete-node/ wlan_msa_region@88E0000;
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/delete-node/ wlan_fw_mem@86400000;
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};
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&tlmm {
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wakeup_gpio_default: wakeup_gpio_default {
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mux {
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pins = "gpio77";
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function = "gpio";
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};
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config {
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pins = "gpio77";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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};
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&sdx_ext_ipc {
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qcom,wakeup-gpio-out = <&tlmm 77 0x00>;
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};
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ðqos_hw {
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rxc-skew-ps = <720>;
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io-macro-info {
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rx-prog-swap;
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rx-dll-bypass;
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};
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};
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&tlmm {
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/delete-node/ mdss_hdmi_ddc_active;
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/delete-node/ mdss_hdmi_ddc_suspend;
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rgmii_level_shifter: rgmii_level_shifter {
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mux {
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pins = "gpio16";
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function = "gpio";
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};
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config {
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pins = "gpio16";
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drive-strength = <2>;
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bias-pull-down;
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output-low;
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};
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};
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};
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ðqos_hw {
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pinctrl-names = "dev-emac-mdc", "dev-emac-mdio",
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"dev-emac-rgmii_txd0_state", "dev-emac-rgmii_txd1_state",
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"dev-emac-rgmii_txd2_state", "dev-emac-rgmii_txd3_state",
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"dev-emac-rgmii_txc_state", "dev-emac-rgmii_tx_ctl_state",
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"dev-emac-rgmii_rxd0_state", "dev-emac-rgmii_rxd1_state",
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"dev-emac-rgmii_rxd2_state", "dev-emac-rgmii_rxd3_state",
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"dev-emac-rgmii_rxc_state", "dev-emac-rgmii_rx_ctl_state",
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"dev-emac-phy_intr", "dev-emac-phy_reset_state",
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"dev-emac-rgmii_lvl_shift_state";
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pinctrl-16 = <&rgmii_level_shifter>;
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};
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