diff --git a/location/gnssd/release/gnss-aidl-service_IGnssV2_ISlsiGnssV1 b/location/gnssd/release/gnss-aidl-service_IGnssV2_ISlsiGnssV1
index dbb508e..6176947 100644
Binary files a/location/gnssd/release/gnss-aidl-service_IGnssV2_ISlsiGnssV1 and b/location/gnssd/release/gnss-aidl-service_IGnssV2_ISlsiGnssV1 differ
diff --git a/location/gnssd/release/gnssd b/location/gnssd/release/gnssd
index 42ae131..0613586 100644
Binary files a/location/gnssd/release/gnssd and b/location/gnssd/release/gnssd differ
diff --git a/location/gnssd/release/gps.cfg b/location/gnssd/release/gps.cfg
index 7147bc4..c4efd8b 100644
--- a/location/gnssd/release/gps.cfg
+++ b/location/gnssd/release/gps.cfg
@@ -14,11 +14,6 @@ gnss_device_type=K041
 
 # Chip_Configuration_TrackerDebugMode = 0x10
 
-# bit 0 set means CRC image
-# bit 1 set means CL using a flat patch (one step) - this avoids the 32 byte alignment on
-# xfr from AP mem to Ext Mem on S5300.
-cl_options=2
-
 # enables CHPP for SPI port
 # uncomment the *chpp* lines below (and comment gnss_device-data_port_kepslim_present above) to use SPI+CHPP
 # when using CHPP, make sure to enable the CHPP defines in build_settings.mak
@@ -58,13 +53,13 @@ Chip_Configuration_RefClkControl=0x24
 ## 6-  TXC 0W76870003
 ## E.g. Use Kyocera, and ignore CP's polynomial: DCXO_CrystalType=0x11
 ## E.g. Use KDS, and Use CP's polynomial: DCXO_CrystalType=0x05
-Chip_Configuration_DCXO_CrystalType=0x13
+Chip_Configuration_DCXO_CrystalType=0x11
 
 ## Optionally specify DXCO Inflection point temperature,        ####
 #    This will override any default value or value in Crystal type ####
 #    Value is degrees C x 100 E.g. 2855 = 28.55 deg C
 #    Range should be 2000 to 3100
-#Chip_Configuration_DCXO_InflectionPoint=2450
+#Chip_Configuration_DCXO_InflectionPoint=2855
 
 
 ### 2C48 L1 only MCW ###
@@ -73,6 +68,7 @@ Chip_Configuration_RfMiscCtrl=0x80008001
 
 # DVS: 0 = Disabled (default), 1 = Enabled
 # DFS: 0 = Disabled (default), 1 = Enabled
+# JJM: disabling due to suspicion that DVFS is contributing to GAL BAD ISM
 Chip_Configuration_FeatureCfg_DVS = 1
 Chip_Configuration_FeatureCfg_DFS = 1