From d84122a5089efc399315c6183d3641548d747796 Mon Sep 17 00:00:00 2001 From: Robin Peng Date: Mon, 22 Nov 2021 11:49:00 +0800 Subject: [PATCH] Move bluejay source code into bluejay device folders from: f220743932f0dac2bbf2a7e07906c4a2db4fe243 Bug: 206553389 Change-Id: I1bc1f02cf1f8d5e2d93a033737048930d7d3d062 --- .clang-format | 13 + Android.bp | 36 + Android.mk | 30 + AndroidProducts.mk | 23 + CleanSpec.mk | 74 + NOTICE | 190 + aosp_bluejay.mk | 24 + audio/bluejay/audio-tables.mk | 74 + audio/bluejay/config/audio_effects.xml | 63 + .../config/audio_platform_configuration.xml | 294 + .../config/audio_policy_configuration.xml | 255 + ...cy_configuration_a2dp_offload_disabled.xml | 234 + ...icy_configuration_bluetooth_legacy_hal.xml | 234 + audio/bluejay/config/audio_policy_volumes.xml | 227 + audio/bluejay/config/mixer_paths.xml | 801 + audio/bluejay/config/mixer_paths_factory.xml | 295 + .../config/sound_trigger_configuration.xml | 33 + .../cs35l41/crus_sp_cal_mixer_paths.xml | 307 + .../cs35l41/fw/R-cs35l41-dsp1-spk-cali.bin | Bin 0 -> 1828 bytes .../cs35l41/fw/R-cs35l41-dsp1-spk-diag.bin | Bin 0 -> 2608 bytes .../cs35l41/fw/R-cs35l41-dsp1-spk-prot.bin | Bin 0 -> 4412 bytes .../cs35l41/fw/cs35l41-dsp1-spk-cali.bin | Bin 0 -> 1828 bytes .../cs35l41/fw/cs35l41-dsp1-spk-cali.wmfw | Bin 0 -> 33764 bytes .../cs35l41/fw/cs35l41-dsp1-spk-diag.bin | Bin 0 -> 2612 bytes .../cs35l41/fw/cs35l41-dsp1-spk-diag.wmfw | Bin 0 -> 33152 bytes .../cs35l41/fw/cs35l41-dsp1-spk-prot.bin | Bin 0 -> 4412 bytes .../cs35l41/fw/cs35l41-dsp1-spk-prot.wmfw | Bin 0 -> 33764 bytes audio/bluejay/factory-audio-tables.mk | 22 + audio/bluejay/tuning/bluenote/exported.xml | 298 + audio/bluejay/tuning/bluenote/recording.gatf | Bin 0 -> 137192 bytes audio/bluejay/tuning/bluenote/template.xml | 289 + .../tuning_constraints_combination.xml | 1284 + audio/bluejay/tuning/fortemedia/BLUETOOTH.dat | Bin 0 -> 147110 bytes .../bluejay/tuning/fortemedia/BLUETOOTH.mods | 36839 ++++++++++ audio/bluejay/tuning/fortemedia/HANDSET.dat | Bin 0 -> 133102 bytes audio/bluejay/tuning/fortemedia/HANDSET.mods | 33331 +++++++++ audio/bluejay/tuning/fortemedia/HANDSFREE.dat | Bin 0 -> 49054 bytes .../bluejay/tuning/fortemedia/HANDSFREE.mods | 12283 ++++ audio/bluejay/tuning/fortemedia/HEADSET.dat | Bin 0 -> 224154 bytes audio/bluejay/tuning/fortemedia/HEADSET.mods | 56133 ++++++++++++++++ .../tuning/waves/tests/test_config.ini | 58 + .../tuning/waves/tests/test_preset.mps | Bin 0 -> 186955 bytes audio/bluejay/tuning/waves/waves_config.ini | 58 + audio/bluejay/tuning/waves/waves_preset.mps | Bin 0 -> 171152 bytes bluejay/BoardConfig.mk | 25 + bluejay/display_colordata_dev_cal0.pb | Bin 0 -> 2712 bytes .../base/core/res/res/values/config.xml | 171 + .../base/core/res/res/values/dimens.xml | 33 + .../base/core/res/res/xml/power_profile.xml | 196 + .../res/drawable/rounded_corner_bottom.xml | 25 + .../res/drawable/rounded_corner_top.xml | 25 + .../SystemUI/res/values-h800dp/dimens.xml | 21 + .../SystemUI/res/values-land/dimen.xml | 25 + .../packages/SystemUI/res/values/config.xml | 81 + .../packages/SystemUI/res/values/dimens.xml | 53 + .../packages/apps/Nfc/res/values/config.xml | 24 + .../SettingsOverlayGB17L/Android.bp | 8 + .../SettingsOverlayGB17L/AndroidManifest.xml | 9 + .../res/drawable/regulatory_info.png | Bin 0 -> 56373 bytes bluetooth_power_limits_bluejay_JP.csv | 34 + bluetooth_power_limits_bluejay_ROW.csv | 34 + bluetooth_power_limits_bluejay_US.csv | 34 + board-info.txt | 1 + conf/init.bluejay.rc | 19 + conf/init.blueport.rc | 48 + device-bluejay.mk | 170 + .../generate-factory-images-package.sh | 25 + factory_bluejay.mk | 34 + .../base/core/res/res/values/config.xml | 36 + gps.xml.b3 | 84 + gps_user.xml.b3 | 84 + init.insmod.bluejay.cfg | 18 + media_profiles_bluejay.xml | 1086 + nfc/libnfc-hal-st.conf | 159 + nfc/libnfc-nci.conf | 115 + nfc/libse-gto-hal.conf | 2 + nfc/manifest_nfc.xml | 11 + nfc/manifest_se_bluejay.xml | 7 + powerstats/bluejay/Android.bp | 44 + powerstats/bluejay/service.cpp | 74 + self-extractors_bluejay/Android.mk | 0 self-extractors_bluejay/METADATA | 3 + self-extractors_bluejay/PART1 | 12 + self-extractors_bluejay/PART2 | 22 + self-extractors_bluejay/PART3 | 12 + self-extractors_bluejay/PROLOGUE | 2 + self-extractors_bluejay/extract-lists.txt | 20 + .../google_devices/COPYRIGHT | 1 + .../google_devices/LICENSE | 264 + .../google_devices/staging/Android.bp.txt | 54 + .../google_devices/staging/Android.mk | 73 + .../staging/BoardConfigPartial.mk | 37 + .../google_devices/staging/device-partial.mk | 34 + self-extractors_bluejay/root/android-info.txt | 6 + .../root/proprietary/BoardConfigVendor.mk | 17 + .../root/proprietary/device-vendor.mk | 17 + thermal_info_config_bluejay.json | 980 + 97 files changed, 148171 insertions(+) create mode 100644 .clang-format create mode 100644 Android.bp create mode 100644 Android.mk create mode 100644 AndroidProducts.mk create mode 100644 CleanSpec.mk create mode 100644 NOTICE create mode 100644 aosp_bluejay.mk create mode 100644 audio/bluejay/audio-tables.mk create mode 100644 audio/bluejay/config/audio_effects.xml create mode 100644 audio/bluejay/config/audio_platform_configuration.xml create mode 100644 audio/bluejay/config/audio_policy_configuration.xml create mode 100644 audio/bluejay/config/audio_policy_configuration_a2dp_offload_disabled.xml create mode 100644 audio/bluejay/config/audio_policy_configuration_bluetooth_legacy_hal.xml create mode 100644 audio/bluejay/config/audio_policy_volumes.xml create mode 100644 audio/bluejay/config/mixer_paths.xml create mode 100644 audio/bluejay/config/mixer_paths_factory.xml create mode 100644 audio/bluejay/config/sound_trigger_configuration.xml create mode 100644 audio/bluejay/cs35l41/crus_sp_cal_mixer_paths.xml create mode 100644 audio/bluejay/cs35l41/fw/R-cs35l41-dsp1-spk-cali.bin create mode 100644 audio/bluejay/cs35l41/fw/R-cs35l41-dsp1-spk-diag.bin create mode 100644 audio/bluejay/cs35l41/fw/R-cs35l41-dsp1-spk-prot.bin create mode 100644 audio/bluejay/cs35l41/fw/cs35l41-dsp1-spk-cali.bin create mode 100644 audio/bluejay/cs35l41/fw/cs35l41-dsp1-spk-cali.wmfw create mode 100644 audio/bluejay/cs35l41/fw/cs35l41-dsp1-spk-diag.bin create mode 100644 audio/bluejay/cs35l41/fw/cs35l41-dsp1-spk-diag.wmfw create mode 100644 audio/bluejay/cs35l41/fw/cs35l41-dsp1-spk-prot.bin create mode 100644 audio/bluejay/cs35l41/fw/cs35l41-dsp1-spk-prot.wmfw create mode 100644 audio/bluejay/factory-audio-tables.mk create mode 100644 audio/bluejay/tuning/bluenote/exported.xml create mode 100644 audio/bluejay/tuning/bluenote/recording.gatf create mode 100644 audio/bluejay/tuning/bluenote/template.xml create mode 100644 audio/bluejay/tuning/bluenote/tuning_constraints_combination.xml create mode 100644 audio/bluejay/tuning/fortemedia/BLUETOOTH.dat create mode 100644 audio/bluejay/tuning/fortemedia/BLUETOOTH.mods create mode 100644 audio/bluejay/tuning/fortemedia/HANDSET.dat create mode 100644 audio/bluejay/tuning/fortemedia/HANDSET.mods create mode 100644 audio/bluejay/tuning/fortemedia/HANDSFREE.dat create mode 100644 audio/bluejay/tuning/fortemedia/HANDSFREE.mods create mode 100644 audio/bluejay/tuning/fortemedia/HEADSET.dat create mode 100644 audio/bluejay/tuning/fortemedia/HEADSET.mods create mode 100644 audio/bluejay/tuning/waves/tests/test_config.ini create mode 100644 audio/bluejay/tuning/waves/tests/test_preset.mps create mode 100644 audio/bluejay/tuning/waves/waves_config.ini create mode 100644 audio/bluejay/tuning/waves/waves_preset.mps create mode 100644 bluejay/BoardConfig.mk create mode 100644 bluejay/display_colordata_dev_cal0.pb create mode 100644 bluejay/overlay/frameworks/base/core/res/res/values/config.xml create mode 100644 bluejay/overlay/frameworks/base/core/res/res/values/dimens.xml create mode 100644 bluejay/overlay/frameworks/base/core/res/res/xml/power_profile.xml create mode 100644 bluejay/overlay/frameworks/base/packages/SystemUI/res/drawable/rounded_corner_bottom.xml create mode 100644 bluejay/overlay/frameworks/base/packages/SystemUI/res/drawable/rounded_corner_top.xml create mode 100644 bluejay/overlay/frameworks/base/packages/SystemUI/res/values-h800dp/dimens.xml create mode 100644 bluejay/overlay/frameworks/base/packages/SystemUI/res/values-land/dimen.xml create mode 100644 bluejay/overlay/frameworks/base/packages/SystemUI/res/values/config.xml create mode 100644 bluejay/overlay/frameworks/base/packages/SystemUI/res/values/dimens.xml create mode 100644 bluejay/overlay/packages/apps/Nfc/res/values/config.xml create mode 100644 bluejay/overlay_packages/SettingsOverlayGB17L/Android.bp create mode 100644 bluejay/overlay_packages/SettingsOverlayGB17L/AndroidManifest.xml create mode 100644 bluejay/overlay_packages/SettingsOverlayGB17L/res/drawable/regulatory_info.png create mode 100644 bluetooth_power_limits_bluejay_JP.csv create mode 100644 bluetooth_power_limits_bluejay_ROW.csv create mode 100644 bluetooth_power_limits_bluejay_US.csv create mode 100644 board-info.txt create mode 100644 conf/init.bluejay.rc create mode 100644 conf/init.blueport.rc create mode 100644 device-bluejay.mk create mode 100755 factory-images_bluejay/generate-factory-images-package.sh create mode 100644 factory_bluejay.mk create mode 100644 factory_bluejay/overlay/frameworks/base/core/res/res/values/config.xml create mode 100644 gps.xml.b3 create mode 100644 gps_user.xml.b3 create mode 100644 init.insmod.bluejay.cfg create mode 100644 media_profiles_bluejay.xml create mode 100644 nfc/libnfc-hal-st.conf create mode 100644 nfc/libnfc-nci.conf create mode 100644 nfc/libse-gto-hal.conf create mode 100644 nfc/manifest_nfc.xml create mode 100644 nfc/manifest_se_bluejay.xml create mode 100644 powerstats/bluejay/Android.bp create mode 100644 powerstats/bluejay/service.cpp create mode 100644 self-extractors_bluejay/Android.mk create mode 100644 self-extractors_bluejay/METADATA create mode 100644 self-extractors_bluejay/PART1 create mode 100644 self-extractors_bluejay/PART2 create mode 100644 self-extractors_bluejay/PART3 create mode 100644 self-extractors_bluejay/PROLOGUE create mode 100644 self-extractors_bluejay/extract-lists.txt create mode 100644 self-extractors_bluejay/google_devices/COPYRIGHT create mode 100644 self-extractors_bluejay/google_devices/LICENSE create mode 100644 self-extractors_bluejay/google_devices/staging/Android.bp.txt create mode 100644 self-extractors_bluejay/google_devices/staging/Android.mk create mode 100644 self-extractors_bluejay/google_devices/staging/BoardConfigPartial.mk create mode 100644 self-extractors_bluejay/google_devices/staging/device-partial.mk create mode 100644 self-extractors_bluejay/root/android-info.txt create mode 100644 self-extractors_bluejay/root/proprietary/BoardConfigVendor.mk create mode 100644 self-extractors_bluejay/root/proprietary/device-vendor.mk create mode 100644 thermal_info_config_bluejay.json diff --git a/.clang-format b/.clang-format new file mode 100644 index 0000000..361ce94 --- /dev/null +++ b/.clang-format @@ -0,0 +1,13 @@ +BasedOnStyle: Google +AccessModifierOffset: -2 +AllowShortFunctionsOnASingleLine: Inline +ColumnLimit: 100 +CommentPragmas: NOLINT:.* +DerivePointerAlignment: false +IndentWidth: 4 +ContinuationIndentWidth: 8 +PointerAlignment: Right +TabWidth: 4 +UseTab: Never +AllowShortIfStatementsOnASingleLine: false +SpacesBeforeTrailingComments: 2 diff --git a/Android.bp b/Android.bp new file mode 100644 index 0000000..b657691 --- /dev/null +++ b/Android.bp @@ -0,0 +1,36 @@ +soong_namespace { + imports: [ + "hardware/google/interfaces", + "hardware/google/pixel", + ], +} + +package { + default_applicable_licenses: ["device_google_bluejay_license"], +} + +// Added automatically by a large-scale-change that took the approach of +// 'apply every license found to every target'. While this makes sure we respect +// every license restriction, it may not be entirely correct. +// +// e.g. GPL in an MIT project might only apply to the contrib/ directory. +// +// Please consider splitting the single license below into multiple licenses, +// taking care not to lose any license_kind information, and overriding the +// default license using the 'licenses: [...]' property on targets as needed. +// +// For unused files, consider creating a 'fileGroup' with "//visibility:private" +// to attach the license to, and including a comment whether the files may be +// used in the current project. +// See: http://go/android-license-faq +license { + name: "device_google_bluejay_license", + visibility: [":__subpackages__"], + license_kinds: [ + "SPDX-license-identifier-Apache-2.0", + "SPDX-license-identifier-BSD", + ], + license_text: [ + "NOTICE", + ], +} diff --git a/Android.mk b/Android.mk new file mode 100644 index 0000000..099b64b --- /dev/null +++ b/Android.mk @@ -0,0 +1,30 @@ +# +# Copyright (C) 2011 The Android Open-Source Project +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +# WARNING: Everything listed here will be built on ALL platforms, +# including x86, the universal, and the SDK. Modules must be uniquely +# named (liblights.panda), and must build everywhere, or limit themselves +# to only building on ARM if they include assembly. Individual makefiles +# are responsible for having their own logic, for fine-grained control. + +LOCAL_PATH := $(call my-dir) + +# if some modules are built directly from this directory (not subdirectories), +# their rules should be written here. + +ifeq ($(USES_DEVICE_GOOGLE_BLUEJAY),true) + include $(call first-makefiles-under,$(LOCAL_PATH)) +endif diff --git a/AndroidProducts.mk b/AndroidProducts.mk new file mode 100644 index 0000000..9816d97 --- /dev/null +++ b/AndroidProducts.mk @@ -0,0 +1,23 @@ +# +# Copyright (C) 2019 The Android Open-Source Project +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +PRODUCT_MAKEFILES := \ + $(LOCAL_DIR)/aosp_bluejay.mk \ + $(LOCAL_DIR)/factory_bluejay.mk + + +COMMON_LUNCH_CHOICES := \ + aosp_bluejay-userdebug diff --git a/CleanSpec.mk b/CleanSpec.mk new file mode 100644 index 0000000..10cf0fb --- /dev/null +++ b/CleanSpec.mk @@ -0,0 +1,74 @@ +# Copyright (C) 2012 The Android Open Source Project +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +# If you don't need to do a full clean build but would like to touch +# a file or delete some intermediate files, add a clean step to the end +# of the list. These steps will only be run once, if they haven't been +# run before. +# +# E.g.: +# $(call add-clean-step, touch -c external/sqlite/sqlite3.h) +# $(call add-clean-step, rm -rf $(PRODUCT_OUT)/obj/STATIC_LIBRARIES/libz_intermediates) +# +# Always use "touch -c" and "rm -f" or "rm -rf" to gracefully deal with +# files that are missing or have been moved. +# +# Use $(PRODUCT_OUT) to get to the "out/target/product/blah/" directory. +# Use $(OUT_DIR) to refer to the "out" directory. +# +# If you need to re-do something that's already mentioned, just copy +# the command and add it to the bottom of the list. E.g., if a change +# that you made last week required touching a file and a change you +# made today requires touching the same file, just copy the old +# touch step and add it to the end of the list. +# +# ************************************************ +# NEWER CLEAN STEPS MUST BE AT THE END OF THE LIST +# ************************************************ + +# For example: +#$(call add-clean-step, rm -rf $(OUT_DIR)/target/common/obj/APPS/AndroidTests_intermediates) +#$(call add-clean-step, rm -rf $(OUT_DIR)/target/common/obj/JAVA_LIBRARIES/core_intermediates) +#$(call add-clean-step, find $(OUT_DIR) -type f -name "IGTalkSession*" -print0 | xargs -0 rm -f) +#$(call add-clean-step, rm -rf $(PRODUCT_OUT)/data/*) +$(call add-clean-step, find $(PRODUCT_OUT) -name "*.apk" | xargs rm) + +# ************************************************ +# NEWER CLEAN STEPS MUST BE AT THE END OF THE LIST +# ************************************************ +$(call add-clean-step, rm -rf $(PRODUCT_OUT)/obj/SHARED_LIBRARIES/libsurfaceflinger_intermediates) +$(call add-clean-step, rm -rf $(PRODUCT_OUT)/obj/SHARED_LIBRARIES/libui_intermediates) +$(call add-clean-step, rm -f $(PRODUCT_OUT)/root/default.prop) +$(call add-clean-step, rm -f $(TARGET_OUT)/build.prop) +$(call add-clean-step, rm -f $(PRODUCT_OUT)/system/etc/mixer_paths_lb.xml) +$(call add-clean-step, rm -f $(PRODUCT_OUT)/system/etc/permissions/android.hardware.camera.xml) + +$(call add-clean-step, rm -f $(PRODUCT_OUT)/root/*) +# Power HAL 1.0 +$(call add-clean-step, rm -f $(PRODUCT_OUT)/vendor/init/android.hardware.power@1.0-service.rc) +$(call add-clean-step, rm -f $(PRODUCT_OUT)/vendor/bin/hw/android.hardware.power@1.0-service) +# Power HAL HIDL +$(call add-clean-step, rm -f $(PRODUCT_OUT)/vendor/etc/init/android.hardware.power@1.3-service.pixel-libperfmgr.rc) + +# Health storage HAL +$(call add-clean-step, find $(PRODUCT_OUT) -type f -name "*android.hardware.health.storage@1.0*" -print0 | xargs -0 rm -f) + +# Update to USB HAL 1.3 +$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/bin/hw/android.hardware.usb@1.2-service.slider) +$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/etc/init/android.hardware.usb@1.2-service.slider.rc) +$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/etc/vintf/manifest/android.hardware.usb@1.2-service.slider.xml) +$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/bin/hw/android.hardware.usb@1.3-service.slider) +$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/etc/init/android.hardware.usb@1.3-service.slider.rc) +$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/etc/vintf/manifest/android.hardware.usb@1.3-service.slider.xml) diff --git a/NOTICE b/NOTICE new file mode 100644 index 0000000..316b4eb --- /dev/null +++ b/NOTICE @@ -0,0 +1,190 @@ + + Copyright (c) 2014, The Android Open Source Project + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. + + + Apache License + Version 2.0, January 2004 + http://www.apache.org/licenses/ + + TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION + + 1. 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In no event and under no legal theory, + whether in tort (including negligence), contract, or otherwise, + unless required by applicable law (such as deliberate and grossly + negligent acts) or agreed to in writing, shall any Contributor be + liable to You for damages, including any direct, indirect, special, + incidental, or consequential damages of any character arising as a + result of this License or out of the use or inability to use the + Work (including but not limited to damages for loss of goodwill, + work stoppage, computer failure or malfunction, or any and all + other commercial damages or losses), even if such Contributor + has been advised of the possibility of such damages. + + 9. Accepting Warranty or Additional Liability. While redistributing + the Work or Derivative Works thereof, You may choose to offer, + and charge a fee for, acceptance of support, warranty, indemnity, + or other liability obligations and/or rights consistent with this + License. However, in accepting such obligations, You may act only + on Your own behalf and on Your sole responsibility, not on behalf + of any other Contributor, and only if You agree to indemnify, + defend, and hold each Contributor harmless for any liability + incurred by, or claims asserted against, such Contributor by reason + of your accepting any such warranty or additional liability. + + END OF TERMS AND CONDITIONS + diff --git a/aosp_bluejay.mk b/aosp_bluejay.mk new file mode 100644 index 0000000..d9b8d0f --- /dev/null +++ b/aosp_bluejay.mk @@ -0,0 +1,24 @@ +# +# Copyright 2021 The Android Open-Source Project +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +$(call inherit-product, device/google/gs101/aosp_common.mk) +$(call inherit-product, device/google/bluejay/device-bluejay.mk) + +PRODUCT_NAME := aosp_bluejay +PRODUCT_DEVICE := bluejay +PRODUCT_MODEL := AOSP on Bluejay +PRODUCT_BRAND := Android +PRODUCT_MANUFACTURER := Google diff --git a/audio/bluejay/audio-tables.mk b/audio/bluejay/audio-tables.mk new file mode 100644 index 0000000..eb8251c --- /dev/null +++ b/audio/bluejay/audio-tables.mk @@ -0,0 +1,74 @@ +# +# Copyright (C) 2020 The Android Open-Source Project +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +AUDIO_TABLE_FOLDER := bluejay + +# Platform Configuration for AudioHAL / SoundTriggerHAL +PRODUCT_COPY_FILES += \ + device/google/bluejay/audio/$(AUDIO_TABLE_FOLDER)/config/audio_policy_configuration_bluetooth_legacy_hal.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_policy_configuration_bluetooth_legacy_hal.xml \ + device/google/bluejay/audio/$(AUDIO_TABLE_FOLDER)/config/audio_policy_configuration.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_policy_configuration.xml \ + device/google/bluejay/audio/$(AUDIO_TABLE_FOLDER)/config/audio_policy_configuration_a2dp_offload_disabled.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_policy_configuration_a2dp_offload_disabled.xml \ + device/google/bluejay/audio/$(AUDIO_TABLE_FOLDER)/config/audio_platform_configuration.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_platform_configuration.xml \ + device/google/bluejay/audio/$(AUDIO_TABLE_FOLDER)/config/sound_trigger_configuration.xml:$(TARGET_COPY_OUT_VENDOR)/etc/sound_trigger_configuration.xml \ + device/google/bluejay/audio/$(AUDIO_TABLE_FOLDER)/config/audio_policy_volumes.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_policy_volumes.xml + +# AudioEffectHAL Configuration +PRODUCT_COPY_FILES += \ + device/google/bluejay/audio/$(AUDIO_TABLE_FOLDER)/config/audio_effects.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_effects.xml + +# Mixer Path Configuration for AudioHAL +PRODUCT_COPY_FILES += \ + device/google/bluejay/audio/$(AUDIO_TABLE_FOLDER)/config/mixer_paths.xml:$(TARGET_COPY_OUT_VENDOR)/etc/mixer_paths.xml + +# Speaker firmware files +SPK_FIRMWARE_PATH := $(AUDIO_TABLE_FOLDER)/cs35l41/fw +SPK_FIRMWARE_FULL_PATH := device/google/bluejay/audio/$(SPK_FIRMWARE_PATH) + +PRODUCT_COPY_FILES += $(call copy-files,$(wildcard $(SPK_FIRMWARE_FULL_PATH)/*),$(TARGET_COPY_OUT_VENDOR)/firmware) + +# Audio tuning +PRODUCT_COPY_FILES += \ + device/google/bluejay/audio/$(AUDIO_TABLE_FOLDER)/tuning/bluenote/recording.gatf:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/recording.gatf \ + device/google/bluejay/audio/$(AUDIO_TABLE_FOLDER)/tuning/fortemedia/BLUETOOTH.dat:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/BLUETOOTH.dat \ + device/google/bluejay/audio/$(AUDIO_TABLE_FOLDER)/tuning/fortemedia/HANDSFREE.dat:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/HANDSFREE.dat \ + device/google/bluejay/audio/$(AUDIO_TABLE_FOLDER)/tuning/fortemedia/HANDSET.dat:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/HANDSET.dat \ + device/google/bluejay/audio/$(AUDIO_TABLE_FOLDER)/tuning/fortemedia/HEADSET.dat:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/HEADSET.dat \ + device/google/bluejay/audio/$(AUDIO_TABLE_FOLDER)/tuning/waves/waves_config.ini:$(TARGET_COPY_OUT_VENDOR)/etc/waves_config.ini \ + device/google/bluejay/audio/$(AUDIO_TABLE_FOLDER)/tuning/waves/waves_preset.mps:$(TARGET_COPY_OUT_VENDOR)/etc/waves_preset.mps + +# userdebug specific +ifneq (,$(filter userdebug eng, $(TARGET_BUILD_VARIANT))) +PRODUCT_COPY_FILES += \ + device/google/bluejay/audio/$(AUDIO_TABLE_FOLDER)/tuning/fortemedia/BLUETOOTH.mods:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/BLUETOOTH.mods \ + device/google/bluejay/audio/$(AUDIO_TABLE_FOLDER)/tuning/fortemedia/HANDSFREE.mods:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/HANDSFREE.mods \ + device/google/bluejay/audio/$(AUDIO_TABLE_FOLDER)/tuning/fortemedia/HANDSET.mods:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/HANDSET.mods \ + device/google/bluejay/audio/$(AUDIO_TABLE_FOLDER)/tuning/fortemedia/HEADSET.mods:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/HEADSET.mods + +#Bluenote files +PRODUCT_COPY_FILES += \ + device/google/bluejay/audio/$(AUDIO_TABLE_FOLDER)/tuning/bluenote/template.xml:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/template.xml \ + device/google/bluejay/audio/$(AUDIO_TABLE_FOLDER)/tuning/bluenote/tuning_constraints_combination.xml:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/tuning_constraints_combination.xml + +# Mixer Path Configuration for Audio Speaker Calibration Tool crus_sp_cal +PRODUCT_COPY_FILES += \ + device/google/bluejay/audio/$(AUDIO_TABLE_FOLDER)/cs35l41/crus_sp_cal_mixer_paths.xml:$(TARGET_COPY_OUT_VENDOR)/etc/crus_sp_cal_mixer_paths.xml + +# Waves ini/mps files for unit tests of halcontroller +PRODUCT_COPY_FILES += \ + device/google/bluejay/audio/$(AUDIO_TABLE_FOLDER)/tuning/waves/tests/test_config.ini:$(TARGET_COPY_OUT_VENDOR)/etc/test_config.ini \ + device/google/bluejay/audio/$(AUDIO_TABLE_FOLDER)/tuning/waves/tests/test_preset.mps:$(TARGET_COPY_OUT_VENDOR)/etc/test_preset.mps + +endif diff --git a/audio/bluejay/config/audio_effects.xml b/audio/bluejay/config/audio_effects.xml new file mode 100644 index 0000000..1718057 --- /dev/null +++ b/audio/bluejay/config/audio_effects.xml @@ -0,0 +1,63 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/audio/bluejay/config/audio_platform_configuration.xml b/audio/bluejay/config/audio_platform_configuration.xml new file mode 100644 index 0000000..6bc6159 --- /dev/null +++ b/audio/bluejay/config/audio_platform_configuration.xml @@ -0,0 +1,294 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/audio/bluejay/config/audio_policy_configuration.xml b/audio/bluejay/config/audio_policy_configuration.xml new file mode 100644 index 0000000..188d533 --- /dev/null +++ b/audio/bluejay/config/audio_policy_configuration.xml @@ -0,0 +1,255 @@ + + + + + + + + + Speaker + Speaker Safe + Earpiece + Built-In Mic + Built-In Back Mic + Telephony Tx + Voice Call And Telephony Rx + Echo Ref In + + Speaker + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/audio/bluejay/config/audio_policy_configuration_a2dp_offload_disabled.xml b/audio/bluejay/config/audio_policy_configuration_a2dp_offload_disabled.xml new file mode 100644 index 0000000..c3e64c0 --- /dev/null +++ b/audio/bluejay/config/audio_policy_configuration_a2dp_offload_disabled.xml @@ -0,0 +1,234 @@ + + + + + + + + + Speaker + Speaker Safe + Earpiece + Built-In Mic + Built-In Back Mic + Telephony Tx + Voice Call And Telephony Rx + Echo Ref In + + Speaker + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/audio/bluejay/config/audio_policy_configuration_bluetooth_legacy_hal.xml b/audio/bluejay/config/audio_policy_configuration_bluetooth_legacy_hal.xml new file mode 100644 index 0000000..d0b1986 --- /dev/null +++ b/audio/bluejay/config/audio_policy_configuration_bluetooth_legacy_hal.xml @@ -0,0 +1,234 @@ + + + + + + + + + Speaker + Speaker Safe + Earpiece + Built-In Mic + Built-In Back Mic + Telephony Tx + Voice Call And Telephony Rx + Echo Ref In + + Speaker + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/audio/bluejay/config/audio_policy_volumes.xml b/audio/bluejay/config/audio_policy_volumes.xml new file mode 100644 index 0000000..31782ff --- /dev/null +++ b/audio/bluejay/config/audio_policy_volumes.xml @@ -0,0 +1,227 @@ + + + + + + + 0,-4200 + 33,-2800 + 66,-1400 + 100,0 + + + 0,-2400 + 33,-1600 + 66,-800 + 100,0 + + + 0,-2400 + 33,-1600 + 66,-800 + 100,0 + + + + + 1,-3000 + 33,-2600 + 66,-2200 + 100,-1800 + + + 1,-5000 + 33,-3500 + 66,-2300 + 100,-1600 + + + + + + + 1,-3600 + 33,-2400 + 66,-1200 + 100,0 + + + + + + + + + + + + 0,-3600 + 33,-2400 + 66,-1200 + 100,0 + + + + + + + 1,-3600 + 33,-2400 + 66,-1200 + 100,0 + + + + + + 0,-4200 + 33,-2800 + 66,-1400 + 100,0 + + + 0,-2400 + 33,-1600 + 66,-800 + 100,0 + + + 0,-4200 + 33,-2800 + 66,-1400 + 100,0 + + + + + 1,-3000 + 33,-2600 + 66,-2200 + 100,-1800 + + + 1,-5000 + 33,-3500 + 66,-2300 + 100,-1600 + + + + + + 1,-3000 + 33,-2600 + 66,-2200 + 100,-1800 + + + 1,-4100 + 33,-3000 + 66,-1800 + 100,-700 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/audio/bluejay/config/mixer_paths.xml b/audio/bluejay/config/mixer_paths.xml new file mode 100644 index 0000000..1a1d399 --- /dev/null +++ b/audio/bluejay/config/mixer_paths.xml @@ -0,0 +1,801 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + > + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/audio/bluejay/config/mixer_paths_factory.xml b/audio/bluejay/config/mixer_paths_factory.xml new file mode 100644 index 0000000..d82e6f4 --- /dev/null +++ b/audio/bluejay/config/mixer_paths_factory.xml @@ -0,0 +1,295 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/audio/bluejay/config/sound_trigger_configuration.xml b/audio/bluejay/config/sound_trigger_configuration.xml new file mode 100644 index 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BLUETOOTH-RESERVE1-VOICE_GENERIC-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0000 //TX_PATCH_REG +3 0x0000 //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0078 //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0800 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0000 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0000 //TX_MICS_OF_PAIR0 +38 0x0000 //TX_MICS_OF_PAIR1 +39 0x0000 //TX_MICS_OF_PAIR2 +40 0x0000 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0003 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x0000 //TX_HD_BIN_MASK +53 0x0000 //TX_HD_SUBAND_MASK +54 0x0000 //TX_HD_FRAME_AVG_MASK +55 0x0000 //TX_HD_MIN_FRQ +56 0x0000 //TX_HD_ALPHA_PSD +57 0x0000 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0x0000 //TX_T_PSDVAT +63 0x0000 //TX_CNT +64 0x0000 //TX_ANTI_HOWL_GAIN +65 0x0000 //TX_MICFORBFMARK_0 +66 0x0000 //TX_MICFORBFMARK_1 +67 0x0000 //TX_MICFORBFMARK_2 +68 0x0000 //TX_MICFORBFMARK_3 +69 0x0000 //TX_MICFORBFMARK_4 +70 0x0000 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x0000 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x0000 //TX_ADCS_GAIN +112 0x0000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x7FFF //TX_BLMIC_BLKFACTOR +116 0x7FFF //TX_BRMIC_BLKFACTOR +117 0x000A //TX_MICBLK_START_BIN +118 0x0041 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x0000 //TX_FE_ENER_TH_MTS +124 0x0000 //TX_FE_ENER_TH_EXP +125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x0000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0020 //TX_MIC_BLOCK_N +128 0x7652 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x7800 //TX_THR_PITCH_DET_0 +131 0x7000 //TX_THR_PITCH_DET_1 +132 0x6000 //TX_THR_PITCH_DET_2 +133 0x0000 //TX_PITCH_BFR_LEN +134 0x0000 //TX_SBD_PITCH_DET +135 0x0000 //TX_TD_AEC_L +136 0x0000 //TX_MU0_UNP_TD_AEC +137 0x0000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x2000 //TX_AEC_REF_GAIN_0 +148 0x2000 //TX_AEC_REF_GAIN_1 +149 0x2000 //TX_AEC_REF_GAIN_2 +150 0x4000 //TX_EAD_THR +151 0x0200 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0100 //TX_MIN_EQ_RE_EST_1 +154 0x0100 //TX_MIN_EQ_RE_EST_2 +155 0x0100 //TX_MIN_EQ_RE_EST_3 +156 0x0100 //TX_MIN_EQ_RE_EST_4 +157 0x0100 //TX_MIN_EQ_RE_EST_5 +158 0x0100 //TX_MIN_EQ_RE_EST_6 +159 0x0100 //TX_MIN_EQ_RE_EST_7 +160 0x0100 //TX_MIN_EQ_RE_EST_8 +161 0x0100 //TX_MIN_EQ_RE_EST_9 +162 0x0100 //TX_MIN_EQ_RE_EST_10 +163 0x0100 //TX_MIN_EQ_RE_EST_11 +164 0x0100 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x0000 //TX_LAMBDA_CB_NLE +167 0x0000 //TX_C_POST_FLT +168 0x728A //TX_GAIN_NP +169 0x0008 //TX_SE_HOLD_N +170 0x0050 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x0000 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x0000 //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0000 //TX_FRQ_LIN_LEN +184 0x0000 //TX_FRQ_AEC_LEN_RHO +185 0x0000 //TX_MU0_UNP_FRQ_AEC +186 0x0000 //TX_MU0_PTD_FRQ_AEC +187 0x0000 //TX_MINENOISETH +188 0x0000 //TX_MU0_RE_EST +189 0x0000 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x0000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7333 //TX_DTD_THR1_0 +198 0x7333 //TX_DTD_THR1_1 +199 0x7333 //TX_DTD_THR1_2 +200 0x7333 //TX_DTD_THR1_3 +201 0x7333 //TX_DTD_THR1_4 +202 0x7333 //TX_DTD_THR1_5 +203 0x7333 //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0400 //TX_DT_CUT_K +214 0x0000 //TX_DT_CUT_THR +215 0x0000 //TX_COMFORT_G +216 0x0000 //TX_POWER_YOUT_TH +217 0x0000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x0800 //TX_B_POST_FILT_ECHO_H +230 0x0000 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x0000 //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0000 //TX_DT_RESRV_7 +240 0x0000 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF200 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF800 //TX_THR_SN_EST_2 +245 0xF600 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0A00 //TX_N_SN_EST +267 0x0000 //TX_INBEAM_T +268 0x0000 //TX_INBEAMHOLDT +269 0x1FFF //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x1000 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x0000 //TX_B_POST_FLT_0 +280 0x0000 //TX_B_POST_FLT_1 +281 0x001A //TX_NS_LVL_CTRL_0 +282 0x001A //TX_NS_LVL_CTRL_1 +283 0x0014 //TX_NS_LVL_CTRL_2 +284 0x0014 //TX_NS_LVL_CTRL_3 +285 0x000C //TX_NS_LVL_CTRL_4 +286 0x000C //TX_NS_LVL_CTRL_5 +287 0x000C //TX_NS_LVL_CTRL_6 +288 0x000C //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0014 //TX_MIN_GAIN_S_1 +291 0x0014 //TX_MIN_GAIN_S_2 +292 0x0014 //TX_MIN_GAIN_S_3 +293 0x0014 //TX_MIN_GAIN_S_4 +294 0x0014 //TX_MIN_GAIN_S_5 +295 0x0014 //TX_MIN_GAIN_S_6 +296 0x0014 //TX_MIN_GAIN_S_7 +297 0x0000 //TX_NMOS_SUP +298 0x0064 //TX_NS_MAX_PRI_SNR_TH +299 0x7FFF //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x1200 //TX_THR_LFNS +309 0x0028 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x7FFF //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x7FFF //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x199A //TX_A_POST_FILT_S_1 +316 0x1000 //TX_A_POST_FILT_S_2 +317 0x1000 //TX_A_POST_FILT_S_3 +318 0x6666 //TX_A_POST_FILT_S_4 +319 0x6666 //TX_A_POST_FILT_S_5 +320 0x6666 //TX_A_POST_FILT_S_6 +321 0x6666 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x2000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E00 //TX_LAMBDA_PFILT +339 0x7E00 //TX_LAMBDA_PFILT_S_0 +340 0x7E00 //TX_LAMBDA_PFILT_S_1 +341 0x7E00 //TX_LAMBDA_PFILT_S_2 +342 0x7E00 //TX_LAMBDA_PFILT_S_3 +343 0x7E00 //TX_LAMBDA_PFILT_S_4 +344 0x7E00 //TX_LAMBDA_PFILT_S_5 +345 0x7E00 //TX_LAMBDA_PFILT_S_6 +346 0x7E00 //TX_LAMBDA_PFILT_S_7 +347 0x01F4 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x0FA0 //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0000 //TX_DT_BINVAD_TH_0 +354 0x0000 //TX_DT_BINVAD_TH_1 +355 0x0000 //TX_DT_BINVAD_TH_2 +356 0x0000 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0001 //TX_BF_SGRAD_FLG +362 0x0000 //TX_BF_DVG_TH +363 0x0000 //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x05A0 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x1388 //TX_NOISE_TH_0_2 +369 0x3A98 //TX_NOISE_TH_0_3 +370 0x0C80 //TX_NOISE_TH_1 +371 0x0032 //TX_NOISE_TH_2 +372 0x3D54 //TX_NOISE_TH_3 +373 0x012C //TX_NOISE_TH_4 +374 0x07D0 //TX_NOISE_TH_5 +375 0x6590 //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x00C8 //TX_NOISE_TH_6 +379 0x000A //TX_MINENOISE_TH +380 0x0000 //TX_MINENOISE_MIC0_TH_MTS +381 0x0000 //TX_MINENOISE_MIC0_TH_EXP +382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0640 //TX_OUT_ENER_S_TH_CLEAN +385 0x0640 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0640 //TX_OUT_ENER_S_TH_NOISY +387 0x0190 //TX_OUT_ENER_TH_NOISE +388 0x07D0 //TX_OUT_ENER_TH_SPEECH +389 0x0000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0000 //TX_MU_ARSP_EST +396 0x0000 //TX_P_OUTBEAM_MIN_TH +397 0x0000 //TX_EXTRA_NS_L +398 0x0000 //TX_EXTRA_NS_A +399 0x0000 //TX_VR_NOISE_FLOOR_TH +400 0x0000 //TX_MIN_G_LOW300HZ +401 0x0010 //TX_MAXLEVEL_CNG +402 0x0000 //TX_STN_NOISE_TH +403 0x0000 //TX_POST_MASK_SUP +404 0x0000 //TX_POST_MASK_ADJUST +405 0x0014 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x0226 //TX_MINENOISE_MIC0_S_TH +408 0x2879 //TX_MIN_G_CTRL_SSNS +409 0x0400 //TX_METAL_RTO_THR +410 0x0080 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x0800 //TX_RHO_UPB +415 0x0B40 //TX_N_HOLD_HS +416 0x005A //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0000 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x0219 //TX_THR_STD_PLH +421 0x09C4 //TX_N_HOLD_STD +422 0x0166 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x0000 //TX_SB_RTO_MEAN_TH_RUB +428 0x2000 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0064 //TX_DESIRED_TALK_HOLDT +431 0x1000 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0000 //TX_HS_VAD_BIN +435 0x0000 //TX_THR_VAD_HS +436 0x0000 //TX_MEAN_RTO_MIN_TH2 +437 0x0000 //TX_SILENCE_T +438 0x4000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x099A //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x001E //TX_DOA_VAD_THR_1 +445 0x001E //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B +453 0x005A //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C +456 0x005A //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D +459 0x005A //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0172 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x071C //TX_DOA_TRACK_HT +477 0x0280 //TX_N1_HOLD_HF +478 0x0140 //TX_N2_HOLD_HF +479 0x2AAB //TX_BF_RESET_THR_HF +480 0x4000 //TX_DOA_SMOOTH +481 0x0000 //TX_MU_BF +482 0x0200 //TX_BF_MU_LF_B2 +483 0x0000 //TX_BF_FC_END_BIN_B2 +484 0x0000 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0000 //TX_N_DOA_SEED +488 0x0000 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x0000 //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x0000 //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x0000 //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0168 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0004 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0230 //TX_NOR_OFF_TH1 +503 0xD333 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x6666 //TX_MICTOBFGAIN0 +513 0x0014 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x0000 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0028 //TX_SNR_THR +531 0x03E8 //TX_ENGY_THR +532 0x0000 //TX_CORR_HIGH_TH +533 0x0000 //TX_ENGY_THR_2 +534 0x0000 //TX_MEAN_RTO_THR +535 0x0000 //TX_WNS_ENOISE_MIC0_TH +536 0x0000 //TX_RATIOMICL_TH +537 0x0000 //TX_CALIG_HS +538 0x000A //TX_LVL_CTRL +539 0x0000 //TX_WIND_SUPRTO +540 0x0000 //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x0000 //TX_RATIOMICH_TH +543 0x0000 //TX_WIND_INBEAM_L_TH +544 0x0000 //TX_WIND_INBEAM_H_TH +545 0x0000 //TX_WNS_RESRV_0 +546 0x0000 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0000 //TX_BF_LESSCUT_BBIN +554 0x0000 //TX_BF_LESSCUT_EBIN +555 0x0000 //TX_POSTBFB0 +556 0x0000 //TX_POSTBFB +557 0x0000 //TX_POSTBFE +558 0x0000 //TX_SPEECH_SNR_TH +559 0x0000 //TX_PB_MAX_PRI_SNR_TH +560 0x0000 //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0000 //TX_FDEQ_BIN_0 +592 0x0000 //TX_FDEQ_BIN_1 +593 0x0000 //TX_FDEQ_BIN_2 +594 0x0000 //TX_FDEQ_BIN_3 +595 0x0000 //TX_FDEQ_BIN_4 +596 0x0000 //TX_FDEQ_BIN_5 +597 0x0000 //TX_FDEQ_BIN_6 +598 0x0000 //TX_FDEQ_BIN_7 +599 0x0000 //TX_FDEQ_BIN_8 +600 0x0000 //TX_FDEQ_BIN_9 +601 0x0000 //TX_FDEQ_BIN_10 +602 0x0000 //TX_FDEQ_BIN_11 +603 0x0000 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0000 //TX_PREEQ_BIN_MIC0_0 +642 0x0000 //TX_PREEQ_BIN_MIC0_1 +643 0x0000 //TX_PREEQ_BIN_MIC0_2 +644 0x0000 //TX_PREEQ_BIN_MIC0_3 +645 0x0000 //TX_PREEQ_BIN_MIC0_4 +646 0x0000 //TX_PREEQ_BIN_MIC0_5 +647 0x0000 //TX_PREEQ_BIN_MIC0_6 +648 0x0000 //TX_PREEQ_BIN_MIC0_7 +649 0x0000 //TX_PREEQ_BIN_MIC0_8 +650 0x0000 //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0000 //TX_PREEQ_BIN_MIC1_0 +691 0x0000 //TX_PREEQ_BIN_MIC1_1 +692 0x0000 //TX_PREEQ_BIN_MIC1_2 +693 0x0000 //TX_PREEQ_BIN_MIC1_3 +694 0x0000 //TX_PREEQ_BIN_MIC1_4 +695 0x0000 //TX_PREEQ_BIN_MIC1_5 +696 0x0000 //TX_PREEQ_BIN_MIC1_6 +697 0x0000 //TX_PREEQ_BIN_MIC1_7 +698 0x0000 //TX_PREEQ_BIN_MIC1_8 +699 0x0000 //TX_PREEQ_BIN_MIC1_9 +700 0x0000 //TX_PREEQ_BIN_MIC1_10 +701 0x0000 //TX_PREEQ_BIN_MIC1_11 +702 0x0000 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0000 //TX_PREEQ_BIN_MIC2_0 +740 0x0000 //TX_PREEQ_BIN_MIC2_1 +741 0x0000 //TX_PREEQ_BIN_MIC2_2 +742 0x0000 //TX_PREEQ_BIN_MIC2_3 +743 0x0000 //TX_PREEQ_BIN_MIC2_4 +744 0x0000 //TX_PREEQ_BIN_MIC2_5 +745 0x0000 //TX_PREEQ_BIN_MIC2_6 +746 0x0000 //TX_PREEQ_BIN_MIC2_7 +747 0x0000 //TX_PREEQ_BIN_MIC2_8 +748 0x0000 //TX_PREEQ_BIN_MIC2_9 +749 0x0000 //TX_PREEQ_BIN_MIC2_10 +750 0x0000 //TX_PREEQ_BIN_MIC2_11 +751 0x0000 //TX_PREEQ_BIN_MIC2_12 +752 0x0000 //TX_PREEQ_BIN_MIC2_13 +753 0x0000 //TX_PREEQ_BIN_MIC2_14 +754 0x0000 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0064 //TX_MIC_CALIBRATION_0 +766 0x006A //TX_MIC_CALIBRATION_1 +767 0x006A //TX_MIC_CALIBRATION_2 +768 0x006B //TX_MIC_CALIBRATION_3 +769 0x0048 //TX_MIC_PWR_BIAS_0 +770 0x003C //TX_MIC_PWR_BIAS_1 +771 0x003C //TX_MIC_PWR_BIAS_2 +772 0x003C //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0009 //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 +788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 +789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 +790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 +791 0x65AD //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0002 //TX_DEADMIC_SILENCE_TH +817 0x0147 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x0000 //TX_KS_NOISEPASTE_FACTOR +824 0x0000 //TX_KS_CONFIG +825 0x0000 //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x0000 //TX_A_POST_FLT_FP +835 0x0000 //TX_RTO_OUTBEAM_TH +836 0x0000 //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0000 //TX_FFP_RESRV_2 +849 0x0000 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x0E80 //TX_TDDRC_THRD_2 +857 0x3800 //TX_TDDRC_THRD_3 +858 0x2A00 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x0000 //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0000 //TX_TDDRC_SMT_W +866 0x0100 //TX_TDDRC_DRC_GAIN +867 0x0000 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x1EB8 //TX_TFMASKLTH +870 0x170A //TX_TFMASKLTHL +871 0x4000 //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x4000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x0000 //TX_FASTNS_OUTIN_TH +884 0x0000 //TX_FASTNS_TFMASK_TH +885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 +886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 +887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xD99A //TX_FASTNS_MASK5_TH +890 0x051F //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x0000 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7652 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0000 //RX_PITCH_BFR_LEN +17 0x0000 //RX_SBD_PITCH_DET +18 0x0000 //RX_PP_RESRV_0 +19 0x0000 //RX_PP_RESRV_1 +20 0xF800 //RX_N_SN_EST +21 0x0000 //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0000 //RX_FENS_RESRV_1 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +30 0x0000 //RX_EXTRA_NS_L +31 0x0000 //RX_EXTRA_NS_A +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x0000 //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x000C //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0010 //RX_MAXLEVEL_CNG +132 0x0000 //RX_BWE_UV_TH +133 0x0000 //RX_BWE_UV_TH2 +134 0x0000 //RX_BWE_UV_TH3 +135 0x0000 //RX_BWE_V_TH +136 0x0000 //RX_BWE_GAIN1_V_TH1 +137 0x0000 //RX_BWE_GAIN1_V_TH2 +138 0x0000 //RX_BWE_UV_EQ +139 0x0000 //RX_BWE_V_EQ +140 0x0000 //RX_BWE_TONE_TH +141 0x0000 //RX_BWE_UV_HOLD_T +142 0x0000 //RX_BWE_GAIN2_ALPHA +143 0x0000 //RX_BWE_GAIN3_ALPHA +144 0x0000 //RX_BWE_CUTOFF +145 0x0000 //RX_BWE_GAINFILL +146 0x0000 //RX_BWE_MAXTH_TONE +147 0x0000 //RX_BWE_EQ_0 +148 0x0000 //RX_BWE_EQ_1 +149 0x0000 //RX_BWE_EQ_2 +150 0x0000 //RX_BWE_EQ_3 +151 0x0000 //RX_BWE_EQ_4 +152 0x0000 //RX_BWE_EQ_5 +153 0x0000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000C //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0014 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0021 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0037 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0099 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-NB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x6F7C //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0002 //TX_MIC_DATA_SRC0 +42 0x0000 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x053D //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7646 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0100 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7500 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0200 //TX_MIN_EQ_RE_EST_0 +153 0x0200 //TX_MIN_EQ_RE_EST_1 +154 0x0200 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x1800 //TX_MIN_EQ_RE_EST_7 +160 0x1800 //TX_MIN_EQ_RE_EST_8 +161 0x3000 //TX_MIN_EQ_RE_EST_9 +162 0x4000 //TX_MIN_EQ_RE_EST_10 +163 0x6000 //TX_MIN_EQ_RE_EST_11 +164 0x7FFF //TX_MIN_EQ_RE_EST_12 +165 0x2000 //TX_LAMBDA_RE_EST +166 0x0000 //TX_LAMBDA_CB_NLE +167 0x4000 //TX_C_POST_FLT +168 0x2000 //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x05DC //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7FF0 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x1F40 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x1000 //TX_ADPT_STRICT_L +222 0x1000 //TX_ADPT_STRICT_H +223 0x0001 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x0640 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x05DC //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF900 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0050 //TX_DELTA_THR_SN_EST_0 +251 0x01A0 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x7F00 //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0800 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0012 //TX_NS_LVL_CTRL_1 +283 0x0012 //TX_NS_LVL_CTRL_2 +284 0x0015 //TX_NS_LVL_CTRL_3 +285 0x0012 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0011 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000D //TX_MIN_GAIN_S_2 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000F //TX_MIN_GAIN_S_4 +294 0x000F //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x4000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x3000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x2400 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x2000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x1000 //TX_A_POST_FILT_S_4 +319 0x3000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x5000 //TX_B_POST_FILT_4 +327 0x3000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x6000 //TX_B_LESSCUT_RTO_S_1 +332 0x6000 //TX_B_LESSCUT_RTO_S_2 +333 0x6000 //TX_B_LESSCUT_RTO_S_3 +334 0x6000 //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E00 //TX_LAMBDA_PFILT +339 0x7D00 //TX_LAMBDA_PFILT_S_0 +340 0x7900 //TX_LAMBDA_PFILT_S_1 +341 0x7C00 //TX_LAMBDA_PFILT_S_2 +342 0x7900 //TX_LAMBDA_PFILT_S_3 +343 0x7000 //TX_LAMBDA_PFILT_S_4 +344 0x7D00 //TX_LAMBDA_PFILT_S_5 +345 0x7D00 //TX_LAMBDA_PFILT_S_6 +346 0x7D00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0100 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0FA0 //TX_DT_BINVAD_ENDF +358 0x7000 //TX_C_POST_FLT_DT +359 0x4000 //TX_NS_B_POST_FLT_LESSCUT +360 0x01B0 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x03ED //TX_NOISE_TH_2 +372 0x2EE0 //TX_NOISE_TH_3 +373 0x5528 //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0FA0 //TX_NOISE_TH_6 +379 0x000A //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x1000 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x000A //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x007A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x5000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x7FFF //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0014 //TX_FDEQ_SUBNUM +567 0x5050 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x483C //TX_FDEQ_GAIN_3 +571 0x3034 //TX_FDEQ_GAIN_4 +572 0x3048 //TX_FDEQ_GAIN_5 +573 0x4840 //TX_FDEQ_GAIN_6 +574 0x403C //TX_FDEQ_GAIN_7 +575 0x262C //TX_FDEQ_GAIN_8 +576 0x3A3C //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0000 //TX_FDEQ_BIN_10 +602 0x0000 //TX_FDEQ_BIN_11 +603 0x0000 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0014 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4A4C //TX_PREEQ_GAIN_MIC0_8 +626 0x4E50 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x0000 //TX_PREEQ_BIN_MIC1_10 +701 0x0000 //TX_PREEQ_BIN_MIC1_11 +702 0x0000 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0000 //TX_PREEQ_BIN_MIC2_0 +740 0x0000 //TX_PREEQ_BIN_MIC2_1 +741 0x0000 //TX_PREEQ_BIN_MIC2_2 +742 0x0000 //TX_PREEQ_BIN_MIC2_3 +743 0x0000 //TX_PREEQ_BIN_MIC2_4 +744 0x0000 //TX_PREEQ_BIN_MIC2_5 +745 0x0000 //TX_PREEQ_BIN_MIC2_6 +746 0x0000 //TX_PREEQ_BIN_MIC2_7 +747 0x0000 //TX_PREEQ_BIN_MIC2_8 +748 0x0000 //TX_PREEQ_BIN_MIC2_9 +749 0x0000 //TX_PREEQ_BIN_MIC2_10 +750 0x0000 //TX_PREEQ_BIN_MIC2_11 +751 0x0000 //TX_PREEQ_BIN_MIC2_12 +752 0x0000 //TX_PREEQ_BIN_MIC2_13 +753 0x0000 //TX_PREEQ_BIN_MIC2_14 +754 0x0000 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0065 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0065 //TX_MIC_CALIBRATION_2 +768 0x0065 //TX_MIC_CALIBRATION_3 +769 0x0044 //TX_MIC_PWR_BIAS_0 +770 0x0044 //TX_MIC_PWR_BIAS_1 +771 0x0044 //TX_MIC_PWR_BIAS_2 +772 0x0044 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x4000 //TX_TDDRC_ALPHA_UP_01 +784 0x4000 //TX_TDDRC_ALPHA_UP_02 +785 0x4000 //TX_TDDRC_ALPHA_UP_03 +786 0x4000 //TX_TDDRC_ALPHA_UP_04 +787 0x6000 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0004 //TX_TDDRC_THRD_0 +855 0x0010 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x4000 //TX_TDDRC_ALPHA_UP_00 +861 0x6000 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x08EA //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x006C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-WB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x6F7C //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0001 //TX_SAMPLINGFREQ_SIG +7 0x0001 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0002 //TX_MIC_DATA_SRC0 +42 0x0000 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x053D //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0C00 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0004 //TX_MAINMIC_BLKFACTOR +114 0x0004 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0300 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6800 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x3000 //TX_MIN_EQ_RE_EST_0 +153 0x0100 //TX_MIN_EQ_RE_EST_1 +154 0x0200 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x1B00 //TX_LAMBDA_RE_EST +166 0x4000 //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x5000 //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x0020 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x76D0 //TX_DTD_THR1_0 +198 0x76D0 //TX_DTD_THR1_1 +199 0x76D0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 +206 0x5000 //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x03E8 //TX_DT_CUT_K +214 0x0010 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x044C //TX_RATIO_DT_L_TH_HIGH +226 0x7800 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFB00 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0014 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x0011 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0010 //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x50C0 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x5000 //TX_A_POST_FILT_S_0 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x4C00 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C00 //TX_LAMBDA_PFILT +339 0x7C00 //TX_LAMBDA_PFILT_S_0 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7C00 //TX_LAMBDA_PFILT_S_2 +342 0x7A00 //TX_LAMBDA_PFILT_S_3 +343 0x7C00 //TX_LAMBDA_PFILT_S_4 +344 0x7C00 //TX_LAMBDA_PFILT_S_5 +345 0x7C00 //TX_LAMBDA_PFILT_S_6 +346 0x7C00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0800 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0032 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x017E //TX_NOISE_TH_1 +371 0x0230 //TX_NOISE_TH_2 +372 0x3492 //TX_NOISE_TH_3 +373 0x4E20 //TX_NOISE_TH_4 +374 0x55B8 //TX_NOISE_TH_5 +375 0x49E6 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0F0A //TX_NOISE_TH_6 +379 0x0033 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0033 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x5454 //TX_FDEQ_GAIN_0 +568 0x5448 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4850 //TX_FDEQ_GAIN_5 +573 0x5050 //TX_FDEQ_GAIN_6 +574 0x5448 //TX_FDEQ_GAIN_7 +575 0x464C //TX_FDEQ_GAIN_8 +576 0x5050 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0F10 //TX_FDEQ_BIN_10 +602 0x1011 //TX_FDEQ_BIN_11 +603 0x1112 //TX_FDEQ_BIN_12 +604 0x120B //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x484A //TX_PREEQ_GAIN_MIC0_8 +626 0x4B4C //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4A //TX_PREEQ_GAIN_MIC0_10 +628 0x4A48 //TX_PREEQ_GAIN_MIC0_11 +629 0x4C4C //TX_PREEQ_GAIN_MIC0_12 +630 0x4C4C //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x0F10 //TX_PREEQ_BIN_MIC0_10 +652 0x1011 //TX_PREEQ_BIN_MIC0_11 +653 0x1112 //TX_PREEQ_BIN_MIC0_12 +654 0x120B //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 +676 0x403E //TX_PREEQ_GAIN_MIC1_10 +677 0x3D3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3C3C //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0F10 //TX_PREEQ_BIN_MIC1_9 +700 0x1011 //TX_PREEQ_BIN_MIC1_10 +701 0x1112 //TX_PREEQ_BIN_MIC1_11 +702 0x1208 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0001 //TX_TDDRC_THRD_0 +855 0x0002 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0B39 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x006C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0001 //RX_SAMPLINGFREQ_SIG +3 0x0001 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-SWB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x6F7C //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0002 //TX_MIC_DATA_SRC0 +42 0x0000 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7D83 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0400 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7600 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x2000 //TX_MIN_EQ_RE_EST_0 +153 0x0600 //TX_MIN_EQ_RE_EST_1 +154 0x3000 //TX_MIN_EQ_RE_EST_2 +155 0x3000 //TX_MIN_EQ_RE_EST_3 +156 0x3000 //TX_MIN_EQ_RE_EST_4 +157 0x3000 //TX_MIN_EQ_RE_EST_5 +158 0x3000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x7800 //TX_MIN_EQ_RE_EST_8 +161 0x7800 //TX_MIN_EQ_RE_EST_9 +162 0x7800 //TX_MIN_EQ_RE_EST_10 +163 0x7800 //TX_MIN_EQ_RE_EST_11 +164 0x7800 //TX_MIN_EQ_RE_EST_12 +165 0x0880 //TX_LAMBDA_RE_EST +166 0x7FFF //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x05DC //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7FF0 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 +206 0x5000 //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x36B0 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x733C //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x3A98 //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFA00 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0000 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x003C //TX_NS_LVL_CTRL_1 +283 0x003C //TX_NS_LVL_CTRL_2 +284 0x0024 //TX_NS_LVL_CTRL_3 +285 0x003C //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x0011 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0010 //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x1400 //TX_SNRI_SUP_1 +302 0x1400 //TX_SNRI_SUP_2 +303 0x1400 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x50C0 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x5000 //TX_A_POST_FILT_S_0 +315 0x7C00 //TX_A_POST_FILT_S_1 +316 0x4C00 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x6000 //TX_B_POST_FILT_2 +325 0x6000 //TX_B_POST_FILT_3 +326 0x6000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C00 //TX_LAMBDA_PFILT +339 0x7D00 //TX_LAMBDA_PFILT_S_0 +340 0x7D00 //TX_LAMBDA_PFILT_S_1 +341 0x7D00 //TX_LAMBDA_PFILT_S_2 +342 0x7D00 //TX_LAMBDA_PFILT_S_3 +343 0x7D00 //TX_LAMBDA_PFILT_S_4 +344 0x7D00 //TX_LAMBDA_PFILT_S_5 +345 0x7D00 //TX_LAMBDA_PFILT_S_6 +346 0x7D00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0040 //TX_DT_BINVAD_TH_0 +354 0x0040 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 +356 0x0100 //TX_DT_BINVAD_TH_3 +357 0x36B0 //TX_DT_BINVAD_ENDF +358 0x0200 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x01F4 //TX_NOISE_TH_2 +372 0x36B0 //TX_NOISE_TH_3 +373 0x2710 //TX_NOISE_TH_4 +374 0x2CEC //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0DAC //TX_NOISE_TH_6 +379 0x0050 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0050 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4000 //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x5450 //TX_FDEQ_GAIN_0 +568 0x4C48 //TX_FDEQ_GAIN_1 +569 0x4850 //TX_FDEQ_GAIN_2 +570 0x5050 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x484E //TX_FDEQ_GAIN_5 +573 0x4E5E //TX_FDEQ_GAIN_6 +574 0x584E //TX_FDEQ_GAIN_7 +575 0x4C4E //TX_FDEQ_GAIN_8 +576 0x564E //TX_FDEQ_GAIN_9 +577 0x5058 //TX_FDEQ_GAIN_10 +578 0x625C //TX_FDEQ_GAIN_11 +579 0x6C6C //TX_FDEQ_GAIN_12 +580 0x7086 //TX_FDEQ_GAIN_13 +581 0x869C //TX_FDEQ_GAIN_14 +582 0xB0B0 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x284A //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x494A //TX_PREEQ_GAIN_MIC0_8 +626 0x4B4C //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4A //TX_PREEQ_GAIN_MIC0_10 +628 0x484B //TX_PREEQ_GAIN_MIC0_11 +629 0x4C4C //TX_PREEQ_GAIN_MIC0_12 +630 0x4B48 //TX_PREEQ_GAIN_MIC0_13 +631 0x3838 //TX_PREEQ_GAIN_MIC0_14 +632 0x3835 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1719 //TX_PREEQ_BIN_MIC0_11 +653 0x1B1E //TX_PREEQ_BIN_MIC0_12 +654 0x1E1E //TX_PREEQ_BIN_MIC0_13 +655 0x1E28 //TX_PREEQ_BIN_MIC0_14 +656 0x282C //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 +676 0x403E //TX_PREEQ_GAIN_MIC1_10 +677 0x3D3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3C3C //TX_PREEQ_GAIN_MIC1_12 +679 0x3C39 //TX_PREEQ_GAIN_MIC1_13 +680 0x3838 //TX_PREEQ_GAIN_MIC1_14 +681 0x3A3C //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x282C //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0xF200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0003 //TX_TDDRC_THRD_0 +855 0x0004 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0C97 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x0064 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x1800 //RX_THR_PITCH_DET_0 +14 0x1000 //RX_THR_PITCH_DET_1 +15 0x0800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0003 //RX_NS_LVL_CTRL +23 0x9000 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x6B7C //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0002 //TX_MIC_DATA_SRC0 +42 0x0000 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0300 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x2000 //TX_MIN_EQ_RE_EST_1 +154 0x2000 //TX_MIN_EQ_RE_EST_2 +155 0x4000 //TX_MIN_EQ_RE_EST_3 +156 0x4000 //TX_MIN_EQ_RE_EST_4 +157 0x7FFF //TX_MIN_EQ_RE_EST_5 +158 0x7FFF //TX_MIN_EQ_RE_EST_6 +159 0x7FFF //TX_MIN_EQ_RE_EST_7 +160 0x7FFF //TX_MIN_EQ_RE_EST_8 +161 0x7FFF //TX_MIN_EQ_RE_EST_9 +162 0x7FFF //TX_MIN_EQ_RE_EST_10 +163 0x7FFF //TX_MIN_EQ_RE_EST_11 +164 0x7FFF //TX_MIN_EQ_RE_EST_12 +165 0x0700 //TX_LAMBDA_RE_EST +166 0x0CCD //TX_LAMBDA_CB_NLE +167 0x2000 //TX_C_POST_FLT +168 0x7FFF //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x09C4 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7D00 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0DAC //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1194 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0063 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x0A28 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFB00 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0014 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x0011 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0010 //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x50C0 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x5000 //TX_A_POST_FILT_S_0 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x4C00 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C00 //TX_LAMBDA_PFILT +339 0x7C00 //TX_LAMBDA_PFILT_S_0 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7C00 //TX_LAMBDA_PFILT_S_2 +342 0x7A00 //TX_LAMBDA_PFILT_S_3 +343 0x7C00 //TX_LAMBDA_PFILT_S_4 +344 0x7C00 //TX_LAMBDA_PFILT_S_5 +345 0x7C00 //TX_LAMBDA_PFILT_S_6 +346 0x7C00 //TX_LAMBDA_PFILT_S_7 +347 0x0180 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x2000 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0200 //TX_DT_BINVAD_TH_2 +356 0x0200 //TX_DT_BINVAD_TH_3 +357 0x1F40 //TX_DT_BINVAD_ENDF +358 0x0100 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x4E20 //TX_NOISE_TH_3 +373 0x4E20 //TX_NOISE_TH_4 +374 0x59D8 //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x2710 //TX_NOISE_TH_6 +379 0x0033 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0033 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x7FFF //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x484C //TX_FDEQ_GAIN_3 +571 0x4C4C //TX_FDEQ_GAIN_4 +572 0x544C //TX_FDEQ_GAIN_5 +573 0x5454 //TX_FDEQ_GAIN_6 +574 0x5454 //TX_FDEQ_GAIN_7 +575 0x585A //TX_FDEQ_GAIN_8 +576 0x5C5C //TX_FDEQ_GAIN_9 +577 0x6068 //TX_FDEQ_GAIN_10 +578 0x8894 //TX_FDEQ_GAIN_11 +579 0x94B4 //TX_FDEQ_GAIN_12 +580 0xB4C7 //TX_FDEQ_GAIN_13 +581 0xC7C6 //TX_FDEQ_GAIN_14 +582 0xC6C6 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0304 //TX_FDEQ_BIN_2 +594 0x0405 //TX_FDEQ_BIN_3 +595 0x0607 //TX_FDEQ_BIN_4 +596 0x0809 //TX_FDEQ_BIN_5 +597 0x0A0B //TX_FDEQ_BIN_6 +598 0x0C0D //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x1011 //TX_FDEQ_BIN_9 +601 0x1214 //TX_FDEQ_BIN_10 +602 0x1618 //TX_FDEQ_BIN_11 +603 0x1C1C //TX_FDEQ_BIN_12 +604 0x2020 //TX_FDEQ_BIN_13 +605 0x2020 //TX_FDEQ_BIN_14 +606 0x2011 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4849 //TX_PREEQ_GAIN_MIC0_6 +624 0x4A4B //TX_PREEQ_GAIN_MIC0_7 +625 0x4C4B //TX_PREEQ_GAIN_MIC0_8 +626 0x4A48 //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4C //TX_PREEQ_GAIN_MIC0_10 +628 0x4C4B //TX_PREEQ_GAIN_MIC0_11 +629 0x4838 //TX_PREEQ_GAIN_MIC0_12 +630 0x3858 //TX_PREEQ_GAIN_MIC0_13 +631 0x7060 //TX_PREEQ_GAIN_MIC0_14 +632 0x9870 //TX_PREEQ_GAIN_MIC0_15 +633 0x5848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x4000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4645 //TX_PREEQ_GAIN_MIC1_6 +673 0x4442 //TX_PREEQ_GAIN_MIC1_7 +674 0x4140 //TX_PREEQ_GAIN_MIC1_8 +675 0x3E3D //TX_PREEQ_GAIN_MIC1_9 +676 0x3C3C //TX_PREEQ_GAIN_MIC1_10 +677 0x3C3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3938 //TX_PREEQ_GAIN_MIC1_12 +679 0x3A3C //TX_PREEQ_GAIN_MIC1_13 +680 0x3C3E //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x4000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0C00 //TX_TDDRC_ALPHA_UP_01 +784 0x0C00 //TX_TDDRC_ALPHA_UP_02 +785 0x0C00 //TX_TDDRC_ALPHA_UP_03 +786 0x0C00 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0004 //TX_TDDRC_THRD_0 +855 0x0016 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x0C00 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0A00 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x0064 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0500 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000A //RX_NS_LVL_CTRL +23 0xF600 //RX_THR_SN_EST +24 0x7000 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-NB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0008 //TX_OPERATION_MODE_0 +1 0x0008 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x0240 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0A13 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7D83 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0019 //TX_EPD_OFFSET_00 +233 0x0019 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x6000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000F //TX_NS_LVL_CTRL_0 +282 0x000F //TX_NS_LVL_CTRL_1 +283 0x0011 //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0000 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x0000 //TX_NS_FP_K_METAL +411 0x7FFF //TX_NOISEDET_BOOST_TH +412 0x0000 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x001C //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4242 //TX_FDEQ_GAIN_6 +574 0x423C //TX_FDEQ_GAIN_7 +575 0x3C3C //TX_FDEQ_GAIN_8 +576 0x3434 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0E0F //TX_FDEQ_BIN_10 +602 0x0F10 //TX_FDEQ_BIN_11 +603 0x1011 //TX_FDEQ_BIN_12 +604 0x1104 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0608 //TX_PREEQ_BIN_MIC0_0 +642 0x0808 //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x0808 //TX_PREEQ_BIN_MIC0_3 +645 0x0808 //TX_PREEQ_BIN_MIC0_4 +646 0x0808 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0808 //TX_PREEQ_BIN_MIC0_7 +649 0x0808 //TX_PREEQ_BIN_MIC0_8 +650 0x0808 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0808 //TX_PREEQ_BIN_MIC0_11 +653 0x0808 //TX_PREEQ_BIN_MIC0_12 +654 0x0808 //TX_PREEQ_BIN_MIC0_13 +655 0x0808 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0608 //TX_PREEQ_BIN_MIC1_0 +691 0x0808 //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x0808 //TX_PREEQ_BIN_MIC1_3 +694 0x0808 //TX_PREEQ_BIN_MIC1_4 +695 0x0808 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0808 //TX_PREEQ_BIN_MIC1_7 +698 0x0808 //TX_PREEQ_BIN_MIC1_8 +699 0x0808 //TX_PREEQ_BIN_MIC1_9 +700 0x0808 //TX_PREEQ_BIN_MIC1_10 +701 0x0808 //TX_PREEQ_BIN_MIC1_11 +702 0x0808 //TX_PREEQ_BIN_MIC1_12 +703 0x0808 //TX_PREEQ_BIN_MIC1_13 +704 0x0808 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x07F2 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x006C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-WB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0008 //TX_OPERATION_MODE_0 +1 0x0008 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x0240 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0001 //TX_SAMPLINGFREQ_SIG +7 0x0001 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0915 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7D83 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0019 //TX_EPD_OFFSET_00 +233 0x0019 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x6000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000F //TX_NS_LVL_CTRL_0 +282 0x000F //TX_NS_LVL_CTRL_1 +283 0x0011 //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0000 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x0000 //TX_NS_FP_K_METAL +411 0x7FFF //TX_NOISEDET_BOOST_TH +412 0x0000 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x001C //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4444 //TX_FDEQ_GAIN_7 +575 0x4444 //TX_FDEQ_GAIN_8 +576 0x3C3C //TX_FDEQ_GAIN_9 +577 0x3C3C //TX_FDEQ_GAIN_10 +578 0x3C3C //TX_FDEQ_GAIN_11 +579 0x3C30 //TX_FDEQ_GAIN_12 +580 0x3030 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0E0F //TX_FDEQ_BIN_10 +602 0x0F10 //TX_FDEQ_BIN_11 +603 0x1011 //TX_FDEQ_BIN_12 +604 0x1112 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0608 //TX_PREEQ_BIN_MIC0_0 +642 0x0808 //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x0808 //TX_PREEQ_BIN_MIC0_3 +645 0x0808 //TX_PREEQ_BIN_MIC0_4 +646 0x0808 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0808 //TX_PREEQ_BIN_MIC0_7 +649 0x0808 //TX_PREEQ_BIN_MIC0_8 +650 0x0808 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0808 //TX_PREEQ_BIN_MIC0_11 +653 0x0808 //TX_PREEQ_BIN_MIC0_12 +654 0x0808 //TX_PREEQ_BIN_MIC0_13 +655 0x0808 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0608 //TX_PREEQ_BIN_MIC1_0 +691 0x0808 //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x0808 //TX_PREEQ_BIN_MIC1_3 +694 0x0808 //TX_PREEQ_BIN_MIC1_4 +695 0x0808 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0808 //TX_PREEQ_BIN_MIC1_7 +698 0x0808 //TX_PREEQ_BIN_MIC1_8 +699 0x0808 //TX_PREEQ_BIN_MIC1_9 +700 0x0808 //TX_PREEQ_BIN_MIC1_10 +701 0x0808 //TX_PREEQ_BIN_MIC1_11 +702 0x0808 //TX_PREEQ_BIN_MIC1_12 +703 0x0808 //TX_PREEQ_BIN_MIC1_13 +704 0x0808 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x07F2 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x006C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0001 //RX_SAMPLINGFREQ_SIG +3 0x0001 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-SWB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x0200 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0915 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7EFF //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00F0 //TX_EPD_OFFSET_00 +233 0x00F0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x6000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000B //TX_NS_LVL_CTRL_0 +282 0x000F //TX_NS_LVL_CTRL_1 +283 0x0011 //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x2000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7900 //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0000 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4868 //TX_PREEQ_GAIN_MIC0_8 +626 0x6860 //TX_PREEQ_GAIN_MIC0_9 +627 0x6048 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0970 //TX_TDDRC_DRC_GAIN +867 0x78D6 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x0064 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x1800 //RX_THR_PITCH_DET_0 +14 0x1000 //RX_THR_PITCH_DET_1 +15 0x0800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0003 //RX_NS_LVL_CTRL +23 0x9000 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0009 //TX_OPERATION_MODE_1 +2 0x0020 //TX_PATCH_REG +3 0x0200 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0915 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0200 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6000 //TX_EAD_THR +151 0x0400 //TX_THR_RE_EST +152 0x3000 //TX_MIN_EQ_RE_EST_0 +153 0x3000 //TX_MIN_EQ_RE_EST_1 +154 0x4000 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x6000 //TX_MIN_EQ_RE_EST_6 +159 0x6000 //TX_MIN_EQ_RE_EST_7 +160 0x6000 //TX_MIN_EQ_RE_EST_8 +161 0x6000 //TX_MIN_EQ_RE_EST_9 +162 0x4000 //TX_MIN_EQ_RE_EST_10 +163 0x4000 //TX_MIN_EQ_RE_EST_11 +164 0x4000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x4000 //TX_LAMBDA_CB_NLE +167 0x3000 //TX_C_POST_FLT +168 0x4500 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x5000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7F00 //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x0800 //TX_DTD_THR2_0 +205 0x0800 //TX_DTD_THR2_1 +206 0x0800 //TX_DTD_THR2_2 +207 0x0800 //TX_DTD_THR2_3 +208 0x0800 //TX_DTD_THR2_4 +209 0x0100 //TX_DTD_THR2_5 +210 0x0100 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x03E8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00C0 //TX_EPD_OFFSET_00 +233 0x00C0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF700 //TX_THR_SN_EST_0 +243 0xFB00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF700 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xF600 //TX_THR_SN_EST_5 +248 0xF600 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0200 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0400 //TX_DELTA_THR_SN_EST_2 +253 0x0300 //TX_DELTA_THR_SN_EST_3 +254 0x0600 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x2000 //TX_B_POST_FLT_1 +281 0x0012 //TX_NS_LVL_CTRL_0 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0019 //TX_NS_LVL_CTRL_4 +286 0x0010 //TX_NS_LVL_CTRL_5 +287 0x0010 //TX_NS_LVL_CTRL_6 +288 0x0010 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x0011 //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000F //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000C //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7000 //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x7000 //TX_SNRI_SUP_2 +303 0x7000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0016 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x6000 //TX_A_POST_FILT_S_0 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x6000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x6000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 +321 0x6000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x4000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x2000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7CCD //TX_LAMBDA_PFILT_S_0 +340 0x7CCD //TX_LAMBDA_PFILT_S_1 +341 0x7CCD //TX_LAMBDA_PFILT_S_2 +342 0x7CCD //TX_LAMBDA_PFILT_S_3 +343 0x7CCD //TX_LAMBDA_PFILT_S_4 +344 0x7CCD //TX_LAMBDA_PFILT_S_5 +345 0x7CCD //TX_LAMBDA_PFILT_S_6 +346 0x7CCD //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0500 //TX_A_PEPPER +349 0x1600 //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0020 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x02A6 //TX_NOISE_TH_1 +371 0x04B0 //TX_NOISE_TH_2 +372 0x3194 //TX_NOISE_TH_3 +373 0x0960 //TX_NOISE_TH_4 +374 0x5555 //TX_NOISE_TH_5 +375 0x3FF4 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x0000 //TX_NOISE_TH_5_4 +378 0x02BC //TX_NOISE_TH_6 +379 0x0020 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0020 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0304 //TX_FDEQ_BIN_2 +594 0x0405 //TX_FDEQ_BIN_3 +595 0x0607 //TX_FDEQ_BIN_4 +596 0x0809 //TX_FDEQ_BIN_5 +597 0x0A0B //TX_FDEQ_BIN_6 +598 0x0C0D //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x1011 //TX_FDEQ_BIN_9 +601 0x1214 //TX_FDEQ_BIN_10 +602 0x1618 //TX_FDEQ_BIN_11 +603 0x1C1C //TX_FDEQ_BIN_12 +604 0x2020 //TX_FDEQ_BIN_13 +605 0x2020 //TX_FDEQ_BIN_14 +606 0x2011 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0C00 //TX_TDDRC_ALPHA_UP_01 +784 0x0C00 //TX_TDDRC_ALPHA_UP_02 +785 0x0C00 //TX_TDDRC_ALPHA_UP_03 +786 0x0C00 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x2000 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0001 //TX_TDDRC_THRD_0 +855 0x0001 //TX_TDDRC_THRD_1 +856 0x1900 //TX_TDDRC_THRD_2 +857 0x1900 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7B00 //TX_TDDRC_SLANT_1 +860 0x0C00 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0200 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x0064 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0500 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000A //RX_NS_LVL_CTRL +23 0xF600 //RX_THR_SN_EST +24 0x7000 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-NB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0008 //TX_OPERATION_MODE_0 +1 0x0008 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2A68 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0A13 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7D83 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0019 //TX_EPD_OFFSET_00 +233 0x0019 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x6000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000F //TX_NS_LVL_CTRL_0 +282 0x000F //TX_NS_LVL_CTRL_1 +283 0x0011 //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x0000 //TX_NS_FP_K_METAL +411 0x7FFF //TX_NOISEDET_BOOST_TH +412 0x0000 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x001C //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4242 //TX_FDEQ_GAIN_6 +574 0x423C //TX_FDEQ_GAIN_7 +575 0x3C3C //TX_FDEQ_GAIN_8 +576 0x3434 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0E0F //TX_FDEQ_BIN_10 +602 0x0F10 //TX_FDEQ_BIN_11 +603 0x1011 //TX_FDEQ_BIN_12 +604 0x1104 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0608 //TX_PREEQ_BIN_MIC0_0 +642 0x0808 //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x0808 //TX_PREEQ_BIN_MIC0_3 +645 0x0808 //TX_PREEQ_BIN_MIC0_4 +646 0x0808 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0808 //TX_PREEQ_BIN_MIC0_7 +649 0x0808 //TX_PREEQ_BIN_MIC0_8 +650 0x0808 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0808 //TX_PREEQ_BIN_MIC0_11 +653 0x0808 //TX_PREEQ_BIN_MIC0_12 +654 0x0808 //TX_PREEQ_BIN_MIC0_13 +655 0x0808 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0608 //TX_PREEQ_BIN_MIC1_0 +691 0x0808 //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x0808 //TX_PREEQ_BIN_MIC1_3 +694 0x0808 //TX_PREEQ_BIN_MIC1_4 +695 0x0808 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0808 //TX_PREEQ_BIN_MIC1_7 +698 0x0808 //TX_PREEQ_BIN_MIC1_8 +699 0x0808 //TX_PREEQ_BIN_MIC1_9 +700 0x0808 //TX_PREEQ_BIN_MIC1_10 +701 0x0808 //TX_PREEQ_BIN_MIC1_11 +702 0x0808 //TX_PREEQ_BIN_MIC1_12 +703 0x0808 //TX_PREEQ_BIN_MIC1_13 +704 0x0808 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x07F2 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x006C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-WB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0008 //TX_OPERATION_MODE_0 +1 0x0008 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2A68 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0001 //TX_SAMPLINGFREQ_SIG +7 0x0001 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0915 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7D83 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0019 //TX_EPD_OFFSET_00 +233 0x0019 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x6000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000F //TX_NS_LVL_CTRL_0 +282 0x000F //TX_NS_LVL_CTRL_1 +283 0x0011 //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x0000 //TX_NS_FP_K_METAL +411 0x7FFF //TX_NOISEDET_BOOST_TH +412 0x0000 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x001C //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4444 //TX_FDEQ_GAIN_7 +575 0x4444 //TX_FDEQ_GAIN_8 +576 0x3C3C //TX_FDEQ_GAIN_9 +577 0x3C3C //TX_FDEQ_GAIN_10 +578 0x3C3C //TX_FDEQ_GAIN_11 +579 0x3C30 //TX_FDEQ_GAIN_12 +580 0x3030 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0E0F //TX_FDEQ_BIN_10 +602 0x0F10 //TX_FDEQ_BIN_11 +603 0x1011 //TX_FDEQ_BIN_12 +604 0x1112 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0608 //TX_PREEQ_BIN_MIC0_0 +642 0x0808 //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x0808 //TX_PREEQ_BIN_MIC0_3 +645 0x0808 //TX_PREEQ_BIN_MIC0_4 +646 0x0808 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0808 //TX_PREEQ_BIN_MIC0_7 +649 0x0808 //TX_PREEQ_BIN_MIC0_8 +650 0x0808 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0808 //TX_PREEQ_BIN_MIC0_11 +653 0x0808 //TX_PREEQ_BIN_MIC0_12 +654 0x0808 //TX_PREEQ_BIN_MIC0_13 +655 0x0808 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0608 //TX_PREEQ_BIN_MIC1_0 +691 0x0808 //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x0808 //TX_PREEQ_BIN_MIC1_3 +694 0x0808 //TX_PREEQ_BIN_MIC1_4 +695 0x0808 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0808 //TX_PREEQ_BIN_MIC1_7 +698 0x0808 //TX_PREEQ_BIN_MIC1_8 +699 0x0808 //TX_PREEQ_BIN_MIC1_9 +700 0x0808 //TX_PREEQ_BIN_MIC1_10 +701 0x0808 //TX_PREEQ_BIN_MIC1_11 +702 0x0808 //TX_PREEQ_BIN_MIC1_12 +703 0x0808 //TX_PREEQ_BIN_MIC1_13 +704 0x0808 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x07F2 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x006C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0001 //RX_SAMPLINGFREQ_SIG +3 0x0001 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-SWB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2A28 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0915 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7EFF //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00F0 //TX_EPD_OFFSET_00 +233 0x00F0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x6000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000B //TX_NS_LVL_CTRL_0 +282 0x000F //TX_NS_LVL_CTRL_1 +283 0x0011 //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x2000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7900 //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4868 //TX_PREEQ_GAIN_MIC0_8 +626 0x6860 //TX_PREEQ_GAIN_MIC0_9 +627 0x6048 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0970 //TX_TDDRC_DRC_GAIN +867 0x78D6 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x0064 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x1800 //RX_THR_PITCH_DET_0 +14 0x1000 //RX_THR_PITCH_DET_1 +15 0x0800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0003 //RX_NS_LVL_CTRL +23 0x9000 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0009 //TX_OPERATION_MODE_1 +2 0x0020 //TX_PATCH_REG +3 0x286A //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0915 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0200 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6000 //TX_EAD_THR +151 0x0400 //TX_THR_RE_EST +152 0x3000 //TX_MIN_EQ_RE_EST_0 +153 0x3000 //TX_MIN_EQ_RE_EST_1 +154 0x4000 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x6000 //TX_MIN_EQ_RE_EST_6 +159 0x6000 //TX_MIN_EQ_RE_EST_7 +160 0x6000 //TX_MIN_EQ_RE_EST_8 +161 0x6000 //TX_MIN_EQ_RE_EST_9 +162 0x4000 //TX_MIN_EQ_RE_EST_10 +163 0x4000 //TX_MIN_EQ_RE_EST_11 +164 0x4000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x4000 //TX_LAMBDA_CB_NLE +167 0x3000 //TX_C_POST_FLT +168 0x4500 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x5000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7F00 //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x0800 //TX_DTD_THR2_0 +205 0x0800 //TX_DTD_THR2_1 +206 0x0800 //TX_DTD_THR2_2 +207 0x0800 //TX_DTD_THR2_3 +208 0x0800 //TX_DTD_THR2_4 +209 0x0100 //TX_DTD_THR2_5 +210 0x0100 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x03E8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00C0 //TX_EPD_OFFSET_00 +233 0x00C0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF700 //TX_THR_SN_EST_0 +243 0xFB00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF700 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xF600 //TX_THR_SN_EST_5 +248 0xF600 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0200 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0400 //TX_DELTA_THR_SN_EST_2 +253 0x0300 //TX_DELTA_THR_SN_EST_3 +254 0x0600 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x2000 //TX_B_POST_FLT_1 +281 0x0012 //TX_NS_LVL_CTRL_0 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0019 //TX_NS_LVL_CTRL_4 +286 0x0010 //TX_NS_LVL_CTRL_5 +287 0x0010 //TX_NS_LVL_CTRL_6 +288 0x0010 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x0011 //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000F //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000C //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7000 //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x7000 //TX_SNRI_SUP_2 +303 0x7000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0016 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x6000 //TX_A_POST_FILT_S_0 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x6000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x6000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 +321 0x6000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x4000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x2000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7CCD //TX_LAMBDA_PFILT_S_0 +340 0x7CCD //TX_LAMBDA_PFILT_S_1 +341 0x7CCD //TX_LAMBDA_PFILT_S_2 +342 0x7CCD //TX_LAMBDA_PFILT_S_3 +343 0x7CCD //TX_LAMBDA_PFILT_S_4 +344 0x7CCD //TX_LAMBDA_PFILT_S_5 +345 0x7CCD //TX_LAMBDA_PFILT_S_6 +346 0x7CCD //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0500 //TX_A_PEPPER +349 0x1600 //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0020 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x02A6 //TX_NOISE_TH_1 +371 0x04B0 //TX_NOISE_TH_2 +372 0x3194 //TX_NOISE_TH_3 +373 0x0960 //TX_NOISE_TH_4 +374 0x5555 //TX_NOISE_TH_5 +375 0x3FF4 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x0000 //TX_NOISE_TH_5_4 +378 0x02BC //TX_NOISE_TH_6 +379 0x0020 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0020 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0304 //TX_FDEQ_BIN_2 +594 0x0405 //TX_FDEQ_BIN_3 +595 0x0607 //TX_FDEQ_BIN_4 +596 0x0809 //TX_FDEQ_BIN_5 +597 0x0A0B //TX_FDEQ_BIN_6 +598 0x0C0D //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x1011 //TX_FDEQ_BIN_9 +601 0x1214 //TX_FDEQ_BIN_10 +602 0x1618 //TX_FDEQ_BIN_11 +603 0x1C1C //TX_FDEQ_BIN_12 +604 0x2020 //TX_FDEQ_BIN_13 +605 0x2020 //TX_FDEQ_BIN_14 +606 0x2011 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0C00 //TX_TDDRC_ALPHA_UP_01 +784 0x0C00 //TX_TDDRC_ALPHA_UP_02 +785 0x0C00 //TX_TDDRC_ALPHA_UP_03 +786 0x0C00 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x2000 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0001 //TX_TDDRC_THRD_0 +855 0x0001 //TX_TDDRC_THRD_1 +856 0x1900 //TX_TDDRC_THRD_2 +857 0x1900 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7B00 //TX_TDDRC_SLANT_1 +860 0x0C00 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0200 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x0064 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0500 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000A //RX_NS_LVL_CTRL +23 0xF600 //RX_THR_SN_EST +24 0x7000 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-NB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0008 //TX_OPERATION_MODE_0 +1 0x0008 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x0240 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0A13 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7D83 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0019 //TX_EPD_OFFSET_00 +233 0x0019 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x6000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000F //TX_NS_LVL_CTRL_0 +282 0x000F //TX_NS_LVL_CTRL_1 +283 0x0011 //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0000 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x0000 //TX_NS_FP_K_METAL +411 0x7FFF //TX_NOISEDET_BOOST_TH +412 0x0000 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x001C //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4242 //TX_FDEQ_GAIN_6 +574 0x423C //TX_FDEQ_GAIN_7 +575 0x3C3C //TX_FDEQ_GAIN_8 +576 0x3434 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0E0F //TX_FDEQ_BIN_10 +602 0x0F10 //TX_FDEQ_BIN_11 +603 0x1011 //TX_FDEQ_BIN_12 +604 0x1104 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0608 //TX_PREEQ_BIN_MIC0_0 +642 0x0808 //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x0808 //TX_PREEQ_BIN_MIC0_3 +645 0x0808 //TX_PREEQ_BIN_MIC0_4 +646 0x0808 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0808 //TX_PREEQ_BIN_MIC0_7 +649 0x0808 //TX_PREEQ_BIN_MIC0_8 +650 0x0808 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0808 //TX_PREEQ_BIN_MIC0_11 +653 0x0808 //TX_PREEQ_BIN_MIC0_12 +654 0x0808 //TX_PREEQ_BIN_MIC0_13 +655 0x0808 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0608 //TX_PREEQ_BIN_MIC1_0 +691 0x0808 //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x0808 //TX_PREEQ_BIN_MIC1_3 +694 0x0808 //TX_PREEQ_BIN_MIC1_4 +695 0x0808 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0808 //TX_PREEQ_BIN_MIC1_7 +698 0x0808 //TX_PREEQ_BIN_MIC1_8 +699 0x0808 //TX_PREEQ_BIN_MIC1_9 +700 0x0808 //TX_PREEQ_BIN_MIC1_10 +701 0x0808 //TX_PREEQ_BIN_MIC1_11 +702 0x0808 //TX_PREEQ_BIN_MIC1_12 +703 0x0808 //TX_PREEQ_BIN_MIC1_13 +704 0x0808 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x07F2 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x006C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-WB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0008 //TX_OPERATION_MODE_0 +1 0x0008 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x0240 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0001 //TX_SAMPLINGFREQ_SIG +7 0x0001 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0915 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7D83 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0019 //TX_EPD_OFFSET_00 +233 0x0019 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x6000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000F //TX_NS_LVL_CTRL_0 +282 0x000F //TX_NS_LVL_CTRL_1 +283 0x0011 //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0000 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x0000 //TX_NS_FP_K_METAL +411 0x7FFF //TX_NOISEDET_BOOST_TH +412 0x0000 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x001C //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4444 //TX_FDEQ_GAIN_7 +575 0x4444 //TX_FDEQ_GAIN_8 +576 0x3C3C //TX_FDEQ_GAIN_9 +577 0x3C3C //TX_FDEQ_GAIN_10 +578 0x3C3C //TX_FDEQ_GAIN_11 +579 0x3C30 //TX_FDEQ_GAIN_12 +580 0x3030 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0E0F //TX_FDEQ_BIN_10 +602 0x0F10 //TX_FDEQ_BIN_11 +603 0x1011 //TX_FDEQ_BIN_12 +604 0x1112 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0608 //TX_PREEQ_BIN_MIC0_0 +642 0x0808 //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x0808 //TX_PREEQ_BIN_MIC0_3 +645 0x0808 //TX_PREEQ_BIN_MIC0_4 +646 0x0808 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0808 //TX_PREEQ_BIN_MIC0_7 +649 0x0808 //TX_PREEQ_BIN_MIC0_8 +650 0x0808 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0808 //TX_PREEQ_BIN_MIC0_11 +653 0x0808 //TX_PREEQ_BIN_MIC0_12 +654 0x0808 //TX_PREEQ_BIN_MIC0_13 +655 0x0808 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0608 //TX_PREEQ_BIN_MIC1_0 +691 0x0808 //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x0808 //TX_PREEQ_BIN_MIC1_3 +694 0x0808 //TX_PREEQ_BIN_MIC1_4 +695 0x0808 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0808 //TX_PREEQ_BIN_MIC1_7 +698 0x0808 //TX_PREEQ_BIN_MIC1_8 +699 0x0808 //TX_PREEQ_BIN_MIC1_9 +700 0x0808 //TX_PREEQ_BIN_MIC1_10 +701 0x0808 //TX_PREEQ_BIN_MIC1_11 +702 0x0808 //TX_PREEQ_BIN_MIC1_12 +703 0x0808 //TX_PREEQ_BIN_MIC1_13 +704 0x0808 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x07F2 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x006C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0001 //RX_SAMPLINGFREQ_SIG +3 0x0001 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-SWB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x0200 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0915 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7EFF //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00F0 //TX_EPD_OFFSET_00 +233 0x00F0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x6000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000B //TX_NS_LVL_CTRL_0 +282 0x000F //TX_NS_LVL_CTRL_1 +283 0x0011 //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x2000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7900 //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0000 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4868 //TX_PREEQ_GAIN_MIC0_8 +626 0x6860 //TX_PREEQ_GAIN_MIC0_9 +627 0x6048 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0970 //TX_TDDRC_DRC_GAIN +867 0x78D6 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x0064 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x1800 //RX_THR_PITCH_DET_0 +14 0x1000 //RX_THR_PITCH_DET_1 +15 0x0800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0003 //RX_NS_LVL_CTRL +23 0x9000 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0009 //TX_OPERATION_MODE_1 +2 0x0020 //TX_PATCH_REG +3 0x0200 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0915 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0200 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6000 //TX_EAD_THR +151 0x0400 //TX_THR_RE_EST +152 0x3000 //TX_MIN_EQ_RE_EST_0 +153 0x3000 //TX_MIN_EQ_RE_EST_1 +154 0x4000 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x6000 //TX_MIN_EQ_RE_EST_6 +159 0x6000 //TX_MIN_EQ_RE_EST_7 +160 0x6000 //TX_MIN_EQ_RE_EST_8 +161 0x6000 //TX_MIN_EQ_RE_EST_9 +162 0x4000 //TX_MIN_EQ_RE_EST_10 +163 0x4000 //TX_MIN_EQ_RE_EST_11 +164 0x4000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x4000 //TX_LAMBDA_CB_NLE +167 0x3000 //TX_C_POST_FLT +168 0x4500 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x5000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7F00 //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x0800 //TX_DTD_THR2_0 +205 0x0800 //TX_DTD_THR2_1 +206 0x0800 //TX_DTD_THR2_2 +207 0x0800 //TX_DTD_THR2_3 +208 0x0800 //TX_DTD_THR2_4 +209 0x0100 //TX_DTD_THR2_5 +210 0x0100 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x03E8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00C0 //TX_EPD_OFFSET_00 +233 0x00C0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF700 //TX_THR_SN_EST_0 +243 0xFB00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF700 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xF600 //TX_THR_SN_EST_5 +248 0xF600 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0200 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0400 //TX_DELTA_THR_SN_EST_2 +253 0x0300 //TX_DELTA_THR_SN_EST_3 +254 0x0600 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x2000 //TX_B_POST_FLT_1 +281 0x0012 //TX_NS_LVL_CTRL_0 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0019 //TX_NS_LVL_CTRL_4 +286 0x0010 //TX_NS_LVL_CTRL_5 +287 0x0010 //TX_NS_LVL_CTRL_6 +288 0x0010 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x0011 //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000F //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000C //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7000 //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x7000 //TX_SNRI_SUP_2 +303 0x7000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0016 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x6000 //TX_A_POST_FILT_S_0 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x6000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x6000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 +321 0x6000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x4000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x2000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7CCD //TX_LAMBDA_PFILT_S_0 +340 0x7CCD //TX_LAMBDA_PFILT_S_1 +341 0x7CCD //TX_LAMBDA_PFILT_S_2 +342 0x7CCD //TX_LAMBDA_PFILT_S_3 +343 0x7CCD //TX_LAMBDA_PFILT_S_4 +344 0x7CCD //TX_LAMBDA_PFILT_S_5 +345 0x7CCD //TX_LAMBDA_PFILT_S_6 +346 0x7CCD //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0500 //TX_A_PEPPER +349 0x1600 //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0020 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x02A6 //TX_NOISE_TH_1 +371 0x04B0 //TX_NOISE_TH_2 +372 0x3194 //TX_NOISE_TH_3 +373 0x0960 //TX_NOISE_TH_4 +374 0x5555 //TX_NOISE_TH_5 +375 0x3FF4 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x0000 //TX_NOISE_TH_5_4 +378 0x02BC //TX_NOISE_TH_6 +379 0x0020 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0020 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0304 //TX_FDEQ_BIN_2 +594 0x0405 //TX_FDEQ_BIN_3 +595 0x0607 //TX_FDEQ_BIN_4 +596 0x0809 //TX_FDEQ_BIN_5 +597 0x0A0B //TX_FDEQ_BIN_6 +598 0x0C0D //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x1011 //TX_FDEQ_BIN_9 +601 0x1214 //TX_FDEQ_BIN_10 +602 0x1618 //TX_FDEQ_BIN_11 +603 0x1C1C //TX_FDEQ_BIN_12 +604 0x2020 //TX_FDEQ_BIN_13 +605 0x2020 //TX_FDEQ_BIN_14 +606 0x2011 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0C00 //TX_TDDRC_ALPHA_UP_01 +784 0x0C00 //TX_TDDRC_ALPHA_UP_02 +785 0x0C00 //TX_TDDRC_ALPHA_UP_03 +786 0x0C00 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x2000 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0001 //TX_TDDRC_THRD_0 +855 0x0001 //TX_TDDRC_THRD_1 +856 0x1900 //TX_TDDRC_THRD_2 +857 0x1900 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7B00 //TX_TDDRC_SLANT_1 +860 0x0C00 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0200 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x0064 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0500 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000A //RX_NS_LVL_CTRL +23 0xF600 //RX_THR_SN_EST +24 0x7000 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-NB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0008 //TX_OPERATION_MODE_0 +1 0x0008 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2A68 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0A13 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7D83 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0019 //TX_EPD_OFFSET_00 +233 0x0019 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x6000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000F //TX_NS_LVL_CTRL_0 +282 0x000F //TX_NS_LVL_CTRL_1 +283 0x0011 //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x0000 //TX_NS_FP_K_METAL +411 0x7FFF //TX_NOISEDET_BOOST_TH +412 0x0000 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x001C //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4242 //TX_FDEQ_GAIN_6 +574 0x423C //TX_FDEQ_GAIN_7 +575 0x3C3C //TX_FDEQ_GAIN_8 +576 0x3434 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0E0F //TX_FDEQ_BIN_10 +602 0x0F10 //TX_FDEQ_BIN_11 +603 0x1011 //TX_FDEQ_BIN_12 +604 0x1104 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0608 //TX_PREEQ_BIN_MIC0_0 +642 0x0808 //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x0808 //TX_PREEQ_BIN_MIC0_3 +645 0x0808 //TX_PREEQ_BIN_MIC0_4 +646 0x0808 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0808 //TX_PREEQ_BIN_MIC0_7 +649 0x0808 //TX_PREEQ_BIN_MIC0_8 +650 0x0808 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0808 //TX_PREEQ_BIN_MIC0_11 +653 0x0808 //TX_PREEQ_BIN_MIC0_12 +654 0x0808 //TX_PREEQ_BIN_MIC0_13 +655 0x0808 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0608 //TX_PREEQ_BIN_MIC1_0 +691 0x0808 //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x0808 //TX_PREEQ_BIN_MIC1_3 +694 0x0808 //TX_PREEQ_BIN_MIC1_4 +695 0x0808 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0808 //TX_PREEQ_BIN_MIC1_7 +698 0x0808 //TX_PREEQ_BIN_MIC1_8 +699 0x0808 //TX_PREEQ_BIN_MIC1_9 +700 0x0808 //TX_PREEQ_BIN_MIC1_10 +701 0x0808 //TX_PREEQ_BIN_MIC1_11 +702 0x0808 //TX_PREEQ_BIN_MIC1_12 +703 0x0808 //TX_PREEQ_BIN_MIC1_13 +704 0x0808 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x07F2 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x006C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-WB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0008 //TX_OPERATION_MODE_0 +1 0x0008 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2A68 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0001 //TX_SAMPLINGFREQ_SIG +7 0x0001 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0915 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7D83 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0019 //TX_EPD_OFFSET_00 +233 0x0019 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x6000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000F //TX_NS_LVL_CTRL_0 +282 0x000F //TX_NS_LVL_CTRL_1 +283 0x0011 //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x0000 //TX_NS_FP_K_METAL +411 0x7FFF //TX_NOISEDET_BOOST_TH +412 0x0000 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x001C //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4444 //TX_FDEQ_GAIN_7 +575 0x4444 //TX_FDEQ_GAIN_8 +576 0x3C3C //TX_FDEQ_GAIN_9 +577 0x3C3C //TX_FDEQ_GAIN_10 +578 0x3C3C //TX_FDEQ_GAIN_11 +579 0x3C30 //TX_FDEQ_GAIN_12 +580 0x3030 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0E0F //TX_FDEQ_BIN_10 +602 0x0F10 //TX_FDEQ_BIN_11 +603 0x1011 //TX_FDEQ_BIN_12 +604 0x1112 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0608 //TX_PREEQ_BIN_MIC0_0 +642 0x0808 //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x0808 //TX_PREEQ_BIN_MIC0_3 +645 0x0808 //TX_PREEQ_BIN_MIC0_4 +646 0x0808 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0808 //TX_PREEQ_BIN_MIC0_7 +649 0x0808 //TX_PREEQ_BIN_MIC0_8 +650 0x0808 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0808 //TX_PREEQ_BIN_MIC0_11 +653 0x0808 //TX_PREEQ_BIN_MIC0_12 +654 0x0808 //TX_PREEQ_BIN_MIC0_13 +655 0x0808 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0608 //TX_PREEQ_BIN_MIC1_0 +691 0x0808 //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x0808 //TX_PREEQ_BIN_MIC1_3 +694 0x0808 //TX_PREEQ_BIN_MIC1_4 +695 0x0808 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0808 //TX_PREEQ_BIN_MIC1_7 +698 0x0808 //TX_PREEQ_BIN_MIC1_8 +699 0x0808 //TX_PREEQ_BIN_MIC1_9 +700 0x0808 //TX_PREEQ_BIN_MIC1_10 +701 0x0808 //TX_PREEQ_BIN_MIC1_11 +702 0x0808 //TX_PREEQ_BIN_MIC1_12 +703 0x0808 //TX_PREEQ_BIN_MIC1_13 +704 0x0808 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x07F2 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x006C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0001 //RX_SAMPLINGFREQ_SIG +3 0x0001 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-SWB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2A28 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0915 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7EFF //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00F0 //TX_EPD_OFFSET_00 +233 0x00F0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x6000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000B //TX_NS_LVL_CTRL_0 +282 0x000F //TX_NS_LVL_CTRL_1 +283 0x0011 //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x2000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7900 //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4868 //TX_PREEQ_GAIN_MIC0_8 +626 0x6860 //TX_PREEQ_GAIN_MIC0_9 +627 0x6048 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0970 //TX_TDDRC_DRC_GAIN +867 0x78D6 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x0064 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x1800 //RX_THR_PITCH_DET_0 +14 0x1000 //RX_THR_PITCH_DET_1 +15 0x0800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0003 //RX_NS_LVL_CTRL +23 0x9000 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0009 //TX_OPERATION_MODE_1 +2 0x0020 //TX_PATCH_REG +3 0x286A //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0915 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0200 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6000 //TX_EAD_THR +151 0x0400 //TX_THR_RE_EST +152 0x3000 //TX_MIN_EQ_RE_EST_0 +153 0x3000 //TX_MIN_EQ_RE_EST_1 +154 0x4000 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x6000 //TX_MIN_EQ_RE_EST_6 +159 0x6000 //TX_MIN_EQ_RE_EST_7 +160 0x6000 //TX_MIN_EQ_RE_EST_8 +161 0x6000 //TX_MIN_EQ_RE_EST_9 +162 0x4000 //TX_MIN_EQ_RE_EST_10 +163 0x4000 //TX_MIN_EQ_RE_EST_11 +164 0x4000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x4000 //TX_LAMBDA_CB_NLE +167 0x3000 //TX_C_POST_FLT +168 0x4500 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x5000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7F00 //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x0800 //TX_DTD_THR2_0 +205 0x0800 //TX_DTD_THR2_1 +206 0x0800 //TX_DTD_THR2_2 +207 0x0800 //TX_DTD_THR2_3 +208 0x0800 //TX_DTD_THR2_4 +209 0x0100 //TX_DTD_THR2_5 +210 0x0100 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x03E8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00C0 //TX_EPD_OFFSET_00 +233 0x00C0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF700 //TX_THR_SN_EST_0 +243 0xFB00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF700 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xF600 //TX_THR_SN_EST_5 +248 0xF600 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0200 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0400 //TX_DELTA_THR_SN_EST_2 +253 0x0300 //TX_DELTA_THR_SN_EST_3 +254 0x0600 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x2000 //TX_B_POST_FLT_1 +281 0x0012 //TX_NS_LVL_CTRL_0 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0019 //TX_NS_LVL_CTRL_4 +286 0x0010 //TX_NS_LVL_CTRL_5 +287 0x0010 //TX_NS_LVL_CTRL_6 +288 0x0010 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x0011 //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000F //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000C //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7000 //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x7000 //TX_SNRI_SUP_2 +303 0x7000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0016 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x6000 //TX_A_POST_FILT_S_0 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x6000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x6000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 +321 0x6000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x4000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x2000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7CCD //TX_LAMBDA_PFILT_S_0 +340 0x7CCD //TX_LAMBDA_PFILT_S_1 +341 0x7CCD //TX_LAMBDA_PFILT_S_2 +342 0x7CCD //TX_LAMBDA_PFILT_S_3 +343 0x7CCD //TX_LAMBDA_PFILT_S_4 +344 0x7CCD //TX_LAMBDA_PFILT_S_5 +345 0x7CCD //TX_LAMBDA_PFILT_S_6 +346 0x7CCD //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0500 //TX_A_PEPPER +349 0x1600 //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0020 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x02A6 //TX_NOISE_TH_1 +371 0x04B0 //TX_NOISE_TH_2 +372 0x3194 //TX_NOISE_TH_3 +373 0x0960 //TX_NOISE_TH_4 +374 0x5555 //TX_NOISE_TH_5 +375 0x3FF4 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x0000 //TX_NOISE_TH_5_4 +378 0x02BC //TX_NOISE_TH_6 +379 0x0020 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0020 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0304 //TX_FDEQ_BIN_2 +594 0x0405 //TX_FDEQ_BIN_3 +595 0x0607 //TX_FDEQ_BIN_4 +596 0x0809 //TX_FDEQ_BIN_5 +597 0x0A0B //TX_FDEQ_BIN_6 +598 0x0C0D //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x1011 //TX_FDEQ_BIN_9 +601 0x1214 //TX_FDEQ_BIN_10 +602 0x1618 //TX_FDEQ_BIN_11 +603 0x1C1C //TX_FDEQ_BIN_12 +604 0x2020 //TX_FDEQ_BIN_13 +605 0x2020 //TX_FDEQ_BIN_14 +606 0x2011 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0C00 //TX_TDDRC_ALPHA_UP_01 +784 0x0C00 //TX_TDDRC_ALPHA_UP_02 +785 0x0C00 //TX_TDDRC_ALPHA_UP_03 +786 0x0C00 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x2000 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0001 //TX_TDDRC_THRD_0 +855 0x0001 //TX_TDDRC_THRD_1 +856 0x1900 //TX_TDDRC_THRD_2 +857 0x1900 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7B00 //TX_TDDRC_SLANT_1 +860 0x0C00 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0200 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x0064 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0500 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000A //RX_NS_LVL_CTRL +23 0xF600 //RX_THR_SN_EST +24 0x7000 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + diff --git a/audio/bluejay/tuning/fortemedia/HANDSET.dat b/audio/bluejay/tuning/fortemedia/HANDSET.dat new file mode 100644 index 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zWWiu)o422%sker<<|1z`#5Kl*qOG~Z#+rz5w6#tR+FD%fc$1h&y|u)KdTWXG_13&6 zXWrT#)p7II>c`fSwzfBKEgx-dTAC>)-*I7y4?oBTPsp;eO!`?c7&`vEY43ZdHV(m| zCD=IFIGjv>&+PkBaD1+?aj#gnLO0e3R_%-=p4!9r$LLm$e;R)GRZOt2xH(-M5D&3(6^i=WEi#Ack%IT_`cvZCY zrhkSClRmU(Dv$J~?FaoK3ID=mB{Bd~@DEJoF?nmn`=F z@?@>I)}*bqR&UK}YgSv^nsBYjtk`5+a-G>-w%Kf5eZ5JP8hj*gFp}{Va&>NmEpQXu z47Wfn+{!(Qt#BJ`Gwqch(p*cZ_Y$?5>_vEeT?_~R4%^0IGV`(HdVbmKAvm=)`@Xb@ c_apnh6s*75Io{fuy&mlKQ11^B?AOEp1J^qXlK=n! literal 0 HcmV?d00001 diff --git a/audio/bluejay/tuning/fortemedia/HANDSET.mods b/audio/bluejay/tuning/fortemedia/HANDSET.mods new file mode 100644 index 0000000..105156e --- /dev/null +++ b/audio/bluejay/tuning/fortemedia/HANDSET.mods @@ -0,0 +1,33331 @@ +#PLATFORM_NAME gChip +#EXPORT_FLAG HANDSET +#SINGLE_API_VER 1.1.6 +#SAVE_TIME 2021-10-20 12:14:18 + +#CASE_NAME HANDSET-HANDSET-RESERVE1-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0026 //TX_PATCH_REG +3 0x6B56 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7900 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0400 //TX_MIN_EQ_RE_EST_0 +153 0x0400 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x1000 //TX_MIN_EQ_RE_EST_4 +157 0x1000 //TX_MIN_EQ_RE_EST_5 +158 0x1000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x1800 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x6000 //TX_DTD_THR3 +212 0x0177 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0C00 //TX_RATIO_DT_L_TH_LOW +224 0x2000 //TX_RATIO_DT_H_TH_LOW +225 0x1800 //TX_RATIO_DT_L_TH_HIGH +226 0x3000 //TX_RATIO_DT_H_TH_HIGH +227 0x0A00 //TX_RATIO_DT_L0_TH +228 0x7000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x0600 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x2000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x0016 //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0018 //TX_NS_LVL_CTRL_4 +286 0x0016 //TX_NS_LVL_CTRL_5 +287 0x0012 //TX_NS_LVL_CTRL_6 +288 0x0017 //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0012 //TX_MIN_GAIN_S_1 +291 0x0007 //TX_MIN_GAIN_S_2 +292 0x0012 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0012 //TX_MIN_GAIN_S_5 +295 0x0012 //TX_MIN_GAIN_S_6 +296 0x0012 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x6000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x6000 //TX_SNRI_SUP_5 +306 0x6000 //TX_SNRI_SUP_6 +307 0x6000 //TX_SNRI_SUP_7 +308 0x6000 //TX_THR_LFNS +309 0x0017 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x3000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x5000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x6000 //TX_B_POST_FILT_6 +329 0x3000 //TX_B_POST_FILT_7 +330 0x1000 //TX_B_LESSCUT_RTO_S_0 +331 0x6000 //TX_B_LESSCUT_RTO_S_1 +332 0x6000 //TX_B_LESSCUT_RTO_S_2 +333 0x6000 //TX_B_LESSCUT_RTO_S_3 +334 0x6000 //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x07D0 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x1B58 //TX_NOISE_TH_0_2 +369 0x2134 //TX_NOISE_TH_0_3 +370 0x00C6 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x2EE0 //TX_NOISE_TH_3 +373 0x47E0 //TX_NOISE_TH_4 +374 0x57E4 //TX_NOISE_TH_5 +375 0x4BD6 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x39DF //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x0200 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x2000 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x051E //TX_SB_RHO_MEAN2_TH +441 0x051E //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0300 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0030 //TX_FDEQ_SUBNUM +567 0x504A //TX_FDEQ_GAIN_0 +568 0x4C54 //TX_FDEQ_GAIN_1 +569 0x554B //TX_FDEQ_GAIN_2 +570 0x4D4E //TX_FDEQ_GAIN_3 +571 0x4F4F //TX_FDEQ_GAIN_4 +572 0x4E51 //TX_FDEQ_GAIN_5 +573 0x5154 //TX_FDEQ_GAIN_6 +574 0x5456 //TX_FDEQ_GAIN_7 +575 0x5E66 //TX_FDEQ_GAIN_8 +576 0x675D //TX_FDEQ_GAIN_9 +577 0x5655 //TX_FDEQ_GAIN_10 +578 0x5956 //TX_FDEQ_GAIN_11 +579 0x5656 //TX_FDEQ_GAIN_12 +580 0x5953 //TX_FDEQ_GAIN_13 +581 0x575A //TX_FDEQ_GAIN_14 +582 0x5559 //TX_FDEQ_GAIN_15 +583 0x656E //TX_FDEQ_GAIN_16 +584 0x7B98 //TX_FDEQ_GAIN_17 +585 0x9898 //TX_FDEQ_GAIN_18 +586 0x9848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0F03 //TX_FDEQ_BIN_0 +592 0x0909 //TX_FDEQ_BIN_1 +593 0x080F //TX_FDEQ_BIN_2 +594 0x0609 //TX_FDEQ_BIN_3 +595 0x0F03 //TX_FDEQ_BIN_4 +596 0x1402 //TX_FDEQ_BIN_5 +597 0x0E13 //TX_FDEQ_BIN_6 +598 0x110F //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x0E0F //TX_FDEQ_BIN_9 +601 0x080D //TX_FDEQ_BIN_10 +602 0x0F0F //TX_FDEQ_BIN_11 +603 0x0F0F //TX_FDEQ_BIN_12 +604 0x0A0F //TX_FDEQ_BIN_13 +605 0x0809 //TX_FDEQ_BIN_14 +606 0x0A0B //TX_FDEQ_BIN_15 +607 0x0C0D //TX_FDEQ_BIN_16 +608 0x0E0F //TX_FDEQ_BIN_17 +609 0x1013 //TX_FDEQ_BIN_18 +610 0x0A00 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4846 //TX_PREEQ_GAIN_MIC0_6 +624 0x4645 //TX_PREEQ_GAIN_MIC0_7 +625 0x4545 //TX_PREEQ_GAIN_MIC0_8 +626 0x4545 //TX_PREEQ_GAIN_MIC0_9 +627 0x4444 //TX_PREEQ_GAIN_MIC0_10 +628 0x4443 //TX_PREEQ_GAIN_MIC0_11 +629 0x4241 //TX_PREEQ_GAIN_MIC0_12 +630 0x3C3E //TX_PREEQ_GAIN_MIC0_13 +631 0x3E40 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x4000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4849 //TX_PREEQ_GAIN_MIC1_6 +673 0x4A4B //TX_PREEQ_GAIN_MIC1_7 +674 0x4C4B //TX_PREEQ_GAIN_MIC1_8 +675 0x4A48 //TX_PREEQ_GAIN_MIC1_9 +676 0x4B4C //TX_PREEQ_GAIN_MIC1_10 +677 0x4C4B //TX_PREEQ_GAIN_MIC1_11 +678 0x4838 //TX_PREEQ_GAIN_MIC1_12 +679 0x3858 //TX_PREEQ_GAIN_MIC1_13 +680 0x7060 //TX_PREEQ_GAIN_MIC1_14 +681 0x9870 //TX_PREEQ_GAIN_MIC1_15 +682 0x5848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x4000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0202 //TX_PREEQ_BIN_MIC2_0 +740 0x0203 //TX_PREEQ_BIN_MIC2_1 +741 0x0303 //TX_PREEQ_BIN_MIC2_2 +742 0x0304 //TX_PREEQ_BIN_MIC2_3 +743 0x0405 //TX_PREEQ_BIN_MIC2_4 +744 0x0506 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0809 //TX_PREEQ_BIN_MIC2_7 +747 0x0A0A //TX_PREEQ_BIN_MIC2_8 +748 0x0C10 //TX_PREEQ_BIN_MIC2_9 +749 0x1013 //TX_PREEQ_BIN_MIC2_10 +750 0x1414 //TX_PREEQ_BIN_MIC2_11 +751 0x261E //TX_PREEQ_BIN_MIC2_12 +752 0x1E14 //TX_PREEQ_BIN_MIC2_13 +753 0x1414 //TX_PREEQ_BIN_MIC2_14 +754 0x2814 //TX_PREEQ_BIN_MIC2_15 +755 0x4000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x05F5 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0xECCD //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x2000 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x003C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x064E //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x5800 //RX_THR_PITCH_DET_0 +14 0x5000 //RX_THR_PITCH_DET_1 +15 0x4000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8689 //RX_FDEQ_GAIN_3 +43 0x908F //RX_FDEQ_GAIN_4 +44 0x9495 //RX_FDEQ_GAIN_5 +45 0x989D //RX_FDEQ_GAIN_6 +46 0x9DA6 //RX_FDEQ_GAIN_7 +47 0xA895 //RX_FDEQ_GAIN_8 +48 0x8A8A //RX_FDEQ_GAIN_9 +49 0x8E78 //RX_FDEQ_GAIN_10 +50 0x7070 //RX_FDEQ_GAIN_11 +51 0x7680 //RX_FDEQ_GAIN_12 +52 0x787C //RX_FDEQ_GAIN_13 +53 0x8890 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x000D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8689 //RX_FDEQ_GAIN_3 +43 0x908F //RX_FDEQ_GAIN_4 +44 0x9495 //RX_FDEQ_GAIN_5 +45 0x989D //RX_FDEQ_GAIN_6 +46 0x9DA6 //RX_FDEQ_GAIN_7 +47 0xA895 //RX_FDEQ_GAIN_8 +48 0x8A8A //RX_FDEQ_GAIN_9 +49 0x8E78 //RX_FDEQ_GAIN_10 +50 0x7070 //RX_FDEQ_GAIN_11 +51 0x7680 //RX_FDEQ_GAIN_12 +52 0x787C //RX_FDEQ_GAIN_13 +53 0x8890 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8689 //RX_FDEQ_GAIN_3 +43 0x908F //RX_FDEQ_GAIN_4 +44 0x9495 //RX_FDEQ_GAIN_5 +45 0x989D //RX_FDEQ_GAIN_6 +46 0x9DA6 //RX_FDEQ_GAIN_7 +47 0xA895 //RX_FDEQ_GAIN_8 +48 0x8A8A //RX_FDEQ_GAIN_9 +49 0x8E78 //RX_FDEQ_GAIN_10 +50 0x7070 //RX_FDEQ_GAIN_11 +51 0x7680 //RX_FDEQ_GAIN_12 +52 0x787C //RX_FDEQ_GAIN_13 +53 0x8890 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0016 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8689 //RX_FDEQ_GAIN_3 +43 0x908F //RX_FDEQ_GAIN_4 +44 0x9495 //RX_FDEQ_GAIN_5 +45 0x989D //RX_FDEQ_GAIN_6 +46 0x9DA6 //RX_FDEQ_GAIN_7 +47 0xA895 //RX_FDEQ_GAIN_8 +48 0x8A8A //RX_FDEQ_GAIN_9 +49 0x8E78 //RX_FDEQ_GAIN_10 +50 0x7070 //RX_FDEQ_GAIN_11 +51 0x7680 //RX_FDEQ_GAIN_12 +52 0x787C //RX_FDEQ_GAIN_13 +53 0x8890 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0026 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8689 //RX_FDEQ_GAIN_3 +43 0x908F //RX_FDEQ_GAIN_4 +44 0x9495 //RX_FDEQ_GAIN_5 +45 0x989D //RX_FDEQ_GAIN_6 +46 0x9DA6 //RX_FDEQ_GAIN_7 +47 0xA895 //RX_FDEQ_GAIN_8 +48 0x8A8A //RX_FDEQ_GAIN_9 +49 0x8E78 //RX_FDEQ_GAIN_10 +50 0x7070 //RX_FDEQ_GAIN_11 +51 0x7680 //RX_FDEQ_GAIN_12 +52 0x787C //RX_FDEQ_GAIN_13 +53 0x8890 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x003D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8689 //RX_FDEQ_GAIN_3 +43 0x908F //RX_FDEQ_GAIN_4 +44 0x9495 //RX_FDEQ_GAIN_5 +45 0x989D //RX_FDEQ_GAIN_6 +46 0x9DA6 //RX_FDEQ_GAIN_7 +47 0xA895 //RX_FDEQ_GAIN_8 +48 0x8A8A //RX_FDEQ_GAIN_9 +49 0x8E78 //RX_FDEQ_GAIN_10 +50 0x7070 //RX_FDEQ_GAIN_11 +51 0x7680 //RX_FDEQ_GAIN_12 +52 0x787C //RX_FDEQ_GAIN_13 +53 0x8890 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0060 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8689 //RX_FDEQ_GAIN_3 +43 0x908F //RX_FDEQ_GAIN_4 +44 0x9495 //RX_FDEQ_GAIN_5 +45 0x989D //RX_FDEQ_GAIN_6 +46 0x9DA6 //RX_FDEQ_GAIN_7 +47 0xA895 //RX_FDEQ_GAIN_8 +48 0x8A8A //RX_FDEQ_GAIN_9 +49 0x8E78 //RX_FDEQ_GAIN_10 +50 0x7070 //RX_FDEQ_GAIN_11 +51 0x7680 //RX_FDEQ_GAIN_12 +52 0x787C //RX_FDEQ_GAIN_13 +53 0x8890 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0099 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8689 //RX_FDEQ_GAIN_3 +43 0x908F //RX_FDEQ_GAIN_4 +44 0x9495 //RX_FDEQ_GAIN_5 +45 0x989D //RX_FDEQ_GAIN_6 +46 0x9DA6 //RX_FDEQ_GAIN_7 +47 0xA895 //RX_FDEQ_GAIN_8 +48 0x8A8A //RX_FDEQ_GAIN_9 +49 0x8E78 //RX_FDEQ_GAIN_10 +50 0x7070 //RX_FDEQ_GAIN_11 +51 0x7680 //RX_FDEQ_GAIN_12 +52 0x787C //RX_FDEQ_GAIN_13 +53 0x8890 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET-CUSTOM2-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0026 //TX_PATCH_REG +3 0x6B5E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7900 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0400 //TX_MIN_EQ_RE_EST_0 +153 0x0400 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x1000 //TX_MIN_EQ_RE_EST_4 +157 0x1000 //TX_MIN_EQ_RE_EST_5 +158 0x1000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x1800 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x6000 //TX_DTD_THR3 +212 0x0177 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0C00 //TX_RATIO_DT_L_TH_LOW +224 0x2000 //TX_RATIO_DT_H_TH_LOW +225 0x1800 //TX_RATIO_DT_L_TH_HIGH +226 0x3000 //TX_RATIO_DT_H_TH_HIGH +227 0x0A00 //TX_RATIO_DT_L0_TH +228 0x7000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x0600 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x2000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x0016 //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0018 //TX_NS_LVL_CTRL_4 +286 0x0016 //TX_NS_LVL_CTRL_5 +287 0x0012 //TX_NS_LVL_CTRL_6 +288 0x0017 //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0012 //TX_MIN_GAIN_S_1 +291 0x0007 //TX_MIN_GAIN_S_2 +292 0x0012 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0012 //TX_MIN_GAIN_S_5 +295 0x0012 //TX_MIN_GAIN_S_6 +296 0x0012 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x6000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x6000 //TX_SNRI_SUP_5 +306 0x6000 //TX_SNRI_SUP_6 +307 0x6000 //TX_SNRI_SUP_7 +308 0x6000 //TX_THR_LFNS +309 0x0017 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x3000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x5000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x6000 //TX_B_POST_FILT_6 +329 0x3000 //TX_B_POST_FILT_7 +330 0x1000 //TX_B_LESSCUT_RTO_S_0 +331 0x6000 //TX_B_LESSCUT_RTO_S_1 +332 0x6000 //TX_B_LESSCUT_RTO_S_2 +333 0x6000 //TX_B_LESSCUT_RTO_S_3 +334 0x6000 //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x07D0 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x1B58 //TX_NOISE_TH_0_2 +369 0x2134 //TX_NOISE_TH_0_3 +370 0x00C6 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x2EE0 //TX_NOISE_TH_3 +373 0x47E0 //TX_NOISE_TH_4 +374 0x57E4 //TX_NOISE_TH_5 +375 0x4BD6 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x39DF //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x0200 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x2000 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x051E //TX_SB_RHO_MEAN2_TH +441 0x051E //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0300 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0030 //TX_FDEQ_SUBNUM +567 0x504A //TX_FDEQ_GAIN_0 +568 0x4C54 //TX_FDEQ_GAIN_1 +569 0x554B //TX_FDEQ_GAIN_2 +570 0x4D4E //TX_FDEQ_GAIN_3 +571 0x4F4F //TX_FDEQ_GAIN_4 +572 0x4E51 //TX_FDEQ_GAIN_5 +573 0x5154 //TX_FDEQ_GAIN_6 +574 0x5456 //TX_FDEQ_GAIN_7 +575 0x5E66 //TX_FDEQ_GAIN_8 +576 0x675D //TX_FDEQ_GAIN_9 +577 0x5655 //TX_FDEQ_GAIN_10 +578 0x5956 //TX_FDEQ_GAIN_11 +579 0x5656 //TX_FDEQ_GAIN_12 +580 0x5953 //TX_FDEQ_GAIN_13 +581 0x575A //TX_FDEQ_GAIN_14 +582 0x5559 //TX_FDEQ_GAIN_15 +583 0x656E //TX_FDEQ_GAIN_16 +584 0x7B98 //TX_FDEQ_GAIN_17 +585 0x9898 //TX_FDEQ_GAIN_18 +586 0x9848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0F03 //TX_FDEQ_BIN_0 +592 0x0909 //TX_FDEQ_BIN_1 +593 0x080F //TX_FDEQ_BIN_2 +594 0x0609 //TX_FDEQ_BIN_3 +595 0x0F03 //TX_FDEQ_BIN_4 +596 0x1402 //TX_FDEQ_BIN_5 +597 0x0E13 //TX_FDEQ_BIN_6 +598 0x110F //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x0E0F //TX_FDEQ_BIN_9 +601 0x080D //TX_FDEQ_BIN_10 +602 0x0F0F //TX_FDEQ_BIN_11 +603 0x0F0F //TX_FDEQ_BIN_12 +604 0x0A0F //TX_FDEQ_BIN_13 +605 0x0809 //TX_FDEQ_BIN_14 +606 0x0A0B //TX_FDEQ_BIN_15 +607 0x0C0D //TX_FDEQ_BIN_16 +608 0x0E0F //TX_FDEQ_BIN_17 +609 0x1013 //TX_FDEQ_BIN_18 +610 0x0A00 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4846 //TX_PREEQ_GAIN_MIC0_6 +624 0x4645 //TX_PREEQ_GAIN_MIC0_7 +625 0x4545 //TX_PREEQ_GAIN_MIC0_8 +626 0x4545 //TX_PREEQ_GAIN_MIC0_9 +627 0x4444 //TX_PREEQ_GAIN_MIC0_10 +628 0x4443 //TX_PREEQ_GAIN_MIC0_11 +629 0x4241 //TX_PREEQ_GAIN_MIC0_12 +630 0x3C3E //TX_PREEQ_GAIN_MIC0_13 +631 0x3E40 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x4000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4849 //TX_PREEQ_GAIN_MIC1_6 +673 0x4A4B //TX_PREEQ_GAIN_MIC1_7 +674 0x4C4B //TX_PREEQ_GAIN_MIC1_8 +675 0x4A48 //TX_PREEQ_GAIN_MIC1_9 +676 0x4B4C //TX_PREEQ_GAIN_MIC1_10 +677 0x4C4B //TX_PREEQ_GAIN_MIC1_11 +678 0x4838 //TX_PREEQ_GAIN_MIC1_12 +679 0x3858 //TX_PREEQ_GAIN_MIC1_13 +680 0x7060 //TX_PREEQ_GAIN_MIC1_14 +681 0x9870 //TX_PREEQ_GAIN_MIC1_15 +682 0x5848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x4000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0202 //TX_PREEQ_BIN_MIC2_0 +740 0x0203 //TX_PREEQ_BIN_MIC2_1 +741 0x0303 //TX_PREEQ_BIN_MIC2_2 +742 0x0304 //TX_PREEQ_BIN_MIC2_3 +743 0x0405 //TX_PREEQ_BIN_MIC2_4 +744 0x0506 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0809 //TX_PREEQ_BIN_MIC2_7 +747 0x0A0A //TX_PREEQ_BIN_MIC2_8 +748 0x0C10 //TX_PREEQ_BIN_MIC2_9 +749 0x1013 //TX_PREEQ_BIN_MIC2_10 +750 0x1414 //TX_PREEQ_BIN_MIC2_11 +751 0x261E //TX_PREEQ_BIN_MIC2_12 +752 0x1E14 //TX_PREEQ_BIN_MIC2_13 +753 0x1414 //TX_PREEQ_BIN_MIC2_14 +754 0x2814 //TX_PREEQ_BIN_MIC2_15 +755 0x4000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x05F5 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0xECCD //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x2000 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x003C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x064E //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x5800 //RX_THR_PITCH_DET_0 +14 0x5000 //RX_THR_PITCH_DET_1 +15 0x4000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8689 //RX_FDEQ_GAIN_3 +43 0x908F //RX_FDEQ_GAIN_4 +44 0x9495 //RX_FDEQ_GAIN_5 +45 0x989D //RX_FDEQ_GAIN_6 +46 0x9DA6 //RX_FDEQ_GAIN_7 +47 0xA895 //RX_FDEQ_GAIN_8 +48 0x8A8A //RX_FDEQ_GAIN_9 +49 0x8E78 //RX_FDEQ_GAIN_10 +50 0x7070 //RX_FDEQ_GAIN_11 +51 0x7680 //RX_FDEQ_GAIN_12 +52 0x787C //RX_FDEQ_GAIN_13 +53 0x8890 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x000D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8689 //RX_FDEQ_GAIN_3 +43 0x908F //RX_FDEQ_GAIN_4 +44 0x9495 //RX_FDEQ_GAIN_5 +45 0x989D //RX_FDEQ_GAIN_6 +46 0x9DA6 //RX_FDEQ_GAIN_7 +47 0xA895 //RX_FDEQ_GAIN_8 +48 0x8A8A //RX_FDEQ_GAIN_9 +49 0x8E78 //RX_FDEQ_GAIN_10 +50 0x7070 //RX_FDEQ_GAIN_11 +51 0x7680 //RX_FDEQ_GAIN_12 +52 0x787C //RX_FDEQ_GAIN_13 +53 0x8890 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8689 //RX_FDEQ_GAIN_3 +43 0x908F //RX_FDEQ_GAIN_4 +44 0x9495 //RX_FDEQ_GAIN_5 +45 0x989D //RX_FDEQ_GAIN_6 +46 0x9DA6 //RX_FDEQ_GAIN_7 +47 0xA895 //RX_FDEQ_GAIN_8 +48 0x8A8A //RX_FDEQ_GAIN_9 +49 0x8E78 //RX_FDEQ_GAIN_10 +50 0x7070 //RX_FDEQ_GAIN_11 +51 0x7680 //RX_FDEQ_GAIN_12 +52 0x787C //RX_FDEQ_GAIN_13 +53 0x8890 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0016 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8689 //RX_FDEQ_GAIN_3 +43 0x908F //RX_FDEQ_GAIN_4 +44 0x9495 //RX_FDEQ_GAIN_5 +45 0x989D //RX_FDEQ_GAIN_6 +46 0x9DA6 //RX_FDEQ_GAIN_7 +47 0xA895 //RX_FDEQ_GAIN_8 +48 0x8A8A //RX_FDEQ_GAIN_9 +49 0x8E78 //RX_FDEQ_GAIN_10 +50 0x7070 //RX_FDEQ_GAIN_11 +51 0x7680 //RX_FDEQ_GAIN_12 +52 0x787C //RX_FDEQ_GAIN_13 +53 0x8890 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0026 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8689 //RX_FDEQ_GAIN_3 +43 0x908F //RX_FDEQ_GAIN_4 +44 0x9495 //RX_FDEQ_GAIN_5 +45 0x989D //RX_FDEQ_GAIN_6 +46 0x9DA6 //RX_FDEQ_GAIN_7 +47 0xA895 //RX_FDEQ_GAIN_8 +48 0x8A8A //RX_FDEQ_GAIN_9 +49 0x8E78 //RX_FDEQ_GAIN_10 +50 0x7070 //RX_FDEQ_GAIN_11 +51 0x7680 //RX_FDEQ_GAIN_12 +52 0x787C //RX_FDEQ_GAIN_13 +53 0x8890 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x003D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8689 //RX_FDEQ_GAIN_3 +43 0x908F //RX_FDEQ_GAIN_4 +44 0x9495 //RX_FDEQ_GAIN_5 +45 0x989D //RX_FDEQ_GAIN_6 +46 0x9DA6 //RX_FDEQ_GAIN_7 +47 0xA895 //RX_FDEQ_GAIN_8 +48 0x8A8A //RX_FDEQ_GAIN_9 +49 0x8E78 //RX_FDEQ_GAIN_10 +50 0x7070 //RX_FDEQ_GAIN_11 +51 0x7680 //RX_FDEQ_GAIN_12 +52 0x787C //RX_FDEQ_GAIN_13 +53 0x8890 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0060 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8689 //RX_FDEQ_GAIN_3 +43 0x908F //RX_FDEQ_GAIN_4 +44 0x9495 //RX_FDEQ_GAIN_5 +45 0x989D //RX_FDEQ_GAIN_6 +46 0x9DA6 //RX_FDEQ_GAIN_7 +47 0xA895 //RX_FDEQ_GAIN_8 +48 0x8A8A //RX_FDEQ_GAIN_9 +49 0x8E78 //RX_FDEQ_GAIN_10 +50 0x7070 //RX_FDEQ_GAIN_11 +51 0x7680 //RX_FDEQ_GAIN_12 +52 0x787C //RX_FDEQ_GAIN_13 +53 0x8890 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0099 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8689 //RX_FDEQ_GAIN_3 +43 0x908F //RX_FDEQ_GAIN_4 +44 0x9495 //RX_FDEQ_GAIN_5 +45 0x989D //RX_FDEQ_GAIN_6 +46 0x9DA6 //RX_FDEQ_GAIN_7 +47 0xA895 //RX_FDEQ_GAIN_8 +48 0x8A8A //RX_FDEQ_GAIN_9 +49 0x8E78 //RX_FDEQ_GAIN_10 +50 0x7070 //RX_FDEQ_GAIN_11 +51 0x7680 //RX_FDEQ_GAIN_12 +52 0x787C //RX_FDEQ_GAIN_13 +53 0x8890 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET-CUSTOM1-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0026 //TX_PATCH_REG +3 0x6B76 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7900 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0400 //TX_MIN_EQ_RE_EST_0 +153 0x0400 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x1000 //TX_MIN_EQ_RE_EST_4 +157 0x1000 //TX_MIN_EQ_RE_EST_5 +158 0x1000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x1800 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x6000 //TX_DTD_THR3 +212 0x0177 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0C00 //TX_RATIO_DT_L_TH_LOW +224 0x2000 //TX_RATIO_DT_H_TH_LOW +225 0x1800 //TX_RATIO_DT_L_TH_HIGH +226 0x3000 //TX_RATIO_DT_H_TH_HIGH +227 0x0A00 //TX_RATIO_DT_L0_TH +228 0x7000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x0600 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x2000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x0016 //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0018 //TX_NS_LVL_CTRL_4 +286 0x0016 //TX_NS_LVL_CTRL_5 +287 0x0012 //TX_NS_LVL_CTRL_6 +288 0x0017 //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0012 //TX_MIN_GAIN_S_1 +291 0x0007 //TX_MIN_GAIN_S_2 +292 0x0012 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0012 //TX_MIN_GAIN_S_5 +295 0x0012 //TX_MIN_GAIN_S_6 +296 0x0012 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x6000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x6000 //TX_SNRI_SUP_5 +306 0x6000 //TX_SNRI_SUP_6 +307 0x6000 //TX_SNRI_SUP_7 +308 0x6000 //TX_THR_LFNS +309 0x0017 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x3000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x5000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x6000 //TX_B_POST_FILT_6 +329 0x3000 //TX_B_POST_FILT_7 +330 0x1000 //TX_B_LESSCUT_RTO_S_0 +331 0x6000 //TX_B_LESSCUT_RTO_S_1 +332 0x6000 //TX_B_LESSCUT_RTO_S_2 +333 0x6000 //TX_B_LESSCUT_RTO_S_3 +334 0x6000 //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x07D0 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x1B58 //TX_NOISE_TH_0_2 +369 0x2134 //TX_NOISE_TH_0_3 +370 0x00C6 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x2EE0 //TX_NOISE_TH_3 +373 0x47E0 //TX_NOISE_TH_4 +374 0x57E4 //TX_NOISE_TH_5 +375 0x4BD6 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x39DF //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x0200 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x2000 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x051E //TX_SB_RHO_MEAN2_TH +441 0x051E //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0300 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0030 //TX_FDEQ_SUBNUM +567 0x504A //TX_FDEQ_GAIN_0 +568 0x4C54 //TX_FDEQ_GAIN_1 +569 0x554B //TX_FDEQ_GAIN_2 +570 0x4D4E //TX_FDEQ_GAIN_3 +571 0x4F4F //TX_FDEQ_GAIN_4 +572 0x4E51 //TX_FDEQ_GAIN_5 +573 0x5154 //TX_FDEQ_GAIN_6 +574 0x5456 //TX_FDEQ_GAIN_7 +575 0x5E66 //TX_FDEQ_GAIN_8 +576 0x675D //TX_FDEQ_GAIN_9 +577 0x5655 //TX_FDEQ_GAIN_10 +578 0x5956 //TX_FDEQ_GAIN_11 +579 0x5656 //TX_FDEQ_GAIN_12 +580 0x5953 //TX_FDEQ_GAIN_13 +581 0x575A //TX_FDEQ_GAIN_14 +582 0x5559 //TX_FDEQ_GAIN_15 +583 0x656E //TX_FDEQ_GAIN_16 +584 0x7B98 //TX_FDEQ_GAIN_17 +585 0x9898 //TX_FDEQ_GAIN_18 +586 0x9848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0F03 //TX_FDEQ_BIN_0 +592 0x0909 //TX_FDEQ_BIN_1 +593 0x080F //TX_FDEQ_BIN_2 +594 0x0609 //TX_FDEQ_BIN_3 +595 0x0F03 //TX_FDEQ_BIN_4 +596 0x1402 //TX_FDEQ_BIN_5 +597 0x0E13 //TX_FDEQ_BIN_6 +598 0x110F //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x0E0F //TX_FDEQ_BIN_9 +601 0x080D //TX_FDEQ_BIN_10 +602 0x0F0F //TX_FDEQ_BIN_11 +603 0x0F0F //TX_FDEQ_BIN_12 +604 0x0A0F //TX_FDEQ_BIN_13 +605 0x0809 //TX_FDEQ_BIN_14 +606 0x0A0B //TX_FDEQ_BIN_15 +607 0x0C0D //TX_FDEQ_BIN_16 +608 0x0E0F //TX_FDEQ_BIN_17 +609 0x1013 //TX_FDEQ_BIN_18 +610 0x0A00 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4846 //TX_PREEQ_GAIN_MIC0_6 +624 0x4645 //TX_PREEQ_GAIN_MIC0_7 +625 0x4545 //TX_PREEQ_GAIN_MIC0_8 +626 0x4545 //TX_PREEQ_GAIN_MIC0_9 +627 0x4444 //TX_PREEQ_GAIN_MIC0_10 +628 0x4443 //TX_PREEQ_GAIN_MIC0_11 +629 0x4241 //TX_PREEQ_GAIN_MIC0_12 +630 0x3C3E //TX_PREEQ_GAIN_MIC0_13 +631 0x3E40 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x4000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4849 //TX_PREEQ_GAIN_MIC1_6 +673 0x4A4B //TX_PREEQ_GAIN_MIC1_7 +674 0x4C4B //TX_PREEQ_GAIN_MIC1_8 +675 0x4A48 //TX_PREEQ_GAIN_MIC1_9 +676 0x4B4C //TX_PREEQ_GAIN_MIC1_10 +677 0x4C4B //TX_PREEQ_GAIN_MIC1_11 +678 0x4838 //TX_PREEQ_GAIN_MIC1_12 +679 0x3858 //TX_PREEQ_GAIN_MIC1_13 +680 0x7060 //TX_PREEQ_GAIN_MIC1_14 +681 0x9870 //TX_PREEQ_GAIN_MIC1_15 +682 0x5848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x4000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0202 //TX_PREEQ_BIN_MIC2_0 +740 0x0203 //TX_PREEQ_BIN_MIC2_1 +741 0x0303 //TX_PREEQ_BIN_MIC2_2 +742 0x0304 //TX_PREEQ_BIN_MIC2_3 +743 0x0405 //TX_PREEQ_BIN_MIC2_4 +744 0x0506 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0809 //TX_PREEQ_BIN_MIC2_7 +747 0x0A0A //TX_PREEQ_BIN_MIC2_8 +748 0x0C10 //TX_PREEQ_BIN_MIC2_9 +749 0x1013 //TX_PREEQ_BIN_MIC2_10 +750 0x1414 //TX_PREEQ_BIN_MIC2_11 +751 0x261E //TX_PREEQ_BIN_MIC2_12 +752 0x1E14 //TX_PREEQ_BIN_MIC2_13 +753 0x1414 //TX_PREEQ_BIN_MIC2_14 +754 0x2814 //TX_PREEQ_BIN_MIC2_15 +755 0x4000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x05F5 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0xECCD //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x2000 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x003C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x064E //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x5800 //RX_THR_PITCH_DET_0 +14 0x5000 //RX_THR_PITCH_DET_1 +15 0x4000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8689 //RX_FDEQ_GAIN_3 +43 0x908F //RX_FDEQ_GAIN_4 +44 0x9495 //RX_FDEQ_GAIN_5 +45 0x989D //RX_FDEQ_GAIN_6 +46 0x9DA6 //RX_FDEQ_GAIN_7 +47 0xA895 //RX_FDEQ_GAIN_8 +48 0x8A8A //RX_FDEQ_GAIN_9 +49 0x8E78 //RX_FDEQ_GAIN_10 +50 0x7070 //RX_FDEQ_GAIN_11 +51 0x7680 //RX_FDEQ_GAIN_12 +52 0x787C //RX_FDEQ_GAIN_13 +53 0x8890 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x000D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8689 //RX_FDEQ_GAIN_3 +43 0x908F //RX_FDEQ_GAIN_4 +44 0x9495 //RX_FDEQ_GAIN_5 +45 0x989D //RX_FDEQ_GAIN_6 +46 0x9DA6 //RX_FDEQ_GAIN_7 +47 0xA895 //RX_FDEQ_GAIN_8 +48 0x8A8A //RX_FDEQ_GAIN_9 +49 0x8E78 //RX_FDEQ_GAIN_10 +50 0x7070 //RX_FDEQ_GAIN_11 +51 0x7680 //RX_FDEQ_GAIN_12 +52 0x787C //RX_FDEQ_GAIN_13 +53 0x8890 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8689 //RX_FDEQ_GAIN_3 +43 0x908F //RX_FDEQ_GAIN_4 +44 0x9495 //RX_FDEQ_GAIN_5 +45 0x989D //RX_FDEQ_GAIN_6 +46 0x9DA6 //RX_FDEQ_GAIN_7 +47 0xA895 //RX_FDEQ_GAIN_8 +48 0x8A8A //RX_FDEQ_GAIN_9 +49 0x8E78 //RX_FDEQ_GAIN_10 +50 0x7070 //RX_FDEQ_GAIN_11 +51 0x7680 //RX_FDEQ_GAIN_12 +52 0x787C //RX_FDEQ_GAIN_13 +53 0x8890 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0016 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8689 //RX_FDEQ_GAIN_3 +43 0x908F //RX_FDEQ_GAIN_4 +44 0x9495 //RX_FDEQ_GAIN_5 +45 0x989D //RX_FDEQ_GAIN_6 +46 0x9DA6 //RX_FDEQ_GAIN_7 +47 0xA895 //RX_FDEQ_GAIN_8 +48 0x8A8A //RX_FDEQ_GAIN_9 +49 0x8E78 //RX_FDEQ_GAIN_10 +50 0x7070 //RX_FDEQ_GAIN_11 +51 0x7680 //RX_FDEQ_GAIN_12 +52 0x787C //RX_FDEQ_GAIN_13 +53 0x8890 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0026 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8689 //RX_FDEQ_GAIN_3 +43 0x908F //RX_FDEQ_GAIN_4 +44 0x9495 //RX_FDEQ_GAIN_5 +45 0x989D //RX_FDEQ_GAIN_6 +46 0x9DA6 //RX_FDEQ_GAIN_7 +47 0xA895 //RX_FDEQ_GAIN_8 +48 0x8A8A //RX_FDEQ_GAIN_9 +49 0x8E78 //RX_FDEQ_GAIN_10 +50 0x7070 //RX_FDEQ_GAIN_11 +51 0x7680 //RX_FDEQ_GAIN_12 +52 0x787C //RX_FDEQ_GAIN_13 +53 0x8890 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x003D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8689 //RX_FDEQ_GAIN_3 +43 0x908F //RX_FDEQ_GAIN_4 +44 0x9495 //RX_FDEQ_GAIN_5 +45 0x989D //RX_FDEQ_GAIN_6 +46 0x9DA6 //RX_FDEQ_GAIN_7 +47 0xA895 //RX_FDEQ_GAIN_8 +48 0x8A8A //RX_FDEQ_GAIN_9 +49 0x8E78 //RX_FDEQ_GAIN_10 +50 0x7070 //RX_FDEQ_GAIN_11 +51 0x7680 //RX_FDEQ_GAIN_12 +52 0x787C //RX_FDEQ_GAIN_13 +53 0x8890 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0060 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8689 //RX_FDEQ_GAIN_3 +43 0x908F //RX_FDEQ_GAIN_4 +44 0x9495 //RX_FDEQ_GAIN_5 +45 0x989D //RX_FDEQ_GAIN_6 +46 0x9DA6 //RX_FDEQ_GAIN_7 +47 0xA895 //RX_FDEQ_GAIN_8 +48 0x8A8A //RX_FDEQ_GAIN_9 +49 0x8E78 //RX_FDEQ_GAIN_10 +50 0x7070 //RX_FDEQ_GAIN_11 +51 0x7680 //RX_FDEQ_GAIN_12 +52 0x787C //RX_FDEQ_GAIN_13 +53 0x8890 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0099 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8689 //RX_FDEQ_GAIN_3 +43 0x908F //RX_FDEQ_GAIN_4 +44 0x9495 //RX_FDEQ_GAIN_5 +45 0x989D //RX_FDEQ_GAIN_6 +46 0x9DA6 //RX_FDEQ_GAIN_7 +47 0xA895 //RX_FDEQ_GAIN_8 +48 0x8A8A //RX_FDEQ_GAIN_9 +49 0x8E78 //RX_FDEQ_GAIN_10 +50 0x7070 //RX_FDEQ_GAIN_11 +51 0x7680 //RX_FDEQ_GAIN_12 +52 0x787C //RX_FDEQ_GAIN_13 +53 0x8890 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-NB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0036 //TX_PATCH_REG +3 0x6F7E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7646 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0800 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6000 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0100 //TX_MIN_EQ_RE_EST_1 +154 0x0100 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x0200 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x0400 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x0400 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7B00 //TX_DTD_THR1_0 +198 0x7B00 //TX_DTD_THR1_1 +199 0x7B00 //TX_DTD_THR1_2 +200 0x7B00 //TX_DTD_THR1_3 +201 0x7B00 //TX_DTD_THR1_4 +202 0x7B00 //TX_DTD_THR1_5 +203 0x7B00 //TX_DTD_THR1_6 +204 0x1000 //TX_DTD_THR2_0 +205 0x1000 //TX_DTD_THR2_1 +206 0x1000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0FA0 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0000 //TX_RATIO_DT_L_TH_LOW +224 0x0000 //TX_RATIO_DT_H_TH_LOW +225 0x0000 //TX_RATIO_DT_L_TH_HIGH +226 0x0000 //TX_RATIO_DT_H_TH_HIGH +227 0x0000 //TX_RATIO_DT_L0_TH +228 0x2000 //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x0000 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xF800 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF900 //TX_THR_SN_EST_3 +246 0xF900 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x01A0 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x01A0 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x3000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x3000 //TX_LAMBDA_NN_EST_4 +263 0x3000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x0000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x3000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x3000 //TX_MAINREFRTOH_TH_H +275 0x1000 //TX_MAINREFRTOH_TH_L +276 0x3000 //TX_MAINREFRTO_TH_H +277 0x1000 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x4000 //TX_B_POST_FLT_0 +280 0x4000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x001B //TX_NS_LVL_CTRL_1 +283 0x0019 //TX_NS_LVL_CTRL_2 +284 0x0017 //TX_NS_LVL_CTRL_3 +285 0x0017 //TX_NS_LVL_CTRL_4 +286 0x0019 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 +288 0x0010 //TX_NS_LVL_CTRL_7 +289 0x0010 //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x0014 //TX_MIN_GAIN_S_6 +296 0x0014 //TX_MIN_GAIN_S_7 +297 0x5000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x4000 //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x3000 //TX_SNRI_SUP_7 +308 0x3000 //TX_THR_LFNS +309 0x001A //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x2000 //TX_A_POST_FILT_S_0 +315 0x7000 //TX_A_POST_FILT_S_1 +316 0x6000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x2000 //TX_A_POST_FILT_S_4 +319 0x6000 //TX_A_POST_FILT_S_5 +320 0x2000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x4000 //TX_B_POST_FILT_0 +323 0x4000 //TX_B_POST_FILT_1 +324 0x7FFF //TX_B_POST_FILT_2 +325 0x5000 //TX_B_POST_FILT_3 +326 0x7FFF //TX_B_POST_FILT_4 +327 0x7FFF //TX_B_POST_FILT_5 +328 0x4000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7200 //TX_LAMBDA_PFILT_S_2 +342 0x7900 //TX_LAMBDA_PFILT_S_3 +343 0x7400 //TX_LAMBDA_PFILT_S_4 +344 0x7200 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x0C80 //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0004 //TX_NOISE_TH_0 +368 0x1B58 //TX_NOISE_TH_0_2 +369 0x2134 //TX_NOISE_TH_0_3 +370 0x0320 //TX_NOISE_TH_1 +371 0x022C //TX_NOISE_TH_2 +372 0x2710 //TX_NOISE_TH_3 +373 0x6B6C //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x0000 //TX_NOISE_TH_5_4 +378 0x07D0 //TX_NOISE_TH_6 +379 0x0004 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x00CE //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x000A //TX_NS_ENOISE_MIC0_TH +406 0x0004 //TX_MINENOISE_MIC0_TH +407 0x0014 //TX_MINENOISE_MIC0_S_TH +408 0x4900 //TX_MIN_G_CTRL_SSNS +409 0x0400 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x4000 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0280 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0640 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x001A //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0080 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0018 //TX_FDEQ_SUBNUM +567 0x6C60 //TX_FDEQ_GAIN_0 +568 0x584F //TX_FDEQ_GAIN_1 +569 0x4F4E //TX_FDEQ_GAIN_2 +570 0x474A //TX_FDEQ_GAIN_3 +571 0x473F //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x423C //TX_FDEQ_GAIN_7 +575 0x2C28 //TX_FDEQ_GAIN_8 +576 0x343C //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0104 //TX_FDEQ_BIN_1 +593 0x0502 //TX_FDEQ_BIN_2 +594 0x0202 //TX_FDEQ_BIN_3 +595 0x0504 //TX_FDEQ_BIN_4 +596 0x0708 //TX_FDEQ_BIN_5 +597 0x0808 //TX_FDEQ_BIN_6 +598 0x050E //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0F09 //TX_FDEQ_BIN_9 +601 0x0000 //TX_FDEQ_BIN_10 +602 0x0000 //TX_FDEQ_BIN_11 +603 0x0000 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4846 //TX_PREEQ_GAIN_MIC0_7 +625 0x4544 //TX_PREEQ_GAIN_MIC0_8 +626 0x4241 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0014 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4C //TX_PREEQ_GAIN_MIC1_8 +675 0x4E50 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0203 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x0000 //TX_PREEQ_BIN_MIC1_10 +701 0x0000 //TX_PREEQ_BIN_MIC1_11 +702 0x0000 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0065 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0065 //TX_MIC_CALIBRATION_2 +768 0x0065 //TX_MIC_CALIBRATION_3 +769 0x0044 //TX_MIC_PWR_BIAS_0 +770 0x0044 //TX_MIC_PWR_BIAS_1 +771 0x0044 //TX_MIC_PWR_BIAS_2 +772 0x0044 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0000 //TX_GAIN_LIMIT_1 +775 0x0006 //TX_GAIN_LIMIT_2 +776 0x0007 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0010 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x05A0 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x003C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x065B //RX_PGA +11 0x7646 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0014 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4040 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4A5E //RX_FDEQ_GAIN_2 +42 0x6876 //RX_FDEQ_GAIN_3 +43 0x8298 //RX_FDEQ_GAIN_4 +44 0x8E86 //RX_FDEQ_GAIN_5 +45 0x8686 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x8890 //RX_FDEQ_GAIN_8 +48 0x979F //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x05A0 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x13E0 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x000A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x055F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4040 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4E62 //RX_FDEQ_GAIN_2 +42 0x6C7A //RX_FDEQ_GAIN_3 +43 0x868C //RX_FDEQ_GAIN_4 +44 0x827A //RX_FDEQ_GAIN_5 +45 0x7A7A //RX_FDEQ_GAIN_6 +46 0x7C7C //RX_FDEQ_GAIN_7 +47 0x7C84 //RX_FDEQ_GAIN_8 +48 0x8488 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x055F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4040 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4E62 //RX_FDEQ_GAIN_2 +42 0x6C7A //RX_FDEQ_GAIN_3 +43 0x868C //RX_FDEQ_GAIN_4 +44 0x827A //RX_FDEQ_GAIN_5 +45 0x7A7A //RX_FDEQ_GAIN_6 +46 0x7C7C //RX_FDEQ_GAIN_7 +47 0x7C84 //RX_FDEQ_GAIN_8 +48 0x8488 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0011 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x055F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4040 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4E62 //RX_FDEQ_GAIN_2 +42 0x6C7A //RX_FDEQ_GAIN_3 +43 0x868C //RX_FDEQ_GAIN_4 +44 0x827A //RX_FDEQ_GAIN_5 +45 0x7A7A //RX_FDEQ_GAIN_6 +46 0x7C7C //RX_FDEQ_GAIN_7 +47 0x7C84 //RX_FDEQ_GAIN_8 +48 0x8488 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x055F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4040 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4E62 //RX_FDEQ_GAIN_2 +42 0x6C7A //RX_FDEQ_GAIN_3 +43 0x868C //RX_FDEQ_GAIN_4 +44 0x827A //RX_FDEQ_GAIN_5 +45 0x7A7A //RX_FDEQ_GAIN_6 +46 0x7C7C //RX_FDEQ_GAIN_7 +47 0x7C84 //RX_FDEQ_GAIN_8 +48 0x8488 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0030 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x055F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4040 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4E62 //RX_FDEQ_GAIN_2 +42 0x6C7A //RX_FDEQ_GAIN_3 +43 0x868C //RX_FDEQ_GAIN_4 +44 0x827A //RX_FDEQ_GAIN_5 +45 0x7A7A //RX_FDEQ_GAIN_6 +46 0x7C7C //RX_FDEQ_GAIN_7 +47 0x7C84 //RX_FDEQ_GAIN_8 +48 0x8488 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x004C //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x055F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4040 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4E62 //RX_FDEQ_GAIN_2 +42 0x6C7A //RX_FDEQ_GAIN_3 +43 0x868C //RX_FDEQ_GAIN_4 +44 0x827A //RX_FDEQ_GAIN_5 +45 0x7A7A //RX_FDEQ_GAIN_6 +46 0x7C7C //RX_FDEQ_GAIN_7 +47 0x7C84 //RX_FDEQ_GAIN_8 +48 0x8488 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x007B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x055F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4040 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4E62 //RX_FDEQ_GAIN_2 +42 0x6C7A //RX_FDEQ_GAIN_3 +43 0x868C //RX_FDEQ_GAIN_4 +44 0x827A //RX_FDEQ_GAIN_5 +45 0x7A7A //RX_FDEQ_GAIN_6 +46 0x7C7C //RX_FDEQ_GAIN_7 +47 0x7C84 //RX_FDEQ_GAIN_8 +48 0x8488 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-WB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0036 //TX_PATCH_REG +3 0x6F7E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0001 //TX_SAMPLINGFREQ_SIG +7 0x0001 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0004 //TX_MAINMIC_BLKFACTOR +114 0x0004 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0800 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6000 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0100 //TX_MIN_EQ_RE_EST_1 +154 0x0100 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x0200 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x0400 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x0400 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0000 //TX_RATIO_DT_L_TH_LOW +224 0x0000 //TX_RATIO_DT_H_TH_LOW +225 0x0000 //TX_RATIO_DT_L_TH_HIGH +226 0x0000 //TX_RATIO_DT_H_TH_HIGH +227 0x0000 //TX_RATIO_DT_L0_TH +228 0x2000 //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x0000 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFB00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x01A0 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x5000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x0000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x2000 //TX_MAINREFRTOH_TH_H +275 0x1400 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x4000 //TX_B_POST_FLT_1 +281 0x0018 //TX_NS_LVL_CTRL_0 +282 0x001C //TX_NS_LVL_CTRL_1 +283 0x0019 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0019 //TX_NS_LVL_CTRL_4 +286 0x001A //TX_NS_LVL_CTRL_5 +287 0x001E //TX_NS_LVL_CTRL_6 +288 0x001C //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0018 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0012 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 +294 0x0018 //TX_MIN_GAIN_S_5 +295 0x0018 //TX_MIN_GAIN_S_6 +296 0x0018 //TX_MIN_GAIN_S_7 +297 0x5000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x5000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x4000 //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x7000 //TX_A_POST_FILT_S_0 +315 0x7000 //TX_A_POST_FILT_S_1 +316 0x3000 //TX_A_POST_FILT_S_2 +317 0x3000 //TX_A_POST_FILT_S_3 +318 0x2000 //TX_A_POST_FILT_S_4 +319 0x7000 //TX_A_POST_FILT_S_5 +320 0x7000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x4000 //TX_B_POST_FILT_1 +324 0x5000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 +328 0x4000 //TX_B_POST_FILT_6 +329 0x4000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x6000 //TX_B_LESSCUT_RTO_S_1 +332 0x6000 //TX_B_LESSCUT_RTO_S_2 +333 0x6000 //TX_B_LESSCUT_RTO_S_3 +334 0x6000 //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C29 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0600 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x1B58 //TX_NOISE_TH_0_2 +369 0x2134 //TX_NOISE_TH_0_3 +370 0x0139 //TX_NOISE_TH_1 +371 0x0479 //TX_NOISE_TH_2 +372 0x2328 //TX_NOISE_TH_3 +373 0x4422 //TX_NOISE_TH_4 +374 0x5586 //TX_NOISE_TH_5 +375 0x4425 //TX_NOISE_TH_5_2 +376 0x0032 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x21E8 //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x00CE //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4900 //TX_MIN_G_CTRL_SSNS +409 0x1000 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x1C00 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x05A8 //TX_SB_RHO_MEAN2_TH +441 0x0384 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0280 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x0200 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0030 //TX_FDEQ_SUBNUM +567 0x5C54 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4C4C //TX_FDEQ_GAIN_2 +570 0x474A //TX_FDEQ_GAIN_3 +571 0x473F //TX_FDEQ_GAIN_4 +572 0x424C //TX_FDEQ_GAIN_5 +573 0x545C //TX_FDEQ_GAIN_6 +574 0x5C54 //TX_FDEQ_GAIN_7 +575 0x4040 //TX_FDEQ_GAIN_8 +576 0x4048 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0104 //TX_FDEQ_BIN_1 +593 0x0502 //TX_FDEQ_BIN_2 +594 0x0202 //TX_FDEQ_BIN_3 +595 0x0504 //TX_FDEQ_BIN_4 +596 0x0708 //TX_FDEQ_BIN_5 +597 0x0808 //TX_FDEQ_BIN_6 +598 0x050E //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0F0F //TX_FDEQ_BIN_9 +601 0x0F0F //TX_FDEQ_BIN_10 +602 0x0F28 //TX_FDEQ_BIN_11 +603 0x0611 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4846 //TX_PREEQ_GAIN_MIC0_7 +625 0x4544 //TX_PREEQ_GAIN_MIC0_8 +626 0x4241 //TX_PREEQ_GAIN_MIC0_9 +627 0x403E //TX_PREEQ_GAIN_MIC0_10 +628 0x3D3C //TX_PREEQ_GAIN_MIC0_11 +629 0x3C3C //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x7008 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0F10 //TX_PREEQ_BIN_MIC0_9 +651 0x1011 //TX_PREEQ_BIN_MIC0_10 +652 0x1112 //TX_PREEQ_BIN_MIC0_11 +653 0x1208 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x484A //TX_PREEQ_GAIN_MIC1_8 +675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 +676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 +677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 +678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 +679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x0F10 //TX_PREEQ_BIN_MIC1_10 +701 0x1011 //TX_PREEQ_BIN_MIC1_11 +702 0x1112 //TX_PREEQ_BIN_MIC1_12 +703 0x120B //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0000 //TX_GAIN_LIMIT_1 +775 0x0006 //TX_GAIN_LIMIT_2 +776 0x0005 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0002 //TX_TDDRC_THRD_0 +855 0x0003 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x05A0 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x199A //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x2000 //TX_B_LESSCUT_RTO_MASK +877 0x1C00 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x003C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0001 //RX_SAMPLINGFREQ_SIG +3 0x0001 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x065B //RX_PGA +11 0x7B02 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0014 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x1000 //RX_LMT_THRD +37 0x7FDF //RX_LMT_ALPHA +38 0x001C //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x485C //RX_FDEQ_GAIN_2 +42 0x6873 //RX_FDEQ_GAIN_3 +43 0x7F96 //RX_FDEQ_GAIN_4 +44 0x8C86 //RX_FDEQ_GAIN_5 +45 0x8686 //RX_FDEQ_GAIN_6 +46 0x908C //RX_FDEQ_GAIN_7 +47 0x9098 //RX_FDEQ_GAIN_8 +48 0x9EB4 //RX_FDEQ_GAIN_9 +49 0x9C87 //RX_FDEQ_GAIN_10 +50 0x6F7F //RX_FDEQ_GAIN_11 +51 0x6568 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0407 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x13E0 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x000C //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0438 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4844 //RX_FDEQ_GAIN_0 +40 0x4444 //RX_FDEQ_GAIN_1 +41 0x485C //RX_FDEQ_GAIN_2 +42 0x6873 //RX_FDEQ_GAIN_3 +43 0x7F8E //RX_FDEQ_GAIN_4 +44 0x847E //RX_FDEQ_GAIN_5 +45 0x7E7E //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x888C //RX_FDEQ_GAIN_8 +48 0x8C9C //RX_FDEQ_GAIN_9 +49 0x9898 //RX_FDEQ_GAIN_10 +50 0x7C88 //RX_FDEQ_GAIN_11 +51 0x6C70 //RX_FDEQ_GAIN_12 +52 0x6858 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000C //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0438 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4844 //RX_FDEQ_GAIN_0 +40 0x4444 //RX_FDEQ_GAIN_1 +41 0x485C //RX_FDEQ_GAIN_2 +42 0x6873 //RX_FDEQ_GAIN_3 +43 0x7F8E //RX_FDEQ_GAIN_4 +44 0x847E //RX_FDEQ_GAIN_5 +45 0x7E7E //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x888C //RX_FDEQ_GAIN_8 +48 0x8C9C //RX_FDEQ_GAIN_9 +49 0x9898 //RX_FDEQ_GAIN_10 +50 0x7C88 //RX_FDEQ_GAIN_11 +51 0x6C70 //RX_FDEQ_GAIN_12 +52 0x6858 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0015 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0438 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4844 //RX_FDEQ_GAIN_0 +40 0x4444 //RX_FDEQ_GAIN_1 +41 0x485C //RX_FDEQ_GAIN_2 +42 0x6873 //RX_FDEQ_GAIN_3 +43 0x7F8E //RX_FDEQ_GAIN_4 +44 0x847E //RX_FDEQ_GAIN_5 +45 0x7E7E //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x888C //RX_FDEQ_GAIN_8 +48 0x8C9C //RX_FDEQ_GAIN_9 +49 0x9898 //RX_FDEQ_GAIN_10 +50 0x7C88 //RX_FDEQ_GAIN_11 +51 0x6C70 //RX_FDEQ_GAIN_12 +52 0x6858 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0021 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0438 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4844 //RX_FDEQ_GAIN_0 +40 0x4444 //RX_FDEQ_GAIN_1 +41 0x485C //RX_FDEQ_GAIN_2 +42 0x6873 //RX_FDEQ_GAIN_3 +43 0x7F8E //RX_FDEQ_GAIN_4 +44 0x847E //RX_FDEQ_GAIN_5 +45 0x7E7E //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x888C //RX_FDEQ_GAIN_8 +48 0x8C9C //RX_FDEQ_GAIN_9 +49 0x9898 //RX_FDEQ_GAIN_10 +50 0x7C88 //RX_FDEQ_GAIN_11 +51 0x6C70 //RX_FDEQ_GAIN_12 +52 0x6858 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0035 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0438 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4844 //RX_FDEQ_GAIN_0 +40 0x4444 //RX_FDEQ_GAIN_1 +41 0x485C //RX_FDEQ_GAIN_2 +42 0x6873 //RX_FDEQ_GAIN_3 +43 0x7F8E //RX_FDEQ_GAIN_4 +44 0x847E //RX_FDEQ_GAIN_5 +45 0x7E7E //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x888C //RX_FDEQ_GAIN_8 +48 0x8C9C //RX_FDEQ_GAIN_9 +49 0x9898 //RX_FDEQ_GAIN_10 +50 0x7C88 //RX_FDEQ_GAIN_11 +51 0x6C70 //RX_FDEQ_GAIN_12 +52 0x6858 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0058 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0438 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4844 //RX_FDEQ_GAIN_0 +40 0x4444 //RX_FDEQ_GAIN_1 +41 0x485C //RX_FDEQ_GAIN_2 +42 0x6873 //RX_FDEQ_GAIN_3 +43 0x7F8E //RX_FDEQ_GAIN_4 +44 0x847E //RX_FDEQ_GAIN_5 +45 0x7E7E //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x888C //RX_FDEQ_GAIN_8 +48 0x8C9C //RX_FDEQ_GAIN_9 +49 0x9898 //RX_FDEQ_GAIN_10 +50 0x7C88 //RX_FDEQ_GAIN_11 +51 0x6C70 //RX_FDEQ_GAIN_12 +52 0x6858 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x008E //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0438 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4844 //RX_FDEQ_GAIN_0 +40 0x4444 //RX_FDEQ_GAIN_1 +41 0x485C //RX_FDEQ_GAIN_2 +42 0x6873 //RX_FDEQ_GAIN_3 +43 0x7F8E //RX_FDEQ_GAIN_4 +44 0x847E //RX_FDEQ_GAIN_5 +45 0x7E7E //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x888C //RX_FDEQ_GAIN_8 +48 0x8C9C //RX_FDEQ_GAIN_9 +49 0x9898 //RX_FDEQ_GAIN_10 +50 0x7C88 //RX_FDEQ_GAIN_11 +51 0x6C70 //RX_FDEQ_GAIN_12 +52 0x6858 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-SWB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0026 //TX_PATCH_REG +3 0x6F7E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7D83 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7900 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0400 //TX_MIN_EQ_RE_EST_0 +153 0x0400 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x1000 //TX_MIN_EQ_RE_EST_4 +157 0x1000 //TX_MIN_EQ_RE_EST_5 +158 0x1000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x1800 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0177 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0C00 //TX_RATIO_DT_L_TH_LOW +224 0x2000 //TX_RATIO_DT_H_TH_LOW +225 0x1800 //TX_RATIO_DT_L_TH_HIGH +226 0x3000 //TX_RATIO_DT_H_TH_HIGH +227 0x0A00 //TX_RATIO_DT_L0_TH +228 0x7000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x0600 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x0016 //TX_NS_LVL_CTRL_1 +283 0x002C //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0018 //TX_NS_LVL_CTRL_4 +286 0x0016 //TX_NS_LVL_CTRL_5 +287 0x0012 //TX_NS_LVL_CTRL_6 +288 0x0017 //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0012 //TX_MIN_GAIN_S_1 +291 0x000D //TX_MIN_GAIN_S_2 +292 0x0012 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0012 //TX_MIN_GAIN_S_5 +295 0x0012 //TX_MIN_GAIN_S_6 +296 0x0012 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x6000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x6000 //TX_SNRI_SUP_5 +306 0x6000 //TX_SNRI_SUP_6 +307 0x6000 //TX_SNRI_SUP_7 +308 0x6000 //TX_THR_LFNS +309 0x0017 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x3000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x5000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x6000 //TX_B_POST_FILT_6 +329 0x3000 //TX_B_POST_FILT_7 +330 0x1000 //TX_B_LESSCUT_RTO_S_0 +331 0x6000 //TX_B_LESSCUT_RTO_S_1 +332 0x6000 //TX_B_LESSCUT_RTO_S_2 +333 0x6000 //TX_B_LESSCUT_RTO_S_3 +334 0x6000 //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x07D0 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x00C6 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x2260 //TX_NOISE_TH_3 +373 0x7080 //TX_NOISE_TH_4 +374 0x57E4 //TX_NOISE_TH_5 +375 0x4BD6 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x1194 //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x0200 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x2000 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x051E //TX_SB_RHO_MEAN2_TH +441 0x02F0 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0300 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x5C54 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4C4C //TX_FDEQ_GAIN_2 +570 0x474A //TX_FDEQ_GAIN_3 +571 0x423C //TX_FDEQ_GAIN_4 +572 0x4048 //TX_FDEQ_GAIN_5 +573 0x4858 //TX_FDEQ_GAIN_6 +574 0x5848 //TX_FDEQ_GAIN_7 +575 0x4248 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4856 //TX_FDEQ_GAIN_10 +578 0x5656 //TX_FDEQ_GAIN_11 +579 0x4850 //TX_FDEQ_GAIN_12 +580 0x5850 //TX_FDEQ_GAIN_13 +581 0x585C //TX_FDEQ_GAIN_14 +582 0x707C //TX_FDEQ_GAIN_15 +583 0x7070 //TX_FDEQ_GAIN_16 +584 0x7048 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0104 //TX_FDEQ_BIN_1 +593 0x0502 //TX_FDEQ_BIN_2 +594 0x0202 //TX_FDEQ_BIN_3 +595 0x0504 //TX_FDEQ_BIN_4 +596 0x0708 //TX_FDEQ_BIN_5 +597 0x0808 //TX_FDEQ_BIN_6 +598 0x050E //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0F0F //TX_FDEQ_BIN_9 +601 0x0E0D //TX_FDEQ_BIN_10 +602 0x0F28 //TX_FDEQ_BIN_11 +603 0x111B //TX_FDEQ_BIN_12 +604 0x291E //TX_FDEQ_BIN_13 +605 0x1E10 //TX_FDEQ_BIN_14 +606 0x186F //TX_FDEQ_BIN_15 +607 0x1021 //TX_FDEQ_BIN_16 +608 0x1000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4646 //TX_PREEQ_GAIN_MIC0_8 +626 0x4545 //TX_PREEQ_GAIN_MIC0_9 +627 0x4545 //TX_PREEQ_GAIN_MIC0_10 +628 0x4544 //TX_PREEQ_GAIN_MIC0_11 +629 0x4444 //TX_PREEQ_GAIN_MIC0_12 +630 0x4343 //TX_PREEQ_GAIN_MIC0_13 +631 0x4241 //TX_PREEQ_GAIN_MIC0_14 +632 0x3C3E //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1719 //TX_PREEQ_BIN_MIC0_11 +653 0x1B1E //TX_PREEQ_BIN_MIC0_12 +654 0x1E1E //TX_PREEQ_BIN_MIC0_13 +655 0x1E28 //TX_PREEQ_BIN_MIC0_14 +656 0x282C //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x484A //TX_PREEQ_GAIN_MIC1_8 +675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 +676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 +677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 +678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 +679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x0F10 //TX_PREEQ_BIN_MIC1_10 +701 0x1011 //TX_PREEQ_BIN_MIC1_11 +702 0x1112 //TX_PREEQ_BIN_MIC1_12 +703 0x120B //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0056 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0042 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0005 //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0002 //TX_TDDRC_THRD_0 +855 0x0003 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0550 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0xECCD //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x2000 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x003C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x065B //RX_PGA +11 0x7D83 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x5800 //RX_THR_PITCH_DET_0 +14 0x5000 //RX_THR_PITCH_DET_1 +15 0x4000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4048 //RX_FDEQ_GAIN_2 +42 0x5564 //RX_FDEQ_GAIN_3 +43 0x7386 //RX_FDEQ_GAIN_4 +44 0x898C //RX_FDEQ_GAIN_5 +45 0x8C8C //RX_FDEQ_GAIN_6 +46 0x9097 //RX_FDEQ_GAIN_7 +47 0x98A8 //RX_FDEQ_GAIN_8 +48 0xACB0 //RX_FDEQ_GAIN_9 +49 0xB091 //RX_FDEQ_GAIN_10 +50 0x8A7A //RX_FDEQ_GAIN_11 +51 0x6966 //RX_FDEQ_GAIN_12 +52 0x6444 //RX_FDEQ_GAIN_13 +53 0x6065 //RX_FDEQ_GAIN_14 +54 0x698A //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04E6 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x13E0 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x0032 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04E6 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4450 //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x7C86 //RX_FDEQ_GAIN_4 +44 0x7E84 //RX_FDEQ_GAIN_5 +45 0x8484 //RX_FDEQ_GAIN_6 +46 0x8A90 //RX_FDEQ_GAIN_7 +47 0x9094 //RX_FDEQ_GAIN_8 +48 0xA0A8 //RX_FDEQ_GAIN_9 +49 0xA8A0 //RX_FDEQ_GAIN_10 +50 0xB08B //RX_FDEQ_GAIN_11 +51 0x7066 //RX_FDEQ_GAIN_12 +52 0x6444 //RX_FDEQ_GAIN_13 +53 0x6470 //RX_FDEQ_GAIN_14 +54 0x8490 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04E6 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4450 //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x7C86 //RX_FDEQ_GAIN_4 +44 0x7E84 //RX_FDEQ_GAIN_5 +45 0x8484 //RX_FDEQ_GAIN_6 +46 0x8A90 //RX_FDEQ_GAIN_7 +47 0x9094 //RX_FDEQ_GAIN_8 +48 0xA0A8 //RX_FDEQ_GAIN_9 +49 0xA8A0 //RX_FDEQ_GAIN_10 +50 0xB08B //RX_FDEQ_GAIN_11 +51 0x7066 //RX_FDEQ_GAIN_12 +52 0x6444 //RX_FDEQ_GAIN_13 +53 0x6470 //RX_FDEQ_GAIN_14 +54 0x8490 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0013 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04E6 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4450 //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x7C86 //RX_FDEQ_GAIN_4 +44 0x7E84 //RX_FDEQ_GAIN_5 +45 0x8484 //RX_FDEQ_GAIN_6 +46 0x8A90 //RX_FDEQ_GAIN_7 +47 0x9094 //RX_FDEQ_GAIN_8 +48 0xA0A8 //RX_FDEQ_GAIN_9 +49 0xA8A0 //RX_FDEQ_GAIN_10 +50 0xB08B //RX_FDEQ_GAIN_11 +51 0x7066 //RX_FDEQ_GAIN_12 +52 0x6444 //RX_FDEQ_GAIN_13 +53 0x6470 //RX_FDEQ_GAIN_14 +54 0x8490 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001F //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04E6 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4450 //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x7C86 //RX_FDEQ_GAIN_4 +44 0x7E84 //RX_FDEQ_GAIN_5 +45 0x8484 //RX_FDEQ_GAIN_6 +46 0x8A90 //RX_FDEQ_GAIN_7 +47 0x9094 //RX_FDEQ_GAIN_8 +48 0xA0A8 //RX_FDEQ_GAIN_9 +49 0xA8A0 //RX_FDEQ_GAIN_10 +50 0xB08B //RX_FDEQ_GAIN_11 +51 0x7066 //RX_FDEQ_GAIN_12 +52 0x6444 //RX_FDEQ_GAIN_13 +53 0x6470 //RX_FDEQ_GAIN_14 +54 0x8490 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0032 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04E6 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4450 //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x7C86 //RX_FDEQ_GAIN_4 +44 0x7E84 //RX_FDEQ_GAIN_5 +45 0x8484 //RX_FDEQ_GAIN_6 +46 0x8A90 //RX_FDEQ_GAIN_7 +47 0x9094 //RX_FDEQ_GAIN_8 +48 0xA0A8 //RX_FDEQ_GAIN_9 +49 0xA8A0 //RX_FDEQ_GAIN_10 +50 0xB08B //RX_FDEQ_GAIN_11 +51 0x7066 //RX_FDEQ_GAIN_12 +52 0x6444 //RX_FDEQ_GAIN_13 +53 0x6470 //RX_FDEQ_GAIN_14 +54 0x8490 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0052 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04E6 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4450 //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x7C86 //RX_FDEQ_GAIN_4 +44 0x7E84 //RX_FDEQ_GAIN_5 +45 0x8484 //RX_FDEQ_GAIN_6 +46 0x8A90 //RX_FDEQ_GAIN_7 +47 0x9094 //RX_FDEQ_GAIN_8 +48 0xA0A8 //RX_FDEQ_GAIN_9 +49 0xA8A0 //RX_FDEQ_GAIN_10 +50 0xB08B //RX_FDEQ_GAIN_11 +51 0x7066 //RX_FDEQ_GAIN_12 +52 0x6444 //RX_FDEQ_GAIN_13 +53 0x6470 //RX_FDEQ_GAIN_14 +54 0x8490 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0087 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04E6 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4450 //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x7C86 //RX_FDEQ_GAIN_4 +44 0x7E84 //RX_FDEQ_GAIN_5 +45 0x8484 //RX_FDEQ_GAIN_6 +46 0x8A90 //RX_FDEQ_GAIN_7 +47 0x9094 //RX_FDEQ_GAIN_8 +48 0xA0A8 //RX_FDEQ_GAIN_9 +49 0xA8A0 //RX_FDEQ_GAIN_10 +50 0xB08B //RX_FDEQ_GAIN_11 +51 0x7066 //RX_FDEQ_GAIN_12 +52 0x6444 //RX_FDEQ_GAIN_13 +53 0x6470 //RX_FDEQ_GAIN_14 +54 0x8490 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0026 //TX_PATCH_REG +3 0x6B7E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7900 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0400 //TX_MIN_EQ_RE_EST_0 +153 0x0400 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x1000 //TX_MIN_EQ_RE_EST_4 +157 0x1000 //TX_MIN_EQ_RE_EST_5 +158 0x1000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x1800 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0177 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0C00 //TX_RATIO_DT_L_TH_LOW +224 0x2000 //TX_RATIO_DT_H_TH_LOW +225 0x1800 //TX_RATIO_DT_L_TH_HIGH +226 0x3000 //TX_RATIO_DT_H_TH_HIGH +227 0x0A00 //TX_RATIO_DT_L0_TH +228 0x7000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x0600 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x2000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x0016 //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0018 //TX_NS_LVL_CTRL_4 +286 0x0016 //TX_NS_LVL_CTRL_5 +287 0x0012 //TX_NS_LVL_CTRL_6 +288 0x0017 //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0012 //TX_MIN_GAIN_S_1 +291 0x0007 //TX_MIN_GAIN_S_2 +292 0x0012 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0012 //TX_MIN_GAIN_S_5 +295 0x0012 //TX_MIN_GAIN_S_6 +296 0x0012 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x6000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x6000 //TX_SNRI_SUP_5 +306 0x6000 //TX_SNRI_SUP_6 +307 0x6000 //TX_SNRI_SUP_7 +308 0x6000 //TX_THR_LFNS +309 0x0017 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x3000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x5000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x6000 //TX_B_POST_FILT_6 +329 0x3000 //TX_B_POST_FILT_7 +330 0x1000 //TX_B_LESSCUT_RTO_S_0 +331 0x6000 //TX_B_LESSCUT_RTO_S_1 +332 0x6000 //TX_B_LESSCUT_RTO_S_2 +333 0x6000 //TX_B_LESSCUT_RTO_S_3 +334 0x6000 //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x07D0 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x1B58 //TX_NOISE_TH_0_2 +369 0x2134 //TX_NOISE_TH_0_3 +370 0x00C6 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x2EE0 //TX_NOISE_TH_3 +373 0x47E0 //TX_NOISE_TH_4 +374 0x57E4 //TX_NOISE_TH_5 +375 0x4BD6 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x39DF //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x0200 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x2000 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x051E //TX_SB_RHO_MEAN2_TH +441 0x051E //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0300 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0030 //TX_FDEQ_SUBNUM +567 0x4E4A //TX_FDEQ_GAIN_0 +568 0x4C54 //TX_FDEQ_GAIN_1 +569 0x5C50 //TX_FDEQ_GAIN_2 +570 0x5556 //TX_FDEQ_GAIN_3 +571 0x5757 //TX_FDEQ_GAIN_4 +572 0x5658 //TX_FDEQ_GAIN_5 +573 0x585C //TX_FDEQ_GAIN_6 +574 0x5858 //TX_FDEQ_GAIN_7 +575 0x5E66 //TX_FDEQ_GAIN_8 +576 0x5894 //TX_FDEQ_GAIN_9 +577 0x9498 //TX_FDEQ_GAIN_10 +578 0xB8B8 //TX_FDEQ_GAIN_11 +579 0x7C7C //TX_FDEQ_GAIN_12 +580 0x7C7C //TX_FDEQ_GAIN_13 +581 0x7070 //TX_FDEQ_GAIN_14 +582 0x707C //TX_FDEQ_GAIN_15 +583 0x7C7C //TX_FDEQ_GAIN_16 +584 0x7C7C //TX_FDEQ_GAIN_17 +585 0x7C90 //TX_FDEQ_GAIN_18 +586 0x9048 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0F03 //TX_FDEQ_BIN_0 +592 0x0909 //TX_FDEQ_BIN_1 +593 0x080F //TX_FDEQ_BIN_2 +594 0x0609 //TX_FDEQ_BIN_3 +595 0x0F03 //TX_FDEQ_BIN_4 +596 0x1402 //TX_FDEQ_BIN_5 +597 0x0E13 //TX_FDEQ_BIN_6 +598 0x110F //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x0E0F //TX_FDEQ_BIN_9 +601 0x080D //TX_FDEQ_BIN_10 +602 0x0F0F //TX_FDEQ_BIN_11 +603 0x0F0F //TX_FDEQ_BIN_12 +604 0x0A0F //TX_FDEQ_BIN_13 +605 0x0809 //TX_FDEQ_BIN_14 +606 0x0A0B //TX_FDEQ_BIN_15 +607 0x0C0D //TX_FDEQ_BIN_16 +608 0x0E0F //TX_FDEQ_BIN_17 +609 0x1013 //TX_FDEQ_BIN_18 +610 0x0A00 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4846 //TX_PREEQ_GAIN_MIC0_6 +624 0x4645 //TX_PREEQ_GAIN_MIC0_7 +625 0x4545 //TX_PREEQ_GAIN_MIC0_8 +626 0x4545 //TX_PREEQ_GAIN_MIC0_9 +627 0x4444 //TX_PREEQ_GAIN_MIC0_10 +628 0x4443 //TX_PREEQ_GAIN_MIC0_11 +629 0x4241 //TX_PREEQ_GAIN_MIC0_12 +630 0x3C3E //TX_PREEQ_GAIN_MIC0_13 +631 0x3E40 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x4000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4849 //TX_PREEQ_GAIN_MIC1_6 +673 0x4A4B //TX_PREEQ_GAIN_MIC1_7 +674 0x4C4B //TX_PREEQ_GAIN_MIC1_8 +675 0x4A48 //TX_PREEQ_GAIN_MIC1_9 +676 0x4B4C //TX_PREEQ_GAIN_MIC1_10 +677 0x4C4B //TX_PREEQ_GAIN_MIC1_11 +678 0x4838 //TX_PREEQ_GAIN_MIC1_12 +679 0x3858 //TX_PREEQ_GAIN_MIC1_13 +680 0x7060 //TX_PREEQ_GAIN_MIC1_14 +681 0x9870 //TX_PREEQ_GAIN_MIC1_15 +682 0x5848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x4000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0202 //TX_PREEQ_BIN_MIC2_0 +740 0x0203 //TX_PREEQ_BIN_MIC2_1 +741 0x0303 //TX_PREEQ_BIN_MIC2_2 +742 0x0304 //TX_PREEQ_BIN_MIC2_3 +743 0x0405 //TX_PREEQ_BIN_MIC2_4 +744 0x0506 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0809 //TX_PREEQ_BIN_MIC2_7 +747 0x0A0A //TX_PREEQ_BIN_MIC2_8 +748 0x0C10 //TX_PREEQ_BIN_MIC2_9 +749 0x1013 //TX_PREEQ_BIN_MIC2_10 +750 0x1414 //TX_PREEQ_BIN_MIC2_11 +751 0x261E //TX_PREEQ_BIN_MIC2_12 +752 0x1E14 //TX_PREEQ_BIN_MIC2_13 +753 0x1414 //TX_PREEQ_BIN_MIC2_14 +754 0x2814 //TX_PREEQ_BIN_MIC2_15 +755 0x4000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0550 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0xECCD //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x2000 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x002C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x065B //RX_PGA +11 0x7E56 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x5800 //RX_THR_PITCH_DET_0 +14 0x5000 //RX_THR_PITCH_DET_1 +15 0x4000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8689 //RX_FDEQ_GAIN_3 +43 0x908F //RX_FDEQ_GAIN_4 +44 0x9495 //RX_FDEQ_GAIN_5 +45 0x989D //RX_FDEQ_GAIN_6 +46 0x9DA6 //RX_FDEQ_GAIN_7 +47 0xA895 //RX_FDEQ_GAIN_8 +48 0x8A8A //RX_FDEQ_GAIN_9 +49 0x8E78 //RX_FDEQ_GAIN_10 +50 0x7070 //RX_FDEQ_GAIN_11 +51 0x7680 //RX_FDEQ_GAIN_12 +52 0x787C //RX_FDEQ_GAIN_13 +53 0x8890 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x1964 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x000D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4044 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8090 //RX_FDEQ_GAIN_3 +43 0x8C8C //RX_FDEQ_GAIN_4 +44 0x9490 //RX_FDEQ_GAIN_5 +45 0x989C //RX_FDEQ_GAIN_6 +46 0x98A4 //RX_FDEQ_GAIN_7 +47 0xC0A8 //RX_FDEQ_GAIN_8 +48 0x9C9C //RX_FDEQ_GAIN_9 +49 0x9C74 //RX_FDEQ_GAIN_10 +50 0x6C6C //RX_FDEQ_GAIN_11 +51 0x7490 //RX_FDEQ_GAIN_12 +52 0x9090 //RX_FDEQ_GAIN_13 +53 0x94A0 //RX_FDEQ_GAIN_14 +54 0xACBC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4044 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8090 //RX_FDEQ_GAIN_3 +43 0x8C8C //RX_FDEQ_GAIN_4 +44 0x9490 //RX_FDEQ_GAIN_5 +45 0x989C //RX_FDEQ_GAIN_6 +46 0x98A4 //RX_FDEQ_GAIN_7 +47 0xC0A8 //RX_FDEQ_GAIN_8 +48 0x9C9C //RX_FDEQ_GAIN_9 +49 0x9C74 //RX_FDEQ_GAIN_10 +50 0x6C6C //RX_FDEQ_GAIN_11 +51 0x7490 //RX_FDEQ_GAIN_12 +52 0x9090 //RX_FDEQ_GAIN_13 +53 0x94A0 //RX_FDEQ_GAIN_14 +54 0xACBC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0016 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4044 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8090 //RX_FDEQ_GAIN_3 +43 0x8C8C //RX_FDEQ_GAIN_4 +44 0x9490 //RX_FDEQ_GAIN_5 +45 0x989C //RX_FDEQ_GAIN_6 +46 0x98A4 //RX_FDEQ_GAIN_7 +47 0xC0A8 //RX_FDEQ_GAIN_8 +48 0x9C9C //RX_FDEQ_GAIN_9 +49 0x9C74 //RX_FDEQ_GAIN_10 +50 0x6C6C //RX_FDEQ_GAIN_11 +51 0x7490 //RX_FDEQ_GAIN_12 +52 0x9090 //RX_FDEQ_GAIN_13 +53 0x94A0 //RX_FDEQ_GAIN_14 +54 0xACBC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0026 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4044 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8090 //RX_FDEQ_GAIN_3 +43 0x8C8C //RX_FDEQ_GAIN_4 +44 0x9490 //RX_FDEQ_GAIN_5 +45 0x989C //RX_FDEQ_GAIN_6 +46 0x98A4 //RX_FDEQ_GAIN_7 +47 0xC0A8 //RX_FDEQ_GAIN_8 +48 0x9C9C //RX_FDEQ_GAIN_9 +49 0x9C74 //RX_FDEQ_GAIN_10 +50 0x6C6C //RX_FDEQ_GAIN_11 +51 0x7490 //RX_FDEQ_GAIN_12 +52 0x9090 //RX_FDEQ_GAIN_13 +53 0x94A0 //RX_FDEQ_GAIN_14 +54 0xACBC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x003D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4044 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8090 //RX_FDEQ_GAIN_3 +43 0x8C8C //RX_FDEQ_GAIN_4 +44 0x9490 //RX_FDEQ_GAIN_5 +45 0x989C //RX_FDEQ_GAIN_6 +46 0x98A4 //RX_FDEQ_GAIN_7 +47 0xC0A8 //RX_FDEQ_GAIN_8 +48 0x9C9C //RX_FDEQ_GAIN_9 +49 0x9C74 //RX_FDEQ_GAIN_10 +50 0x6C6C //RX_FDEQ_GAIN_11 +51 0x7490 //RX_FDEQ_GAIN_12 +52 0x9090 //RX_FDEQ_GAIN_13 +53 0x94A0 //RX_FDEQ_GAIN_14 +54 0xACBC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0060 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4044 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8090 //RX_FDEQ_GAIN_3 +43 0x8C8C //RX_FDEQ_GAIN_4 +44 0x9490 //RX_FDEQ_GAIN_5 +45 0x989C //RX_FDEQ_GAIN_6 +46 0x98A4 //RX_FDEQ_GAIN_7 +47 0xC0A8 //RX_FDEQ_GAIN_8 +48 0x9C9C //RX_FDEQ_GAIN_9 +49 0x9C74 //RX_FDEQ_GAIN_10 +50 0x6C6C //RX_FDEQ_GAIN_11 +51 0x7490 //RX_FDEQ_GAIN_12 +52 0x9090 //RX_FDEQ_GAIN_13 +53 0x94A0 //RX_FDEQ_GAIN_14 +54 0xACBC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0099 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4044 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8090 //RX_FDEQ_GAIN_3 +43 0x8C8C //RX_FDEQ_GAIN_4 +44 0x9490 //RX_FDEQ_GAIN_5 +45 0x989C //RX_FDEQ_GAIN_6 +46 0x98A4 //RX_FDEQ_GAIN_7 +47 0xC0A8 //RX_FDEQ_GAIN_8 +48 0x9C9C //RX_FDEQ_GAIN_9 +49 0x9C74 //RX_FDEQ_GAIN_10 +50 0x6C6C //RX_FDEQ_GAIN_11 +51 0x7490 //RX_FDEQ_GAIN_12 +52 0x9090 //RX_FDEQ_GAIN_13 +53 0x94A0 //RX_FDEQ_GAIN_14 +54 0xACBC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-NB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0036 //TX_PATCH_REG +3 0x6F7E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7646 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0800 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6000 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0100 //TX_MIN_EQ_RE_EST_1 +154 0x0100 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x0200 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x0400 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x0400 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7B00 //TX_DTD_THR1_0 +198 0x7B00 //TX_DTD_THR1_1 +199 0x7B00 //TX_DTD_THR1_2 +200 0x7B00 //TX_DTD_THR1_3 +201 0x7B00 //TX_DTD_THR1_4 +202 0x7B00 //TX_DTD_THR1_5 +203 0x7B00 //TX_DTD_THR1_6 +204 0x1000 //TX_DTD_THR2_0 +205 0x1000 //TX_DTD_THR2_1 +206 0x1000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0FA0 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0000 //TX_RATIO_DT_L_TH_LOW +224 0x0000 //TX_RATIO_DT_H_TH_LOW +225 0x0000 //TX_RATIO_DT_L_TH_HIGH +226 0x0000 //TX_RATIO_DT_H_TH_HIGH +227 0x0000 //TX_RATIO_DT_L0_TH +228 0x2000 //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x0000 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xF800 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF900 //TX_THR_SN_EST_3 +246 0xF900 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x01A0 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x01A0 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x3000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x3000 //TX_LAMBDA_NN_EST_4 +263 0x3000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x0000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x3000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x3000 //TX_MAINREFRTOH_TH_H +275 0x1000 //TX_MAINREFRTOH_TH_L +276 0x3000 //TX_MAINREFRTO_TH_H +277 0x1000 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x4000 //TX_B_POST_FLT_0 +280 0x4000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x001B //TX_NS_LVL_CTRL_1 +283 0x0019 //TX_NS_LVL_CTRL_2 +284 0x0017 //TX_NS_LVL_CTRL_3 +285 0x0017 //TX_NS_LVL_CTRL_4 +286 0x0019 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 +288 0x0010 //TX_NS_LVL_CTRL_7 +289 0x0010 //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x0014 //TX_MIN_GAIN_S_6 +296 0x0014 //TX_MIN_GAIN_S_7 +297 0x5000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x4000 //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x3000 //TX_SNRI_SUP_7 +308 0x3000 //TX_THR_LFNS +309 0x001A //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x2000 //TX_A_POST_FILT_S_0 +315 0x7000 //TX_A_POST_FILT_S_1 +316 0x6000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x2000 //TX_A_POST_FILT_S_4 +319 0x6000 //TX_A_POST_FILT_S_5 +320 0x2000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x4000 //TX_B_POST_FILT_0 +323 0x4000 //TX_B_POST_FILT_1 +324 0x7FFF //TX_B_POST_FILT_2 +325 0x5000 //TX_B_POST_FILT_3 +326 0x7FFF //TX_B_POST_FILT_4 +327 0x7FFF //TX_B_POST_FILT_5 +328 0x4000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7200 //TX_LAMBDA_PFILT_S_2 +342 0x7900 //TX_LAMBDA_PFILT_S_3 +343 0x7400 //TX_LAMBDA_PFILT_S_4 +344 0x7200 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x0C80 //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0004 //TX_NOISE_TH_0 +368 0x1B58 //TX_NOISE_TH_0_2 +369 0x2134 //TX_NOISE_TH_0_3 +370 0x0320 //TX_NOISE_TH_1 +371 0x022C //TX_NOISE_TH_2 +372 0x2710 //TX_NOISE_TH_3 +373 0x6B6C //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x0000 //TX_NOISE_TH_5_4 +378 0x07D0 //TX_NOISE_TH_6 +379 0x0004 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x00CE //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x000A //TX_NS_ENOISE_MIC0_TH +406 0x0004 //TX_MINENOISE_MIC0_TH +407 0x0014 //TX_MINENOISE_MIC0_S_TH +408 0x4900 //TX_MIN_G_CTRL_SSNS +409 0x0400 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x4000 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0280 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0640 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x001A //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0080 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0018 //TX_FDEQ_SUBNUM +567 0x6C60 //TX_FDEQ_GAIN_0 +568 0x584F //TX_FDEQ_GAIN_1 +569 0x4F4E //TX_FDEQ_GAIN_2 +570 0x474A //TX_FDEQ_GAIN_3 +571 0x473F //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x423C //TX_FDEQ_GAIN_7 +575 0x2C28 //TX_FDEQ_GAIN_8 +576 0x343C //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0104 //TX_FDEQ_BIN_1 +593 0x0502 //TX_FDEQ_BIN_2 +594 0x0202 //TX_FDEQ_BIN_3 +595 0x0504 //TX_FDEQ_BIN_4 +596 0x0708 //TX_FDEQ_BIN_5 +597 0x0808 //TX_FDEQ_BIN_6 +598 0x050E //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0F09 //TX_FDEQ_BIN_9 +601 0x0000 //TX_FDEQ_BIN_10 +602 0x0000 //TX_FDEQ_BIN_11 +603 0x0000 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4846 //TX_PREEQ_GAIN_MIC0_7 +625 0x4544 //TX_PREEQ_GAIN_MIC0_8 +626 0x4241 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0014 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4C //TX_PREEQ_GAIN_MIC1_8 +675 0x4E50 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0203 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x0000 //TX_PREEQ_BIN_MIC1_10 +701 0x0000 //TX_PREEQ_BIN_MIC1_11 +702 0x0000 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0065 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0065 //TX_MIC_CALIBRATION_2 +768 0x0065 //TX_MIC_CALIBRATION_3 +769 0x0044 //TX_MIC_PWR_BIAS_0 +770 0x0044 //TX_MIC_PWR_BIAS_1 +771 0x0044 //TX_MIC_PWR_BIAS_2 +772 0x0044 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0000 //TX_GAIN_LIMIT_1 +775 0x0006 //TX_GAIN_LIMIT_2 +776 0x0007 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0010 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x05A0 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x000C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0014 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4A4C //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5A5C //RX_FDEQ_GAIN_7 +47 0x5C5C //RX_FDEQ_GAIN_8 +48 0x5C5C //RX_FDEQ_GAIN_9 +49 0x5C5C //RX_FDEQ_GAIN_10 +50 0x5C48 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0303 //RX_FDEQ_BIN_3 +67 0x0303 //RX_FDEQ_BIN_4 +68 0x0303 //RX_FDEQ_BIN_5 +69 0x0303 //RX_FDEQ_BIN_6 +70 0x0303 //RX_FDEQ_BIN_7 +71 0x0A0A //RX_FDEQ_BIN_8 +72 0x0A0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0360 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0360 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4A4C //RX_FDEQ_GAIN_5 +45 0x4E50 //RX_FDEQ_GAIN_6 +46 0x5254 //RX_FDEQ_GAIN_7 +47 0x544C //RX_FDEQ_GAIN_8 +48 0x4C4C //RX_FDEQ_GAIN_9 +49 0x4C4C //RX_FDEQ_GAIN_10 +50 0x4C48 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0303 //RX_FDEQ_BIN_3 +67 0x0303 //RX_FDEQ_BIN_4 +68 0x0303 //RX_FDEQ_BIN_5 +69 0x0303 //RX_FDEQ_BIN_6 +70 0x0303 //RX_FDEQ_BIN_7 +71 0x0A0A //RX_FDEQ_BIN_8 +72 0x0A0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0360 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4A4C //RX_FDEQ_GAIN_5 +45 0x4E50 //RX_FDEQ_GAIN_6 +46 0x5254 //RX_FDEQ_GAIN_7 +47 0x544C //RX_FDEQ_GAIN_8 +48 0x4C4C //RX_FDEQ_GAIN_9 +49 0x4C4C //RX_FDEQ_GAIN_10 +50 0x4C48 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0303 //RX_FDEQ_BIN_3 +67 0x0303 //RX_FDEQ_BIN_4 +68 0x0303 //RX_FDEQ_BIN_5 +69 0x0303 //RX_FDEQ_BIN_6 +70 0x0303 //RX_FDEQ_BIN_7 +71 0x0A0A //RX_FDEQ_BIN_8 +72 0x0A0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0360 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4A4C //RX_FDEQ_GAIN_5 +45 0x4E50 //RX_FDEQ_GAIN_6 +46 0x5254 //RX_FDEQ_GAIN_7 +47 0x544C //RX_FDEQ_GAIN_8 +48 0x4C4C //RX_FDEQ_GAIN_9 +49 0x4C4C //RX_FDEQ_GAIN_10 +50 0x4C48 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0303 //RX_FDEQ_BIN_3 +67 0x0303 //RX_FDEQ_BIN_4 +68 0x0303 //RX_FDEQ_BIN_5 +69 0x0303 //RX_FDEQ_BIN_6 +70 0x0303 //RX_FDEQ_BIN_7 +71 0x0A0A //RX_FDEQ_BIN_8 +72 0x0A0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0360 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4A4C //RX_FDEQ_GAIN_5 +45 0x4E50 //RX_FDEQ_GAIN_6 +46 0x5254 //RX_FDEQ_GAIN_7 +47 0x544C //RX_FDEQ_GAIN_8 +48 0x4C4C //RX_FDEQ_GAIN_9 +49 0x4C4C //RX_FDEQ_GAIN_10 +50 0x4C48 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0303 //RX_FDEQ_BIN_3 +67 0x0303 //RX_FDEQ_BIN_4 +68 0x0303 //RX_FDEQ_BIN_5 +69 0x0303 //RX_FDEQ_BIN_6 +70 0x0303 //RX_FDEQ_BIN_7 +71 0x0A0A //RX_FDEQ_BIN_8 +72 0x0A0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0360 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4A4C //RX_FDEQ_GAIN_5 +45 0x4E50 //RX_FDEQ_GAIN_6 +46 0x5254 //RX_FDEQ_GAIN_7 +47 0x544C //RX_FDEQ_GAIN_8 +48 0x4C4C //RX_FDEQ_GAIN_9 +49 0x4C4C //RX_FDEQ_GAIN_10 +50 0x4C48 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0303 //RX_FDEQ_BIN_3 +67 0x0303 //RX_FDEQ_BIN_4 +68 0x0303 //RX_FDEQ_BIN_5 +69 0x0303 //RX_FDEQ_BIN_6 +70 0x0303 //RX_FDEQ_BIN_7 +71 0x0A0A //RX_FDEQ_BIN_8 +72 0x0A0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0360 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4A4C //RX_FDEQ_GAIN_5 +45 0x4E50 //RX_FDEQ_GAIN_6 +46 0x5254 //RX_FDEQ_GAIN_7 +47 0x544C //RX_FDEQ_GAIN_8 +48 0x4C4C //RX_FDEQ_GAIN_9 +49 0x4C4C //RX_FDEQ_GAIN_10 +50 0x4C48 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0303 //RX_FDEQ_BIN_3 +67 0x0303 //RX_FDEQ_BIN_4 +68 0x0303 //RX_FDEQ_BIN_5 +69 0x0303 //RX_FDEQ_BIN_6 +70 0x0303 //RX_FDEQ_BIN_7 +71 0x0A0A //RX_FDEQ_BIN_8 +72 0x0A0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0360 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4A4C //RX_FDEQ_GAIN_5 +45 0x4E50 //RX_FDEQ_GAIN_6 +46 0x5254 //RX_FDEQ_GAIN_7 +47 0x544C //RX_FDEQ_GAIN_8 +48 0x4C4C //RX_FDEQ_GAIN_9 +49 0x4C4C //RX_FDEQ_GAIN_10 +50 0x4C48 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0303 //RX_FDEQ_BIN_3 +67 0x0303 //RX_FDEQ_BIN_4 +68 0x0303 //RX_FDEQ_BIN_5 +69 0x0303 //RX_FDEQ_BIN_6 +70 0x0303 //RX_FDEQ_BIN_7 +71 0x0A0A //RX_FDEQ_BIN_8 +72 0x0A0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-WB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0036 //TX_PATCH_REG +3 0x6F7E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0001 //TX_SAMPLINGFREQ_SIG +7 0x0001 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0004 //TX_MAINMIC_BLKFACTOR +114 0x0004 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0800 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6000 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0100 //TX_MIN_EQ_RE_EST_1 +154 0x0100 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x0200 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x0400 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x0400 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0000 //TX_RATIO_DT_L_TH_LOW +224 0x0000 //TX_RATIO_DT_H_TH_LOW +225 0x0000 //TX_RATIO_DT_L_TH_HIGH +226 0x0000 //TX_RATIO_DT_H_TH_HIGH +227 0x0000 //TX_RATIO_DT_L0_TH +228 0x2000 //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x0000 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFB00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x01A0 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x5000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x0000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x2000 //TX_MAINREFRTOH_TH_H +275 0x1400 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x4000 //TX_B_POST_FLT_1 +281 0x0018 //TX_NS_LVL_CTRL_0 +282 0x001C //TX_NS_LVL_CTRL_1 +283 0x0019 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0019 //TX_NS_LVL_CTRL_4 +286 0x001A //TX_NS_LVL_CTRL_5 +287 0x001E //TX_NS_LVL_CTRL_6 +288 0x001C //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0018 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0012 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 +294 0x0018 //TX_MIN_GAIN_S_5 +295 0x0018 //TX_MIN_GAIN_S_6 +296 0x0018 //TX_MIN_GAIN_S_7 +297 0x5000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x5000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x4000 //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x7000 //TX_A_POST_FILT_S_0 +315 0x7000 //TX_A_POST_FILT_S_1 +316 0x3000 //TX_A_POST_FILT_S_2 +317 0x3000 //TX_A_POST_FILT_S_3 +318 0x2000 //TX_A_POST_FILT_S_4 +319 0x7000 //TX_A_POST_FILT_S_5 +320 0x7000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x4000 //TX_B_POST_FILT_1 +324 0x5000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 +328 0x4000 //TX_B_POST_FILT_6 +329 0x4000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x6000 //TX_B_LESSCUT_RTO_S_1 +332 0x6000 //TX_B_LESSCUT_RTO_S_2 +333 0x6000 //TX_B_LESSCUT_RTO_S_3 +334 0x6000 //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C29 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0600 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x1B58 //TX_NOISE_TH_0_2 +369 0x2134 //TX_NOISE_TH_0_3 +370 0x0139 //TX_NOISE_TH_1 +371 0x0479 //TX_NOISE_TH_2 +372 0x2328 //TX_NOISE_TH_3 +373 0x4422 //TX_NOISE_TH_4 +374 0x5586 //TX_NOISE_TH_5 +375 0x4425 //TX_NOISE_TH_5_2 +376 0x0032 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x21E8 //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x00CE //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4900 //TX_MIN_G_CTRL_SSNS +409 0x1000 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x1C00 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x05A8 //TX_SB_RHO_MEAN2_TH +441 0x0384 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0280 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x0200 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0030 //TX_FDEQ_SUBNUM +567 0x5C54 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4C4C //TX_FDEQ_GAIN_2 +570 0x474A //TX_FDEQ_GAIN_3 +571 0x473F //TX_FDEQ_GAIN_4 +572 0x424C //TX_FDEQ_GAIN_5 +573 0x545C //TX_FDEQ_GAIN_6 +574 0x5C54 //TX_FDEQ_GAIN_7 +575 0x4040 //TX_FDEQ_GAIN_8 +576 0x4048 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0104 //TX_FDEQ_BIN_1 +593 0x0502 //TX_FDEQ_BIN_2 +594 0x0202 //TX_FDEQ_BIN_3 +595 0x0504 //TX_FDEQ_BIN_4 +596 0x0708 //TX_FDEQ_BIN_5 +597 0x0808 //TX_FDEQ_BIN_6 +598 0x050E //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0F0F //TX_FDEQ_BIN_9 +601 0x0F0F //TX_FDEQ_BIN_10 +602 0x0F28 //TX_FDEQ_BIN_11 +603 0x0611 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4846 //TX_PREEQ_GAIN_MIC0_7 +625 0x4544 //TX_PREEQ_GAIN_MIC0_8 +626 0x4241 //TX_PREEQ_GAIN_MIC0_9 +627 0x403E //TX_PREEQ_GAIN_MIC0_10 +628 0x3D3C //TX_PREEQ_GAIN_MIC0_11 +629 0x3C3C //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x7008 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0F10 //TX_PREEQ_BIN_MIC0_9 +651 0x1011 //TX_PREEQ_BIN_MIC0_10 +652 0x1112 //TX_PREEQ_BIN_MIC0_11 +653 0x1208 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x484A //TX_PREEQ_GAIN_MIC1_8 +675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 +676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 +677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 +678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 +679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x0F10 //TX_PREEQ_BIN_MIC1_10 +701 0x1011 //TX_PREEQ_BIN_MIC1_11 +702 0x1112 //TX_PREEQ_BIN_MIC1_12 +703 0x120B //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0000 //TX_GAIN_LIMIT_1 +775 0x0006 //TX_GAIN_LIMIT_2 +776 0x0005 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0002 //TX_TDDRC_THRD_0 +855 0x0003 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x05A0 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x199A //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x2000 //TX_B_LESSCUT_RTO_MASK +877 0x1C00 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x000C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0001 //RX_SAMPLINGFREQ_SIG +3 0x0001 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0014 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4A4C //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5A5C //RX_FDEQ_GAIN_7 +47 0x5C5C //RX_FDEQ_GAIN_8 +48 0x5C5C //RX_FDEQ_GAIN_9 +49 0x5C5C //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5C5C //RX_FDEQ_GAIN_12 +52 0x5C5C //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0505 //RX_FDEQ_BIN_3 +67 0x0505 //RX_FDEQ_BIN_4 +68 0x0505 //RX_FDEQ_BIN_5 +69 0x0505 //RX_FDEQ_BIN_6 +70 0x0505 //RX_FDEQ_BIN_7 +71 0x160C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0400 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0400 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4A4C //RX_FDEQ_GAIN_4 +44 0x4E50 //RX_FDEQ_GAIN_5 +45 0x5254 //RX_FDEQ_GAIN_6 +46 0x5658 //RX_FDEQ_GAIN_7 +47 0x5858 //RX_FDEQ_GAIN_8 +48 0x5858 //RX_FDEQ_GAIN_9 +49 0x5858 //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x5858 //RX_FDEQ_GAIN_12 +52 0x5858 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0505 //RX_FDEQ_BIN_3 +67 0x0505 //RX_FDEQ_BIN_4 +68 0x0505 //RX_FDEQ_BIN_5 +69 0x0505 //RX_FDEQ_BIN_6 +70 0x0505 //RX_FDEQ_BIN_7 +71 0x160C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0400 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4A4C //RX_FDEQ_GAIN_4 +44 0x4E50 //RX_FDEQ_GAIN_5 +45 0x5254 //RX_FDEQ_GAIN_6 +46 0x5658 //RX_FDEQ_GAIN_7 +47 0x5858 //RX_FDEQ_GAIN_8 +48 0x5858 //RX_FDEQ_GAIN_9 +49 0x5858 //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x5858 //RX_FDEQ_GAIN_12 +52 0x5858 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0505 //RX_FDEQ_BIN_3 +67 0x0505 //RX_FDEQ_BIN_4 +68 0x0505 //RX_FDEQ_BIN_5 +69 0x0505 //RX_FDEQ_BIN_6 +70 0x0505 //RX_FDEQ_BIN_7 +71 0x160C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0400 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4A4C //RX_FDEQ_GAIN_4 +44 0x4E50 //RX_FDEQ_GAIN_5 +45 0x5254 //RX_FDEQ_GAIN_6 +46 0x5658 //RX_FDEQ_GAIN_7 +47 0x5858 //RX_FDEQ_GAIN_8 +48 0x5858 //RX_FDEQ_GAIN_9 +49 0x5858 //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x5858 //RX_FDEQ_GAIN_12 +52 0x5858 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0505 //RX_FDEQ_BIN_3 +67 0x0505 //RX_FDEQ_BIN_4 +68 0x0505 //RX_FDEQ_BIN_5 +69 0x0505 //RX_FDEQ_BIN_6 +70 0x0505 //RX_FDEQ_BIN_7 +71 0x160C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0400 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4A4C //RX_FDEQ_GAIN_4 +44 0x4E50 //RX_FDEQ_GAIN_5 +45 0x5254 //RX_FDEQ_GAIN_6 +46 0x5658 //RX_FDEQ_GAIN_7 +47 0x5858 //RX_FDEQ_GAIN_8 +48 0x5858 //RX_FDEQ_GAIN_9 +49 0x5858 //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x5858 //RX_FDEQ_GAIN_12 +52 0x5858 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0505 //RX_FDEQ_BIN_3 +67 0x0505 //RX_FDEQ_BIN_4 +68 0x0505 //RX_FDEQ_BIN_5 +69 0x0505 //RX_FDEQ_BIN_6 +70 0x0505 //RX_FDEQ_BIN_7 +71 0x160C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0400 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4A4C //RX_FDEQ_GAIN_4 +44 0x4E50 //RX_FDEQ_GAIN_5 +45 0x5254 //RX_FDEQ_GAIN_6 +46 0x5658 //RX_FDEQ_GAIN_7 +47 0x5858 //RX_FDEQ_GAIN_8 +48 0x5858 //RX_FDEQ_GAIN_9 +49 0x5858 //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x5858 //RX_FDEQ_GAIN_12 +52 0x5858 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0505 //RX_FDEQ_BIN_3 +67 0x0505 //RX_FDEQ_BIN_4 +68 0x0505 //RX_FDEQ_BIN_5 +69 0x0505 //RX_FDEQ_BIN_6 +70 0x0505 //RX_FDEQ_BIN_7 +71 0x160C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0400 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4A4C //RX_FDEQ_GAIN_4 +44 0x4E50 //RX_FDEQ_GAIN_5 +45 0x5254 //RX_FDEQ_GAIN_6 +46 0x5658 //RX_FDEQ_GAIN_7 +47 0x5858 //RX_FDEQ_GAIN_8 +48 0x5858 //RX_FDEQ_GAIN_9 +49 0x5858 //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x5858 //RX_FDEQ_GAIN_12 +52 0x5858 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0505 //RX_FDEQ_BIN_3 +67 0x0505 //RX_FDEQ_BIN_4 +68 0x0505 //RX_FDEQ_BIN_5 +69 0x0505 //RX_FDEQ_BIN_6 +70 0x0505 //RX_FDEQ_BIN_7 +71 0x160C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0400 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4A4C //RX_FDEQ_GAIN_4 +44 0x4E50 //RX_FDEQ_GAIN_5 +45 0x5254 //RX_FDEQ_GAIN_6 +46 0x5658 //RX_FDEQ_GAIN_7 +47 0x5858 //RX_FDEQ_GAIN_8 +48 0x5858 //RX_FDEQ_GAIN_9 +49 0x5858 //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x5858 //RX_FDEQ_GAIN_12 +52 0x5858 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0505 //RX_FDEQ_BIN_3 +67 0x0505 //RX_FDEQ_BIN_4 +68 0x0505 //RX_FDEQ_BIN_5 +69 0x0505 //RX_FDEQ_BIN_6 +70 0x0505 //RX_FDEQ_BIN_7 +71 0x160C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-SWB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0026 //TX_PATCH_REG +3 0x6F7E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7D83 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7900 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0400 //TX_MIN_EQ_RE_EST_0 +153 0x0400 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x1000 //TX_MIN_EQ_RE_EST_4 +157 0x1000 //TX_MIN_EQ_RE_EST_5 +158 0x1000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x1800 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0177 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0C00 //TX_RATIO_DT_L_TH_LOW +224 0x2000 //TX_RATIO_DT_H_TH_LOW +225 0x1800 //TX_RATIO_DT_L_TH_HIGH +226 0x3000 //TX_RATIO_DT_H_TH_HIGH +227 0x0A00 //TX_RATIO_DT_L0_TH +228 0x7000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x0600 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x0016 //TX_NS_LVL_CTRL_1 +283 0x002C //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0018 //TX_NS_LVL_CTRL_4 +286 0x0016 //TX_NS_LVL_CTRL_5 +287 0x0012 //TX_NS_LVL_CTRL_6 +288 0x0017 //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0012 //TX_MIN_GAIN_S_1 +291 0x000D //TX_MIN_GAIN_S_2 +292 0x0012 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0012 //TX_MIN_GAIN_S_5 +295 0x0012 //TX_MIN_GAIN_S_6 +296 0x0012 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x6000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x6000 //TX_SNRI_SUP_5 +306 0x6000 //TX_SNRI_SUP_6 +307 0x6000 //TX_SNRI_SUP_7 +308 0x6000 //TX_THR_LFNS +309 0x0017 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x3000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x5000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x6000 //TX_B_POST_FILT_6 +329 0x3000 //TX_B_POST_FILT_7 +330 0x1000 //TX_B_LESSCUT_RTO_S_0 +331 0x6000 //TX_B_LESSCUT_RTO_S_1 +332 0x6000 //TX_B_LESSCUT_RTO_S_2 +333 0x6000 //TX_B_LESSCUT_RTO_S_3 +334 0x6000 //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x07D0 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x00C6 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x2260 //TX_NOISE_TH_3 +373 0x7080 //TX_NOISE_TH_4 +374 0x57E4 //TX_NOISE_TH_5 +375 0x4BD6 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x1194 //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x0200 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x2000 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x051E //TX_SB_RHO_MEAN2_TH +441 0x02F0 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0300 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x5C54 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4C4C //TX_FDEQ_GAIN_2 +570 0x474A //TX_FDEQ_GAIN_3 +571 0x423C //TX_FDEQ_GAIN_4 +572 0x4048 //TX_FDEQ_GAIN_5 +573 0x4858 //TX_FDEQ_GAIN_6 +574 0x5848 //TX_FDEQ_GAIN_7 +575 0x4248 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4856 //TX_FDEQ_GAIN_10 +578 0x5656 //TX_FDEQ_GAIN_11 +579 0x4850 //TX_FDEQ_GAIN_12 +580 0x5850 //TX_FDEQ_GAIN_13 +581 0x585C //TX_FDEQ_GAIN_14 +582 0x707C //TX_FDEQ_GAIN_15 +583 0x7070 //TX_FDEQ_GAIN_16 +584 0x7048 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0104 //TX_FDEQ_BIN_1 +593 0x0502 //TX_FDEQ_BIN_2 +594 0x0202 //TX_FDEQ_BIN_3 +595 0x0504 //TX_FDEQ_BIN_4 +596 0x0708 //TX_FDEQ_BIN_5 +597 0x0808 //TX_FDEQ_BIN_6 +598 0x050E //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0F0F //TX_FDEQ_BIN_9 +601 0x0E0D //TX_FDEQ_BIN_10 +602 0x0F28 //TX_FDEQ_BIN_11 +603 0x111B //TX_FDEQ_BIN_12 +604 0x291E //TX_FDEQ_BIN_13 +605 0x1E10 //TX_FDEQ_BIN_14 +606 0x186F //TX_FDEQ_BIN_15 +607 0x1021 //TX_FDEQ_BIN_16 +608 0x1000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4646 //TX_PREEQ_GAIN_MIC0_8 +626 0x4545 //TX_PREEQ_GAIN_MIC0_9 +627 0x4545 //TX_PREEQ_GAIN_MIC0_10 +628 0x4544 //TX_PREEQ_GAIN_MIC0_11 +629 0x4444 //TX_PREEQ_GAIN_MIC0_12 +630 0x4343 //TX_PREEQ_GAIN_MIC0_13 +631 0x4241 //TX_PREEQ_GAIN_MIC0_14 +632 0x3C3E //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1719 //TX_PREEQ_BIN_MIC0_11 +653 0x1B1E //TX_PREEQ_BIN_MIC0_12 +654 0x1E1E //TX_PREEQ_BIN_MIC0_13 +655 0x1E28 //TX_PREEQ_BIN_MIC0_14 +656 0x282C //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x484A //TX_PREEQ_GAIN_MIC1_8 +675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 +676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 +677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 +678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 +679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x0F10 //TX_PREEQ_BIN_MIC1_10 +701 0x1011 //TX_PREEQ_BIN_MIC1_11 +702 0x1112 //TX_PREEQ_BIN_MIC1_12 +703 0x120B //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0056 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0042 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0005 //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0002 //TX_TDDRC_THRD_0 +855 0x0003 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0550 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0xECCD //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x2000 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x000C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x5800 //RX_THR_PITCH_DET_0 +14 0x5000 //RX_THR_PITCH_DET_1 +15 0x4000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4A4C //RX_FDEQ_GAIN_5 +45 0x4C50 //RX_FDEQ_GAIN_6 +46 0x5458 //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x6468 //RX_FDEQ_GAIN_9 +49 0x6C6C //RX_FDEQ_GAIN_10 +50 0x6C6C //RX_FDEQ_GAIN_11 +51 0x6C6C //RX_FDEQ_GAIN_12 +52 0x6C6C //RX_FDEQ_GAIN_13 +53 0x6C6C //RX_FDEQ_GAIN_14 +54 0x6C6C //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4A4C //RX_FDEQ_GAIN_5 +45 0x4C50 //RX_FDEQ_GAIN_6 +46 0x5458 //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x6468 //RX_FDEQ_GAIN_9 +49 0x6C6C //RX_FDEQ_GAIN_10 +50 0x6C6C //RX_FDEQ_GAIN_11 +51 0x6C6C //RX_FDEQ_GAIN_12 +52 0x6C6C //RX_FDEQ_GAIN_13 +53 0x6C6C //RX_FDEQ_GAIN_14 +54 0x6C6C //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4A4C //RX_FDEQ_GAIN_5 +45 0x4C50 //RX_FDEQ_GAIN_6 +46 0x5458 //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x6468 //RX_FDEQ_GAIN_9 +49 0x6C6C //RX_FDEQ_GAIN_10 +50 0x6C6C //RX_FDEQ_GAIN_11 +51 0x6C6C //RX_FDEQ_GAIN_12 +52 0x6C6C //RX_FDEQ_GAIN_13 +53 0x6C6C //RX_FDEQ_GAIN_14 +54 0x6C6C //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4A4C //RX_FDEQ_GAIN_5 +45 0x4C50 //RX_FDEQ_GAIN_6 +46 0x5458 //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x6468 //RX_FDEQ_GAIN_9 +49 0x6C6C //RX_FDEQ_GAIN_10 +50 0x6C6C //RX_FDEQ_GAIN_11 +51 0x6C6C //RX_FDEQ_GAIN_12 +52 0x6C6C //RX_FDEQ_GAIN_13 +53 0x6C6C //RX_FDEQ_GAIN_14 +54 0x6C6C //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4A4C //RX_FDEQ_GAIN_5 +45 0x4C50 //RX_FDEQ_GAIN_6 +46 0x5458 //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x6468 //RX_FDEQ_GAIN_9 +49 0x6C6C //RX_FDEQ_GAIN_10 +50 0x6C6C //RX_FDEQ_GAIN_11 +51 0x6C6C //RX_FDEQ_GAIN_12 +52 0x6C6C //RX_FDEQ_GAIN_13 +53 0x6C6C //RX_FDEQ_GAIN_14 +54 0x6C6C //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4A4C //RX_FDEQ_GAIN_5 +45 0x4C50 //RX_FDEQ_GAIN_6 +46 0x5458 //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x6468 //RX_FDEQ_GAIN_9 +49 0x6C6C //RX_FDEQ_GAIN_10 +50 0x6C6C //RX_FDEQ_GAIN_11 +51 0x6C6C //RX_FDEQ_GAIN_12 +52 0x6C6C //RX_FDEQ_GAIN_13 +53 0x6C6C //RX_FDEQ_GAIN_14 +54 0x6C6C //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4A4C //RX_FDEQ_GAIN_5 +45 0x4C50 //RX_FDEQ_GAIN_6 +46 0x5458 //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x6468 //RX_FDEQ_GAIN_9 +49 0x6C6C //RX_FDEQ_GAIN_10 +50 0x6C6C //RX_FDEQ_GAIN_11 +51 0x6C6C //RX_FDEQ_GAIN_12 +52 0x6C6C //RX_FDEQ_GAIN_13 +53 0x6C6C //RX_FDEQ_GAIN_14 +54 0x6C6C //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0026 //TX_PATCH_REG +3 0x6B7E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7900 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0400 //TX_MIN_EQ_RE_EST_0 +153 0x0400 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x1000 //TX_MIN_EQ_RE_EST_4 +157 0x1000 //TX_MIN_EQ_RE_EST_5 +158 0x1000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x1800 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0177 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0C00 //TX_RATIO_DT_L_TH_LOW +224 0x2000 //TX_RATIO_DT_H_TH_LOW +225 0x1800 //TX_RATIO_DT_L_TH_HIGH +226 0x3000 //TX_RATIO_DT_H_TH_HIGH +227 0x0A00 //TX_RATIO_DT_L0_TH +228 0x7000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x0600 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x2000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x0016 //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0018 //TX_NS_LVL_CTRL_4 +286 0x0016 //TX_NS_LVL_CTRL_5 +287 0x0012 //TX_NS_LVL_CTRL_6 +288 0x0017 //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0012 //TX_MIN_GAIN_S_1 +291 0x0007 //TX_MIN_GAIN_S_2 +292 0x0012 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0012 //TX_MIN_GAIN_S_5 +295 0x0012 //TX_MIN_GAIN_S_6 +296 0x0012 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x6000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x6000 //TX_SNRI_SUP_5 +306 0x6000 //TX_SNRI_SUP_6 +307 0x6000 //TX_SNRI_SUP_7 +308 0x6000 //TX_THR_LFNS +309 0x0017 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x3000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x5000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x6000 //TX_B_POST_FILT_6 +329 0x3000 //TX_B_POST_FILT_7 +330 0x1000 //TX_B_LESSCUT_RTO_S_0 +331 0x6000 //TX_B_LESSCUT_RTO_S_1 +332 0x6000 //TX_B_LESSCUT_RTO_S_2 +333 0x6000 //TX_B_LESSCUT_RTO_S_3 +334 0x6000 //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x07D0 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x1B58 //TX_NOISE_TH_0_2 +369 0x2134 //TX_NOISE_TH_0_3 +370 0x00C6 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x2EE0 //TX_NOISE_TH_3 +373 0x47E0 //TX_NOISE_TH_4 +374 0x57E4 //TX_NOISE_TH_5 +375 0x4BD6 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x39DF //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x0200 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x2000 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x051E //TX_SB_RHO_MEAN2_TH +441 0x051E //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0300 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0030 //TX_FDEQ_SUBNUM +567 0x4E4A //TX_FDEQ_GAIN_0 +568 0x4C54 //TX_FDEQ_GAIN_1 +569 0x5C50 //TX_FDEQ_GAIN_2 +570 0x5556 //TX_FDEQ_GAIN_3 +571 0x5757 //TX_FDEQ_GAIN_4 +572 0x5658 //TX_FDEQ_GAIN_5 +573 0x585C //TX_FDEQ_GAIN_6 +574 0x5858 //TX_FDEQ_GAIN_7 +575 0x5E66 //TX_FDEQ_GAIN_8 +576 0x5894 //TX_FDEQ_GAIN_9 +577 0x9498 //TX_FDEQ_GAIN_10 +578 0xB8B8 //TX_FDEQ_GAIN_11 +579 0x7C7C //TX_FDEQ_GAIN_12 +580 0x7C7C //TX_FDEQ_GAIN_13 +581 0x7070 //TX_FDEQ_GAIN_14 +582 0x707C //TX_FDEQ_GAIN_15 +583 0x7C7C //TX_FDEQ_GAIN_16 +584 0x7C7C //TX_FDEQ_GAIN_17 +585 0x7C90 //TX_FDEQ_GAIN_18 +586 0x9048 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0F03 //TX_FDEQ_BIN_0 +592 0x0909 //TX_FDEQ_BIN_1 +593 0x080F //TX_FDEQ_BIN_2 +594 0x0609 //TX_FDEQ_BIN_3 +595 0x0F03 //TX_FDEQ_BIN_4 +596 0x1402 //TX_FDEQ_BIN_5 +597 0x0E13 //TX_FDEQ_BIN_6 +598 0x110F //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x0E0F //TX_FDEQ_BIN_9 +601 0x080D //TX_FDEQ_BIN_10 +602 0x0F0F //TX_FDEQ_BIN_11 +603 0x0F0F //TX_FDEQ_BIN_12 +604 0x0A0F //TX_FDEQ_BIN_13 +605 0x0809 //TX_FDEQ_BIN_14 +606 0x0A0B //TX_FDEQ_BIN_15 +607 0x0C0D //TX_FDEQ_BIN_16 +608 0x0E0F //TX_FDEQ_BIN_17 +609 0x1013 //TX_FDEQ_BIN_18 +610 0x0A00 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4846 //TX_PREEQ_GAIN_MIC0_6 +624 0x4645 //TX_PREEQ_GAIN_MIC0_7 +625 0x4545 //TX_PREEQ_GAIN_MIC0_8 +626 0x4545 //TX_PREEQ_GAIN_MIC0_9 +627 0x4444 //TX_PREEQ_GAIN_MIC0_10 +628 0x4443 //TX_PREEQ_GAIN_MIC0_11 +629 0x4241 //TX_PREEQ_GAIN_MIC0_12 +630 0x3C3E //TX_PREEQ_GAIN_MIC0_13 +631 0x3E40 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x4000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4849 //TX_PREEQ_GAIN_MIC1_6 +673 0x4A4B //TX_PREEQ_GAIN_MIC1_7 +674 0x4C4B //TX_PREEQ_GAIN_MIC1_8 +675 0x4A48 //TX_PREEQ_GAIN_MIC1_9 +676 0x4B4C //TX_PREEQ_GAIN_MIC1_10 +677 0x4C4B //TX_PREEQ_GAIN_MIC1_11 +678 0x4838 //TX_PREEQ_GAIN_MIC1_12 +679 0x3858 //TX_PREEQ_GAIN_MIC1_13 +680 0x7060 //TX_PREEQ_GAIN_MIC1_14 +681 0x9870 //TX_PREEQ_GAIN_MIC1_15 +682 0x5848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x4000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0202 //TX_PREEQ_BIN_MIC2_0 +740 0x0203 //TX_PREEQ_BIN_MIC2_1 +741 0x0303 //TX_PREEQ_BIN_MIC2_2 +742 0x0304 //TX_PREEQ_BIN_MIC2_3 +743 0x0405 //TX_PREEQ_BIN_MIC2_4 +744 0x0506 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0809 //TX_PREEQ_BIN_MIC2_7 +747 0x0A0A //TX_PREEQ_BIN_MIC2_8 +748 0x0C10 //TX_PREEQ_BIN_MIC2_9 +749 0x1013 //TX_PREEQ_BIN_MIC2_10 +750 0x1414 //TX_PREEQ_BIN_MIC2_11 +751 0x261E //TX_PREEQ_BIN_MIC2_12 +752 0x1E14 //TX_PREEQ_BIN_MIC2_13 +753 0x1414 //TX_PREEQ_BIN_MIC2_14 +754 0x2814 //TX_PREEQ_BIN_MIC2_15 +755 0x4000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0550 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0xECCD //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x2000 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x000C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x5800 //RX_THR_PITCH_DET_0 +14 0x5000 //RX_THR_PITCH_DET_1 +15 0x4000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET-TMOBILE_US-NB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0036 //TX_PATCH_REG +3 0x6F7E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7646 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0800 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6000 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0100 //TX_MIN_EQ_RE_EST_1 +154 0x0100 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x0200 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x0400 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x0400 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7B00 //TX_DTD_THR1_0 +198 0x7B00 //TX_DTD_THR1_1 +199 0x7B00 //TX_DTD_THR1_2 +200 0x7B00 //TX_DTD_THR1_3 +201 0x7B00 //TX_DTD_THR1_4 +202 0x7B00 //TX_DTD_THR1_5 +203 0x7B00 //TX_DTD_THR1_6 +204 0x1000 //TX_DTD_THR2_0 +205 0x1000 //TX_DTD_THR2_1 +206 0x1000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0FA0 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0000 //TX_RATIO_DT_L_TH_LOW +224 0x0000 //TX_RATIO_DT_H_TH_LOW +225 0x0000 //TX_RATIO_DT_L_TH_HIGH +226 0x0000 //TX_RATIO_DT_H_TH_HIGH +227 0x0000 //TX_RATIO_DT_L0_TH +228 0x2000 //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x0000 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xF800 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF900 //TX_THR_SN_EST_3 +246 0xF900 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x01A0 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x01A0 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x3000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x3000 //TX_LAMBDA_NN_EST_4 +263 0x3000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x0000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x3000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x3000 //TX_MAINREFRTOH_TH_H +275 0x1000 //TX_MAINREFRTOH_TH_L +276 0x3000 //TX_MAINREFRTO_TH_H +277 0x1000 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x4000 //TX_B_POST_FLT_0 +280 0x4000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x001B //TX_NS_LVL_CTRL_1 +283 0x0019 //TX_NS_LVL_CTRL_2 +284 0x0017 //TX_NS_LVL_CTRL_3 +285 0x0017 //TX_NS_LVL_CTRL_4 +286 0x0019 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 +288 0x0010 //TX_NS_LVL_CTRL_7 +289 0x0010 //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x0014 //TX_MIN_GAIN_S_6 +296 0x0014 //TX_MIN_GAIN_S_7 +297 0x5000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x4000 //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x3000 //TX_SNRI_SUP_7 +308 0x3000 //TX_THR_LFNS +309 0x001A //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x2000 //TX_A_POST_FILT_S_0 +315 0x7000 //TX_A_POST_FILT_S_1 +316 0x6000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x2000 //TX_A_POST_FILT_S_4 +319 0x6000 //TX_A_POST_FILT_S_5 +320 0x2000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x4000 //TX_B_POST_FILT_0 +323 0x4000 //TX_B_POST_FILT_1 +324 0x7FFF //TX_B_POST_FILT_2 +325 0x5000 //TX_B_POST_FILT_3 +326 0x7FFF //TX_B_POST_FILT_4 +327 0x7FFF //TX_B_POST_FILT_5 +328 0x4000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7200 //TX_LAMBDA_PFILT_S_2 +342 0x7900 //TX_LAMBDA_PFILT_S_3 +343 0x7400 //TX_LAMBDA_PFILT_S_4 +344 0x7200 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x0C80 //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0004 //TX_NOISE_TH_0 +368 0x1B58 //TX_NOISE_TH_0_2 +369 0x2134 //TX_NOISE_TH_0_3 +370 0x0320 //TX_NOISE_TH_1 +371 0x022C //TX_NOISE_TH_2 +372 0x2710 //TX_NOISE_TH_3 +373 0x6B6C //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x0000 //TX_NOISE_TH_5_4 +378 0x07D0 //TX_NOISE_TH_6 +379 0x0004 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x00CE //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x000A //TX_NS_ENOISE_MIC0_TH +406 0x0004 //TX_MINENOISE_MIC0_TH +407 0x0014 //TX_MINENOISE_MIC0_S_TH +408 0x4900 //TX_MIN_G_CTRL_SSNS +409 0x0400 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x4000 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0280 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0640 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x001A //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0080 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0018 //TX_FDEQ_SUBNUM +567 0x6C60 //TX_FDEQ_GAIN_0 +568 0x584F //TX_FDEQ_GAIN_1 +569 0x4F4E //TX_FDEQ_GAIN_2 +570 0x474A //TX_FDEQ_GAIN_3 +571 0x473F //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x423C //TX_FDEQ_GAIN_7 +575 0x2C28 //TX_FDEQ_GAIN_8 +576 0x343C //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0104 //TX_FDEQ_BIN_1 +593 0x0502 //TX_FDEQ_BIN_2 +594 0x0202 //TX_FDEQ_BIN_3 +595 0x0504 //TX_FDEQ_BIN_4 +596 0x0708 //TX_FDEQ_BIN_5 +597 0x0808 //TX_FDEQ_BIN_6 +598 0x050E //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0F09 //TX_FDEQ_BIN_9 +601 0x0000 //TX_FDEQ_BIN_10 +602 0x0000 //TX_FDEQ_BIN_11 +603 0x0000 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4846 //TX_PREEQ_GAIN_MIC0_7 +625 0x4544 //TX_PREEQ_GAIN_MIC0_8 +626 0x4241 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0014 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4C //TX_PREEQ_GAIN_MIC1_8 +675 0x4E50 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0203 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x0000 //TX_PREEQ_BIN_MIC1_10 +701 0x0000 //TX_PREEQ_BIN_MIC1_11 +702 0x0000 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0065 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0065 //TX_MIC_CALIBRATION_2 +768 0x0065 //TX_MIC_CALIBRATION_3 +769 0x0044 //TX_MIC_PWR_BIAS_0 +770 0x0044 //TX_MIC_PWR_BIAS_1 +771 0x0044 //TX_MIC_PWR_BIAS_2 +772 0x0044 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0000 //TX_GAIN_LIMIT_1 +775 0x0006 //TX_GAIN_LIMIT_2 +776 0x0007 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0010 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x05A0 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x003C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x065B //RX_PGA +11 0x7646 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0014 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4040 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4A5E //RX_FDEQ_GAIN_2 +42 0x6876 //RX_FDEQ_GAIN_3 +43 0x8298 //RX_FDEQ_GAIN_4 +44 0x8E86 //RX_FDEQ_GAIN_5 +45 0x8686 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x8890 //RX_FDEQ_GAIN_8 +48 0x979F //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x05A0 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x13E0 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x000A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x055F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4040 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4E62 //RX_FDEQ_GAIN_2 +42 0x6C7A //RX_FDEQ_GAIN_3 +43 0x868C //RX_FDEQ_GAIN_4 +44 0x827A //RX_FDEQ_GAIN_5 +45 0x7A7A //RX_FDEQ_GAIN_6 +46 0x7C7C //RX_FDEQ_GAIN_7 +47 0x7C84 //RX_FDEQ_GAIN_8 +48 0x8488 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x055F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4040 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4E62 //RX_FDEQ_GAIN_2 +42 0x6C7A //RX_FDEQ_GAIN_3 +43 0x868C //RX_FDEQ_GAIN_4 +44 0x827A //RX_FDEQ_GAIN_5 +45 0x7A7A //RX_FDEQ_GAIN_6 +46 0x7C7C //RX_FDEQ_GAIN_7 +47 0x7C84 //RX_FDEQ_GAIN_8 +48 0x8488 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0011 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x055F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4040 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4E62 //RX_FDEQ_GAIN_2 +42 0x6C7A //RX_FDEQ_GAIN_3 +43 0x868C //RX_FDEQ_GAIN_4 +44 0x827A //RX_FDEQ_GAIN_5 +45 0x7A7A //RX_FDEQ_GAIN_6 +46 0x7C7C //RX_FDEQ_GAIN_7 +47 0x7C84 //RX_FDEQ_GAIN_8 +48 0x8488 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x055F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4040 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4E62 //RX_FDEQ_GAIN_2 +42 0x6C7A //RX_FDEQ_GAIN_3 +43 0x868C //RX_FDEQ_GAIN_4 +44 0x827A //RX_FDEQ_GAIN_5 +45 0x7A7A //RX_FDEQ_GAIN_6 +46 0x7C7C //RX_FDEQ_GAIN_7 +47 0x7C84 //RX_FDEQ_GAIN_8 +48 0x8488 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0030 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x055F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4040 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4E62 //RX_FDEQ_GAIN_2 +42 0x6C7A //RX_FDEQ_GAIN_3 +43 0x868C //RX_FDEQ_GAIN_4 +44 0x827A //RX_FDEQ_GAIN_5 +45 0x7A7A //RX_FDEQ_GAIN_6 +46 0x7C7C //RX_FDEQ_GAIN_7 +47 0x7C84 //RX_FDEQ_GAIN_8 +48 0x8488 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x004C //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x055F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4040 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4E62 //RX_FDEQ_GAIN_2 +42 0x6C7A //RX_FDEQ_GAIN_3 +43 0x868C //RX_FDEQ_GAIN_4 +44 0x827A //RX_FDEQ_GAIN_5 +45 0x7A7A //RX_FDEQ_GAIN_6 +46 0x7C7C //RX_FDEQ_GAIN_7 +47 0x7C84 //RX_FDEQ_GAIN_8 +48 0x8488 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x007B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x055F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4040 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4E62 //RX_FDEQ_GAIN_2 +42 0x6C7A //RX_FDEQ_GAIN_3 +43 0x868C //RX_FDEQ_GAIN_4 +44 0x827A //RX_FDEQ_GAIN_5 +45 0x7A7A //RX_FDEQ_GAIN_6 +46 0x7C7C //RX_FDEQ_GAIN_7 +47 0x7C84 //RX_FDEQ_GAIN_8 +48 0x8488 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET-TMOBILE_US-WB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0036 //TX_PATCH_REG +3 0x6F7E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0001 //TX_SAMPLINGFREQ_SIG +7 0x0001 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0004 //TX_MAINMIC_BLKFACTOR +114 0x0004 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0800 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6000 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0100 //TX_MIN_EQ_RE_EST_1 +154 0x0100 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x0200 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x0400 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x0400 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0000 //TX_RATIO_DT_L_TH_LOW +224 0x0000 //TX_RATIO_DT_H_TH_LOW +225 0x0000 //TX_RATIO_DT_L_TH_HIGH +226 0x0000 //TX_RATIO_DT_H_TH_HIGH +227 0x0000 //TX_RATIO_DT_L0_TH +228 0x2000 //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x0000 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFB00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x01A0 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x5000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x0000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x2000 //TX_MAINREFRTOH_TH_H +275 0x1400 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x4000 //TX_B_POST_FLT_1 +281 0x0018 //TX_NS_LVL_CTRL_0 +282 0x001C //TX_NS_LVL_CTRL_1 +283 0x0019 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0019 //TX_NS_LVL_CTRL_4 +286 0x001A //TX_NS_LVL_CTRL_5 +287 0x001E //TX_NS_LVL_CTRL_6 +288 0x001C //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0018 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0012 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 +294 0x0018 //TX_MIN_GAIN_S_5 +295 0x0018 //TX_MIN_GAIN_S_6 +296 0x0018 //TX_MIN_GAIN_S_7 +297 0x5000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x5000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x4000 //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x7000 //TX_A_POST_FILT_S_0 +315 0x7000 //TX_A_POST_FILT_S_1 +316 0x3000 //TX_A_POST_FILT_S_2 +317 0x3000 //TX_A_POST_FILT_S_3 +318 0x2000 //TX_A_POST_FILT_S_4 +319 0x7000 //TX_A_POST_FILT_S_5 +320 0x7000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x4000 //TX_B_POST_FILT_1 +324 0x5000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 +328 0x4000 //TX_B_POST_FILT_6 +329 0x4000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x6000 //TX_B_LESSCUT_RTO_S_1 +332 0x6000 //TX_B_LESSCUT_RTO_S_2 +333 0x6000 //TX_B_LESSCUT_RTO_S_3 +334 0x6000 //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C29 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0600 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x1B58 //TX_NOISE_TH_0_2 +369 0x2134 //TX_NOISE_TH_0_3 +370 0x0139 //TX_NOISE_TH_1 +371 0x0479 //TX_NOISE_TH_2 +372 0x2328 //TX_NOISE_TH_3 +373 0x4422 //TX_NOISE_TH_4 +374 0x5586 //TX_NOISE_TH_5 +375 0x4425 //TX_NOISE_TH_5_2 +376 0x0032 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x21E8 //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x00CE //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4900 //TX_MIN_G_CTRL_SSNS +409 0x1000 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x1C00 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x05A8 //TX_SB_RHO_MEAN2_TH +441 0x0384 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0280 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x0200 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0030 //TX_FDEQ_SUBNUM +567 0x5C54 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4C4C //TX_FDEQ_GAIN_2 +570 0x474A //TX_FDEQ_GAIN_3 +571 0x473F //TX_FDEQ_GAIN_4 +572 0x424C //TX_FDEQ_GAIN_5 +573 0x545C //TX_FDEQ_GAIN_6 +574 0x5C54 //TX_FDEQ_GAIN_7 +575 0x4040 //TX_FDEQ_GAIN_8 +576 0x4048 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0104 //TX_FDEQ_BIN_1 +593 0x0502 //TX_FDEQ_BIN_2 +594 0x0202 //TX_FDEQ_BIN_3 +595 0x0504 //TX_FDEQ_BIN_4 +596 0x0708 //TX_FDEQ_BIN_5 +597 0x0808 //TX_FDEQ_BIN_6 +598 0x050E //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0F0F //TX_FDEQ_BIN_9 +601 0x0F0F //TX_FDEQ_BIN_10 +602 0x0F28 //TX_FDEQ_BIN_11 +603 0x0611 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4846 //TX_PREEQ_GAIN_MIC0_7 +625 0x4544 //TX_PREEQ_GAIN_MIC0_8 +626 0x4241 //TX_PREEQ_GAIN_MIC0_9 +627 0x403E //TX_PREEQ_GAIN_MIC0_10 +628 0x3D3C //TX_PREEQ_GAIN_MIC0_11 +629 0x3C3C //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x7008 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0F10 //TX_PREEQ_BIN_MIC0_9 +651 0x1011 //TX_PREEQ_BIN_MIC0_10 +652 0x1112 //TX_PREEQ_BIN_MIC0_11 +653 0x1208 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x484A //TX_PREEQ_GAIN_MIC1_8 +675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 +676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 +677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 +678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 +679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x0F10 //TX_PREEQ_BIN_MIC1_10 +701 0x1011 //TX_PREEQ_BIN_MIC1_11 +702 0x1112 //TX_PREEQ_BIN_MIC1_12 +703 0x120B //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0000 //TX_GAIN_LIMIT_1 +775 0x0006 //TX_GAIN_LIMIT_2 +776 0x0005 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0002 //TX_TDDRC_THRD_0 +855 0x0003 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x05A0 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x199A //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x2000 //TX_B_LESSCUT_RTO_MASK +877 0x1C00 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x003C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0001 //RX_SAMPLINGFREQ_SIG +3 0x0001 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x065B //RX_PGA +11 0x7B02 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0014 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x1000 //RX_LMT_THRD +37 0x7FDF //RX_LMT_ALPHA +38 0x001C //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x485C //RX_FDEQ_GAIN_2 +42 0x6873 //RX_FDEQ_GAIN_3 +43 0x7F96 //RX_FDEQ_GAIN_4 +44 0x8C86 //RX_FDEQ_GAIN_5 +45 0x8686 //RX_FDEQ_GAIN_6 +46 0x908C //RX_FDEQ_GAIN_7 +47 0x9098 //RX_FDEQ_GAIN_8 +48 0x9EB4 //RX_FDEQ_GAIN_9 +49 0x9C87 //RX_FDEQ_GAIN_10 +50 0x6F7F //RX_FDEQ_GAIN_11 +51 0x6568 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0407 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x13E0 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x000C //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0438 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4844 //RX_FDEQ_GAIN_0 +40 0x4444 //RX_FDEQ_GAIN_1 +41 0x485C //RX_FDEQ_GAIN_2 +42 0x6873 //RX_FDEQ_GAIN_3 +43 0x7F8E //RX_FDEQ_GAIN_4 +44 0x847E //RX_FDEQ_GAIN_5 +45 0x7E7E //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x888C //RX_FDEQ_GAIN_8 +48 0x8C9C //RX_FDEQ_GAIN_9 +49 0x9898 //RX_FDEQ_GAIN_10 +50 0x7C88 //RX_FDEQ_GAIN_11 +51 0x6C70 //RX_FDEQ_GAIN_12 +52 0x6858 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000C //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0438 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4844 //RX_FDEQ_GAIN_0 +40 0x4444 //RX_FDEQ_GAIN_1 +41 0x485C //RX_FDEQ_GAIN_2 +42 0x6873 //RX_FDEQ_GAIN_3 +43 0x7F8E //RX_FDEQ_GAIN_4 +44 0x847E //RX_FDEQ_GAIN_5 +45 0x7E7E //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x888C //RX_FDEQ_GAIN_8 +48 0x8C9C //RX_FDEQ_GAIN_9 +49 0x9898 //RX_FDEQ_GAIN_10 +50 0x7C88 //RX_FDEQ_GAIN_11 +51 0x6C70 //RX_FDEQ_GAIN_12 +52 0x6858 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0015 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0438 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4844 //RX_FDEQ_GAIN_0 +40 0x4444 //RX_FDEQ_GAIN_1 +41 0x485C //RX_FDEQ_GAIN_2 +42 0x6873 //RX_FDEQ_GAIN_3 +43 0x7F8E //RX_FDEQ_GAIN_4 +44 0x847E //RX_FDEQ_GAIN_5 +45 0x7E7E //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x888C //RX_FDEQ_GAIN_8 +48 0x8C9C //RX_FDEQ_GAIN_9 +49 0x9898 //RX_FDEQ_GAIN_10 +50 0x7C88 //RX_FDEQ_GAIN_11 +51 0x6C70 //RX_FDEQ_GAIN_12 +52 0x6858 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0021 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0438 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4844 //RX_FDEQ_GAIN_0 +40 0x4444 //RX_FDEQ_GAIN_1 +41 0x485C //RX_FDEQ_GAIN_2 +42 0x6873 //RX_FDEQ_GAIN_3 +43 0x7F8E //RX_FDEQ_GAIN_4 +44 0x847E //RX_FDEQ_GAIN_5 +45 0x7E7E //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x888C //RX_FDEQ_GAIN_8 +48 0x8C9C //RX_FDEQ_GAIN_9 +49 0x9898 //RX_FDEQ_GAIN_10 +50 0x7C88 //RX_FDEQ_GAIN_11 +51 0x6C70 //RX_FDEQ_GAIN_12 +52 0x6858 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0035 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0438 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4844 //RX_FDEQ_GAIN_0 +40 0x4444 //RX_FDEQ_GAIN_1 +41 0x485C //RX_FDEQ_GAIN_2 +42 0x6873 //RX_FDEQ_GAIN_3 +43 0x7F8E //RX_FDEQ_GAIN_4 +44 0x847E //RX_FDEQ_GAIN_5 +45 0x7E7E //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x888C //RX_FDEQ_GAIN_8 +48 0x8C9C //RX_FDEQ_GAIN_9 +49 0x9898 //RX_FDEQ_GAIN_10 +50 0x7C88 //RX_FDEQ_GAIN_11 +51 0x6C70 //RX_FDEQ_GAIN_12 +52 0x6858 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0058 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0438 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4844 //RX_FDEQ_GAIN_0 +40 0x4444 //RX_FDEQ_GAIN_1 +41 0x485C //RX_FDEQ_GAIN_2 +42 0x6873 //RX_FDEQ_GAIN_3 +43 0x7F8E //RX_FDEQ_GAIN_4 +44 0x847E //RX_FDEQ_GAIN_5 +45 0x7E7E //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x888C //RX_FDEQ_GAIN_8 +48 0x8C9C //RX_FDEQ_GAIN_9 +49 0x9898 //RX_FDEQ_GAIN_10 +50 0x7C88 //RX_FDEQ_GAIN_11 +51 0x6C70 //RX_FDEQ_GAIN_12 +52 0x6858 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x008E //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0438 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4844 //RX_FDEQ_GAIN_0 +40 0x4444 //RX_FDEQ_GAIN_1 +41 0x485C //RX_FDEQ_GAIN_2 +42 0x6873 //RX_FDEQ_GAIN_3 +43 0x7F8E //RX_FDEQ_GAIN_4 +44 0x847E //RX_FDEQ_GAIN_5 +45 0x7E7E //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x888C //RX_FDEQ_GAIN_8 +48 0x8C9C //RX_FDEQ_GAIN_9 +49 0x9898 //RX_FDEQ_GAIN_10 +50 0x7C88 //RX_FDEQ_GAIN_11 +51 0x6C70 //RX_FDEQ_GAIN_12 +52 0x6858 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET-TMOBILE_US-SWB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0026 //TX_PATCH_REG +3 0x6F7E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7D83 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7900 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0400 //TX_MIN_EQ_RE_EST_0 +153 0x0400 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x1000 //TX_MIN_EQ_RE_EST_4 +157 0x1000 //TX_MIN_EQ_RE_EST_5 +158 0x1000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x1800 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0177 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0C00 //TX_RATIO_DT_L_TH_LOW +224 0x2000 //TX_RATIO_DT_H_TH_LOW +225 0x1800 //TX_RATIO_DT_L_TH_HIGH +226 0x3000 //TX_RATIO_DT_H_TH_HIGH +227 0x0A00 //TX_RATIO_DT_L0_TH +228 0x7000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x0600 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x0016 //TX_NS_LVL_CTRL_1 +283 0x002C //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0018 //TX_NS_LVL_CTRL_4 +286 0x0016 //TX_NS_LVL_CTRL_5 +287 0x0012 //TX_NS_LVL_CTRL_6 +288 0x0017 //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0012 //TX_MIN_GAIN_S_1 +291 0x000D //TX_MIN_GAIN_S_2 +292 0x0012 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0012 //TX_MIN_GAIN_S_5 +295 0x0012 //TX_MIN_GAIN_S_6 +296 0x0012 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x6000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x6000 //TX_SNRI_SUP_5 +306 0x6000 //TX_SNRI_SUP_6 +307 0x6000 //TX_SNRI_SUP_7 +308 0x6000 //TX_THR_LFNS +309 0x0017 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x3000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x5000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x6000 //TX_B_POST_FILT_6 +329 0x3000 //TX_B_POST_FILT_7 +330 0x1000 //TX_B_LESSCUT_RTO_S_0 +331 0x6000 //TX_B_LESSCUT_RTO_S_1 +332 0x6000 //TX_B_LESSCUT_RTO_S_2 +333 0x6000 //TX_B_LESSCUT_RTO_S_3 +334 0x6000 //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x07D0 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x00C6 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x2260 //TX_NOISE_TH_3 +373 0x7080 //TX_NOISE_TH_4 +374 0x57E4 //TX_NOISE_TH_5 +375 0x4BD6 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x1194 //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x0200 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x2000 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x051E //TX_SB_RHO_MEAN2_TH +441 0x02F0 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0300 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x5C54 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4C4C //TX_FDEQ_GAIN_2 +570 0x474A //TX_FDEQ_GAIN_3 +571 0x423C //TX_FDEQ_GAIN_4 +572 0x4048 //TX_FDEQ_GAIN_5 +573 0x4858 //TX_FDEQ_GAIN_6 +574 0x5848 //TX_FDEQ_GAIN_7 +575 0x4248 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4856 //TX_FDEQ_GAIN_10 +578 0x5656 //TX_FDEQ_GAIN_11 +579 0x4850 //TX_FDEQ_GAIN_12 +580 0x5850 //TX_FDEQ_GAIN_13 +581 0x585C //TX_FDEQ_GAIN_14 +582 0x707C //TX_FDEQ_GAIN_15 +583 0x7070 //TX_FDEQ_GAIN_16 +584 0x7048 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0104 //TX_FDEQ_BIN_1 +593 0x0502 //TX_FDEQ_BIN_2 +594 0x0202 //TX_FDEQ_BIN_3 +595 0x0504 //TX_FDEQ_BIN_4 +596 0x0708 //TX_FDEQ_BIN_5 +597 0x0808 //TX_FDEQ_BIN_6 +598 0x050E //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0F0F //TX_FDEQ_BIN_9 +601 0x0E0D //TX_FDEQ_BIN_10 +602 0x0F28 //TX_FDEQ_BIN_11 +603 0x111B //TX_FDEQ_BIN_12 +604 0x291E //TX_FDEQ_BIN_13 +605 0x1E10 //TX_FDEQ_BIN_14 +606 0x186F //TX_FDEQ_BIN_15 +607 0x1021 //TX_FDEQ_BIN_16 +608 0x1000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4646 //TX_PREEQ_GAIN_MIC0_8 +626 0x4545 //TX_PREEQ_GAIN_MIC0_9 +627 0x4545 //TX_PREEQ_GAIN_MIC0_10 +628 0x4544 //TX_PREEQ_GAIN_MIC0_11 +629 0x4444 //TX_PREEQ_GAIN_MIC0_12 +630 0x4343 //TX_PREEQ_GAIN_MIC0_13 +631 0x4241 //TX_PREEQ_GAIN_MIC0_14 +632 0x3C3E //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1719 //TX_PREEQ_BIN_MIC0_11 +653 0x1B1E //TX_PREEQ_BIN_MIC0_12 +654 0x1E1E //TX_PREEQ_BIN_MIC0_13 +655 0x1E28 //TX_PREEQ_BIN_MIC0_14 +656 0x282C //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x484A //TX_PREEQ_GAIN_MIC1_8 +675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 +676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 +677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 +678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 +679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x0F10 //TX_PREEQ_BIN_MIC1_10 +701 0x1011 //TX_PREEQ_BIN_MIC1_11 +702 0x1112 //TX_PREEQ_BIN_MIC1_12 +703 0x120B //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0056 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0042 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0005 //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0002 //TX_TDDRC_THRD_0 +855 0x0003 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0550 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0xECCD //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x2000 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x003C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x065B //RX_PGA +11 0x7D83 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x5800 //RX_THR_PITCH_DET_0 +14 0x5000 //RX_THR_PITCH_DET_1 +15 0x4000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4048 //RX_FDEQ_GAIN_2 +42 0x5564 //RX_FDEQ_GAIN_3 +43 0x7386 //RX_FDEQ_GAIN_4 +44 0x898C //RX_FDEQ_GAIN_5 +45 0x8C8C //RX_FDEQ_GAIN_6 +46 0x9097 //RX_FDEQ_GAIN_7 +47 0x98A8 //RX_FDEQ_GAIN_8 +48 0xACB0 //RX_FDEQ_GAIN_9 +49 0xB091 //RX_FDEQ_GAIN_10 +50 0x8A7A //RX_FDEQ_GAIN_11 +51 0x6966 //RX_FDEQ_GAIN_12 +52 0x6444 //RX_FDEQ_GAIN_13 +53 0x6065 //RX_FDEQ_GAIN_14 +54 0x698A //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04E6 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x13E0 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x0032 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04E6 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4450 //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x7C86 //RX_FDEQ_GAIN_4 +44 0x7E84 //RX_FDEQ_GAIN_5 +45 0x8484 //RX_FDEQ_GAIN_6 +46 0x8A90 //RX_FDEQ_GAIN_7 +47 0x9094 //RX_FDEQ_GAIN_8 +48 0xA0A8 //RX_FDEQ_GAIN_9 +49 0xA8A0 //RX_FDEQ_GAIN_10 +50 0xB08B //RX_FDEQ_GAIN_11 +51 0x7066 //RX_FDEQ_GAIN_12 +52 0x6444 //RX_FDEQ_GAIN_13 +53 0x6470 //RX_FDEQ_GAIN_14 +54 0x8490 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04E6 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4450 //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x7C86 //RX_FDEQ_GAIN_4 +44 0x7E84 //RX_FDEQ_GAIN_5 +45 0x8484 //RX_FDEQ_GAIN_6 +46 0x8A90 //RX_FDEQ_GAIN_7 +47 0x9094 //RX_FDEQ_GAIN_8 +48 0xA0A8 //RX_FDEQ_GAIN_9 +49 0xA8A0 //RX_FDEQ_GAIN_10 +50 0xB08B //RX_FDEQ_GAIN_11 +51 0x7066 //RX_FDEQ_GAIN_12 +52 0x6444 //RX_FDEQ_GAIN_13 +53 0x6470 //RX_FDEQ_GAIN_14 +54 0x8490 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0013 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04E6 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4450 //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x7C86 //RX_FDEQ_GAIN_4 +44 0x7E84 //RX_FDEQ_GAIN_5 +45 0x8484 //RX_FDEQ_GAIN_6 +46 0x8A90 //RX_FDEQ_GAIN_7 +47 0x9094 //RX_FDEQ_GAIN_8 +48 0xA0A8 //RX_FDEQ_GAIN_9 +49 0xA8A0 //RX_FDEQ_GAIN_10 +50 0xB08B //RX_FDEQ_GAIN_11 +51 0x7066 //RX_FDEQ_GAIN_12 +52 0x6444 //RX_FDEQ_GAIN_13 +53 0x6470 //RX_FDEQ_GAIN_14 +54 0x8490 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001F //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04E6 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4450 //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x7C86 //RX_FDEQ_GAIN_4 +44 0x7E84 //RX_FDEQ_GAIN_5 +45 0x8484 //RX_FDEQ_GAIN_6 +46 0x8A90 //RX_FDEQ_GAIN_7 +47 0x9094 //RX_FDEQ_GAIN_8 +48 0xA0A8 //RX_FDEQ_GAIN_9 +49 0xA8A0 //RX_FDEQ_GAIN_10 +50 0xB08B //RX_FDEQ_GAIN_11 +51 0x7066 //RX_FDEQ_GAIN_12 +52 0x6444 //RX_FDEQ_GAIN_13 +53 0x6470 //RX_FDEQ_GAIN_14 +54 0x8490 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0032 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04E6 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4450 //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x7C86 //RX_FDEQ_GAIN_4 +44 0x7E84 //RX_FDEQ_GAIN_5 +45 0x8484 //RX_FDEQ_GAIN_6 +46 0x8A90 //RX_FDEQ_GAIN_7 +47 0x9094 //RX_FDEQ_GAIN_8 +48 0xA0A8 //RX_FDEQ_GAIN_9 +49 0xA8A0 //RX_FDEQ_GAIN_10 +50 0xB08B //RX_FDEQ_GAIN_11 +51 0x7066 //RX_FDEQ_GAIN_12 +52 0x6444 //RX_FDEQ_GAIN_13 +53 0x6470 //RX_FDEQ_GAIN_14 +54 0x8490 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0052 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04E6 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4450 //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x7C86 //RX_FDEQ_GAIN_4 +44 0x7E84 //RX_FDEQ_GAIN_5 +45 0x8484 //RX_FDEQ_GAIN_6 +46 0x8A90 //RX_FDEQ_GAIN_7 +47 0x9094 //RX_FDEQ_GAIN_8 +48 0xA0A8 //RX_FDEQ_GAIN_9 +49 0xA8A0 //RX_FDEQ_GAIN_10 +50 0xB08B //RX_FDEQ_GAIN_11 +51 0x7066 //RX_FDEQ_GAIN_12 +52 0x6444 //RX_FDEQ_GAIN_13 +53 0x6470 //RX_FDEQ_GAIN_14 +54 0x8490 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0087 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04E6 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4450 //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x7C86 //RX_FDEQ_GAIN_4 +44 0x7E84 //RX_FDEQ_GAIN_5 +45 0x8484 //RX_FDEQ_GAIN_6 +46 0x8A90 //RX_FDEQ_GAIN_7 +47 0x9094 //RX_FDEQ_GAIN_8 +48 0xA0A8 //RX_FDEQ_GAIN_9 +49 0xA8A0 //RX_FDEQ_GAIN_10 +50 0xB08B //RX_FDEQ_GAIN_11 +51 0x7066 //RX_FDEQ_GAIN_12 +52 0x6444 //RX_FDEQ_GAIN_13 +53 0x6470 //RX_FDEQ_GAIN_14 +54 0x8490 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET-TMOBILE_US-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0026 //TX_PATCH_REG +3 0x6B7E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7900 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0400 //TX_MIN_EQ_RE_EST_0 +153 0x0400 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x1000 //TX_MIN_EQ_RE_EST_4 +157 0x1000 //TX_MIN_EQ_RE_EST_5 +158 0x1000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x1800 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0177 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0C00 //TX_RATIO_DT_L_TH_LOW +224 0x2000 //TX_RATIO_DT_H_TH_LOW +225 0x1800 //TX_RATIO_DT_L_TH_HIGH +226 0x3000 //TX_RATIO_DT_H_TH_HIGH +227 0x0A00 //TX_RATIO_DT_L0_TH +228 0x7000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x0600 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x2000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x0016 //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0018 //TX_NS_LVL_CTRL_4 +286 0x0016 //TX_NS_LVL_CTRL_5 +287 0x0012 //TX_NS_LVL_CTRL_6 +288 0x0017 //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0012 //TX_MIN_GAIN_S_1 +291 0x0007 //TX_MIN_GAIN_S_2 +292 0x0012 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0012 //TX_MIN_GAIN_S_5 +295 0x0012 //TX_MIN_GAIN_S_6 +296 0x0012 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x6000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x6000 //TX_SNRI_SUP_5 +306 0x6000 //TX_SNRI_SUP_6 +307 0x6000 //TX_SNRI_SUP_7 +308 0x6000 //TX_THR_LFNS +309 0x0017 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x3000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x5000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x6000 //TX_B_POST_FILT_6 +329 0x3000 //TX_B_POST_FILT_7 +330 0x1000 //TX_B_LESSCUT_RTO_S_0 +331 0x6000 //TX_B_LESSCUT_RTO_S_1 +332 0x6000 //TX_B_LESSCUT_RTO_S_2 +333 0x6000 //TX_B_LESSCUT_RTO_S_3 +334 0x6000 //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x07D0 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x1B58 //TX_NOISE_TH_0_2 +369 0x2134 //TX_NOISE_TH_0_3 +370 0x00C6 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x2EE0 //TX_NOISE_TH_3 +373 0x47E0 //TX_NOISE_TH_4 +374 0x57E4 //TX_NOISE_TH_5 +375 0x4BD6 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x39DF //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x0200 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x2000 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x051E //TX_SB_RHO_MEAN2_TH +441 0x051E //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0300 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0030 //TX_FDEQ_SUBNUM +567 0x4E4A //TX_FDEQ_GAIN_0 +568 0x4C54 //TX_FDEQ_GAIN_1 +569 0x5C50 //TX_FDEQ_GAIN_2 +570 0x5556 //TX_FDEQ_GAIN_3 +571 0x5757 //TX_FDEQ_GAIN_4 +572 0x5658 //TX_FDEQ_GAIN_5 +573 0x585C //TX_FDEQ_GAIN_6 +574 0x5858 //TX_FDEQ_GAIN_7 +575 0x5E66 //TX_FDEQ_GAIN_8 +576 0x5894 //TX_FDEQ_GAIN_9 +577 0x9498 //TX_FDEQ_GAIN_10 +578 0xB8B8 //TX_FDEQ_GAIN_11 +579 0x7C7C //TX_FDEQ_GAIN_12 +580 0x7C7C //TX_FDEQ_GAIN_13 +581 0x7070 //TX_FDEQ_GAIN_14 +582 0x707C //TX_FDEQ_GAIN_15 +583 0x7C7C //TX_FDEQ_GAIN_16 +584 0x7C7C //TX_FDEQ_GAIN_17 +585 0x7C90 //TX_FDEQ_GAIN_18 +586 0x9048 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0F03 //TX_FDEQ_BIN_0 +592 0x0909 //TX_FDEQ_BIN_1 +593 0x080F //TX_FDEQ_BIN_2 +594 0x0609 //TX_FDEQ_BIN_3 +595 0x0F03 //TX_FDEQ_BIN_4 +596 0x1402 //TX_FDEQ_BIN_5 +597 0x0E13 //TX_FDEQ_BIN_6 +598 0x110F //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x0E0F //TX_FDEQ_BIN_9 +601 0x080D //TX_FDEQ_BIN_10 +602 0x0F0F //TX_FDEQ_BIN_11 +603 0x0F0F //TX_FDEQ_BIN_12 +604 0x0A0F //TX_FDEQ_BIN_13 +605 0x0809 //TX_FDEQ_BIN_14 +606 0x0A0B //TX_FDEQ_BIN_15 +607 0x0C0D //TX_FDEQ_BIN_16 +608 0x0E0F //TX_FDEQ_BIN_17 +609 0x1013 //TX_FDEQ_BIN_18 +610 0x0A00 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4846 //TX_PREEQ_GAIN_MIC0_6 +624 0x4645 //TX_PREEQ_GAIN_MIC0_7 +625 0x4545 //TX_PREEQ_GAIN_MIC0_8 +626 0x4545 //TX_PREEQ_GAIN_MIC0_9 +627 0x4444 //TX_PREEQ_GAIN_MIC0_10 +628 0x4443 //TX_PREEQ_GAIN_MIC0_11 +629 0x4241 //TX_PREEQ_GAIN_MIC0_12 +630 0x3C3E //TX_PREEQ_GAIN_MIC0_13 +631 0x3E40 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x4000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4849 //TX_PREEQ_GAIN_MIC1_6 +673 0x4A4B //TX_PREEQ_GAIN_MIC1_7 +674 0x4C4B //TX_PREEQ_GAIN_MIC1_8 +675 0x4A48 //TX_PREEQ_GAIN_MIC1_9 +676 0x4B4C //TX_PREEQ_GAIN_MIC1_10 +677 0x4C4B //TX_PREEQ_GAIN_MIC1_11 +678 0x4838 //TX_PREEQ_GAIN_MIC1_12 +679 0x3858 //TX_PREEQ_GAIN_MIC1_13 +680 0x7060 //TX_PREEQ_GAIN_MIC1_14 +681 0x9870 //TX_PREEQ_GAIN_MIC1_15 +682 0x5848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x4000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0202 //TX_PREEQ_BIN_MIC2_0 +740 0x0203 //TX_PREEQ_BIN_MIC2_1 +741 0x0303 //TX_PREEQ_BIN_MIC2_2 +742 0x0304 //TX_PREEQ_BIN_MIC2_3 +743 0x0405 //TX_PREEQ_BIN_MIC2_4 +744 0x0506 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0809 //TX_PREEQ_BIN_MIC2_7 +747 0x0A0A //TX_PREEQ_BIN_MIC2_8 +748 0x0C10 //TX_PREEQ_BIN_MIC2_9 +749 0x1013 //TX_PREEQ_BIN_MIC2_10 +750 0x1414 //TX_PREEQ_BIN_MIC2_11 +751 0x261E //TX_PREEQ_BIN_MIC2_12 +752 0x1E14 //TX_PREEQ_BIN_MIC2_13 +753 0x1414 //TX_PREEQ_BIN_MIC2_14 +754 0x2814 //TX_PREEQ_BIN_MIC2_15 +755 0x4000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0550 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0xECCD //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x2000 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x002C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x065B //RX_PGA +11 0x7E56 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x5800 //RX_THR_PITCH_DET_0 +14 0x5000 //RX_THR_PITCH_DET_1 +15 0x4000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8689 //RX_FDEQ_GAIN_3 +43 0x908F //RX_FDEQ_GAIN_4 +44 0x9495 //RX_FDEQ_GAIN_5 +45 0x989D //RX_FDEQ_GAIN_6 +46 0x9DA6 //RX_FDEQ_GAIN_7 +47 0xA895 //RX_FDEQ_GAIN_8 +48 0x8A8A //RX_FDEQ_GAIN_9 +49 0x8E78 //RX_FDEQ_GAIN_10 +50 0x7070 //RX_FDEQ_GAIN_11 +51 0x7680 //RX_FDEQ_GAIN_12 +52 0x787C //RX_FDEQ_GAIN_13 +53 0x8890 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x1964 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x000D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4044 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8090 //RX_FDEQ_GAIN_3 +43 0x8C8C //RX_FDEQ_GAIN_4 +44 0x9490 //RX_FDEQ_GAIN_5 +45 0x989C //RX_FDEQ_GAIN_6 +46 0x98A4 //RX_FDEQ_GAIN_7 +47 0xC0A8 //RX_FDEQ_GAIN_8 +48 0x9C9C //RX_FDEQ_GAIN_9 +49 0x9C74 //RX_FDEQ_GAIN_10 +50 0x6C6C //RX_FDEQ_GAIN_11 +51 0x7490 //RX_FDEQ_GAIN_12 +52 0x9090 //RX_FDEQ_GAIN_13 +53 0x94A0 //RX_FDEQ_GAIN_14 +54 0xACBC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4044 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8090 //RX_FDEQ_GAIN_3 +43 0x8C8C //RX_FDEQ_GAIN_4 +44 0x9490 //RX_FDEQ_GAIN_5 +45 0x989C //RX_FDEQ_GAIN_6 +46 0x98A4 //RX_FDEQ_GAIN_7 +47 0xC0A8 //RX_FDEQ_GAIN_8 +48 0x9C9C //RX_FDEQ_GAIN_9 +49 0x9C74 //RX_FDEQ_GAIN_10 +50 0x6C6C //RX_FDEQ_GAIN_11 +51 0x7490 //RX_FDEQ_GAIN_12 +52 0x9090 //RX_FDEQ_GAIN_13 +53 0x94A0 //RX_FDEQ_GAIN_14 +54 0xACBC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0016 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4044 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8090 //RX_FDEQ_GAIN_3 +43 0x8C8C //RX_FDEQ_GAIN_4 +44 0x9490 //RX_FDEQ_GAIN_5 +45 0x989C //RX_FDEQ_GAIN_6 +46 0x98A4 //RX_FDEQ_GAIN_7 +47 0xC0A8 //RX_FDEQ_GAIN_8 +48 0x9C9C //RX_FDEQ_GAIN_9 +49 0x9C74 //RX_FDEQ_GAIN_10 +50 0x6C6C //RX_FDEQ_GAIN_11 +51 0x7490 //RX_FDEQ_GAIN_12 +52 0x9090 //RX_FDEQ_GAIN_13 +53 0x94A0 //RX_FDEQ_GAIN_14 +54 0xACBC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0026 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4044 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8090 //RX_FDEQ_GAIN_3 +43 0x8C8C //RX_FDEQ_GAIN_4 +44 0x9490 //RX_FDEQ_GAIN_5 +45 0x989C //RX_FDEQ_GAIN_6 +46 0x98A4 //RX_FDEQ_GAIN_7 +47 0xC0A8 //RX_FDEQ_GAIN_8 +48 0x9C9C //RX_FDEQ_GAIN_9 +49 0x9C74 //RX_FDEQ_GAIN_10 +50 0x6C6C //RX_FDEQ_GAIN_11 +51 0x7490 //RX_FDEQ_GAIN_12 +52 0x9090 //RX_FDEQ_GAIN_13 +53 0x94A0 //RX_FDEQ_GAIN_14 +54 0xACBC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x003D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4044 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8090 //RX_FDEQ_GAIN_3 +43 0x8C8C //RX_FDEQ_GAIN_4 +44 0x9490 //RX_FDEQ_GAIN_5 +45 0x989C //RX_FDEQ_GAIN_6 +46 0x98A4 //RX_FDEQ_GAIN_7 +47 0xC0A8 //RX_FDEQ_GAIN_8 +48 0x9C9C //RX_FDEQ_GAIN_9 +49 0x9C74 //RX_FDEQ_GAIN_10 +50 0x6C6C //RX_FDEQ_GAIN_11 +51 0x7490 //RX_FDEQ_GAIN_12 +52 0x9090 //RX_FDEQ_GAIN_13 +53 0x94A0 //RX_FDEQ_GAIN_14 +54 0xACBC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0060 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4044 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8090 //RX_FDEQ_GAIN_3 +43 0x8C8C //RX_FDEQ_GAIN_4 +44 0x9490 //RX_FDEQ_GAIN_5 +45 0x989C //RX_FDEQ_GAIN_6 +46 0x98A4 //RX_FDEQ_GAIN_7 +47 0xC0A8 //RX_FDEQ_GAIN_8 +48 0x9C9C //RX_FDEQ_GAIN_9 +49 0x9C74 //RX_FDEQ_GAIN_10 +50 0x6C6C //RX_FDEQ_GAIN_11 +51 0x7490 //RX_FDEQ_GAIN_12 +52 0x9090 //RX_FDEQ_GAIN_13 +53 0x94A0 //RX_FDEQ_GAIN_14 +54 0xACBC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0099 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0275 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4044 //RX_FDEQ_GAIN_0 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x6478 //RX_FDEQ_GAIN_2 +42 0x8090 //RX_FDEQ_GAIN_3 +43 0x8C8C //RX_FDEQ_GAIN_4 +44 0x9490 //RX_FDEQ_GAIN_5 +45 0x989C //RX_FDEQ_GAIN_6 +46 0x98A4 //RX_FDEQ_GAIN_7 +47 0xC0A8 //RX_FDEQ_GAIN_8 +48 0x9C9C //RX_FDEQ_GAIN_9 +49 0x9C74 //RX_FDEQ_GAIN_10 +50 0x6C6C //RX_FDEQ_GAIN_11 +51 0x7490 //RX_FDEQ_GAIN_12 +52 0x9090 //RX_FDEQ_GAIN_13 +53 0x94A0 //RX_FDEQ_GAIN_14 +54 0xACBC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-NB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0036 //TX_PATCH_REG +3 0x6F7E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7646 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0800 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6000 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0100 //TX_MIN_EQ_RE_EST_1 +154 0x0100 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x0200 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x0400 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x0400 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7B00 //TX_DTD_THR1_0 +198 0x7B00 //TX_DTD_THR1_1 +199 0x7B00 //TX_DTD_THR1_2 +200 0x7B00 //TX_DTD_THR1_3 +201 0x7B00 //TX_DTD_THR1_4 +202 0x7B00 //TX_DTD_THR1_5 +203 0x7B00 //TX_DTD_THR1_6 +204 0x1000 //TX_DTD_THR2_0 +205 0x1000 //TX_DTD_THR2_1 +206 0x1000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0FA0 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0000 //TX_RATIO_DT_L_TH_LOW +224 0x0000 //TX_RATIO_DT_H_TH_LOW +225 0x0000 //TX_RATIO_DT_L_TH_HIGH +226 0x0000 //TX_RATIO_DT_H_TH_HIGH +227 0x0000 //TX_RATIO_DT_L0_TH +228 0x2000 //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x0000 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xF800 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF900 //TX_THR_SN_EST_3 +246 0xF900 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x01A0 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x01A0 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x3000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x3000 //TX_LAMBDA_NN_EST_4 +263 0x3000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x0000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x3000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x3000 //TX_MAINREFRTOH_TH_H +275 0x1000 //TX_MAINREFRTOH_TH_L +276 0x3000 //TX_MAINREFRTO_TH_H +277 0x1000 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x4000 //TX_B_POST_FLT_0 +280 0x4000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x001B //TX_NS_LVL_CTRL_1 +283 0x0019 //TX_NS_LVL_CTRL_2 +284 0x0017 //TX_NS_LVL_CTRL_3 +285 0x0017 //TX_NS_LVL_CTRL_4 +286 0x0019 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 +288 0x0010 //TX_NS_LVL_CTRL_7 +289 0x0010 //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x0014 //TX_MIN_GAIN_S_6 +296 0x0014 //TX_MIN_GAIN_S_7 +297 0x5000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x4000 //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x3000 //TX_SNRI_SUP_7 +308 0x3000 //TX_THR_LFNS +309 0x001A //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x2000 //TX_A_POST_FILT_S_0 +315 0x7000 //TX_A_POST_FILT_S_1 +316 0x6000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x2000 //TX_A_POST_FILT_S_4 +319 0x6000 //TX_A_POST_FILT_S_5 +320 0x2000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x4000 //TX_B_POST_FILT_0 +323 0x4000 //TX_B_POST_FILT_1 +324 0x7FFF //TX_B_POST_FILT_2 +325 0x5000 //TX_B_POST_FILT_3 +326 0x7FFF //TX_B_POST_FILT_4 +327 0x7FFF //TX_B_POST_FILT_5 +328 0x4000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7200 //TX_LAMBDA_PFILT_S_2 +342 0x7900 //TX_LAMBDA_PFILT_S_3 +343 0x7400 //TX_LAMBDA_PFILT_S_4 +344 0x7200 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x0C80 //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0004 //TX_NOISE_TH_0 +368 0x1B58 //TX_NOISE_TH_0_2 +369 0x2134 //TX_NOISE_TH_0_3 +370 0x0320 //TX_NOISE_TH_1 +371 0x022C //TX_NOISE_TH_2 +372 0x2710 //TX_NOISE_TH_3 +373 0x6B6C //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x0000 //TX_NOISE_TH_5_4 +378 0x07D0 //TX_NOISE_TH_6 +379 0x0004 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x00CE //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x000A //TX_NS_ENOISE_MIC0_TH +406 0x0004 //TX_MINENOISE_MIC0_TH +407 0x0014 //TX_MINENOISE_MIC0_S_TH +408 0x4900 //TX_MIN_G_CTRL_SSNS +409 0x0400 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x4000 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0280 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0640 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x001A //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0080 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0018 //TX_FDEQ_SUBNUM +567 0x6C60 //TX_FDEQ_GAIN_0 +568 0x584F //TX_FDEQ_GAIN_1 +569 0x4F4E //TX_FDEQ_GAIN_2 +570 0x474A //TX_FDEQ_GAIN_3 +571 0x473F //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x423C //TX_FDEQ_GAIN_7 +575 0x2C28 //TX_FDEQ_GAIN_8 +576 0x343C //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0104 //TX_FDEQ_BIN_1 +593 0x0502 //TX_FDEQ_BIN_2 +594 0x0202 //TX_FDEQ_BIN_3 +595 0x0504 //TX_FDEQ_BIN_4 +596 0x0708 //TX_FDEQ_BIN_5 +597 0x0808 //TX_FDEQ_BIN_6 +598 0x050E //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0F09 //TX_FDEQ_BIN_9 +601 0x0000 //TX_FDEQ_BIN_10 +602 0x0000 //TX_FDEQ_BIN_11 +603 0x0000 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4846 //TX_PREEQ_GAIN_MIC0_7 +625 0x4544 //TX_PREEQ_GAIN_MIC0_8 +626 0x4241 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0014 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4C //TX_PREEQ_GAIN_MIC1_8 +675 0x4E50 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0203 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x0000 //TX_PREEQ_BIN_MIC1_10 +701 0x0000 //TX_PREEQ_BIN_MIC1_11 +702 0x0000 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0065 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0065 //TX_MIC_CALIBRATION_2 +768 0x0065 //TX_MIC_CALIBRATION_3 +769 0x0044 //TX_MIC_PWR_BIAS_0 +770 0x0044 //TX_MIC_PWR_BIAS_1 +771 0x0044 //TX_MIC_PWR_BIAS_2 +772 0x0044 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0000 //TX_GAIN_LIMIT_1 +775 0x0006 //TX_GAIN_LIMIT_2 +776 0x0007 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0010 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x05A0 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x000C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0014 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4A4C //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5A5C //RX_FDEQ_GAIN_7 +47 0x5C5C //RX_FDEQ_GAIN_8 +48 0x5C5C //RX_FDEQ_GAIN_9 +49 0x5C5C //RX_FDEQ_GAIN_10 +50 0x5C48 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0303 //RX_FDEQ_BIN_3 +67 0x0303 //RX_FDEQ_BIN_4 +68 0x0303 //RX_FDEQ_BIN_5 +69 0x0303 //RX_FDEQ_BIN_6 +70 0x0303 //RX_FDEQ_BIN_7 +71 0x0A0A //RX_FDEQ_BIN_8 +72 0x0A0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0360 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0360 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4A4C //RX_FDEQ_GAIN_5 +45 0x4E50 //RX_FDEQ_GAIN_6 +46 0x5254 //RX_FDEQ_GAIN_7 +47 0x544C //RX_FDEQ_GAIN_8 +48 0x4C4C //RX_FDEQ_GAIN_9 +49 0x4C4C //RX_FDEQ_GAIN_10 +50 0x4C48 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0303 //RX_FDEQ_BIN_3 +67 0x0303 //RX_FDEQ_BIN_4 +68 0x0303 //RX_FDEQ_BIN_5 +69 0x0303 //RX_FDEQ_BIN_6 +70 0x0303 //RX_FDEQ_BIN_7 +71 0x0A0A //RX_FDEQ_BIN_8 +72 0x0A0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0360 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4A4C //RX_FDEQ_GAIN_5 +45 0x4E50 //RX_FDEQ_GAIN_6 +46 0x5254 //RX_FDEQ_GAIN_7 +47 0x544C //RX_FDEQ_GAIN_8 +48 0x4C4C //RX_FDEQ_GAIN_9 +49 0x4C4C //RX_FDEQ_GAIN_10 +50 0x4C48 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0303 //RX_FDEQ_BIN_3 +67 0x0303 //RX_FDEQ_BIN_4 +68 0x0303 //RX_FDEQ_BIN_5 +69 0x0303 //RX_FDEQ_BIN_6 +70 0x0303 //RX_FDEQ_BIN_7 +71 0x0A0A //RX_FDEQ_BIN_8 +72 0x0A0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0360 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4A4C //RX_FDEQ_GAIN_5 +45 0x4E50 //RX_FDEQ_GAIN_6 +46 0x5254 //RX_FDEQ_GAIN_7 +47 0x544C //RX_FDEQ_GAIN_8 +48 0x4C4C //RX_FDEQ_GAIN_9 +49 0x4C4C //RX_FDEQ_GAIN_10 +50 0x4C48 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0303 //RX_FDEQ_BIN_3 +67 0x0303 //RX_FDEQ_BIN_4 +68 0x0303 //RX_FDEQ_BIN_5 +69 0x0303 //RX_FDEQ_BIN_6 +70 0x0303 //RX_FDEQ_BIN_7 +71 0x0A0A //RX_FDEQ_BIN_8 +72 0x0A0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0360 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4A4C //RX_FDEQ_GAIN_5 +45 0x4E50 //RX_FDEQ_GAIN_6 +46 0x5254 //RX_FDEQ_GAIN_7 +47 0x544C //RX_FDEQ_GAIN_8 +48 0x4C4C //RX_FDEQ_GAIN_9 +49 0x4C4C //RX_FDEQ_GAIN_10 +50 0x4C48 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0303 //RX_FDEQ_BIN_3 +67 0x0303 //RX_FDEQ_BIN_4 +68 0x0303 //RX_FDEQ_BIN_5 +69 0x0303 //RX_FDEQ_BIN_6 +70 0x0303 //RX_FDEQ_BIN_7 +71 0x0A0A //RX_FDEQ_BIN_8 +72 0x0A0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0360 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4A4C //RX_FDEQ_GAIN_5 +45 0x4E50 //RX_FDEQ_GAIN_6 +46 0x5254 //RX_FDEQ_GAIN_7 +47 0x544C //RX_FDEQ_GAIN_8 +48 0x4C4C //RX_FDEQ_GAIN_9 +49 0x4C4C //RX_FDEQ_GAIN_10 +50 0x4C48 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0303 //RX_FDEQ_BIN_3 +67 0x0303 //RX_FDEQ_BIN_4 +68 0x0303 //RX_FDEQ_BIN_5 +69 0x0303 //RX_FDEQ_BIN_6 +70 0x0303 //RX_FDEQ_BIN_7 +71 0x0A0A //RX_FDEQ_BIN_8 +72 0x0A0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0360 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4A4C //RX_FDEQ_GAIN_5 +45 0x4E50 //RX_FDEQ_GAIN_6 +46 0x5254 //RX_FDEQ_GAIN_7 +47 0x544C //RX_FDEQ_GAIN_8 +48 0x4C4C //RX_FDEQ_GAIN_9 +49 0x4C4C //RX_FDEQ_GAIN_10 +50 0x4C48 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0303 //RX_FDEQ_BIN_3 +67 0x0303 //RX_FDEQ_BIN_4 +68 0x0303 //RX_FDEQ_BIN_5 +69 0x0303 //RX_FDEQ_BIN_6 +70 0x0303 //RX_FDEQ_BIN_7 +71 0x0A0A //RX_FDEQ_BIN_8 +72 0x0A0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0360 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4A4C //RX_FDEQ_GAIN_5 +45 0x4E50 //RX_FDEQ_GAIN_6 +46 0x5254 //RX_FDEQ_GAIN_7 +47 0x544C //RX_FDEQ_GAIN_8 +48 0x4C4C //RX_FDEQ_GAIN_9 +49 0x4C4C //RX_FDEQ_GAIN_10 +50 0x4C48 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0303 //RX_FDEQ_BIN_3 +67 0x0303 //RX_FDEQ_BIN_4 +68 0x0303 //RX_FDEQ_BIN_5 +69 0x0303 //RX_FDEQ_BIN_6 +70 0x0303 //RX_FDEQ_BIN_7 +71 0x0A0A //RX_FDEQ_BIN_8 +72 0x0A0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-WB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0036 //TX_PATCH_REG +3 0x6F7E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0001 //TX_SAMPLINGFREQ_SIG +7 0x0001 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0004 //TX_MAINMIC_BLKFACTOR +114 0x0004 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0800 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6000 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0100 //TX_MIN_EQ_RE_EST_1 +154 0x0100 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x0200 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x0400 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x0400 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0000 //TX_RATIO_DT_L_TH_LOW +224 0x0000 //TX_RATIO_DT_H_TH_LOW +225 0x0000 //TX_RATIO_DT_L_TH_HIGH +226 0x0000 //TX_RATIO_DT_H_TH_HIGH +227 0x0000 //TX_RATIO_DT_L0_TH +228 0x2000 //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x0000 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFB00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x01A0 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x5000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x0000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x2000 //TX_MAINREFRTOH_TH_H +275 0x1400 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x4000 //TX_B_POST_FLT_1 +281 0x0018 //TX_NS_LVL_CTRL_0 +282 0x001C //TX_NS_LVL_CTRL_1 +283 0x0019 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0019 //TX_NS_LVL_CTRL_4 +286 0x001A //TX_NS_LVL_CTRL_5 +287 0x001E //TX_NS_LVL_CTRL_6 +288 0x001C //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0018 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0012 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 +294 0x0018 //TX_MIN_GAIN_S_5 +295 0x0018 //TX_MIN_GAIN_S_6 +296 0x0018 //TX_MIN_GAIN_S_7 +297 0x5000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x5000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x4000 //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x7000 //TX_A_POST_FILT_S_0 +315 0x7000 //TX_A_POST_FILT_S_1 +316 0x3000 //TX_A_POST_FILT_S_2 +317 0x3000 //TX_A_POST_FILT_S_3 +318 0x2000 //TX_A_POST_FILT_S_4 +319 0x7000 //TX_A_POST_FILT_S_5 +320 0x7000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x4000 //TX_B_POST_FILT_1 +324 0x5000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 +328 0x4000 //TX_B_POST_FILT_6 +329 0x4000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x6000 //TX_B_LESSCUT_RTO_S_1 +332 0x6000 //TX_B_LESSCUT_RTO_S_2 +333 0x6000 //TX_B_LESSCUT_RTO_S_3 +334 0x6000 //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C29 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0600 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x1B58 //TX_NOISE_TH_0_2 +369 0x2134 //TX_NOISE_TH_0_3 +370 0x0139 //TX_NOISE_TH_1 +371 0x0479 //TX_NOISE_TH_2 +372 0x2328 //TX_NOISE_TH_3 +373 0x4422 //TX_NOISE_TH_4 +374 0x5586 //TX_NOISE_TH_5 +375 0x4425 //TX_NOISE_TH_5_2 +376 0x0032 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x21E8 //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x00CE //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4900 //TX_MIN_G_CTRL_SSNS +409 0x1000 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x1C00 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x05A8 //TX_SB_RHO_MEAN2_TH +441 0x0384 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0280 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x0200 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0030 //TX_FDEQ_SUBNUM +567 0x5C54 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4C4C //TX_FDEQ_GAIN_2 +570 0x474A //TX_FDEQ_GAIN_3 +571 0x473F //TX_FDEQ_GAIN_4 +572 0x424C //TX_FDEQ_GAIN_5 +573 0x545C //TX_FDEQ_GAIN_6 +574 0x5C54 //TX_FDEQ_GAIN_7 +575 0x4040 //TX_FDEQ_GAIN_8 +576 0x4048 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0104 //TX_FDEQ_BIN_1 +593 0x0502 //TX_FDEQ_BIN_2 +594 0x0202 //TX_FDEQ_BIN_3 +595 0x0504 //TX_FDEQ_BIN_4 +596 0x0708 //TX_FDEQ_BIN_5 +597 0x0808 //TX_FDEQ_BIN_6 +598 0x050E //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0F0F //TX_FDEQ_BIN_9 +601 0x0F0F //TX_FDEQ_BIN_10 +602 0x0F28 //TX_FDEQ_BIN_11 +603 0x0611 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4846 //TX_PREEQ_GAIN_MIC0_7 +625 0x4544 //TX_PREEQ_GAIN_MIC0_8 +626 0x4241 //TX_PREEQ_GAIN_MIC0_9 +627 0x403E //TX_PREEQ_GAIN_MIC0_10 +628 0x3D3C //TX_PREEQ_GAIN_MIC0_11 +629 0x3C3C //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x7008 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0F10 //TX_PREEQ_BIN_MIC0_9 +651 0x1011 //TX_PREEQ_BIN_MIC0_10 +652 0x1112 //TX_PREEQ_BIN_MIC0_11 +653 0x1208 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x484A //TX_PREEQ_GAIN_MIC1_8 +675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 +676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 +677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 +678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 +679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x0F10 //TX_PREEQ_BIN_MIC1_10 +701 0x1011 //TX_PREEQ_BIN_MIC1_11 +702 0x1112 //TX_PREEQ_BIN_MIC1_12 +703 0x120B //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0000 //TX_GAIN_LIMIT_1 +775 0x0006 //TX_GAIN_LIMIT_2 +776 0x0005 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0002 //TX_TDDRC_THRD_0 +855 0x0003 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x05A0 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x199A //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x2000 //TX_B_LESSCUT_RTO_MASK +877 0x1C00 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x000C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0001 //RX_SAMPLINGFREQ_SIG +3 0x0001 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0014 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4A4C //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5A5C //RX_FDEQ_GAIN_7 +47 0x5C5C //RX_FDEQ_GAIN_8 +48 0x5C5C //RX_FDEQ_GAIN_9 +49 0x5C5C //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5C5C //RX_FDEQ_GAIN_12 +52 0x5C5C //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0505 //RX_FDEQ_BIN_3 +67 0x0505 //RX_FDEQ_BIN_4 +68 0x0505 //RX_FDEQ_BIN_5 +69 0x0505 //RX_FDEQ_BIN_6 +70 0x0505 //RX_FDEQ_BIN_7 +71 0x160C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0400 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0400 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4A4C //RX_FDEQ_GAIN_4 +44 0x4E50 //RX_FDEQ_GAIN_5 +45 0x5254 //RX_FDEQ_GAIN_6 +46 0x5658 //RX_FDEQ_GAIN_7 +47 0x5858 //RX_FDEQ_GAIN_8 +48 0x5858 //RX_FDEQ_GAIN_9 +49 0x5858 //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x5858 //RX_FDEQ_GAIN_12 +52 0x5858 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0505 //RX_FDEQ_BIN_3 +67 0x0505 //RX_FDEQ_BIN_4 +68 0x0505 //RX_FDEQ_BIN_5 +69 0x0505 //RX_FDEQ_BIN_6 +70 0x0505 //RX_FDEQ_BIN_7 +71 0x160C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0400 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4A4C //RX_FDEQ_GAIN_4 +44 0x4E50 //RX_FDEQ_GAIN_5 +45 0x5254 //RX_FDEQ_GAIN_6 +46 0x5658 //RX_FDEQ_GAIN_7 +47 0x5858 //RX_FDEQ_GAIN_8 +48 0x5858 //RX_FDEQ_GAIN_9 +49 0x5858 //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x5858 //RX_FDEQ_GAIN_12 +52 0x5858 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0505 //RX_FDEQ_BIN_3 +67 0x0505 //RX_FDEQ_BIN_4 +68 0x0505 //RX_FDEQ_BIN_5 +69 0x0505 //RX_FDEQ_BIN_6 +70 0x0505 //RX_FDEQ_BIN_7 +71 0x160C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0400 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4A4C //RX_FDEQ_GAIN_4 +44 0x4E50 //RX_FDEQ_GAIN_5 +45 0x5254 //RX_FDEQ_GAIN_6 +46 0x5658 //RX_FDEQ_GAIN_7 +47 0x5858 //RX_FDEQ_GAIN_8 +48 0x5858 //RX_FDEQ_GAIN_9 +49 0x5858 //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x5858 //RX_FDEQ_GAIN_12 +52 0x5858 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0505 //RX_FDEQ_BIN_3 +67 0x0505 //RX_FDEQ_BIN_4 +68 0x0505 //RX_FDEQ_BIN_5 +69 0x0505 //RX_FDEQ_BIN_6 +70 0x0505 //RX_FDEQ_BIN_7 +71 0x160C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0400 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4A4C //RX_FDEQ_GAIN_4 +44 0x4E50 //RX_FDEQ_GAIN_5 +45 0x5254 //RX_FDEQ_GAIN_6 +46 0x5658 //RX_FDEQ_GAIN_7 +47 0x5858 //RX_FDEQ_GAIN_8 +48 0x5858 //RX_FDEQ_GAIN_9 +49 0x5858 //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x5858 //RX_FDEQ_GAIN_12 +52 0x5858 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0505 //RX_FDEQ_BIN_3 +67 0x0505 //RX_FDEQ_BIN_4 +68 0x0505 //RX_FDEQ_BIN_5 +69 0x0505 //RX_FDEQ_BIN_6 +70 0x0505 //RX_FDEQ_BIN_7 +71 0x160C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0400 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4A4C //RX_FDEQ_GAIN_4 +44 0x4E50 //RX_FDEQ_GAIN_5 +45 0x5254 //RX_FDEQ_GAIN_6 +46 0x5658 //RX_FDEQ_GAIN_7 +47 0x5858 //RX_FDEQ_GAIN_8 +48 0x5858 //RX_FDEQ_GAIN_9 +49 0x5858 //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x5858 //RX_FDEQ_GAIN_12 +52 0x5858 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0505 //RX_FDEQ_BIN_3 +67 0x0505 //RX_FDEQ_BIN_4 +68 0x0505 //RX_FDEQ_BIN_5 +69 0x0505 //RX_FDEQ_BIN_6 +70 0x0505 //RX_FDEQ_BIN_7 +71 0x160C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0400 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4A4C //RX_FDEQ_GAIN_4 +44 0x4E50 //RX_FDEQ_GAIN_5 +45 0x5254 //RX_FDEQ_GAIN_6 +46 0x5658 //RX_FDEQ_GAIN_7 +47 0x5858 //RX_FDEQ_GAIN_8 +48 0x5858 //RX_FDEQ_GAIN_9 +49 0x5858 //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x5858 //RX_FDEQ_GAIN_12 +52 0x5858 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0505 //RX_FDEQ_BIN_3 +67 0x0505 //RX_FDEQ_BIN_4 +68 0x0505 //RX_FDEQ_BIN_5 +69 0x0505 //RX_FDEQ_BIN_6 +70 0x0505 //RX_FDEQ_BIN_7 +71 0x160C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0400 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4A4C //RX_FDEQ_GAIN_4 +44 0x4E50 //RX_FDEQ_GAIN_5 +45 0x5254 //RX_FDEQ_GAIN_6 +46 0x5658 //RX_FDEQ_GAIN_7 +47 0x5858 //RX_FDEQ_GAIN_8 +48 0x5858 //RX_FDEQ_GAIN_9 +49 0x5858 //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x5858 //RX_FDEQ_GAIN_12 +52 0x5858 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0505 //RX_FDEQ_BIN_3 +67 0x0505 //RX_FDEQ_BIN_4 +68 0x0505 //RX_FDEQ_BIN_5 +69 0x0505 //RX_FDEQ_BIN_6 +70 0x0505 //RX_FDEQ_BIN_7 +71 0x160C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-SWB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0026 //TX_PATCH_REG +3 0x6F7E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7D83 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7900 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0400 //TX_MIN_EQ_RE_EST_0 +153 0x0400 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x1000 //TX_MIN_EQ_RE_EST_4 +157 0x1000 //TX_MIN_EQ_RE_EST_5 +158 0x1000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x1800 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0177 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0C00 //TX_RATIO_DT_L_TH_LOW +224 0x2000 //TX_RATIO_DT_H_TH_LOW +225 0x1800 //TX_RATIO_DT_L_TH_HIGH +226 0x3000 //TX_RATIO_DT_H_TH_HIGH +227 0x0A00 //TX_RATIO_DT_L0_TH +228 0x7000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x0600 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x0016 //TX_NS_LVL_CTRL_1 +283 0x002C //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0018 //TX_NS_LVL_CTRL_4 +286 0x0016 //TX_NS_LVL_CTRL_5 +287 0x0012 //TX_NS_LVL_CTRL_6 +288 0x0017 //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0012 //TX_MIN_GAIN_S_1 +291 0x000D //TX_MIN_GAIN_S_2 +292 0x0012 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0012 //TX_MIN_GAIN_S_5 +295 0x0012 //TX_MIN_GAIN_S_6 +296 0x0012 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x6000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x6000 //TX_SNRI_SUP_5 +306 0x6000 //TX_SNRI_SUP_6 +307 0x6000 //TX_SNRI_SUP_7 +308 0x6000 //TX_THR_LFNS +309 0x0017 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x3000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x5000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x6000 //TX_B_POST_FILT_6 +329 0x3000 //TX_B_POST_FILT_7 +330 0x1000 //TX_B_LESSCUT_RTO_S_0 +331 0x6000 //TX_B_LESSCUT_RTO_S_1 +332 0x6000 //TX_B_LESSCUT_RTO_S_2 +333 0x6000 //TX_B_LESSCUT_RTO_S_3 +334 0x6000 //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x07D0 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x00C6 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x2260 //TX_NOISE_TH_3 +373 0x7080 //TX_NOISE_TH_4 +374 0x57E4 //TX_NOISE_TH_5 +375 0x4BD6 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x1194 //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x0200 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x2000 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x051E //TX_SB_RHO_MEAN2_TH +441 0x02F0 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0300 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x5C54 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4C4C //TX_FDEQ_GAIN_2 +570 0x474A //TX_FDEQ_GAIN_3 +571 0x423C //TX_FDEQ_GAIN_4 +572 0x4048 //TX_FDEQ_GAIN_5 +573 0x4858 //TX_FDEQ_GAIN_6 +574 0x5848 //TX_FDEQ_GAIN_7 +575 0x4248 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4856 //TX_FDEQ_GAIN_10 +578 0x5656 //TX_FDEQ_GAIN_11 +579 0x4850 //TX_FDEQ_GAIN_12 +580 0x5850 //TX_FDEQ_GAIN_13 +581 0x585C //TX_FDEQ_GAIN_14 +582 0x707C //TX_FDEQ_GAIN_15 +583 0x7070 //TX_FDEQ_GAIN_16 +584 0x7048 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0104 //TX_FDEQ_BIN_1 +593 0x0502 //TX_FDEQ_BIN_2 +594 0x0202 //TX_FDEQ_BIN_3 +595 0x0504 //TX_FDEQ_BIN_4 +596 0x0708 //TX_FDEQ_BIN_5 +597 0x0808 //TX_FDEQ_BIN_6 +598 0x050E //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0F0F //TX_FDEQ_BIN_9 +601 0x0E0D //TX_FDEQ_BIN_10 +602 0x0F28 //TX_FDEQ_BIN_11 +603 0x111B //TX_FDEQ_BIN_12 +604 0x291E //TX_FDEQ_BIN_13 +605 0x1E10 //TX_FDEQ_BIN_14 +606 0x186F //TX_FDEQ_BIN_15 +607 0x1021 //TX_FDEQ_BIN_16 +608 0x1000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4646 //TX_PREEQ_GAIN_MIC0_8 +626 0x4545 //TX_PREEQ_GAIN_MIC0_9 +627 0x4545 //TX_PREEQ_GAIN_MIC0_10 +628 0x4544 //TX_PREEQ_GAIN_MIC0_11 +629 0x4444 //TX_PREEQ_GAIN_MIC0_12 +630 0x4343 //TX_PREEQ_GAIN_MIC0_13 +631 0x4241 //TX_PREEQ_GAIN_MIC0_14 +632 0x3C3E //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1719 //TX_PREEQ_BIN_MIC0_11 +653 0x1B1E //TX_PREEQ_BIN_MIC0_12 +654 0x1E1E //TX_PREEQ_BIN_MIC0_13 +655 0x1E28 //TX_PREEQ_BIN_MIC0_14 +656 0x282C //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x484A //TX_PREEQ_GAIN_MIC1_8 +675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 +676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 +677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 +678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 +679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x0F10 //TX_PREEQ_BIN_MIC1_10 +701 0x1011 //TX_PREEQ_BIN_MIC1_11 +702 0x1112 //TX_PREEQ_BIN_MIC1_12 +703 0x120B //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0056 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0042 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0005 //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0002 //TX_TDDRC_THRD_0 +855 0x0003 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0550 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0xECCD //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x2000 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x000C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x5800 //RX_THR_PITCH_DET_0 +14 0x5000 //RX_THR_PITCH_DET_1 +15 0x4000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4A4C //RX_FDEQ_GAIN_5 +45 0x4C50 //RX_FDEQ_GAIN_6 +46 0x5458 //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x6468 //RX_FDEQ_GAIN_9 +49 0x6C6C //RX_FDEQ_GAIN_10 +50 0x6C6C //RX_FDEQ_GAIN_11 +51 0x6C6C //RX_FDEQ_GAIN_12 +52 0x6C6C //RX_FDEQ_GAIN_13 +53 0x6C6C //RX_FDEQ_GAIN_14 +54 0x6C6C //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4A4C //RX_FDEQ_GAIN_5 +45 0x4C50 //RX_FDEQ_GAIN_6 +46 0x5458 //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x6468 //RX_FDEQ_GAIN_9 +49 0x6C6C //RX_FDEQ_GAIN_10 +50 0x6C6C //RX_FDEQ_GAIN_11 +51 0x6C6C //RX_FDEQ_GAIN_12 +52 0x6C6C //RX_FDEQ_GAIN_13 +53 0x6C6C //RX_FDEQ_GAIN_14 +54 0x6C6C //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4A4C //RX_FDEQ_GAIN_5 +45 0x4C50 //RX_FDEQ_GAIN_6 +46 0x5458 //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x6468 //RX_FDEQ_GAIN_9 +49 0x6C6C //RX_FDEQ_GAIN_10 +50 0x6C6C //RX_FDEQ_GAIN_11 +51 0x6C6C //RX_FDEQ_GAIN_12 +52 0x6C6C //RX_FDEQ_GAIN_13 +53 0x6C6C //RX_FDEQ_GAIN_14 +54 0x6C6C //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4A4C //RX_FDEQ_GAIN_5 +45 0x4C50 //RX_FDEQ_GAIN_6 +46 0x5458 //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x6468 //RX_FDEQ_GAIN_9 +49 0x6C6C //RX_FDEQ_GAIN_10 +50 0x6C6C //RX_FDEQ_GAIN_11 +51 0x6C6C //RX_FDEQ_GAIN_12 +52 0x6C6C //RX_FDEQ_GAIN_13 +53 0x6C6C //RX_FDEQ_GAIN_14 +54 0x6C6C //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4A4C //RX_FDEQ_GAIN_5 +45 0x4C50 //RX_FDEQ_GAIN_6 +46 0x5458 //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x6468 //RX_FDEQ_GAIN_9 +49 0x6C6C //RX_FDEQ_GAIN_10 +50 0x6C6C //RX_FDEQ_GAIN_11 +51 0x6C6C //RX_FDEQ_GAIN_12 +52 0x6C6C //RX_FDEQ_GAIN_13 +53 0x6C6C //RX_FDEQ_GAIN_14 +54 0x6C6C //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4A4C //RX_FDEQ_GAIN_5 +45 0x4C50 //RX_FDEQ_GAIN_6 +46 0x5458 //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x6468 //RX_FDEQ_GAIN_9 +49 0x6C6C //RX_FDEQ_GAIN_10 +50 0x6C6C //RX_FDEQ_GAIN_11 +51 0x6C6C //RX_FDEQ_GAIN_12 +52 0x6C6C //RX_FDEQ_GAIN_13 +53 0x6C6C //RX_FDEQ_GAIN_14 +54 0x6C6C //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4A4C //RX_FDEQ_GAIN_5 +45 0x4C50 //RX_FDEQ_GAIN_6 +46 0x5458 //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x6468 //RX_FDEQ_GAIN_9 +49 0x6C6C //RX_FDEQ_GAIN_10 +50 0x6C6C //RX_FDEQ_GAIN_11 +51 0x6C6C //RX_FDEQ_GAIN_12 +52 0x6C6C //RX_FDEQ_GAIN_13 +53 0x6C6C //RX_FDEQ_GAIN_14 +54 0x6C6C //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0026 //TX_PATCH_REG +3 0x6B7E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7900 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0400 //TX_MIN_EQ_RE_EST_0 +153 0x0400 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x1000 //TX_MIN_EQ_RE_EST_4 +157 0x1000 //TX_MIN_EQ_RE_EST_5 +158 0x1000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x1800 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0177 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0C00 //TX_RATIO_DT_L_TH_LOW +224 0x2000 //TX_RATIO_DT_H_TH_LOW +225 0x1800 //TX_RATIO_DT_L_TH_HIGH +226 0x3000 //TX_RATIO_DT_H_TH_HIGH +227 0x0A00 //TX_RATIO_DT_L0_TH +228 0x7000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x0600 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x2000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x0016 //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0018 //TX_NS_LVL_CTRL_4 +286 0x0016 //TX_NS_LVL_CTRL_5 +287 0x0012 //TX_NS_LVL_CTRL_6 +288 0x0017 //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0012 //TX_MIN_GAIN_S_1 +291 0x0007 //TX_MIN_GAIN_S_2 +292 0x0012 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0012 //TX_MIN_GAIN_S_5 +295 0x0012 //TX_MIN_GAIN_S_6 +296 0x0012 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x6000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x6000 //TX_SNRI_SUP_5 +306 0x6000 //TX_SNRI_SUP_6 +307 0x6000 //TX_SNRI_SUP_7 +308 0x6000 //TX_THR_LFNS +309 0x0017 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x3000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x5000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x6000 //TX_B_POST_FILT_6 +329 0x3000 //TX_B_POST_FILT_7 +330 0x1000 //TX_B_LESSCUT_RTO_S_0 +331 0x6000 //TX_B_LESSCUT_RTO_S_1 +332 0x6000 //TX_B_LESSCUT_RTO_S_2 +333 0x6000 //TX_B_LESSCUT_RTO_S_3 +334 0x6000 //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x07D0 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x1B58 //TX_NOISE_TH_0_2 +369 0x2134 //TX_NOISE_TH_0_3 +370 0x00C6 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x2EE0 //TX_NOISE_TH_3 +373 0x47E0 //TX_NOISE_TH_4 +374 0x57E4 //TX_NOISE_TH_5 +375 0x4BD6 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x39DF //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x0200 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x2000 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x051E //TX_SB_RHO_MEAN2_TH +441 0x051E //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0300 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0030 //TX_FDEQ_SUBNUM +567 0x4E4A //TX_FDEQ_GAIN_0 +568 0x4C54 //TX_FDEQ_GAIN_1 +569 0x5C50 //TX_FDEQ_GAIN_2 +570 0x5556 //TX_FDEQ_GAIN_3 +571 0x5757 //TX_FDEQ_GAIN_4 +572 0x5658 //TX_FDEQ_GAIN_5 +573 0x585C //TX_FDEQ_GAIN_6 +574 0x5858 //TX_FDEQ_GAIN_7 +575 0x5E66 //TX_FDEQ_GAIN_8 +576 0x5894 //TX_FDEQ_GAIN_9 +577 0x9498 //TX_FDEQ_GAIN_10 +578 0xB8B8 //TX_FDEQ_GAIN_11 +579 0x7C7C //TX_FDEQ_GAIN_12 +580 0x7C7C //TX_FDEQ_GAIN_13 +581 0x7070 //TX_FDEQ_GAIN_14 +582 0x707C //TX_FDEQ_GAIN_15 +583 0x7C7C //TX_FDEQ_GAIN_16 +584 0x7C7C //TX_FDEQ_GAIN_17 +585 0x7C90 //TX_FDEQ_GAIN_18 +586 0x9048 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0F03 //TX_FDEQ_BIN_0 +592 0x0909 //TX_FDEQ_BIN_1 +593 0x080F //TX_FDEQ_BIN_2 +594 0x0609 //TX_FDEQ_BIN_3 +595 0x0F03 //TX_FDEQ_BIN_4 +596 0x1402 //TX_FDEQ_BIN_5 +597 0x0E13 //TX_FDEQ_BIN_6 +598 0x110F //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x0E0F //TX_FDEQ_BIN_9 +601 0x080D //TX_FDEQ_BIN_10 +602 0x0F0F //TX_FDEQ_BIN_11 +603 0x0F0F //TX_FDEQ_BIN_12 +604 0x0A0F //TX_FDEQ_BIN_13 +605 0x0809 //TX_FDEQ_BIN_14 +606 0x0A0B //TX_FDEQ_BIN_15 +607 0x0C0D //TX_FDEQ_BIN_16 +608 0x0E0F //TX_FDEQ_BIN_17 +609 0x1013 //TX_FDEQ_BIN_18 +610 0x0A00 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4846 //TX_PREEQ_GAIN_MIC0_6 +624 0x4645 //TX_PREEQ_GAIN_MIC0_7 +625 0x4545 //TX_PREEQ_GAIN_MIC0_8 +626 0x4545 //TX_PREEQ_GAIN_MIC0_9 +627 0x4444 //TX_PREEQ_GAIN_MIC0_10 +628 0x4443 //TX_PREEQ_GAIN_MIC0_11 +629 0x4241 //TX_PREEQ_GAIN_MIC0_12 +630 0x3C3E //TX_PREEQ_GAIN_MIC0_13 +631 0x3E40 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x4000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4849 //TX_PREEQ_GAIN_MIC1_6 +673 0x4A4B //TX_PREEQ_GAIN_MIC1_7 +674 0x4C4B //TX_PREEQ_GAIN_MIC1_8 +675 0x4A48 //TX_PREEQ_GAIN_MIC1_9 +676 0x4B4C //TX_PREEQ_GAIN_MIC1_10 +677 0x4C4B //TX_PREEQ_GAIN_MIC1_11 +678 0x4838 //TX_PREEQ_GAIN_MIC1_12 +679 0x3858 //TX_PREEQ_GAIN_MIC1_13 +680 0x7060 //TX_PREEQ_GAIN_MIC1_14 +681 0x9870 //TX_PREEQ_GAIN_MIC1_15 +682 0x5848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x4000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0202 //TX_PREEQ_BIN_MIC2_0 +740 0x0203 //TX_PREEQ_BIN_MIC2_1 +741 0x0303 //TX_PREEQ_BIN_MIC2_2 +742 0x0304 //TX_PREEQ_BIN_MIC2_3 +743 0x0405 //TX_PREEQ_BIN_MIC2_4 +744 0x0506 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0809 //TX_PREEQ_BIN_MIC2_7 +747 0x0A0A //TX_PREEQ_BIN_MIC2_8 +748 0x0C10 //TX_PREEQ_BIN_MIC2_9 +749 0x1013 //TX_PREEQ_BIN_MIC2_10 +750 0x1414 //TX_PREEQ_BIN_MIC2_11 +751 0x261E //TX_PREEQ_BIN_MIC2_12 +752 0x1E14 //TX_PREEQ_BIN_MIC2_13 +753 0x1414 //TX_PREEQ_BIN_MIC2_14 +754 0x2814 //TX_PREEQ_BIN_MIC2_15 +755 0x4000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0550 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0xECCD //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x2000 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x000C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x5800 //RX_THR_PITCH_DET_0 +14 0x5000 //RX_THR_PITCH_DET_1 +15 0x4000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + diff --git a/audio/bluejay/tuning/fortemedia/HANDSFREE.dat b/audio/bluejay/tuning/fortemedia/HANDSFREE.dat new file mode 100644 index 0000000000000000000000000000000000000000..4cb79c062cbb413691aa044c5e788c50963c6d3d GIT binary patch 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a/audio/bluejay/tuning/fortemedia/HANDSFREE.mods b/audio/bluejay/tuning/fortemedia/HANDSFREE.mods new file mode 100644 index 0000000..7a14bc2 --- /dev/null +++ b/audio/bluejay/tuning/fortemedia/HANDSFREE.mods @@ -0,0 +1,12283 @@ +#PLATFORM_NAME gChip +#EXPORT_FLAG HANDSFREE +#SINGLE_API_VER 1.1.6 +#SAVE_TIME 2021-10-19 18:44:22 + +#CASE_NAME HANDSFREE-HANDSFREE-RESERVE1-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x6B54 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0003 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0A19 //TX_PGA_0 +28 0x0A19 //TX_PGA_1 +29 0x0A19 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0002 //TX_MIC_DATA_SRC0 +42 0x0000 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0300 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x2000 //TX_MIN_EQ_RE_EST_1 +154 0x2000 //TX_MIN_EQ_RE_EST_2 +155 0x4000 //TX_MIN_EQ_RE_EST_3 +156 0x4000 //TX_MIN_EQ_RE_EST_4 +157 0x7FFF //TX_MIN_EQ_RE_EST_5 +158 0x7FFF //TX_MIN_EQ_RE_EST_6 +159 0x7FFF //TX_MIN_EQ_RE_EST_7 +160 0x7FFF //TX_MIN_EQ_RE_EST_8 +161 0x7FFF //TX_MIN_EQ_RE_EST_9 +162 0x7FFF //TX_MIN_EQ_RE_EST_10 +163 0x7FFF //TX_MIN_EQ_RE_EST_11 +164 0x7FFF //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x0CCD //TX_LAMBDA_CB_NLE +167 0x2000 //TX_C_POST_FLT +168 0x7FFF //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x09C4 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7D00 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0DAC //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x2000 //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0063 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFB00 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0014 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x0011 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0010 //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x50C0 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x5000 //TX_A_POST_FILT_S_0 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x4C00 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C00 //TX_LAMBDA_PFILT +339 0x7C00 //TX_LAMBDA_PFILT_S_0 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7C00 //TX_LAMBDA_PFILT_S_2 +342 0x7A00 //TX_LAMBDA_PFILT_S_3 +343 0x7C00 //TX_LAMBDA_PFILT_S_4 +344 0x7C00 //TX_LAMBDA_PFILT_S_5 +345 0x7C00 //TX_LAMBDA_PFILT_S_6 +346 0x7C00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0200 //TX_DT_BINVAD_TH_0 +354 0x0200 //TX_DT_BINVAD_TH_1 +355 0x0200 //TX_DT_BINVAD_TH_2 +356 0x0200 //TX_DT_BINVAD_TH_3 +357 0x1F40 //TX_DT_BINVAD_ENDF +358 0x0100 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x4E20 //TX_NOISE_TH_3 +373 0x4E20 //TX_NOISE_TH_4 +374 0x59D8 //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x2710 //TX_NOISE_TH_6 +379 0x0033 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0033 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x7FFF //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x5048 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x5B5B //TX_FDEQ_GAIN_10 +578 0x737B //TX_FDEQ_GAIN_11 +579 0x7B9A //TX_FDEQ_GAIN_12 +580 0x9AC4 //TX_FDEQ_GAIN_13 +581 0xC4C4 //TX_FDEQ_GAIN_14 +582 0xC4C4 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0304 //TX_FDEQ_BIN_2 +594 0x0405 //TX_FDEQ_BIN_3 +595 0x0607 //TX_FDEQ_BIN_4 +596 0x0809 //TX_FDEQ_BIN_5 +597 0x0A0B //TX_FDEQ_BIN_6 +598 0x0C0D //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x1011 //TX_FDEQ_BIN_9 +601 0x1214 //TX_FDEQ_BIN_10 +602 0x1618 //TX_FDEQ_BIN_11 +603 0x1C1C //TX_FDEQ_BIN_12 +604 0x2020 //TX_FDEQ_BIN_13 +605 0x2020 //TX_FDEQ_BIN_14 +606 0x2011 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4849 //TX_PREEQ_GAIN_MIC0_6 +624 0x4A4B //TX_PREEQ_GAIN_MIC0_7 +625 0x4C4B //TX_PREEQ_GAIN_MIC0_8 +626 0x4A48 //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4C //TX_PREEQ_GAIN_MIC0_10 +628 0x4C4B //TX_PREEQ_GAIN_MIC0_11 +629 0x4838 //TX_PREEQ_GAIN_MIC0_12 +630 0x3858 //TX_PREEQ_GAIN_MIC0_13 +631 0x7060 //TX_PREEQ_GAIN_MIC0_14 +632 0x9870 //TX_PREEQ_GAIN_MIC0_15 +633 0x5848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x4000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x1812 //TX_PREEQ_BIN_MIC1_0 +691 0x0A0A //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x080A //TX_PREEQ_BIN_MIC1_3 +694 0x0B09 //TX_PREEQ_BIN_MIC1_4 +695 0x0A06 //TX_PREEQ_BIN_MIC1_5 +696 0x0606 //TX_PREEQ_BIN_MIC1_6 +697 0x0605 //TX_PREEQ_BIN_MIC1_7 +698 0x050A //TX_PREEQ_BIN_MIC1_8 +699 0x1505 //TX_PREEQ_BIN_MIC1_9 +700 0x0506 //TX_PREEQ_BIN_MIC1_10 +701 0x0615 //TX_PREEQ_BIN_MIC1_11 +702 0x1516 //TX_PREEQ_BIN_MIC1_12 +703 0x2021 //TX_PREEQ_BIN_MIC1_13 +704 0x2021 //TX_PREEQ_BIN_MIC1_14 +705 0x2021 //TX_PREEQ_BIN_MIC1_15 +706 0x0800 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0C00 //TX_TDDRC_ALPHA_UP_01 +784 0x0C00 //TX_TDDRC_ALPHA_UP_02 +785 0x0C00 //TX_TDDRC_ALPHA_UP_03 +786 0x0C00 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0004 //TX_FILTINDX +854 0x0004 //TX_TDDRC_THRD_0 +855 0x0016 //TX_TDDRC_THRD_1 +856 0x1900 //TX_TDDRC_THRD_2 +857 0x1900 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7B00 //TX_TDDRC_SLANT_1 +860 0x0C00 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0FDA //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x006C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +10 0x065B //RX_PGA +11 0x7E56 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0014 //RX_NS_LVL_CTRL +23 0xF400 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x00C8 //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0012 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0012 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0025 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0034 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x004D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0074 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-CUSTOM2-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x6B5C //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0003 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0A19 //TX_PGA_0 +28 0x0A19 //TX_PGA_1 +29 0x0A19 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0002 //TX_MIC_DATA_SRC0 +42 0x0000 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0300 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x2000 //TX_MIN_EQ_RE_EST_1 +154 0x2000 //TX_MIN_EQ_RE_EST_2 +155 0x4000 //TX_MIN_EQ_RE_EST_3 +156 0x4000 //TX_MIN_EQ_RE_EST_4 +157 0x7FFF //TX_MIN_EQ_RE_EST_5 +158 0x7FFF //TX_MIN_EQ_RE_EST_6 +159 0x7FFF //TX_MIN_EQ_RE_EST_7 +160 0x7FFF //TX_MIN_EQ_RE_EST_8 +161 0x7FFF //TX_MIN_EQ_RE_EST_9 +162 0x7FFF //TX_MIN_EQ_RE_EST_10 +163 0x7FFF //TX_MIN_EQ_RE_EST_11 +164 0x7FFF //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x0CCD //TX_LAMBDA_CB_NLE +167 0x2000 //TX_C_POST_FLT +168 0x7FFF //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x09C4 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7D00 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0DAC //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x2000 //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0063 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFB00 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0014 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x0011 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0010 //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x50C0 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x5000 //TX_A_POST_FILT_S_0 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x4C00 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C00 //TX_LAMBDA_PFILT +339 0x7C00 //TX_LAMBDA_PFILT_S_0 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7C00 //TX_LAMBDA_PFILT_S_2 +342 0x7A00 //TX_LAMBDA_PFILT_S_3 +343 0x7C00 //TX_LAMBDA_PFILT_S_4 +344 0x7C00 //TX_LAMBDA_PFILT_S_5 +345 0x7C00 //TX_LAMBDA_PFILT_S_6 +346 0x7C00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0200 //TX_DT_BINVAD_TH_0 +354 0x0200 //TX_DT_BINVAD_TH_1 +355 0x0200 //TX_DT_BINVAD_TH_2 +356 0x0200 //TX_DT_BINVAD_TH_3 +357 0x1F40 //TX_DT_BINVAD_ENDF +358 0x0100 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x4E20 //TX_NOISE_TH_3 +373 0x4E20 //TX_NOISE_TH_4 +374 0x59D8 //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x2710 //TX_NOISE_TH_6 +379 0x0033 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0033 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x7FFF //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x5048 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x5B5B //TX_FDEQ_GAIN_10 +578 0x737B //TX_FDEQ_GAIN_11 +579 0x7B9A //TX_FDEQ_GAIN_12 +580 0x9AC4 //TX_FDEQ_GAIN_13 +581 0xC4C4 //TX_FDEQ_GAIN_14 +582 0xC4C4 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0304 //TX_FDEQ_BIN_2 +594 0x0405 //TX_FDEQ_BIN_3 +595 0x0607 //TX_FDEQ_BIN_4 +596 0x0809 //TX_FDEQ_BIN_5 +597 0x0A0B //TX_FDEQ_BIN_6 +598 0x0C0D //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x1011 //TX_FDEQ_BIN_9 +601 0x1214 //TX_FDEQ_BIN_10 +602 0x1618 //TX_FDEQ_BIN_11 +603 0x1C1C //TX_FDEQ_BIN_12 +604 0x2020 //TX_FDEQ_BIN_13 +605 0x2020 //TX_FDEQ_BIN_14 +606 0x2011 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4849 //TX_PREEQ_GAIN_MIC0_6 +624 0x4A4B //TX_PREEQ_GAIN_MIC0_7 +625 0x4C4B //TX_PREEQ_GAIN_MIC0_8 +626 0x4A48 //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4C //TX_PREEQ_GAIN_MIC0_10 +628 0x4C4B //TX_PREEQ_GAIN_MIC0_11 +629 0x4838 //TX_PREEQ_GAIN_MIC0_12 +630 0x3858 //TX_PREEQ_GAIN_MIC0_13 +631 0x7060 //TX_PREEQ_GAIN_MIC0_14 +632 0x9870 //TX_PREEQ_GAIN_MIC0_15 +633 0x5848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x4000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x1812 //TX_PREEQ_BIN_MIC1_0 +691 0x0A0A //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x080A //TX_PREEQ_BIN_MIC1_3 +694 0x0B09 //TX_PREEQ_BIN_MIC1_4 +695 0x0A06 //TX_PREEQ_BIN_MIC1_5 +696 0x0606 //TX_PREEQ_BIN_MIC1_6 +697 0x0605 //TX_PREEQ_BIN_MIC1_7 +698 0x050A //TX_PREEQ_BIN_MIC1_8 +699 0x1505 //TX_PREEQ_BIN_MIC1_9 +700 0x0506 //TX_PREEQ_BIN_MIC1_10 +701 0x0615 //TX_PREEQ_BIN_MIC1_11 +702 0x1516 //TX_PREEQ_BIN_MIC1_12 +703 0x2021 //TX_PREEQ_BIN_MIC1_13 +704 0x2021 //TX_PREEQ_BIN_MIC1_14 +705 0x2021 //TX_PREEQ_BIN_MIC1_15 +706 0x0800 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0C00 //TX_TDDRC_ALPHA_UP_01 +784 0x0C00 //TX_TDDRC_ALPHA_UP_02 +785 0x0C00 //TX_TDDRC_ALPHA_UP_03 +786 0x0C00 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0004 //TX_FILTINDX +854 0x0004 //TX_TDDRC_THRD_0 +855 0x0016 //TX_TDDRC_THRD_1 +856 0x1900 //TX_TDDRC_THRD_2 +857 0x1900 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7B00 //TX_TDDRC_SLANT_1 +860 0x0C00 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0FDA //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x006C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +10 0x065B //RX_PGA +11 0x7E56 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0014 //RX_NS_LVL_CTRL +23 0xF400 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x00C8 //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0012 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0012 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0025 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0034 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x004D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0074 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-CUSTOM1-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x6B74 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0003 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0A19 //TX_PGA_0 +28 0x0A19 //TX_PGA_1 +29 0x0A19 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0002 //TX_MIC_DATA_SRC0 +42 0x0000 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0300 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x2000 //TX_MIN_EQ_RE_EST_1 +154 0x2000 //TX_MIN_EQ_RE_EST_2 +155 0x4000 //TX_MIN_EQ_RE_EST_3 +156 0x4000 //TX_MIN_EQ_RE_EST_4 +157 0x7FFF //TX_MIN_EQ_RE_EST_5 +158 0x7FFF //TX_MIN_EQ_RE_EST_6 +159 0x7FFF //TX_MIN_EQ_RE_EST_7 +160 0x7FFF //TX_MIN_EQ_RE_EST_8 +161 0x7FFF //TX_MIN_EQ_RE_EST_9 +162 0x7FFF //TX_MIN_EQ_RE_EST_10 +163 0x7FFF //TX_MIN_EQ_RE_EST_11 +164 0x7FFF //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x0CCD //TX_LAMBDA_CB_NLE +167 0x2000 //TX_C_POST_FLT +168 0x7FFF //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x09C4 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7D00 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0DAC //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x2000 //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0063 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFB00 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0014 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x0011 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0010 //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x50C0 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x5000 //TX_A_POST_FILT_S_0 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x4C00 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C00 //TX_LAMBDA_PFILT +339 0x7C00 //TX_LAMBDA_PFILT_S_0 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7C00 //TX_LAMBDA_PFILT_S_2 +342 0x7A00 //TX_LAMBDA_PFILT_S_3 +343 0x7C00 //TX_LAMBDA_PFILT_S_4 +344 0x7C00 //TX_LAMBDA_PFILT_S_5 +345 0x7C00 //TX_LAMBDA_PFILT_S_6 +346 0x7C00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0200 //TX_DT_BINVAD_TH_0 +354 0x0200 //TX_DT_BINVAD_TH_1 +355 0x0200 //TX_DT_BINVAD_TH_2 +356 0x0200 //TX_DT_BINVAD_TH_3 +357 0x1F40 //TX_DT_BINVAD_ENDF +358 0x0100 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x4E20 //TX_NOISE_TH_3 +373 0x4E20 //TX_NOISE_TH_4 +374 0x59D8 //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x2710 //TX_NOISE_TH_6 +379 0x0033 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0033 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x7FFF //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x5048 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x5B5B //TX_FDEQ_GAIN_10 +578 0x737B //TX_FDEQ_GAIN_11 +579 0x7B9A //TX_FDEQ_GAIN_12 +580 0x9AC4 //TX_FDEQ_GAIN_13 +581 0xC4C4 //TX_FDEQ_GAIN_14 +582 0xC4C4 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0304 //TX_FDEQ_BIN_2 +594 0x0405 //TX_FDEQ_BIN_3 +595 0x0607 //TX_FDEQ_BIN_4 +596 0x0809 //TX_FDEQ_BIN_5 +597 0x0A0B //TX_FDEQ_BIN_6 +598 0x0C0D //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x1011 //TX_FDEQ_BIN_9 +601 0x1214 //TX_FDEQ_BIN_10 +602 0x1618 //TX_FDEQ_BIN_11 +603 0x1C1C //TX_FDEQ_BIN_12 +604 0x2020 //TX_FDEQ_BIN_13 +605 0x2020 //TX_FDEQ_BIN_14 +606 0x2011 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4849 //TX_PREEQ_GAIN_MIC0_6 +624 0x4A4B //TX_PREEQ_GAIN_MIC0_7 +625 0x4C4B //TX_PREEQ_GAIN_MIC0_8 +626 0x4A48 //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4C //TX_PREEQ_GAIN_MIC0_10 +628 0x4C4B //TX_PREEQ_GAIN_MIC0_11 +629 0x4838 //TX_PREEQ_GAIN_MIC0_12 +630 0x3858 //TX_PREEQ_GAIN_MIC0_13 +631 0x7060 //TX_PREEQ_GAIN_MIC0_14 +632 0x9870 //TX_PREEQ_GAIN_MIC0_15 +633 0x5848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x4000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x1812 //TX_PREEQ_BIN_MIC1_0 +691 0x0A0A //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x080A //TX_PREEQ_BIN_MIC1_3 +694 0x0B09 //TX_PREEQ_BIN_MIC1_4 +695 0x0A06 //TX_PREEQ_BIN_MIC1_5 +696 0x0606 //TX_PREEQ_BIN_MIC1_6 +697 0x0605 //TX_PREEQ_BIN_MIC1_7 +698 0x050A //TX_PREEQ_BIN_MIC1_8 +699 0x1505 //TX_PREEQ_BIN_MIC1_9 +700 0x0506 //TX_PREEQ_BIN_MIC1_10 +701 0x0615 //TX_PREEQ_BIN_MIC1_11 +702 0x1516 //TX_PREEQ_BIN_MIC1_12 +703 0x2021 //TX_PREEQ_BIN_MIC1_13 +704 0x2021 //TX_PREEQ_BIN_MIC1_14 +705 0x2021 //TX_PREEQ_BIN_MIC1_15 +706 0x0800 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0C00 //TX_TDDRC_ALPHA_UP_01 +784 0x0C00 //TX_TDDRC_ALPHA_UP_02 +785 0x0C00 //TX_TDDRC_ALPHA_UP_03 +786 0x0C00 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0004 //TX_FILTINDX +854 0x0004 //TX_TDDRC_THRD_0 +855 0x0016 //TX_TDDRC_THRD_1 +856 0x1900 //TX_TDDRC_THRD_2 +857 0x1900 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7B00 //TX_TDDRC_SLANT_1 +860 0x0C00 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0FDA //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x006C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +10 0x065B //RX_PGA +11 0x7E56 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0014 //RX_NS_LVL_CTRL +23 0xF400 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x00C8 //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0012 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0012 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0025 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0034 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x004D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0074 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-NB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x6F7C //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0002 //TX_MIC_DATA_SRC0 +42 0x0000 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x053D //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7646 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0100 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7500 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0200 //TX_MIN_EQ_RE_EST_0 +153 0x0200 //TX_MIN_EQ_RE_EST_1 +154 0x0200 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x1800 //TX_MIN_EQ_RE_EST_7 +160 0x1800 //TX_MIN_EQ_RE_EST_8 +161 0x3000 //TX_MIN_EQ_RE_EST_9 +162 0x4000 //TX_MIN_EQ_RE_EST_10 +163 0x6000 //TX_MIN_EQ_RE_EST_11 +164 0x7FFF //TX_MIN_EQ_RE_EST_12 +165 0x2000 //TX_LAMBDA_RE_EST +166 0x0000 //TX_LAMBDA_CB_NLE +167 0x4000 //TX_C_POST_FLT +168 0x2000 //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x05DC //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7FF0 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x1F40 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x1000 //TX_ADPT_STRICT_L +222 0x1000 //TX_ADPT_STRICT_H +223 0x0001 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x0640 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x05DC //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF900 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0050 //TX_DELTA_THR_SN_EST_0 +251 0x01A0 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x7F00 //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0800 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0012 //TX_NS_LVL_CTRL_1 +283 0x0012 //TX_NS_LVL_CTRL_2 +284 0x0015 //TX_NS_LVL_CTRL_3 +285 0x0012 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0011 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000D //TX_MIN_GAIN_S_2 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000F //TX_MIN_GAIN_S_4 +294 0x000F //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x4000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x3000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x2400 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x2000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x1000 //TX_A_POST_FILT_S_4 +319 0x3000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x5000 //TX_B_POST_FILT_4 +327 0x3000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x6000 //TX_B_LESSCUT_RTO_S_1 +332 0x6000 //TX_B_LESSCUT_RTO_S_2 +333 0x6000 //TX_B_LESSCUT_RTO_S_3 +334 0x6000 //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E00 //TX_LAMBDA_PFILT +339 0x7D00 //TX_LAMBDA_PFILT_S_0 +340 0x7900 //TX_LAMBDA_PFILT_S_1 +341 0x7C00 //TX_LAMBDA_PFILT_S_2 +342 0x7900 //TX_LAMBDA_PFILT_S_3 +343 0x7000 //TX_LAMBDA_PFILT_S_4 +344 0x7D00 //TX_LAMBDA_PFILT_S_5 +345 0x7D00 //TX_LAMBDA_PFILT_S_6 +346 0x7D00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0100 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0FA0 //TX_DT_BINVAD_ENDF +358 0x7000 //TX_C_POST_FLT_DT +359 0x4000 //TX_NS_B_POST_FLT_LESSCUT +360 0x01B0 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x03ED //TX_NOISE_TH_2 +372 0x2EE0 //TX_NOISE_TH_3 +373 0x5528 //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0FA0 //TX_NOISE_TH_6 +379 0x000A //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x1000 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x000A //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x007A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x5000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x7FFF //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0014 //TX_FDEQ_SUBNUM +567 0x5050 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x483C //TX_FDEQ_GAIN_3 +571 0x3034 //TX_FDEQ_GAIN_4 +572 0x3048 //TX_FDEQ_GAIN_5 +573 0x4840 //TX_FDEQ_GAIN_6 +574 0x403C //TX_FDEQ_GAIN_7 +575 0x262C //TX_FDEQ_GAIN_8 +576 0x3A3C //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0000 //TX_FDEQ_BIN_10 +602 0x0000 //TX_FDEQ_BIN_11 +603 0x0000 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0014 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4A4C //TX_PREEQ_GAIN_MIC0_8 +626 0x4E50 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x0000 //TX_PREEQ_BIN_MIC1_10 +701 0x0000 //TX_PREEQ_BIN_MIC1_11 +702 0x0000 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0000 //TX_PREEQ_BIN_MIC2_0 +740 0x0000 //TX_PREEQ_BIN_MIC2_1 +741 0x0000 //TX_PREEQ_BIN_MIC2_2 +742 0x0000 //TX_PREEQ_BIN_MIC2_3 +743 0x0000 //TX_PREEQ_BIN_MIC2_4 +744 0x0000 //TX_PREEQ_BIN_MIC2_5 +745 0x0000 //TX_PREEQ_BIN_MIC2_6 +746 0x0000 //TX_PREEQ_BIN_MIC2_7 +747 0x0000 //TX_PREEQ_BIN_MIC2_8 +748 0x0000 //TX_PREEQ_BIN_MIC2_9 +749 0x0000 //TX_PREEQ_BIN_MIC2_10 +750 0x0000 //TX_PREEQ_BIN_MIC2_11 +751 0x0000 //TX_PREEQ_BIN_MIC2_12 +752 0x0000 //TX_PREEQ_BIN_MIC2_13 +753 0x0000 //TX_PREEQ_BIN_MIC2_14 +754 0x0000 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0065 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0065 //TX_MIC_CALIBRATION_2 +768 0x0065 //TX_MIC_CALIBRATION_3 +769 0x0044 //TX_MIC_PWR_BIAS_0 +770 0x0044 //TX_MIC_PWR_BIAS_1 +771 0x0044 //TX_MIC_PWR_BIAS_2 +772 0x0044 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x4000 //TX_TDDRC_ALPHA_UP_01 +784 0x4000 //TX_TDDRC_ALPHA_UP_02 +785 0x4000 //TX_TDDRC_ALPHA_UP_03 +786 0x4000 //TX_TDDRC_ALPHA_UP_04 +787 0x6000 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0004 //TX_TDDRC_THRD_0 +855 0x0010 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x4000 //TX_TDDRC_ALPHA_UP_00 +861 0x6000 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x08EA //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x003C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0403 //RX_PGA +11 0x7646 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0014 //RX_FDEQ_SUBNUM +39 0x8080 //RX_FDEQ_GAIN_0 +40 0x8054 //RX_FDEQ_GAIN_1 +41 0x5050 //RX_FDEQ_GAIN_2 +42 0x5058 //RX_FDEQ_GAIN_3 +43 0x5C70 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x484C //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x485A //RX_FDEQ_GAIN_8 +48 0x5A58 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0604 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0005 //RX_FILTINDX +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0780 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0015 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0780 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x8080 //RX_FDEQ_GAIN_0 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4C68 //RX_FDEQ_GAIN_4 +44 0x403C //RX_FDEQ_GAIN_5 +45 0x3C38 //RX_FDEQ_GAIN_6 +46 0x3430 //RX_FDEQ_GAIN_7 +47 0x303C //RX_FDEQ_GAIN_8 +48 0x4C50 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0014 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0780 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x8080 //RX_FDEQ_GAIN_0 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4C68 //RX_FDEQ_GAIN_4 +44 0x403C //RX_FDEQ_GAIN_5 +45 0x3C38 //RX_FDEQ_GAIN_6 +46 0x3430 //RX_FDEQ_GAIN_7 +47 0x303C //RX_FDEQ_GAIN_8 +48 0x4C50 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0780 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x8080 //RX_FDEQ_GAIN_0 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4C68 //RX_FDEQ_GAIN_4 +44 0x403C //RX_FDEQ_GAIN_5 +45 0x3C38 //RX_FDEQ_GAIN_6 +46 0x3430 //RX_FDEQ_GAIN_7 +47 0x303C //RX_FDEQ_GAIN_8 +48 0x4C50 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0029 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0780 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x8080 //RX_FDEQ_GAIN_0 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4C68 //RX_FDEQ_GAIN_4 +44 0x403C //RX_FDEQ_GAIN_5 +45 0x3C38 //RX_FDEQ_GAIN_6 +46 0x3430 //RX_FDEQ_GAIN_7 +47 0x303C //RX_FDEQ_GAIN_8 +48 0x4C50 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x003A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0EF7 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x8080 //RX_FDEQ_GAIN_0 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4470 //RX_FDEQ_GAIN_4 +44 0x383C //RX_FDEQ_GAIN_5 +45 0x3C3C //RX_FDEQ_GAIN_6 +46 0x3434 //RX_FDEQ_GAIN_7 +47 0x344C //RX_FDEQ_GAIN_8 +48 0x585C //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x002C //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0EF7 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x8080 //RX_FDEQ_GAIN_0 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4470 //RX_FDEQ_GAIN_4 +44 0x383C //RX_FDEQ_GAIN_5 +45 0x3C3C //RX_FDEQ_GAIN_6 +46 0x3434 //RX_FDEQ_GAIN_7 +47 0x344C //RX_FDEQ_GAIN_8 +48 0x585C //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0051 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0EF7 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x8080 //RX_FDEQ_GAIN_0 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4470 //RX_FDEQ_GAIN_4 +44 0x383C //RX_FDEQ_GAIN_5 +45 0x3C3C //RX_FDEQ_GAIN_6 +46 0x3434 //RX_FDEQ_GAIN_7 +47 0x344C //RX_FDEQ_GAIN_8 +48 0x585C //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-WB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x6F7C //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0001 //TX_SAMPLINGFREQ_SIG +7 0x0001 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0002 //TX_MIC_DATA_SRC0 +42 0x0000 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x053D //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0C00 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0004 //TX_MAINMIC_BLKFACTOR +114 0x0004 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0300 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6800 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x3000 //TX_MIN_EQ_RE_EST_0 +153 0x0100 //TX_MIN_EQ_RE_EST_1 +154 0x0200 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x1B00 //TX_LAMBDA_RE_EST +166 0x4000 //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x5000 //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x0020 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x76D0 //TX_DTD_THR1_0 +198 0x76D0 //TX_DTD_THR1_1 +199 0x76D0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 +206 0x5000 //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x03E8 //TX_DT_CUT_K +214 0x0010 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x044C //TX_RATIO_DT_L_TH_HIGH +226 0x7800 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFB00 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0014 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x0011 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0010 //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x50C0 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x5000 //TX_A_POST_FILT_S_0 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x4C00 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C00 //TX_LAMBDA_PFILT +339 0x7C00 //TX_LAMBDA_PFILT_S_0 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7C00 //TX_LAMBDA_PFILT_S_2 +342 0x7A00 //TX_LAMBDA_PFILT_S_3 +343 0x7C00 //TX_LAMBDA_PFILT_S_4 +344 0x7C00 //TX_LAMBDA_PFILT_S_5 +345 0x7C00 //TX_LAMBDA_PFILT_S_6 +346 0x7C00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0800 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0032 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x017E //TX_NOISE_TH_1 +371 0x0230 //TX_NOISE_TH_2 +372 0x3492 //TX_NOISE_TH_3 +373 0x4E20 //TX_NOISE_TH_4 +374 0x55B8 //TX_NOISE_TH_5 +375 0x49E6 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0F0A //TX_NOISE_TH_6 +379 0x0033 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0033 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x5454 //TX_FDEQ_GAIN_0 +568 0x5448 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4850 //TX_FDEQ_GAIN_5 +573 0x5050 //TX_FDEQ_GAIN_6 +574 0x5448 //TX_FDEQ_GAIN_7 +575 0x464C //TX_FDEQ_GAIN_8 +576 0x5050 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0F10 //TX_FDEQ_BIN_10 +602 0x1011 //TX_FDEQ_BIN_11 +603 0x1112 //TX_FDEQ_BIN_12 +604 0x120B //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x484A //TX_PREEQ_GAIN_MIC0_8 +626 0x4B4C //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4A //TX_PREEQ_GAIN_MIC0_10 +628 0x4A48 //TX_PREEQ_GAIN_MIC0_11 +629 0x4C4C //TX_PREEQ_GAIN_MIC0_12 +630 0x4C4C //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x0F10 //TX_PREEQ_BIN_MIC0_10 +652 0x1011 //TX_PREEQ_BIN_MIC0_11 +653 0x1112 //TX_PREEQ_BIN_MIC0_12 +654 0x120B //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 +676 0x403E //TX_PREEQ_GAIN_MIC1_10 +677 0x3D3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3C3C //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0F10 //TX_PREEQ_BIN_MIC1_9 +700 0x1011 //TX_PREEQ_BIN_MIC1_10 +701 0x1112 //TX_PREEQ_BIN_MIC1_11 +702 0x1208 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0001 //TX_TDDRC_THRD_0 +855 0x0002 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0B39 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x003C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0001 //RX_SAMPLINGFREQ_SIG +3 0x0001 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0403 //RX_PGA +11 0x7B02 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x001C //RX_FDEQ_SUBNUM +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6864 //RX_FDEQ_GAIN_1 +41 0x7070 //RX_FDEQ_GAIN_2 +42 0x6058 //RX_FDEQ_GAIN_3 +43 0x5C5C //RX_FDEQ_GAIN_4 +44 0x8854 //RX_FDEQ_GAIN_5 +45 0x5448 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4860 //RX_FDEQ_GAIN_8 +48 0x6068 //RX_FDEQ_GAIN_9 +49 0x7070 //RX_FDEQ_GAIN_10 +50 0x8070 //RX_FDEQ_GAIN_11 +51 0x6060 //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0204 //RX_FDEQ_BIN_5 +69 0x0A0A //RX_FDEQ_BIN_6 +70 0x0A0A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1C00 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0715 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0780 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x5C5C //RX_FDEQ_GAIN_0 +40 0x5448 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4840 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x6048 //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4038 //RX_FDEQ_GAIN_7 +47 0x3C48 //RX_FDEQ_GAIN_8 +48 0x545C //RX_FDEQ_GAIN_9 +49 0x6864 //RX_FDEQ_GAIN_10 +50 0x7058 //RX_FDEQ_GAIN_11 +51 0x443C //RX_FDEQ_GAIN_12 +52 0x3838 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0204 //RX_FDEQ_BIN_5 +69 0x0A0A //RX_FDEQ_BIN_6 +70 0x0A0A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0014 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0780 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x5C5C //RX_FDEQ_GAIN_0 +40 0x5448 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4840 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x6048 //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4038 //RX_FDEQ_GAIN_7 +47 0x3C48 //RX_FDEQ_GAIN_8 +48 0x545C //RX_FDEQ_GAIN_9 +49 0x6864 //RX_FDEQ_GAIN_10 +50 0x7058 //RX_FDEQ_GAIN_11 +51 0x443C //RX_FDEQ_GAIN_12 +52 0x3838 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0204 //RX_FDEQ_BIN_5 +69 0x0A0A //RX_FDEQ_BIN_6 +70 0x0A0A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0780 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x5C5C //RX_FDEQ_GAIN_0 +40 0x5448 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4840 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x6048 //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4038 //RX_FDEQ_GAIN_7 +47 0x3C48 //RX_FDEQ_GAIN_8 +48 0x545C //RX_FDEQ_GAIN_9 +49 0x6864 //RX_FDEQ_GAIN_10 +50 0x7058 //RX_FDEQ_GAIN_11 +51 0x443C //RX_FDEQ_GAIN_12 +52 0x3838 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0204 //RX_FDEQ_BIN_5 +69 0x0A0A //RX_FDEQ_BIN_6 +70 0x0A0A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x002A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0780 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x5C5C //RX_FDEQ_GAIN_0 +40 0x5448 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4840 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x6048 //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4038 //RX_FDEQ_GAIN_7 +47 0x3C48 //RX_FDEQ_GAIN_8 +48 0x545C //RX_FDEQ_GAIN_9 +49 0x6864 //RX_FDEQ_GAIN_10 +50 0x7058 //RX_FDEQ_GAIN_11 +51 0x443C //RX_FDEQ_GAIN_12 +52 0x3838 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0204 //RX_FDEQ_BIN_5 +69 0x0A0A //RX_FDEQ_BIN_6 +70 0x0A0A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x003D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0EF7 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x685C //RX_FDEQ_GAIN_1 +41 0x6868 //RX_FDEQ_GAIN_2 +42 0x544C //RX_FDEQ_GAIN_3 +43 0x4C54 //RX_FDEQ_GAIN_4 +44 0x704C //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x445C //RX_FDEQ_GAIN_8 +48 0x6068 //RX_FDEQ_GAIN_9 +49 0x7070 //RX_FDEQ_GAIN_10 +50 0x7C74 //RX_FDEQ_GAIN_11 +51 0x6060 //RX_FDEQ_GAIN_12 +52 0x6C6C //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0204 //RX_FDEQ_BIN_5 +69 0x0A0A //RX_FDEQ_BIN_6 +70 0x0A0A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x003D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0EF7 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x685C //RX_FDEQ_GAIN_1 +41 0x6868 //RX_FDEQ_GAIN_2 +42 0x544C //RX_FDEQ_GAIN_3 +43 0x4C54 //RX_FDEQ_GAIN_4 +44 0x704C //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x445C //RX_FDEQ_GAIN_8 +48 0x6068 //RX_FDEQ_GAIN_9 +49 0x7070 //RX_FDEQ_GAIN_10 +50 0x7C74 //RX_FDEQ_GAIN_11 +51 0x6060 //RX_FDEQ_GAIN_12 +52 0x6C6C //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0204 //RX_FDEQ_BIN_5 +69 0x0A0A //RX_FDEQ_BIN_6 +70 0x0A0A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0063 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0EF7 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x685C //RX_FDEQ_GAIN_1 +41 0x6868 //RX_FDEQ_GAIN_2 +42 0x544C //RX_FDEQ_GAIN_3 +43 0x4C54 //RX_FDEQ_GAIN_4 +44 0x704C //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x445C //RX_FDEQ_GAIN_8 +48 0x6068 //RX_FDEQ_GAIN_9 +49 0x7070 //RX_FDEQ_GAIN_10 +50 0x7C74 //RX_FDEQ_GAIN_11 +51 0x6060 //RX_FDEQ_GAIN_12 +52 0x6C6C //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0204 //RX_FDEQ_BIN_5 +69 0x0A0A //RX_FDEQ_BIN_6 +70 0x0A0A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-SWB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x6F7C //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0002 //TX_MIC_DATA_SRC0 +42 0x0000 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7D83 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0400 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7600 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x2000 //TX_MIN_EQ_RE_EST_0 +153 0x0600 //TX_MIN_EQ_RE_EST_1 +154 0x3000 //TX_MIN_EQ_RE_EST_2 +155 0x3000 //TX_MIN_EQ_RE_EST_3 +156 0x3000 //TX_MIN_EQ_RE_EST_4 +157 0x3000 //TX_MIN_EQ_RE_EST_5 +158 0x3000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x7800 //TX_MIN_EQ_RE_EST_8 +161 0x7800 //TX_MIN_EQ_RE_EST_9 +162 0x7800 //TX_MIN_EQ_RE_EST_10 +163 0x7800 //TX_MIN_EQ_RE_EST_11 +164 0x7800 //TX_MIN_EQ_RE_EST_12 +165 0x0880 //TX_LAMBDA_RE_EST +166 0x7FFF //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x05DC //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7FF0 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 +206 0x5000 //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x36B0 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x733C //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x3A98 //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFA00 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0000 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x003C //TX_NS_LVL_CTRL_1 +283 0x003C //TX_NS_LVL_CTRL_2 +284 0x0024 //TX_NS_LVL_CTRL_3 +285 0x003C //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x0011 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0010 //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x1400 //TX_SNRI_SUP_1 +302 0x1400 //TX_SNRI_SUP_2 +303 0x1400 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x50C0 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x5000 //TX_A_POST_FILT_S_0 +315 0x7C00 //TX_A_POST_FILT_S_1 +316 0x4C00 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x6000 //TX_B_POST_FILT_2 +325 0x6000 //TX_B_POST_FILT_3 +326 0x6000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C00 //TX_LAMBDA_PFILT +339 0x7D00 //TX_LAMBDA_PFILT_S_0 +340 0x7D00 //TX_LAMBDA_PFILT_S_1 +341 0x7D00 //TX_LAMBDA_PFILT_S_2 +342 0x7D00 //TX_LAMBDA_PFILT_S_3 +343 0x7D00 //TX_LAMBDA_PFILT_S_4 +344 0x7D00 //TX_LAMBDA_PFILT_S_5 +345 0x7D00 //TX_LAMBDA_PFILT_S_6 +346 0x7D00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0040 //TX_DT_BINVAD_TH_0 +354 0x0040 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 +356 0x0100 //TX_DT_BINVAD_TH_3 +357 0x36B0 //TX_DT_BINVAD_ENDF +358 0x0200 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x01F4 //TX_NOISE_TH_2 +372 0x36B0 //TX_NOISE_TH_3 +373 0x2710 //TX_NOISE_TH_4 +374 0x2CEC //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0DAC //TX_NOISE_TH_6 +379 0x0050 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0050 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4000 //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x5450 //TX_FDEQ_GAIN_0 +568 0x4C48 //TX_FDEQ_GAIN_1 +569 0x4850 //TX_FDEQ_GAIN_2 +570 0x5050 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x484E //TX_FDEQ_GAIN_5 +573 0x4E5E //TX_FDEQ_GAIN_6 +574 0x584E //TX_FDEQ_GAIN_7 +575 0x4C4E //TX_FDEQ_GAIN_8 +576 0x564E //TX_FDEQ_GAIN_9 +577 0x5058 //TX_FDEQ_GAIN_10 +578 0x625C //TX_FDEQ_GAIN_11 +579 0x6C6C //TX_FDEQ_GAIN_12 +580 0x7086 //TX_FDEQ_GAIN_13 +581 0x869C //TX_FDEQ_GAIN_14 +582 0xB0B0 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x284A //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x494A //TX_PREEQ_GAIN_MIC0_8 +626 0x4B4C //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4A //TX_PREEQ_GAIN_MIC0_10 +628 0x484B //TX_PREEQ_GAIN_MIC0_11 +629 0x4C4C //TX_PREEQ_GAIN_MIC0_12 +630 0x4B48 //TX_PREEQ_GAIN_MIC0_13 +631 0x3838 //TX_PREEQ_GAIN_MIC0_14 +632 0x3835 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1719 //TX_PREEQ_BIN_MIC0_11 +653 0x1B1E //TX_PREEQ_BIN_MIC0_12 +654 0x1E1E //TX_PREEQ_BIN_MIC0_13 +655 0x1E28 //TX_PREEQ_BIN_MIC0_14 +656 0x282C //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 +676 0x403E //TX_PREEQ_GAIN_MIC1_10 +677 0x3D3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3C3C //TX_PREEQ_GAIN_MIC1_12 +679 0x3C39 //TX_PREEQ_GAIN_MIC1_13 +680 0x3838 //TX_PREEQ_GAIN_MIC1_14 +681 0x3A3C //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x282C //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0xF200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0003 //TX_TDDRC_THRD_0 +855 0x0004 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0C97 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x003C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0403 //RX_PGA +11 0x7D83 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x7C48 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4860 //RX_FDEQ_GAIN_8 +48 0x7468 //RX_FDEQ_GAIN_9 +49 0x5858 //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x5C54 //RX_FDEQ_GAIN_12 +52 0x5448 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x5858 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0550 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0014 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0780 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x3434 //RX_FDEQ_GAIN_3 +43 0x3840 //RX_FDEQ_GAIN_4 +44 0x4838 //RX_FDEQ_GAIN_5 +45 0x5444 //RX_FDEQ_GAIN_6 +46 0x443C //RX_FDEQ_GAIN_7 +47 0x3C60 //RX_FDEQ_GAIN_8 +48 0x6460 //RX_FDEQ_GAIN_9 +49 0x6064 //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5440 //RX_FDEQ_GAIN_12 +52 0x4040 //RX_FDEQ_GAIN_13 +53 0x4040 //RX_FDEQ_GAIN_14 +54 0x5858 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0013 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0780 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x3434 //RX_FDEQ_GAIN_3 +43 0x3840 //RX_FDEQ_GAIN_4 +44 0x4838 //RX_FDEQ_GAIN_5 +45 0x5444 //RX_FDEQ_GAIN_6 +46 0x443C //RX_FDEQ_GAIN_7 +47 0x3C60 //RX_FDEQ_GAIN_8 +48 0x6460 //RX_FDEQ_GAIN_9 +49 0x6064 //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5440 //RX_FDEQ_GAIN_12 +52 0x4040 //RX_FDEQ_GAIN_13 +53 0x4040 //RX_FDEQ_GAIN_14 +54 0x5858 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0780 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x3434 //RX_FDEQ_GAIN_3 +43 0x3840 //RX_FDEQ_GAIN_4 +44 0x4838 //RX_FDEQ_GAIN_5 +45 0x5444 //RX_FDEQ_GAIN_6 +46 0x443C //RX_FDEQ_GAIN_7 +47 0x3C60 //RX_FDEQ_GAIN_8 +48 0x6460 //RX_FDEQ_GAIN_9 +49 0x6064 //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5440 //RX_FDEQ_GAIN_12 +52 0x4040 //RX_FDEQ_GAIN_13 +53 0x4040 //RX_FDEQ_GAIN_14 +54 0x5858 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0027 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0780 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x3434 //RX_FDEQ_GAIN_3 +43 0x3840 //RX_FDEQ_GAIN_4 +44 0x4838 //RX_FDEQ_GAIN_5 +45 0x5444 //RX_FDEQ_GAIN_6 +46 0x443C //RX_FDEQ_GAIN_7 +47 0x3C60 //RX_FDEQ_GAIN_8 +48 0x6460 //RX_FDEQ_GAIN_9 +49 0x6064 //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5440 //RX_FDEQ_GAIN_12 +52 0x4040 //RX_FDEQ_GAIN_13 +53 0x4040 //RX_FDEQ_GAIN_14 +54 0x5858 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0039 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0EF7 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6850 //RX_FDEQ_GAIN_1 +41 0x5048 //RX_FDEQ_GAIN_2 +42 0x383C //RX_FDEQ_GAIN_3 +43 0x4048 //RX_FDEQ_GAIN_4 +44 0x7040 //RX_FDEQ_GAIN_5 +45 0x4C44 //RX_FDEQ_GAIN_6 +46 0x4448 //RX_FDEQ_GAIN_7 +47 0x4868 //RX_FDEQ_GAIN_8 +48 0x7C70 //RX_FDEQ_GAIN_9 +49 0x707C //RX_FDEQ_GAIN_10 +50 0x786C //RX_FDEQ_GAIN_11 +51 0x6454 //RX_FDEQ_GAIN_12 +52 0x604C //RX_FDEQ_GAIN_13 +53 0x585C //RX_FDEQ_GAIN_14 +54 0x7480 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0034 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0EF7 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6850 //RX_FDEQ_GAIN_1 +41 0x5048 //RX_FDEQ_GAIN_2 +42 0x383C //RX_FDEQ_GAIN_3 +43 0x4048 //RX_FDEQ_GAIN_4 +44 0x7040 //RX_FDEQ_GAIN_5 +45 0x4C44 //RX_FDEQ_GAIN_6 +46 0x4448 //RX_FDEQ_GAIN_7 +47 0x4868 //RX_FDEQ_GAIN_8 +48 0x7C70 //RX_FDEQ_GAIN_9 +49 0x707C //RX_FDEQ_GAIN_10 +50 0x786C //RX_FDEQ_GAIN_11 +51 0x6454 //RX_FDEQ_GAIN_12 +52 0x604C //RX_FDEQ_GAIN_13 +53 0x585C //RX_FDEQ_GAIN_14 +54 0x7480 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0059 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0EF7 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6850 //RX_FDEQ_GAIN_1 +41 0x5048 //RX_FDEQ_GAIN_2 +42 0x383C //RX_FDEQ_GAIN_3 +43 0x4048 //RX_FDEQ_GAIN_4 +44 0x7040 //RX_FDEQ_GAIN_5 +45 0x4C44 //RX_FDEQ_GAIN_6 +46 0x4448 //RX_FDEQ_GAIN_7 +47 0x4868 //RX_FDEQ_GAIN_8 +48 0x7C70 //RX_FDEQ_GAIN_9 +49 0x707C //RX_FDEQ_GAIN_10 +50 0x786C //RX_FDEQ_GAIN_11 +51 0x6454 //RX_FDEQ_GAIN_12 +52 0x604C //RX_FDEQ_GAIN_13 +53 0x585C //RX_FDEQ_GAIN_14 +54 0x7480 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x6B7C //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0002 //TX_MIC_DATA_SRC0 +42 0x0000 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0300 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x2000 //TX_MIN_EQ_RE_EST_1 +154 0x2000 //TX_MIN_EQ_RE_EST_2 +155 0x4000 //TX_MIN_EQ_RE_EST_3 +156 0x4000 //TX_MIN_EQ_RE_EST_4 +157 0x7FFF //TX_MIN_EQ_RE_EST_5 +158 0x7FFF //TX_MIN_EQ_RE_EST_6 +159 0x7FFF //TX_MIN_EQ_RE_EST_7 +160 0x7FFF //TX_MIN_EQ_RE_EST_8 +161 0x7FFF //TX_MIN_EQ_RE_EST_9 +162 0x7FFF //TX_MIN_EQ_RE_EST_10 +163 0x7FFF //TX_MIN_EQ_RE_EST_11 +164 0x7FFF //TX_MIN_EQ_RE_EST_12 +165 0x0700 //TX_LAMBDA_RE_EST +166 0x0CCD //TX_LAMBDA_CB_NLE +167 0x2000 //TX_C_POST_FLT +168 0x7FFF //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x09C4 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7D00 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0DAC //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1194 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0063 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x0A28 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFB00 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0014 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x0011 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0010 //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x50C0 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x5000 //TX_A_POST_FILT_S_0 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x4C00 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C00 //TX_LAMBDA_PFILT +339 0x7C00 //TX_LAMBDA_PFILT_S_0 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7C00 //TX_LAMBDA_PFILT_S_2 +342 0x7A00 //TX_LAMBDA_PFILT_S_3 +343 0x7C00 //TX_LAMBDA_PFILT_S_4 +344 0x7C00 //TX_LAMBDA_PFILT_S_5 +345 0x7C00 //TX_LAMBDA_PFILT_S_6 +346 0x7C00 //TX_LAMBDA_PFILT_S_7 +347 0x0180 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x2000 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0200 //TX_DT_BINVAD_TH_2 +356 0x0200 //TX_DT_BINVAD_TH_3 +357 0x1F40 //TX_DT_BINVAD_ENDF +358 0x0100 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x4E20 //TX_NOISE_TH_3 +373 0x4E20 //TX_NOISE_TH_4 +374 0x59D8 //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x2710 //TX_NOISE_TH_6 +379 0x0033 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0033 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x7FFF //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x484C //TX_FDEQ_GAIN_3 +571 0x4C4C //TX_FDEQ_GAIN_4 +572 0x544C //TX_FDEQ_GAIN_5 +573 0x5454 //TX_FDEQ_GAIN_6 +574 0x5454 //TX_FDEQ_GAIN_7 +575 0x585A //TX_FDEQ_GAIN_8 +576 0x5C5C //TX_FDEQ_GAIN_9 +577 0x6068 //TX_FDEQ_GAIN_10 +578 0x8894 //TX_FDEQ_GAIN_11 +579 0x94B4 //TX_FDEQ_GAIN_12 +580 0xB4C7 //TX_FDEQ_GAIN_13 +581 0xC7C6 //TX_FDEQ_GAIN_14 +582 0xC6C6 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0304 //TX_FDEQ_BIN_2 +594 0x0405 //TX_FDEQ_BIN_3 +595 0x0607 //TX_FDEQ_BIN_4 +596 0x0809 //TX_FDEQ_BIN_5 +597 0x0A0B //TX_FDEQ_BIN_6 +598 0x0C0D //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x1011 //TX_FDEQ_BIN_9 +601 0x1214 //TX_FDEQ_BIN_10 +602 0x1618 //TX_FDEQ_BIN_11 +603 0x1C1C //TX_FDEQ_BIN_12 +604 0x2020 //TX_FDEQ_BIN_13 +605 0x2020 //TX_FDEQ_BIN_14 +606 0x2011 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4849 //TX_PREEQ_GAIN_MIC0_6 +624 0x4A4B //TX_PREEQ_GAIN_MIC0_7 +625 0x4C4B //TX_PREEQ_GAIN_MIC0_8 +626 0x4A48 //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4C //TX_PREEQ_GAIN_MIC0_10 +628 0x4C4B //TX_PREEQ_GAIN_MIC0_11 +629 0x4838 //TX_PREEQ_GAIN_MIC0_12 +630 0x3858 //TX_PREEQ_GAIN_MIC0_13 +631 0x7060 //TX_PREEQ_GAIN_MIC0_14 +632 0x9870 //TX_PREEQ_GAIN_MIC0_15 +633 0x5848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x4000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4645 //TX_PREEQ_GAIN_MIC1_6 +673 0x4442 //TX_PREEQ_GAIN_MIC1_7 +674 0x4140 //TX_PREEQ_GAIN_MIC1_8 +675 0x3E3D //TX_PREEQ_GAIN_MIC1_9 +676 0x3C3C //TX_PREEQ_GAIN_MIC1_10 +677 0x3C3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3938 //TX_PREEQ_GAIN_MIC1_12 +679 0x3A3C //TX_PREEQ_GAIN_MIC1_13 +680 0x3C3E //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x4000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0C00 //TX_TDDRC_ALPHA_UP_01 +784 0x0C00 //TX_TDDRC_ALPHA_UP_02 +785 0x0C00 //TX_TDDRC_ALPHA_UP_03 +786 0x0C00 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0004 //TX_TDDRC_THRD_0 +855 0x0016 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x0C00 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0A00 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x002C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +10 0x0403 //RX_PGA +11 0x7E56 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0014 //RX_NS_LVL_CTRL +23 0xF400 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0012 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0012 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0025 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0035 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x004D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0074 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF 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HEADSET-USB_BLACKBIRD-VOICE_GENERIC-NB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0009 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2B68 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0B80 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7646 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x7CCC //TX_THR_PITCH_DET_0 +131 0x7000 //TX_THR_PITCH_DET_1 +132 0x6333 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0010 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x4000 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x2900 //TX_MIN_EQ_RE_EST_0 +153 0x1000 //TX_MIN_EQ_RE_EST_1 +154 0x1000 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x2000 //TX_C_POST_FLT +168 0x2000 //TX_GAIN_NP +169 0x0064 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x5000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7F00 //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x2000 //TX_DTD_THR2_3 +208 0x2000 //TX_DTD_THR2_4 +209 0x2000 //TX_DTD_THR2_5 +210 0x2000 //TX_DTD_THR2_6 +211 0x4100 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x2000 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0010 //TX_EPD_OFFSET_00 +233 0x0010 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xFA00 //TX_THR_SN_EST_0 +243 0xFD00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFA00 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xFA00 //TX_THR_SN_EST_6 +249 0xFA00 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0000 //TX_DELTA_THR_SN_EST_2 +253 0x0400 //TX_DELTA_THR_SN_EST_3 +254 0x0000 //TX_DELTA_THR_SN_EST_4 +255 0x0000 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0000 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x0400 //TX_B_POST_FLT_0 +280 0x0400 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0014 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0010 //TX_NS_LVL_CTRL_5 +287 0x0010 //TX_NS_LVL_CTRL_6 +288 0x0010 //TX_NS_LVL_CTRL_7 +289 0x000D //TX_MIN_GAIN_S_0 +290 0x0012 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0012 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 +294 0x000D //TX_MIN_GAIN_S_5 +295 0x000D //TX_MIN_GAIN_S_6 +296 0x000D //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x5000 //TX_SNRI_SUP_2 +303 0x5000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0014 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x7FFF //TX_A_POST_FILT_S_1 +316 0x1000 //TX_A_POST_FILT_S_2 +317 0x7000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x4000 //TX_A_POST_FILT_S_7 +322 0x0400 //TX_B_POST_FILT_0 +323 0x0400 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x2000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7F00 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x6000 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x0FA0 //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0029 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x0900 //TX_NOISE_TH_1 +371 0x0033 //TX_NOISE_TH_2 +372 0x36B0 //TX_NOISE_TH_3 +373 0x0231 //TX_NOISE_TH_4 +374 0x68DE //TX_NOISE_TH_5 +375 0x5784 //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x0000 //TX_NOISE_TH_5_4 +378 0x00C8 //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x00CE //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0280 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2400 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0640 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x2000 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0064 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0014 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x443C //TX_FDEQ_GAIN_5 +573 0x2A30 //TX_FDEQ_GAIN_6 +574 0x2C2C //TX_FDEQ_GAIN_7 +575 0x2820 //TX_FDEQ_GAIN_8 +576 0x2024 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0000 //TX_FDEQ_BIN_10 +602 0x0000 //TX_FDEQ_BIN_11 +603 0x0000 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0010 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0608 //TX_PREEQ_BIN_MIC0_0 +642 0x0808 //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x0808 //TX_PREEQ_BIN_MIC0_3 +645 0x0808 //TX_PREEQ_BIN_MIC0_4 +646 0x0808 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0802 //TX_PREEQ_BIN_MIC0_7 +649 0x0000 //TX_PREEQ_BIN_MIC0_8 +650 0x0000 //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0010 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0608 //TX_PREEQ_BIN_MIC1_0 +691 0x0808 //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x0808 //TX_PREEQ_BIN_MIC1_3 +694 0x0808 //TX_PREEQ_BIN_MIC1_4 +695 0x0808 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0802 //TX_PREEQ_BIN_MIC1_7 +698 0x0000 //TX_PREEQ_BIN_MIC1_8 +699 0x0000 //TX_PREEQ_BIN_MIC1_9 +700 0x0000 //TX_PREEQ_BIN_MIC1_10 +701 0x0000 //TX_PREEQ_BIN_MIC1_11 +702 0x0000 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0010 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0802 //TX_PREEQ_BIN_MIC2_7 +747 0x0000 //TX_PREEQ_BIN_MIC2_8 +748 0x0000 //TX_PREEQ_BIN_MIC2_9 +749 0x0000 //TX_PREEQ_BIN_MIC2_10 +750 0x0000 //TX_PREEQ_BIN_MIC2_11 +751 0x0000 //TX_PREEQ_BIN_MIC2_12 +752 0x0000 //TX_PREEQ_BIN_MIC2_13 +753 0x0000 //TX_PREEQ_BIN_MIC2_14 +754 0x0000 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0065 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0065 //TX_MIC_CALIBRATION_2 +768 0x0065 //TX_MIC_CALIBRATION_3 +769 0x0044 //TX_MIC_PWR_BIAS_0 +770 0x0044 //TX_MIC_PWR_BIAS_1 +771 0x0044 //TX_MIC_PWR_BIAS_2 +772 0x0044 //TX_MIC_PWR_BIAS_3 +773 0x000B //TX_GAIN_LIMIT_0 +774 0x000B //TX_GAIN_LIMIT_1 +775 0x000B //TX_GAIN_LIMIT_2 +776 0x000B //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0001 //TX_FILTINDX +854 0x0002 //TX_TDDRC_THRD_0 +855 0x0008 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0700 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0x2000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x002C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x5FFC //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1C00 //RX_TDDRC_THRD_2 +115 0x1D00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01F4 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x000A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x5FFC //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1C00 //RX_TDDRC_THRD_2 +115 0x1D00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01F4 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x5FFC //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1C00 //RX_TDDRC_THRD_2 +115 0x1D00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0014 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x5FFC //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1C00 //RX_TDDRC_THRD_2 +115 0x1D00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01D9 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0020 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x5FFC //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1C00 //RX_TDDRC_THRD_2 +115 0x1D00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0211 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0030 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x5FFC //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1C00 //RX_TDDRC_THRD_2 +115 0x1D00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0211 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x004A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x5FFC //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1C00 //RX_TDDRC_THRD_2 +115 0x1D00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0211 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0087 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x5FFC //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1C00 //RX_TDDRC_THRD_2 +115 0x1D00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0211 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-WB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0009 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2B68 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0001 //TX_SAMPLINGFREQ_SIG +7 0x0001 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0B80 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7D83 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x4500 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x0064 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7D00 //TX_DTD_THR1_0 +198 0x7D00 //TX_DTD_THR1_1 +199 0x7D00 //TX_DTD_THR1_2 +200 0x7D00 //TX_DTD_THR1_3 +201 0x7D00 //TX_DTD_THR1_4 +202 0x7D00 //TX_DTD_THR1_5 +203 0x7D00 //TX_DTD_THR1_6 +204 0x4000 //TX_DTD_THR2_0 +205 0x1000 //TX_DTD_THR2_1 +206 0x1000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x1000 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0019 //TX_EPD_OFFSET_00 +233 0x0019 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xF700 //TX_THR_SN_EST_2 +245 0xFC00 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x6000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000F //TX_NS_LVL_CTRL_0 +282 0x0018 //TX_NS_LVL_CTRL_1 +283 0x0014 //TX_NS_LVL_CTRL_2 +284 0x001C //TX_NS_LVL_CTRL_3 +285 0x0012 //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x0009 //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x6000 //TX_SNRI_SUP_2 +303 0x2000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x3000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7F00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0065 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x0900 //TX_NOISE_TH_1 +371 0x009B //TX_NOISE_TH_2 +372 0x4149 //TX_NOISE_TH_3 +373 0x0331 //TX_NOISE_TH_4 +374 0x542C //TX_NOISE_TH_5 +375 0x55E5 //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x00FB //TX_NOISE_TH_6 +379 0x0029 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0029 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x001C //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4849 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4140 //TX_FDEQ_GAIN_5 +573 0x3838 //TX_FDEQ_GAIN_6 +574 0x3839 //TX_FDEQ_GAIN_7 +575 0x3830 //TX_FDEQ_GAIN_8 +576 0x3033 //TX_FDEQ_GAIN_9 +577 0x2E2E //TX_FDEQ_GAIN_10 +578 0x2A2A //TX_FDEQ_GAIN_11 +579 0x2A32 //TX_FDEQ_GAIN_12 +580 0x3838 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0E0F //TX_FDEQ_BIN_10 +602 0x0F10 //TX_FDEQ_BIN_11 +603 0x1011 //TX_FDEQ_BIN_12 +604 0x1112 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0608 //TX_PREEQ_BIN_MIC0_0 +642 0x0808 //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x0808 //TX_PREEQ_BIN_MIC0_3 +645 0x0808 //TX_PREEQ_BIN_MIC0_4 +646 0x0808 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0808 //TX_PREEQ_BIN_MIC0_7 +649 0x0808 //TX_PREEQ_BIN_MIC0_8 +650 0x0808 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0808 //TX_PREEQ_BIN_MIC0_11 +653 0x0808 //TX_PREEQ_BIN_MIC0_12 +654 0x0808 //TX_PREEQ_BIN_MIC0_13 +655 0x0808 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0608 //TX_PREEQ_BIN_MIC1_0 +691 0x0808 //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x0808 //TX_PREEQ_BIN_MIC1_3 +694 0x0808 //TX_PREEQ_BIN_MIC1_4 +695 0x0808 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0808 //TX_PREEQ_BIN_MIC1_7 +698 0x0808 //TX_PREEQ_BIN_MIC1_8 +699 0x0808 //TX_PREEQ_BIN_MIC1_9 +700 0x0808 //TX_PREEQ_BIN_MIC1_10 +701 0x0808 //TX_PREEQ_BIN_MIC1_11 +702 0x0808 //TX_PREEQ_BIN_MIC1_12 +703 0x0808 //TX_PREEQ_BIN_MIC1_13 +704 0x0808 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0001 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0700 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xCCCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x002C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0001 //RX_SAMPLINGFREQ_SIG +3 0x0001 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x484B //RX_FDEQ_GAIN_6 +46 0x4B48 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4846 //RX_FDEQ_GAIN_10 +50 0x403F //RX_FDEQ_GAIN_11 +51 0x3F40 //RX_FDEQ_GAIN_12 +52 0x4248 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1C00 //RX_TDDRC_THRD_2 +115 0x1D00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01AE //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1C00 //RX_TDDRC_THRD_2 +115 0x1D00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01AE //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x484B //RX_FDEQ_GAIN_6 +46 0x4B48 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4846 //RX_FDEQ_GAIN_10 +50 0x403F //RX_FDEQ_GAIN_11 +51 0x3F40 //RX_FDEQ_GAIN_12 +52 0x4248 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1C00 //RX_TDDRC_THRD_2 +115 0x1D00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01B6 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x484B //RX_FDEQ_GAIN_6 +46 0x4B48 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4846 //RX_FDEQ_GAIN_10 +50 0x403F //RX_FDEQ_GAIN_11 +51 0x3F40 //RX_FDEQ_GAIN_12 +52 0x4248 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0012 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1C00 //RX_TDDRC_THRD_2 +115 0x1D00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C9 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x484B //RX_FDEQ_GAIN_6 +46 0x4B48 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4846 //RX_FDEQ_GAIN_10 +50 0x403F //RX_FDEQ_GAIN_11 +51 0x3F40 //RX_FDEQ_GAIN_12 +52 0x4248 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1C00 //RX_TDDRC_THRD_2 +115 0x1D00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C9 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x484B //RX_FDEQ_GAIN_6 +46 0x4B48 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4846 //RX_FDEQ_GAIN_10 +50 0x403F //RX_FDEQ_GAIN_11 +51 0x3F40 //RX_FDEQ_GAIN_12 +52 0x4248 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0030 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1C00 //RX_TDDRC_THRD_2 +115 0x1D00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C9 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x484B //RX_FDEQ_GAIN_6 +46 0x4B48 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4846 //RX_FDEQ_GAIN_10 +50 0x403F //RX_FDEQ_GAIN_11 +51 0x3F40 //RX_FDEQ_GAIN_12 +52 0x4248 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0051 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1C00 //RX_TDDRC_THRD_2 +115 0x1D00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C9 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x484B //RX_FDEQ_GAIN_6 +46 0x4B48 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4846 //RX_FDEQ_GAIN_10 +50 0x403F //RX_FDEQ_GAIN_11 +51 0x3F40 //RX_FDEQ_GAIN_12 +52 0x4248 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0095 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1C00 //RX_TDDRC_THRD_2 +115 0x1D00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01A0 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x484B //RX_FDEQ_GAIN_6 +46 0x4B48 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4846 //RX_FDEQ_GAIN_10 +50 0x403F //RX_FDEQ_GAIN_11 +51 0x3F40 //RX_FDEQ_GAIN_12 +52 0x4248 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-SWB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x6B68 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0B80 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7EFF //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6D60 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7D00 //TX_DTD_THR1_0 +198 0x7D00 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00F0 //TX_EPD_OFFSET_00 +233 0x00F0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xF700 //TX_THR_SN_EST_2 +245 0xFA00 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x6000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000F //TX_NS_LVL_CTRL_0 +282 0x0018 //TX_NS_LVL_CTRL_1 +283 0x0014 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0012 //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x0009 //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x6000 //TX_SNRI_SUP_2 +303 0x5000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x3000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7F00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7000 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x2904 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4040 //TX_FDEQ_GAIN_6 +574 0x4040 //TX_FDEQ_GAIN_7 +575 0x4040 //TX_FDEQ_GAIN_8 +576 0x3838 //TX_FDEQ_GAIN_9 +577 0x3838 //TX_FDEQ_GAIN_10 +578 0x3828 //TX_FDEQ_GAIN_11 +579 0x2828 //TX_FDEQ_GAIN_12 +580 0x2828 //TX_FDEQ_GAIN_13 +581 0x1C1C //TX_FDEQ_GAIN_14 +582 0x1C1C //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x284A //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0020 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x07F2 //TX_TDDRC_DRC_GAIN +867 0x78D6 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x002C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x1800 //RX_THR_PITCH_DET_0 +14 0x1000 //RX_THR_PITCH_DET_1 +15 0x0800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0003 //RX_NS_LVL_CTRL +23 0x9000 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4E52 //RX_FDEQ_GAIN_0 +40 0x5252 //RX_FDEQ_GAIN_1 +41 0x5252 //RX_FDEQ_GAIN_2 +42 0x5250 //RX_FDEQ_GAIN_3 +43 0x4C46 //RX_FDEQ_GAIN_4 +44 0x4748 //RX_FDEQ_GAIN_5 +45 0x5768 //RX_FDEQ_GAIN_6 +46 0x6162 //RX_FDEQ_GAIN_7 +47 0x5252 //RX_FDEQ_GAIN_8 +48 0x5256 //RX_FDEQ_GAIN_9 +49 0x5248 //RX_FDEQ_GAIN_10 +50 0x3434 //RX_FDEQ_GAIN_11 +51 0x3436 //RX_FDEQ_GAIN_12 +52 0x2A18 //RX_FDEQ_GAIN_13 +53 0x1830 //RX_FDEQ_GAIN_14 +54 0x3648 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x284A //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x023E //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x023E //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4E52 //RX_FDEQ_GAIN_0 +40 0x5252 //RX_FDEQ_GAIN_1 +41 0x5252 //RX_FDEQ_GAIN_2 +42 0x5250 //RX_FDEQ_GAIN_3 +43 0x4C46 //RX_FDEQ_GAIN_4 +44 0x4748 //RX_FDEQ_GAIN_5 +45 0x5768 //RX_FDEQ_GAIN_6 +46 0x6162 //RX_FDEQ_GAIN_7 +47 0x5252 //RX_FDEQ_GAIN_8 +48 0x5256 //RX_FDEQ_GAIN_9 +49 0x5248 //RX_FDEQ_GAIN_10 +50 0x3434 //RX_FDEQ_GAIN_11 +51 0x3436 //RX_FDEQ_GAIN_12 +52 0x2A18 //RX_FDEQ_GAIN_13 +53 0x1830 //RX_FDEQ_GAIN_14 +54 0x3648 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x284A //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x023E //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4E52 //RX_FDEQ_GAIN_0 +40 0x5252 //RX_FDEQ_GAIN_1 +41 0x5252 //RX_FDEQ_GAIN_2 +42 0x5250 //RX_FDEQ_GAIN_3 +43 0x4C46 //RX_FDEQ_GAIN_4 +44 0x4748 //RX_FDEQ_GAIN_5 +45 0x5768 //RX_FDEQ_GAIN_6 +46 0x6162 //RX_FDEQ_GAIN_7 +47 0x5252 //RX_FDEQ_GAIN_8 +48 0x5256 //RX_FDEQ_GAIN_9 +49 0x5248 //RX_FDEQ_GAIN_10 +50 0x3434 //RX_FDEQ_GAIN_11 +51 0x3436 //RX_FDEQ_GAIN_12 +52 0x2A18 //RX_FDEQ_GAIN_13 +53 0x1830 //RX_FDEQ_GAIN_14 +54 0x3648 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x284A //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0012 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0236 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4E52 //RX_FDEQ_GAIN_0 +40 0x5252 //RX_FDEQ_GAIN_1 +41 0x5252 //RX_FDEQ_GAIN_2 +42 0x5250 //RX_FDEQ_GAIN_3 +43 0x4C46 //RX_FDEQ_GAIN_4 +44 0x4748 //RX_FDEQ_GAIN_5 +45 0x5768 //RX_FDEQ_GAIN_6 +46 0x6162 //RX_FDEQ_GAIN_7 +47 0x5252 //RX_FDEQ_GAIN_8 +48 0x5256 //RX_FDEQ_GAIN_9 +49 0x5248 //RX_FDEQ_GAIN_10 +50 0x3434 //RX_FDEQ_GAIN_11 +51 0x3436 //RX_FDEQ_GAIN_12 +52 0x2A18 //RX_FDEQ_GAIN_13 +53 0x1830 //RX_FDEQ_GAIN_14 +54 0x3648 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x284A //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001F //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x023E //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4E52 //RX_FDEQ_GAIN_0 +40 0x5252 //RX_FDEQ_GAIN_1 +41 0x5252 //RX_FDEQ_GAIN_2 +42 0x5250 //RX_FDEQ_GAIN_3 +43 0x4C46 //RX_FDEQ_GAIN_4 +44 0x4748 //RX_FDEQ_GAIN_5 +45 0x5768 //RX_FDEQ_GAIN_6 +46 0x6162 //RX_FDEQ_GAIN_7 +47 0x5252 //RX_FDEQ_GAIN_8 +48 0x5256 //RX_FDEQ_GAIN_9 +49 0x5248 //RX_FDEQ_GAIN_10 +50 0x3434 //RX_FDEQ_GAIN_11 +51 0x3436 //RX_FDEQ_GAIN_12 +52 0x2A18 //RX_FDEQ_GAIN_13 +53 0x1830 //RX_FDEQ_GAIN_14 +54 0x3648 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x284A //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0033 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x023E //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4E52 //RX_FDEQ_GAIN_0 +40 0x5252 //RX_FDEQ_GAIN_1 +41 0x5252 //RX_FDEQ_GAIN_2 +42 0x5250 //RX_FDEQ_GAIN_3 +43 0x4C46 //RX_FDEQ_GAIN_4 +44 0x4748 //RX_FDEQ_GAIN_5 +45 0x5768 //RX_FDEQ_GAIN_6 +46 0x6162 //RX_FDEQ_GAIN_7 +47 0x5252 //RX_FDEQ_GAIN_8 +48 0x5256 //RX_FDEQ_GAIN_9 +49 0x5248 //RX_FDEQ_GAIN_10 +50 0x3434 //RX_FDEQ_GAIN_11 +51 0x3436 //RX_FDEQ_GAIN_12 +52 0x2A18 //RX_FDEQ_GAIN_13 +53 0x1830 //RX_FDEQ_GAIN_14 +54 0x3648 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x284A //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0055 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x023E //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4E52 //RX_FDEQ_GAIN_0 +40 0x5252 //RX_FDEQ_GAIN_1 +41 0x5252 //RX_FDEQ_GAIN_2 +42 0x5250 //RX_FDEQ_GAIN_3 +43 0x4C46 //RX_FDEQ_GAIN_4 +44 0x4748 //RX_FDEQ_GAIN_5 +45 0x5768 //RX_FDEQ_GAIN_6 +46 0x6162 //RX_FDEQ_GAIN_7 +47 0x5252 //RX_FDEQ_GAIN_8 +48 0x5256 //RX_FDEQ_GAIN_9 +49 0x5248 //RX_FDEQ_GAIN_10 +50 0x3434 //RX_FDEQ_GAIN_11 +51 0x3436 //RX_FDEQ_GAIN_12 +52 0x2A18 //RX_FDEQ_GAIN_13 +53 0x1830 //RX_FDEQ_GAIN_14 +54 0x3648 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x284A //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x008F //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x023E //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4E52 //RX_FDEQ_GAIN_0 +40 0x5252 //RX_FDEQ_GAIN_1 +41 0x5252 //RX_FDEQ_GAIN_2 +42 0x5250 //RX_FDEQ_GAIN_3 +43 0x4C46 //RX_FDEQ_GAIN_4 +44 0x4748 //RX_FDEQ_GAIN_5 +45 0x5768 //RX_FDEQ_GAIN_6 +46 0x6162 //RX_FDEQ_GAIN_7 +47 0x5252 //RX_FDEQ_GAIN_8 +48 0x5256 //RX_FDEQ_GAIN_9 +49 0x5248 //RX_FDEQ_GAIN_10 +50 0x3434 //RX_FDEQ_GAIN_11 +51 0x3436 //RX_FDEQ_GAIN_12 +52 0x2A18 //RX_FDEQ_GAIN_13 +53 0x1830 //RX_FDEQ_GAIN_14 +54 0x3648 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x284A //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0009 //TX_OPERATION_MODE_1 +2 0x0020 //TX_PATCH_REG +3 0x6B6A //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0B4C //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0200 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x61A8 //TX_EAD_THR +151 0x0400 //TX_THR_RE_EST +152 0x3000 //TX_MIN_EQ_RE_EST_0 +153 0x3000 //TX_MIN_EQ_RE_EST_1 +154 0x4000 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x6000 //TX_MIN_EQ_RE_EST_6 +159 0x6000 //TX_MIN_EQ_RE_EST_7 +160 0x6000 //TX_MIN_EQ_RE_EST_8 +161 0x6000 //TX_MIN_EQ_RE_EST_9 +162 0x4000 //TX_MIN_EQ_RE_EST_10 +163 0x4000 //TX_MIN_EQ_RE_EST_11 +164 0x4000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x4000 //TX_LAMBDA_CB_NLE +167 0x3000 //TX_C_POST_FLT +168 0x7FFF //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x0800 //TX_DTD_THR1_0 +198 0x0800 //TX_DTD_THR1_1 +199 0x0800 //TX_DTD_THR1_2 +200 0x0800 //TX_DTD_THR1_3 +201 0x0800 //TX_DTD_THR1_4 +202 0x0800 //TX_DTD_THR1_5 +203 0x0800 //TX_DTD_THR1_6 +204 0x0800 //TX_DTD_THR2_0 +205 0x0800 //TX_DTD_THR2_1 +206 0x0800 //TX_DTD_THR2_2 +207 0x0800 //TX_DTD_THR2_3 +208 0x0800 //TX_DTD_THR2_4 +209 0x0100 //TX_DTD_THR2_5 +210 0x0100 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x03E8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00C0 //TX_EPD_OFFSET_00 +233 0x00C0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF700 //TX_THR_SN_EST_0 +243 0xFB00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF700 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xF600 //TX_THR_SN_EST_5 +248 0xF600 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0200 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0400 //TX_DELTA_THR_SN_EST_2 +253 0x0300 //TX_DELTA_THR_SN_EST_3 +254 0x0600 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x2000 //TX_B_POST_FLT_1 +281 0x0012 //TX_NS_LVL_CTRL_0 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0020 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0019 //TX_NS_LVL_CTRL_4 +286 0x0010 //TX_NS_LVL_CTRL_5 +287 0x0010 //TX_NS_LVL_CTRL_6 +288 0x0010 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x0011 //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000F //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000C //TX_MIN_GAIN_S_7 +297 0x0800 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7000 //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x1000 //TX_SNRI_SUP_2 +303 0x7000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0016 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x6000 //TX_A_POST_FILT_S_0 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x6000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x6000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 +321 0x6000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x4000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x2000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7CCD //TX_LAMBDA_PFILT_S_0 +340 0x7CCD //TX_LAMBDA_PFILT_S_1 +341 0x7CCD //TX_LAMBDA_PFILT_S_2 +342 0x7CCD //TX_LAMBDA_PFILT_S_3 +343 0x7CCD //TX_LAMBDA_PFILT_S_4 +344 0x7CCD //TX_LAMBDA_PFILT_S_5 +345 0x7CCD //TX_LAMBDA_PFILT_S_6 +346 0x7CCD //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0500 //TX_A_PEPPER +349 0x1600 //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0020 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x02A6 //TX_NOISE_TH_1 +371 0x07DA //TX_NOISE_TH_2 +372 0x3194 //TX_NOISE_TH_3 +373 0x0960 //TX_NOISE_TH_4 +374 0x5555 //TX_NOISE_TH_5 +375 0x3FF4 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x0000 //TX_NOISE_TH_5_4 +378 0x02BC //TX_NOISE_TH_6 +379 0x0020 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0020 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x484C //TX_FDEQ_GAIN_10 +578 0x5054 //TX_FDEQ_GAIN_11 +579 0x606C //TX_FDEQ_GAIN_12 +580 0x7890 //TX_FDEQ_GAIN_13 +581 0x9C9C //TX_FDEQ_GAIN_14 +582 0x9C9C //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0304 //TX_FDEQ_BIN_2 +594 0x0405 //TX_FDEQ_BIN_3 +595 0x0607 //TX_FDEQ_BIN_4 +596 0x0809 //TX_FDEQ_BIN_5 +597 0x0A0B //TX_FDEQ_BIN_6 +598 0x0C0D //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x1011 //TX_FDEQ_BIN_9 +601 0x1214 //TX_FDEQ_BIN_10 +602 0x1618 //TX_FDEQ_BIN_11 +603 0x1C1C //TX_FDEQ_BIN_12 +604 0x2020 //TX_FDEQ_BIN_13 +605 0x2020 //TX_FDEQ_BIN_14 +606 0x2020 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0C00 //TX_TDDRC_ALPHA_UP_01 +784 0x0C00 //TX_TDDRC_ALPHA_UP_02 +785 0x0C00 //TX_TDDRC_ALPHA_UP_03 +786 0x0C00 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0001 //TX_TDDRC_THRD_0 +855 0x0001 //TX_TDDRC_THRD_1 +856 0x1900 //TX_TDDRC_THRD_2 +857 0x1900 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7B00 //TX_TDDRC_SLANT_1 +860 0x0C00 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x07F2 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x002C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7B02 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0500 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000A //RX_NS_LVL_CTRL +23 0xF600 //RX_THR_SN_EST +24 0x7000 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4852 //RX_FDEQ_GAIN_0 +40 0x5858 //RX_FDEQ_GAIN_1 +41 0x5C5A //RX_FDEQ_GAIN_2 +42 0x4F50 //RX_FDEQ_GAIN_3 +43 0x5A61 //RX_FDEQ_GAIN_4 +44 0x605B //RX_FDEQ_GAIN_5 +45 0x5050 //RX_FDEQ_GAIN_6 +46 0x5050 //RX_FDEQ_GAIN_7 +47 0x5044 //RX_FDEQ_GAIN_8 +48 0x3633 //RX_FDEQ_GAIN_9 +49 0x3424 //RX_FDEQ_GAIN_10 +50 0x1A24 //RX_FDEQ_GAIN_11 +51 0x2B37 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x000A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4852 //RX_FDEQ_GAIN_0 +40 0x5858 //RX_FDEQ_GAIN_1 +41 0x5C5A //RX_FDEQ_GAIN_2 +42 0x4F50 //RX_FDEQ_GAIN_3 +43 0x5A61 //RX_FDEQ_GAIN_4 +44 0x605B //RX_FDEQ_GAIN_5 +45 0x5050 //RX_FDEQ_GAIN_6 +46 0x5050 //RX_FDEQ_GAIN_7 +47 0x5044 //RX_FDEQ_GAIN_8 +48 0x3633 //RX_FDEQ_GAIN_9 +49 0x3424 //RX_FDEQ_GAIN_10 +50 0x1A24 //RX_FDEQ_GAIN_11 +51 0x2B37 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4852 //RX_FDEQ_GAIN_0 +40 0x5858 //RX_FDEQ_GAIN_1 +41 0x5C5A //RX_FDEQ_GAIN_2 +42 0x4F50 //RX_FDEQ_GAIN_3 +43 0x5A61 //RX_FDEQ_GAIN_4 +44 0x605B //RX_FDEQ_GAIN_5 +45 0x5050 //RX_FDEQ_GAIN_6 +46 0x5050 //RX_FDEQ_GAIN_7 +47 0x5044 //RX_FDEQ_GAIN_8 +48 0x3633 //RX_FDEQ_GAIN_9 +49 0x3424 //RX_FDEQ_GAIN_10 +50 0x1A24 //RX_FDEQ_GAIN_11 +51 0x2B37 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0010 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4852 //RX_FDEQ_GAIN_0 +40 0x5858 //RX_FDEQ_GAIN_1 +41 0x5C5A //RX_FDEQ_GAIN_2 +42 0x4F50 //RX_FDEQ_GAIN_3 +43 0x5A61 //RX_FDEQ_GAIN_4 +44 0x605B //RX_FDEQ_GAIN_5 +45 0x5050 //RX_FDEQ_GAIN_6 +46 0x5050 //RX_FDEQ_GAIN_7 +47 0x5044 //RX_FDEQ_GAIN_8 +48 0x3633 //RX_FDEQ_GAIN_9 +49 0x3424 //RX_FDEQ_GAIN_10 +50 0x1A24 //RX_FDEQ_GAIN_11 +51 0x2B37 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001C //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4852 //RX_FDEQ_GAIN_0 +40 0x5858 //RX_FDEQ_GAIN_1 +41 0x5C5A //RX_FDEQ_GAIN_2 +42 0x4F50 //RX_FDEQ_GAIN_3 +43 0x5A61 //RX_FDEQ_GAIN_4 +44 0x605B //RX_FDEQ_GAIN_5 +45 0x5050 //RX_FDEQ_GAIN_6 +46 0x5050 //RX_FDEQ_GAIN_7 +47 0x5044 //RX_FDEQ_GAIN_8 +48 0x3633 //RX_FDEQ_GAIN_9 +49 0x3424 //RX_FDEQ_GAIN_10 +50 0x1A24 //RX_FDEQ_GAIN_11 +51 0x2B37 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x002F //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4852 //RX_FDEQ_GAIN_0 +40 0x5858 //RX_FDEQ_GAIN_1 +41 0x5C5A //RX_FDEQ_GAIN_2 +42 0x4F50 //RX_FDEQ_GAIN_3 +43 0x5A61 //RX_FDEQ_GAIN_4 +44 0x605B //RX_FDEQ_GAIN_5 +45 0x5050 //RX_FDEQ_GAIN_6 +46 0x5050 //RX_FDEQ_GAIN_7 +47 0x5044 //RX_FDEQ_GAIN_8 +48 0x3633 //RX_FDEQ_GAIN_9 +49 0x3424 //RX_FDEQ_GAIN_10 +50 0x1A24 //RX_FDEQ_GAIN_11 +51 0x2B37 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x004F //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4852 //RX_FDEQ_GAIN_0 +40 0x5858 //RX_FDEQ_GAIN_1 +41 0x5C5A //RX_FDEQ_GAIN_2 +42 0x4F50 //RX_FDEQ_GAIN_3 +43 0x5A61 //RX_FDEQ_GAIN_4 +44 0x605B //RX_FDEQ_GAIN_5 +45 0x5050 //RX_FDEQ_GAIN_6 +46 0x5050 //RX_FDEQ_GAIN_7 +47 0x5044 //RX_FDEQ_GAIN_8 +48 0x3633 //RX_FDEQ_GAIN_9 +49 0x3424 //RX_FDEQ_GAIN_10 +50 0x1A24 //RX_FDEQ_GAIN_11 +51 0x2B37 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0081 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4852 //RX_FDEQ_GAIN_0 +40 0x5858 //RX_FDEQ_GAIN_1 +41 0x5C5A //RX_FDEQ_GAIN_2 +42 0x4F50 //RX_FDEQ_GAIN_3 +43 0x5A61 //RX_FDEQ_GAIN_4 +44 0x605B //RX_FDEQ_GAIN_5 +45 0x5050 //RX_FDEQ_GAIN_6 +46 0x5050 //RX_FDEQ_GAIN_7 +47 0x5044 //RX_FDEQ_GAIN_8 +48 0x3633 //RX_FDEQ_GAIN_9 +49 0x3424 //RX_FDEQ_GAIN_10 +50 0x1A24 //RX_FDEQ_GAIN_11 +51 0x2B37 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-NB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0008 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2B68 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0B80 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7646 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x7CCC //TX_THR_PITCH_DET_0 +131 0x7000 //TX_THR_PITCH_DET_1 +132 0x6333 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0010 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x1000 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x2000 //TX_C_POST_FLT +168 0x2000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x0064 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x5000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7F00 //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x2000 //TX_DTD_THR2_3 +208 0x2000 //TX_DTD_THR2_4 +209 0x2000 //TX_DTD_THR2_5 +210 0x2000 //TX_DTD_THR2_6 +211 0x4100 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x03E8 //TX_DT_CUT_K +214 0x1000 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0010 //TX_EPD_OFFSET_00 +233 0x0010 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xFA00 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFA00 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xFA00 //TX_THR_SN_EST_6 +249 0xFA00 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0000 //TX_DELTA_THR_SN_EST_2 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0000 //TX_DELTA_THR_SN_EST_4 +255 0x0000 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0000 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x0400 //TX_B_POST_FLT_0 +280 0x0400 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0010 //TX_NS_LVL_CTRL_1 +283 0x0010 //TX_NS_LVL_CTRL_2 +284 0x0010 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 +286 0x0010 //TX_NS_LVL_CTRL_5 +287 0x0010 //TX_NS_LVL_CTRL_6 +288 0x0010 //TX_NS_LVL_CTRL_7 +289 0x000D //TX_MIN_GAIN_S_0 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x000D //TX_MIN_GAIN_S_2 +292 0x000D //TX_MIN_GAIN_S_3 +293 0x000D //TX_MIN_GAIN_S_4 +294 0x000D //TX_MIN_GAIN_S_5 +295 0x000D //TX_MIN_GAIN_S_6 +296 0x000D //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0014 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x1000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x4000 //TX_A_POST_FILT_S_7 +322 0x0400 //TX_B_POST_FILT_0 +323 0x0400 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x2000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x0FA0 //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x1B58 //TX_NOISE_TH_0_2 +369 0x2134 //TX_NOISE_TH_0_3 +370 0x02BC //TX_NOISE_TH_1 +371 0x1F40 //TX_NOISE_TH_2 +372 0x4650 //TX_NOISE_TH_3 +373 0x7148 //TX_NOISE_TH_4 +374 0x044C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x0000 //TX_NOISE_TH_5_4 +378 0x0032 //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x00CE //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x7FFF //TX_NOISEDET_BOOST_TH +412 0x0000 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0280 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2400 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0640 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x2000 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0064 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0014 //TX_FDEQ_SUBNUM +567 0x6048 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4844 //TX_FDEQ_GAIN_6 +574 0x4444 //TX_FDEQ_GAIN_7 +575 0x4040 //TX_FDEQ_GAIN_8 +576 0x3C3C //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0401 //TX_FDEQ_BIN_0 +592 0x0103 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0000 //TX_FDEQ_BIN_10 +602 0x0000 //TX_FDEQ_BIN_11 +603 0x0000 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0010 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0608 //TX_PREEQ_BIN_MIC0_0 +642 0x0808 //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x0808 //TX_PREEQ_BIN_MIC0_3 +645 0x0808 //TX_PREEQ_BIN_MIC0_4 +646 0x0808 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0802 //TX_PREEQ_BIN_MIC0_7 +649 0x0000 //TX_PREEQ_BIN_MIC0_8 +650 0x0000 //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0010 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0608 //TX_PREEQ_BIN_MIC1_0 +691 0x0808 //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x0808 //TX_PREEQ_BIN_MIC1_3 +694 0x0808 //TX_PREEQ_BIN_MIC1_4 +695 0x0808 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0802 //TX_PREEQ_BIN_MIC1_7 +698 0x0000 //TX_PREEQ_BIN_MIC1_8 +699 0x0000 //TX_PREEQ_BIN_MIC1_9 +700 0x0000 //TX_PREEQ_BIN_MIC1_10 +701 0x0000 //TX_PREEQ_BIN_MIC1_11 +702 0x0000 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0010 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0802 //TX_PREEQ_BIN_MIC2_7 +747 0x0000 //TX_PREEQ_BIN_MIC2_8 +748 0x0000 //TX_PREEQ_BIN_MIC2_9 +749 0x0000 //TX_PREEQ_BIN_MIC2_10 +750 0x0000 //TX_PREEQ_BIN_MIC2_11 +751 0x0000 //TX_PREEQ_BIN_MIC2_12 +752 0x0000 //TX_PREEQ_BIN_MIC2_13 +753 0x0000 //TX_PREEQ_BIN_MIC2_14 +754 0x0000 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0065 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0065 //TX_MIC_CALIBRATION_2 +768 0x0065 //TX_MIC_CALIBRATION_3 +769 0x0044 //TX_MIC_PWR_BIAS_0 +770 0x0044 //TX_MIC_PWR_BIAS_1 +771 0x0044 //TX_MIC_PWR_BIAS_2 +772 0x0044 //TX_MIC_PWR_BIAS_3 +773 0x000B //TX_GAIN_LIMIT_0 +774 0x000B //TX_GAIN_LIMIT_1 +775 0x000B //TX_GAIN_LIMIT_2 +776 0x000B //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0001 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x05A0 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x002C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0200 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0200 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0200 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0013 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0200 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0020 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0200 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0036 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0200 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0200 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0099 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0200 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-WB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0008 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2B68 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0001 //TX_SAMPLINGFREQ_SIG +7 0x0001 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0B80 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7D83 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0019 //TX_EPD_OFFSET_00 +233 0x0019 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x6000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000F //TX_NS_LVL_CTRL_0 +282 0x000F //TX_NS_LVL_CTRL_1 +283 0x0011 //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x0000 //TX_NS_FP_K_METAL +411 0x7FFF //TX_NOISEDET_BOOST_TH +412 0x0000 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x001C //TX_FDEQ_SUBNUM +567 0x5850 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0302 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D07 //TX_FDEQ_BIN_9 +601 0x0E0F //TX_FDEQ_BIN_10 +602 0x0F10 //TX_FDEQ_BIN_11 +603 0x1011 //TX_FDEQ_BIN_12 +604 0x1119 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0608 //TX_PREEQ_BIN_MIC0_0 +642 0x0808 //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x0808 //TX_PREEQ_BIN_MIC0_3 +645 0x0808 //TX_PREEQ_BIN_MIC0_4 +646 0x0808 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0808 //TX_PREEQ_BIN_MIC0_7 +649 0x0808 //TX_PREEQ_BIN_MIC0_8 +650 0x0808 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0808 //TX_PREEQ_BIN_MIC0_11 +653 0x0808 //TX_PREEQ_BIN_MIC0_12 +654 0x0808 //TX_PREEQ_BIN_MIC0_13 +655 0x0808 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0608 //TX_PREEQ_BIN_MIC1_0 +691 0x0808 //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x0808 //TX_PREEQ_BIN_MIC1_3 +694 0x0808 //TX_PREEQ_BIN_MIC1_4 +695 0x0808 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0808 //TX_PREEQ_BIN_MIC1_7 +698 0x0808 //TX_PREEQ_BIN_MIC1_8 +699 0x0808 //TX_PREEQ_BIN_MIC1_9 +700 0x0808 //TX_PREEQ_BIN_MIC1_10 +701 0x0808 //TX_PREEQ_BIN_MIC1_11 +702 0x0808 //TX_PREEQ_BIN_MIC1_12 +703 0x0808 //TX_PREEQ_BIN_MIC1_13 +704 0x0808 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0001 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x05A0 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x002C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0001 //RX_SAMPLINGFREQ_SIG +3 0x0001 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0013 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0020 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0036 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0099 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-SWB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2B68 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0B80 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7EFF //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00F0 //TX_EPD_OFFSET_00 +233 0x00F0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x6000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000B //TX_NS_LVL_CTRL_0 +282 0x000F //TX_NS_LVL_CTRL_1 +283 0x0011 //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x2000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7900 //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4868 //TX_PREEQ_GAIN_MIC0_8 +626 0x6860 //TX_PREEQ_GAIN_MIC0_9 +627 0x6048 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x05A0 //TX_TDDRC_DRC_GAIN +867 0x78D6 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x002C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x1800 //RX_THR_PITCH_DET_0 +14 0x1000 //RX_THR_PITCH_DET_1 +15 0x0800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0003 //RX_NS_LVL_CTRL +23 0x9000 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0013 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0020 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0036 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0099 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0009 //TX_OPERATION_MODE_1 +2 0x0020 //TX_PATCH_REG +3 0x6B6A //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0B4C //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0200 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x61A8 //TX_EAD_THR +151 0x0400 //TX_THR_RE_EST +152 0x3000 //TX_MIN_EQ_RE_EST_0 +153 0x3000 //TX_MIN_EQ_RE_EST_1 +154 0x4000 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x6000 //TX_MIN_EQ_RE_EST_6 +159 0x6000 //TX_MIN_EQ_RE_EST_7 +160 0x6000 //TX_MIN_EQ_RE_EST_8 +161 0x6000 //TX_MIN_EQ_RE_EST_9 +162 0x4000 //TX_MIN_EQ_RE_EST_10 +163 0x4000 //TX_MIN_EQ_RE_EST_11 +164 0x4000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x4000 //TX_LAMBDA_CB_NLE +167 0x3000 //TX_C_POST_FLT +168 0x7FFF //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x0800 //TX_DTD_THR1_0 +198 0x0800 //TX_DTD_THR1_1 +199 0x0800 //TX_DTD_THR1_2 +200 0x0800 //TX_DTD_THR1_3 +201 0x0800 //TX_DTD_THR1_4 +202 0x0800 //TX_DTD_THR1_5 +203 0x0800 //TX_DTD_THR1_6 +204 0x0800 //TX_DTD_THR2_0 +205 0x0800 //TX_DTD_THR2_1 +206 0x0800 //TX_DTD_THR2_2 +207 0x0800 //TX_DTD_THR2_3 +208 0x0800 //TX_DTD_THR2_4 +209 0x0100 //TX_DTD_THR2_5 +210 0x0100 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x03E8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00C0 //TX_EPD_OFFSET_00 +233 0x00C0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF700 //TX_THR_SN_EST_0 +243 0xFB00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF700 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xF600 //TX_THR_SN_EST_5 +248 0xF600 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0200 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0400 //TX_DELTA_THR_SN_EST_2 +253 0x0300 //TX_DELTA_THR_SN_EST_3 +254 0x0600 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x2000 //TX_B_POST_FLT_1 +281 0x0012 //TX_NS_LVL_CTRL_0 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0019 //TX_NS_LVL_CTRL_4 +286 0x0010 //TX_NS_LVL_CTRL_5 +287 0x0010 //TX_NS_LVL_CTRL_6 +288 0x0010 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x0011 //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000F //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000C //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7000 //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x7000 //TX_SNRI_SUP_2 +303 0x7000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0016 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x6000 //TX_A_POST_FILT_S_0 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x6000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x6000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 +321 0x6000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x4000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x2000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7CCD //TX_LAMBDA_PFILT_S_0 +340 0x7CCD //TX_LAMBDA_PFILT_S_1 +341 0x7CCD //TX_LAMBDA_PFILT_S_2 +342 0x7CCD //TX_LAMBDA_PFILT_S_3 +343 0x7CCD //TX_LAMBDA_PFILT_S_4 +344 0x7CCD //TX_LAMBDA_PFILT_S_5 +345 0x7CCD //TX_LAMBDA_PFILT_S_6 +346 0x7CCD //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0500 //TX_A_PEPPER +349 0x1600 //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0020 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x02A6 //TX_NOISE_TH_1 +371 0x04B0 //TX_NOISE_TH_2 +372 0x3194 //TX_NOISE_TH_3 +373 0x0960 //TX_NOISE_TH_4 +374 0x5555 //TX_NOISE_TH_5 +375 0x3FF4 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x0000 //TX_NOISE_TH_5_4 +378 0x02BC //TX_NOISE_TH_6 +379 0x0020 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0020 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0304 //TX_FDEQ_BIN_2 +594 0x0405 //TX_FDEQ_BIN_3 +595 0x0607 //TX_FDEQ_BIN_4 +596 0x0809 //TX_FDEQ_BIN_5 +597 0x0A0B //TX_FDEQ_BIN_6 +598 0x0C0D //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x1011 //TX_FDEQ_BIN_9 +601 0x1214 //TX_FDEQ_BIN_10 +602 0x1618 //TX_FDEQ_BIN_11 +603 0x1C1C //TX_FDEQ_BIN_12 +604 0x2020 //TX_FDEQ_BIN_13 +605 0x2020 //TX_FDEQ_BIN_14 +606 0x2011 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0C00 //TX_TDDRC_ALPHA_UP_01 +784 0x0C00 //TX_TDDRC_ALPHA_UP_02 +785 0x0C00 //TX_TDDRC_ALPHA_UP_03 +786 0x0C00 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0001 //TX_TDDRC_THRD_0 +855 0x0001 //TX_TDDRC_THRD_1 +856 0x1900 //TX_TDDRC_THRD_2 +857 0x1900 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7B00 //TX_TDDRC_SLANT_1 +860 0x0C00 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x07F2 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x002C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7B02 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0500 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000A //RX_NS_LVL_CTRL +23 0xF600 //RX_THR_SN_EST +24 0x7000 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0013 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0020 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0036 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0099 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-NB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0008 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2B68 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0B80 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7646 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x7CCC //TX_THR_PITCH_DET_0 +131 0x7000 //TX_THR_PITCH_DET_1 +132 0x6333 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0010 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x1000 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x2000 //TX_C_POST_FLT +168 0x2000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x0064 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x5000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7F00 //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x2000 //TX_DTD_THR2_3 +208 0x2000 //TX_DTD_THR2_4 +209 0x2000 //TX_DTD_THR2_5 +210 0x2000 //TX_DTD_THR2_6 +211 0x4100 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x03E8 //TX_DT_CUT_K +214 0x1000 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0010 //TX_EPD_OFFSET_00 +233 0x0010 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xFA00 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFA00 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xFA00 //TX_THR_SN_EST_6 +249 0xFA00 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0000 //TX_DELTA_THR_SN_EST_2 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0000 //TX_DELTA_THR_SN_EST_4 +255 0x0000 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0000 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x0400 //TX_B_POST_FLT_0 +280 0x0400 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0010 //TX_NS_LVL_CTRL_1 +283 0x0010 //TX_NS_LVL_CTRL_2 +284 0x0010 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 +286 0x0010 //TX_NS_LVL_CTRL_5 +287 0x0010 //TX_NS_LVL_CTRL_6 +288 0x0010 //TX_NS_LVL_CTRL_7 +289 0x000D //TX_MIN_GAIN_S_0 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x000D //TX_MIN_GAIN_S_2 +292 0x000D //TX_MIN_GAIN_S_3 +293 0x000D //TX_MIN_GAIN_S_4 +294 0x000D //TX_MIN_GAIN_S_5 +295 0x000D //TX_MIN_GAIN_S_6 +296 0x000D //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0014 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x1000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x4000 //TX_A_POST_FILT_S_7 +322 0x0400 //TX_B_POST_FILT_0 +323 0x0400 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x2000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x0FA0 //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x1B58 //TX_NOISE_TH_0_2 +369 0x2134 //TX_NOISE_TH_0_3 +370 0x02BC //TX_NOISE_TH_1 +371 0x1F40 //TX_NOISE_TH_2 +372 0x4650 //TX_NOISE_TH_3 +373 0x7148 //TX_NOISE_TH_4 +374 0x044C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x0000 //TX_NOISE_TH_5_4 +378 0x0032 //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x00CE //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x7FFF //TX_NOISEDET_BOOST_TH +412 0x0000 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0280 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2400 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0640 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x2000 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0064 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0014 //TX_FDEQ_SUBNUM +567 0x6048 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4844 //TX_FDEQ_GAIN_6 +574 0x4444 //TX_FDEQ_GAIN_7 +575 0x4040 //TX_FDEQ_GAIN_8 +576 0x3C3C //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0401 //TX_FDEQ_BIN_0 +592 0x0103 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0000 //TX_FDEQ_BIN_10 +602 0x0000 //TX_FDEQ_BIN_11 +603 0x0000 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0010 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0608 //TX_PREEQ_BIN_MIC0_0 +642 0x0808 //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x0808 //TX_PREEQ_BIN_MIC0_3 +645 0x0808 //TX_PREEQ_BIN_MIC0_4 +646 0x0808 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0802 //TX_PREEQ_BIN_MIC0_7 +649 0x0000 //TX_PREEQ_BIN_MIC0_8 +650 0x0000 //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0010 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0608 //TX_PREEQ_BIN_MIC1_0 +691 0x0808 //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x0808 //TX_PREEQ_BIN_MIC1_3 +694 0x0808 //TX_PREEQ_BIN_MIC1_4 +695 0x0808 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0802 //TX_PREEQ_BIN_MIC1_7 +698 0x0000 //TX_PREEQ_BIN_MIC1_8 +699 0x0000 //TX_PREEQ_BIN_MIC1_9 +700 0x0000 //TX_PREEQ_BIN_MIC1_10 +701 0x0000 //TX_PREEQ_BIN_MIC1_11 +702 0x0000 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0010 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0802 //TX_PREEQ_BIN_MIC2_7 +747 0x0000 //TX_PREEQ_BIN_MIC2_8 +748 0x0000 //TX_PREEQ_BIN_MIC2_9 +749 0x0000 //TX_PREEQ_BIN_MIC2_10 +750 0x0000 //TX_PREEQ_BIN_MIC2_11 +751 0x0000 //TX_PREEQ_BIN_MIC2_12 +752 0x0000 //TX_PREEQ_BIN_MIC2_13 +753 0x0000 //TX_PREEQ_BIN_MIC2_14 +754 0x0000 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0065 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0065 //TX_MIC_CALIBRATION_2 +768 0x0065 //TX_MIC_CALIBRATION_3 +769 0x0044 //TX_MIC_PWR_BIAS_0 +770 0x0044 //TX_MIC_PWR_BIAS_1 +771 0x0044 //TX_MIC_PWR_BIAS_2 +772 0x0044 //TX_MIC_PWR_BIAS_3 +773 0x000B //TX_GAIN_LIMIT_0 +774 0x000B //TX_GAIN_LIMIT_1 +775 0x000B //TX_GAIN_LIMIT_2 +776 0x000B //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0001 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x05A0 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x002C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0200 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0200 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0200 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0013 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0200 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0020 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0200 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0036 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0200 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0200 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0099 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0200 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-WB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0008 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2B68 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0001 //TX_SAMPLINGFREQ_SIG +7 0x0001 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0B80 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7D83 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0019 //TX_EPD_OFFSET_00 +233 0x0019 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x6000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000F //TX_NS_LVL_CTRL_0 +282 0x000F //TX_NS_LVL_CTRL_1 +283 0x0011 //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x0000 //TX_NS_FP_K_METAL +411 0x7FFF //TX_NOISEDET_BOOST_TH +412 0x0000 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x001C //TX_FDEQ_SUBNUM +567 0x5850 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0302 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D07 //TX_FDEQ_BIN_9 +601 0x0E0F //TX_FDEQ_BIN_10 +602 0x0F10 //TX_FDEQ_BIN_11 +603 0x1011 //TX_FDEQ_BIN_12 +604 0x1119 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0608 //TX_PREEQ_BIN_MIC0_0 +642 0x0808 //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x0808 //TX_PREEQ_BIN_MIC0_3 +645 0x0808 //TX_PREEQ_BIN_MIC0_4 +646 0x0808 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0808 //TX_PREEQ_BIN_MIC0_7 +649 0x0808 //TX_PREEQ_BIN_MIC0_8 +650 0x0808 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0808 //TX_PREEQ_BIN_MIC0_11 +653 0x0808 //TX_PREEQ_BIN_MIC0_12 +654 0x0808 //TX_PREEQ_BIN_MIC0_13 +655 0x0808 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0608 //TX_PREEQ_BIN_MIC1_0 +691 0x0808 //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x0808 //TX_PREEQ_BIN_MIC1_3 +694 0x0808 //TX_PREEQ_BIN_MIC1_4 +695 0x0808 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0808 //TX_PREEQ_BIN_MIC1_7 +698 0x0808 //TX_PREEQ_BIN_MIC1_8 +699 0x0808 //TX_PREEQ_BIN_MIC1_9 +700 0x0808 //TX_PREEQ_BIN_MIC1_10 +701 0x0808 //TX_PREEQ_BIN_MIC1_11 +702 0x0808 //TX_PREEQ_BIN_MIC1_12 +703 0x0808 //TX_PREEQ_BIN_MIC1_13 +704 0x0808 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0001 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x05A0 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x002C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0001 //RX_SAMPLINGFREQ_SIG +3 0x0001 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0013 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0020 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0036 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0099 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-SWB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2B68 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0B80 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7EFF //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00F0 //TX_EPD_OFFSET_00 +233 0x00F0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x6000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000B //TX_NS_LVL_CTRL_0 +282 0x000F //TX_NS_LVL_CTRL_1 +283 0x0011 //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x2000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7900 //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4868 //TX_PREEQ_GAIN_MIC0_8 +626 0x6860 //TX_PREEQ_GAIN_MIC0_9 +627 0x6048 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x05A0 //TX_TDDRC_DRC_GAIN +867 0x78D6 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x002C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x1800 //RX_THR_PITCH_DET_0 +14 0x1000 //RX_THR_PITCH_DET_1 +15 0x0800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0003 //RX_NS_LVL_CTRL +23 0x9000 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0013 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0020 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0036 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0099 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0009 //TX_OPERATION_MODE_1 +2 0x0020 //TX_PATCH_REG +3 0x6B6A //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0B4C //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0200 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x61A8 //TX_EAD_THR +151 0x0400 //TX_THR_RE_EST +152 0x3000 //TX_MIN_EQ_RE_EST_0 +153 0x3000 //TX_MIN_EQ_RE_EST_1 +154 0x4000 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x6000 //TX_MIN_EQ_RE_EST_6 +159 0x6000 //TX_MIN_EQ_RE_EST_7 +160 0x6000 //TX_MIN_EQ_RE_EST_8 +161 0x6000 //TX_MIN_EQ_RE_EST_9 +162 0x4000 //TX_MIN_EQ_RE_EST_10 +163 0x4000 //TX_MIN_EQ_RE_EST_11 +164 0x4000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x4000 //TX_LAMBDA_CB_NLE +167 0x3000 //TX_C_POST_FLT +168 0x7FFF //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x0800 //TX_DTD_THR1_0 +198 0x0800 //TX_DTD_THR1_1 +199 0x0800 //TX_DTD_THR1_2 +200 0x0800 //TX_DTD_THR1_3 +201 0x0800 //TX_DTD_THR1_4 +202 0x0800 //TX_DTD_THR1_5 +203 0x0800 //TX_DTD_THR1_6 +204 0x0800 //TX_DTD_THR2_0 +205 0x0800 //TX_DTD_THR2_1 +206 0x0800 //TX_DTD_THR2_2 +207 0x0800 //TX_DTD_THR2_3 +208 0x0800 //TX_DTD_THR2_4 +209 0x0100 //TX_DTD_THR2_5 +210 0x0100 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x03E8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00C0 //TX_EPD_OFFSET_00 +233 0x00C0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF700 //TX_THR_SN_EST_0 +243 0xFB00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF700 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xF600 //TX_THR_SN_EST_5 +248 0xF600 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0200 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0400 //TX_DELTA_THR_SN_EST_2 +253 0x0300 //TX_DELTA_THR_SN_EST_3 +254 0x0600 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x2000 //TX_B_POST_FLT_1 +281 0x0012 //TX_NS_LVL_CTRL_0 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0019 //TX_NS_LVL_CTRL_4 +286 0x0010 //TX_NS_LVL_CTRL_5 +287 0x0010 //TX_NS_LVL_CTRL_6 +288 0x0010 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x0011 //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000F //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000C //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7000 //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x7000 //TX_SNRI_SUP_2 +303 0x7000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0016 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x6000 //TX_A_POST_FILT_S_0 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x6000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x6000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 +321 0x6000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x4000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x2000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7CCD //TX_LAMBDA_PFILT_S_0 +340 0x7CCD //TX_LAMBDA_PFILT_S_1 +341 0x7CCD //TX_LAMBDA_PFILT_S_2 +342 0x7CCD //TX_LAMBDA_PFILT_S_3 +343 0x7CCD //TX_LAMBDA_PFILT_S_4 +344 0x7CCD //TX_LAMBDA_PFILT_S_5 +345 0x7CCD //TX_LAMBDA_PFILT_S_6 +346 0x7CCD //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0500 //TX_A_PEPPER +349 0x1600 //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0020 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x02A6 //TX_NOISE_TH_1 +371 0x04B0 //TX_NOISE_TH_2 +372 0x3194 //TX_NOISE_TH_3 +373 0x0960 //TX_NOISE_TH_4 +374 0x5555 //TX_NOISE_TH_5 +375 0x3FF4 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x0000 //TX_NOISE_TH_5_4 +378 0x02BC //TX_NOISE_TH_6 +379 0x0020 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0020 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0304 //TX_FDEQ_BIN_2 +594 0x0405 //TX_FDEQ_BIN_3 +595 0x0607 //TX_FDEQ_BIN_4 +596 0x0809 //TX_FDEQ_BIN_5 +597 0x0A0B //TX_FDEQ_BIN_6 +598 0x0C0D //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x1011 //TX_FDEQ_BIN_9 +601 0x1214 //TX_FDEQ_BIN_10 +602 0x1618 //TX_FDEQ_BIN_11 +603 0x1C1C //TX_FDEQ_BIN_12 +604 0x2020 //TX_FDEQ_BIN_13 +605 0x2020 //TX_FDEQ_BIN_14 +606 0x2011 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0C00 //TX_TDDRC_ALPHA_UP_01 +784 0x0C00 //TX_TDDRC_ALPHA_UP_02 +785 0x0C00 //TX_TDDRC_ALPHA_UP_03 +786 0x0C00 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0001 //TX_TDDRC_THRD_0 +855 0x0001 //TX_TDDRC_THRD_1 +856 0x1900 //TX_TDDRC_THRD_2 +857 0x1900 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7B00 //TX_TDDRC_SLANT_1 +860 0x0C00 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x07F2 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x002C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7B02 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0500 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000A //RX_NS_LVL_CTRL +23 0xF600 //RX_THR_SN_EST +24 0x7000 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0013 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0020 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0036 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0099 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-NB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x6F7C //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0002 //TX_MIC_DATA_SRC0 +42 0x0000 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x053D //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7646 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0100 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7500 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0200 //TX_MIN_EQ_RE_EST_0 +153 0x0200 //TX_MIN_EQ_RE_EST_1 +154 0x0200 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x1800 //TX_MIN_EQ_RE_EST_7 +160 0x1800 //TX_MIN_EQ_RE_EST_8 +161 0x3000 //TX_MIN_EQ_RE_EST_9 +162 0x4000 //TX_MIN_EQ_RE_EST_10 +163 0x6000 //TX_MIN_EQ_RE_EST_11 +164 0x7FFF //TX_MIN_EQ_RE_EST_12 +165 0x2000 //TX_LAMBDA_RE_EST +166 0x0000 //TX_LAMBDA_CB_NLE +167 0x4000 //TX_C_POST_FLT +168 0x2000 //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x05DC //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7FF0 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x1F40 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x1000 //TX_ADPT_STRICT_L +222 0x1000 //TX_ADPT_STRICT_H +223 0x0001 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x0640 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x05DC //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF900 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0050 //TX_DELTA_THR_SN_EST_0 +251 0x01A0 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x7F00 //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0800 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0012 //TX_NS_LVL_CTRL_1 +283 0x0012 //TX_NS_LVL_CTRL_2 +284 0x0015 //TX_NS_LVL_CTRL_3 +285 0x0012 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0011 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000D //TX_MIN_GAIN_S_2 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000F //TX_MIN_GAIN_S_4 +294 0x000F //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x4000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x3000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x2400 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x2000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x1000 //TX_A_POST_FILT_S_4 +319 0x3000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x5000 //TX_B_POST_FILT_4 +327 0x3000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x6000 //TX_B_LESSCUT_RTO_S_1 +332 0x6000 //TX_B_LESSCUT_RTO_S_2 +333 0x6000 //TX_B_LESSCUT_RTO_S_3 +334 0x6000 //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E00 //TX_LAMBDA_PFILT +339 0x7D00 //TX_LAMBDA_PFILT_S_0 +340 0x7900 //TX_LAMBDA_PFILT_S_1 +341 0x7C00 //TX_LAMBDA_PFILT_S_2 +342 0x7900 //TX_LAMBDA_PFILT_S_3 +343 0x7000 //TX_LAMBDA_PFILT_S_4 +344 0x7D00 //TX_LAMBDA_PFILT_S_5 +345 0x7D00 //TX_LAMBDA_PFILT_S_6 +346 0x7D00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0100 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0FA0 //TX_DT_BINVAD_ENDF +358 0x7000 //TX_C_POST_FLT_DT +359 0x4000 //TX_NS_B_POST_FLT_LESSCUT +360 0x01B0 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x03ED //TX_NOISE_TH_2 +372 0x2EE0 //TX_NOISE_TH_3 +373 0x5528 //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0FA0 //TX_NOISE_TH_6 +379 0x000A //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x1000 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x000A //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x007A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x5000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x7FFF //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0014 //TX_FDEQ_SUBNUM +567 0x5050 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x483C //TX_FDEQ_GAIN_3 +571 0x3034 //TX_FDEQ_GAIN_4 +572 0x3048 //TX_FDEQ_GAIN_5 +573 0x4840 //TX_FDEQ_GAIN_6 +574 0x403C //TX_FDEQ_GAIN_7 +575 0x262C //TX_FDEQ_GAIN_8 +576 0x3A3C //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0000 //TX_FDEQ_BIN_10 +602 0x0000 //TX_FDEQ_BIN_11 +603 0x0000 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0014 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4A4C //TX_PREEQ_GAIN_MIC0_8 +626 0x4E50 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x0000 //TX_PREEQ_BIN_MIC1_10 +701 0x0000 //TX_PREEQ_BIN_MIC1_11 +702 0x0000 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0000 //TX_PREEQ_BIN_MIC2_0 +740 0x0000 //TX_PREEQ_BIN_MIC2_1 +741 0x0000 //TX_PREEQ_BIN_MIC2_2 +742 0x0000 //TX_PREEQ_BIN_MIC2_3 +743 0x0000 //TX_PREEQ_BIN_MIC2_4 +744 0x0000 //TX_PREEQ_BIN_MIC2_5 +745 0x0000 //TX_PREEQ_BIN_MIC2_6 +746 0x0000 //TX_PREEQ_BIN_MIC2_7 +747 0x0000 //TX_PREEQ_BIN_MIC2_8 +748 0x0000 //TX_PREEQ_BIN_MIC2_9 +749 0x0000 //TX_PREEQ_BIN_MIC2_10 +750 0x0000 //TX_PREEQ_BIN_MIC2_11 +751 0x0000 //TX_PREEQ_BIN_MIC2_12 +752 0x0000 //TX_PREEQ_BIN_MIC2_13 +753 0x0000 //TX_PREEQ_BIN_MIC2_14 +754 0x0000 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0065 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0065 //TX_MIC_CALIBRATION_2 +768 0x0065 //TX_MIC_CALIBRATION_3 +769 0x0044 //TX_MIC_PWR_BIAS_0 +770 0x0044 //TX_MIC_PWR_BIAS_1 +771 0x0044 //TX_MIC_PWR_BIAS_2 +772 0x0044 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x4000 //TX_TDDRC_ALPHA_UP_01 +784 0x4000 //TX_TDDRC_ALPHA_UP_02 +785 0x4000 //TX_TDDRC_ALPHA_UP_03 +786 0x4000 //TX_TDDRC_ALPHA_UP_04 +787 0x6000 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0004 //TX_TDDRC_THRD_0 +855 0x0010 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x4000 //TX_TDDRC_ALPHA_UP_00 +861 0x6000 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x08EA //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x002C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0200 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0200 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0200 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0013 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0200 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0020 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0200 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0036 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0200 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0200 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0099 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0200 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-WB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x6F7C //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0001 //TX_SAMPLINGFREQ_SIG +7 0x0001 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0002 //TX_MIC_DATA_SRC0 +42 0x0000 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x053D //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0C00 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0004 //TX_MAINMIC_BLKFACTOR +114 0x0004 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0300 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6800 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x3000 //TX_MIN_EQ_RE_EST_0 +153 0x0100 //TX_MIN_EQ_RE_EST_1 +154 0x0200 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x1B00 //TX_LAMBDA_RE_EST +166 0x4000 //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x5000 //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x0020 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x76D0 //TX_DTD_THR1_0 +198 0x76D0 //TX_DTD_THR1_1 +199 0x76D0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 +206 0x5000 //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x03E8 //TX_DT_CUT_K +214 0x0010 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x044C //TX_RATIO_DT_L_TH_HIGH +226 0x7800 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFB00 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0014 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x0011 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0010 //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x50C0 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x5000 //TX_A_POST_FILT_S_0 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x4C00 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C00 //TX_LAMBDA_PFILT +339 0x7C00 //TX_LAMBDA_PFILT_S_0 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7C00 //TX_LAMBDA_PFILT_S_2 +342 0x7A00 //TX_LAMBDA_PFILT_S_3 +343 0x7C00 //TX_LAMBDA_PFILT_S_4 +344 0x7C00 //TX_LAMBDA_PFILT_S_5 +345 0x7C00 //TX_LAMBDA_PFILT_S_6 +346 0x7C00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0800 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0032 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x017E //TX_NOISE_TH_1 +371 0x0230 //TX_NOISE_TH_2 +372 0x3492 //TX_NOISE_TH_3 +373 0x4E20 //TX_NOISE_TH_4 +374 0x55B8 //TX_NOISE_TH_5 +375 0x49E6 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0F0A //TX_NOISE_TH_6 +379 0x0033 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0033 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x5454 //TX_FDEQ_GAIN_0 +568 0x5448 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4850 //TX_FDEQ_GAIN_5 +573 0x5050 //TX_FDEQ_GAIN_6 +574 0x5448 //TX_FDEQ_GAIN_7 +575 0x464C //TX_FDEQ_GAIN_8 +576 0x5050 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0F10 //TX_FDEQ_BIN_10 +602 0x1011 //TX_FDEQ_BIN_11 +603 0x1112 //TX_FDEQ_BIN_12 +604 0x120B //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x484A //TX_PREEQ_GAIN_MIC0_8 +626 0x4B4C //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4A //TX_PREEQ_GAIN_MIC0_10 +628 0x4A48 //TX_PREEQ_GAIN_MIC0_11 +629 0x4C4C //TX_PREEQ_GAIN_MIC0_12 +630 0x4C4C //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x0F10 //TX_PREEQ_BIN_MIC0_10 +652 0x1011 //TX_PREEQ_BIN_MIC0_11 +653 0x1112 //TX_PREEQ_BIN_MIC0_12 +654 0x120B //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 +676 0x403E //TX_PREEQ_GAIN_MIC1_10 +677 0x3D3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3C3C //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0F10 //TX_PREEQ_BIN_MIC1_9 +700 0x1011 //TX_PREEQ_BIN_MIC1_10 +701 0x1112 //TX_PREEQ_BIN_MIC1_11 +702 0x1208 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0001 //TX_TDDRC_THRD_0 +855 0x0002 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0B39 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x002C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0001 //RX_SAMPLINGFREQ_SIG +3 0x0001 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0013 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0020 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0036 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0099 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-SWB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x6F7C //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0002 //TX_MIC_DATA_SRC0 +42 0x0000 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7D83 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0400 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7600 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x2000 //TX_MIN_EQ_RE_EST_0 +153 0x0600 //TX_MIN_EQ_RE_EST_1 +154 0x3000 //TX_MIN_EQ_RE_EST_2 +155 0x3000 //TX_MIN_EQ_RE_EST_3 +156 0x3000 //TX_MIN_EQ_RE_EST_4 +157 0x3000 //TX_MIN_EQ_RE_EST_5 +158 0x3000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x7800 //TX_MIN_EQ_RE_EST_8 +161 0x7800 //TX_MIN_EQ_RE_EST_9 +162 0x7800 //TX_MIN_EQ_RE_EST_10 +163 0x7800 //TX_MIN_EQ_RE_EST_11 +164 0x7800 //TX_MIN_EQ_RE_EST_12 +165 0x0880 //TX_LAMBDA_RE_EST +166 0x7FFF //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x05DC //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7FF0 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 +206 0x5000 //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x36B0 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x733C //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x3A98 //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFA00 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0000 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x003C //TX_NS_LVL_CTRL_1 +283 0x003C //TX_NS_LVL_CTRL_2 +284 0x0024 //TX_NS_LVL_CTRL_3 +285 0x003C //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x0011 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0010 //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x1400 //TX_SNRI_SUP_1 +302 0x1400 //TX_SNRI_SUP_2 +303 0x1400 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x50C0 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x5000 //TX_A_POST_FILT_S_0 +315 0x7C00 //TX_A_POST_FILT_S_1 +316 0x4C00 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x6000 //TX_B_POST_FILT_2 +325 0x6000 //TX_B_POST_FILT_3 +326 0x6000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C00 //TX_LAMBDA_PFILT +339 0x7D00 //TX_LAMBDA_PFILT_S_0 +340 0x7D00 //TX_LAMBDA_PFILT_S_1 +341 0x7D00 //TX_LAMBDA_PFILT_S_2 +342 0x7D00 //TX_LAMBDA_PFILT_S_3 +343 0x7D00 //TX_LAMBDA_PFILT_S_4 +344 0x7D00 //TX_LAMBDA_PFILT_S_5 +345 0x7D00 //TX_LAMBDA_PFILT_S_6 +346 0x7D00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0040 //TX_DT_BINVAD_TH_0 +354 0x0040 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 +356 0x0100 //TX_DT_BINVAD_TH_3 +357 0x36B0 //TX_DT_BINVAD_ENDF +358 0x0200 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x01F4 //TX_NOISE_TH_2 +372 0x36B0 //TX_NOISE_TH_3 +373 0x2710 //TX_NOISE_TH_4 +374 0x2CEC //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0DAC //TX_NOISE_TH_6 +379 0x0050 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0050 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4000 //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x5450 //TX_FDEQ_GAIN_0 +568 0x4C48 //TX_FDEQ_GAIN_1 +569 0x4850 //TX_FDEQ_GAIN_2 +570 0x5050 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x484E //TX_FDEQ_GAIN_5 +573 0x4E5E //TX_FDEQ_GAIN_6 +574 0x584E //TX_FDEQ_GAIN_7 +575 0x4C4E //TX_FDEQ_GAIN_8 +576 0x564E //TX_FDEQ_GAIN_9 +577 0x5058 //TX_FDEQ_GAIN_10 +578 0x625C //TX_FDEQ_GAIN_11 +579 0x6C6C //TX_FDEQ_GAIN_12 +580 0x7086 //TX_FDEQ_GAIN_13 +581 0x869C //TX_FDEQ_GAIN_14 +582 0xB0B0 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x284A //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x494A //TX_PREEQ_GAIN_MIC0_8 +626 0x4B4C //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4A //TX_PREEQ_GAIN_MIC0_10 +628 0x484B //TX_PREEQ_GAIN_MIC0_11 +629 0x4C4C //TX_PREEQ_GAIN_MIC0_12 +630 0x4B48 //TX_PREEQ_GAIN_MIC0_13 +631 0x3838 //TX_PREEQ_GAIN_MIC0_14 +632 0x3835 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1719 //TX_PREEQ_BIN_MIC0_11 +653 0x1B1E //TX_PREEQ_BIN_MIC0_12 +654 0x1E1E //TX_PREEQ_BIN_MIC0_13 +655 0x1E28 //TX_PREEQ_BIN_MIC0_14 +656 0x282C //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 +676 0x403E //TX_PREEQ_GAIN_MIC1_10 +677 0x3D3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3C3C //TX_PREEQ_GAIN_MIC1_12 +679 0x3C39 //TX_PREEQ_GAIN_MIC1_13 +680 0x3838 //TX_PREEQ_GAIN_MIC1_14 +681 0x3A3C //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x282C //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0xF200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0003 //TX_TDDRC_THRD_0 +855 0x0004 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0C97 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x002C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x1800 //RX_THR_PITCH_DET_0 +14 0x1000 //RX_THR_PITCH_DET_1 +15 0x0800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0003 //RX_NS_LVL_CTRL +23 0x9000 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0013 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0020 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0036 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0099 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x6B7C //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0002 //TX_MIC_DATA_SRC0 +42 0x0000 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0300 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x2000 //TX_MIN_EQ_RE_EST_1 +154 0x2000 //TX_MIN_EQ_RE_EST_2 +155 0x4000 //TX_MIN_EQ_RE_EST_3 +156 0x4000 //TX_MIN_EQ_RE_EST_4 +157 0x7FFF //TX_MIN_EQ_RE_EST_5 +158 0x7FFF //TX_MIN_EQ_RE_EST_6 +159 0x7FFF //TX_MIN_EQ_RE_EST_7 +160 0x7FFF //TX_MIN_EQ_RE_EST_8 +161 0x7FFF //TX_MIN_EQ_RE_EST_9 +162 0x7FFF //TX_MIN_EQ_RE_EST_10 +163 0x7FFF //TX_MIN_EQ_RE_EST_11 +164 0x7FFF //TX_MIN_EQ_RE_EST_12 +165 0x0700 //TX_LAMBDA_RE_EST +166 0x0CCD //TX_LAMBDA_CB_NLE +167 0x2000 //TX_C_POST_FLT +168 0x7FFF //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x09C4 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7D00 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0DAC //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1194 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0063 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x0A28 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFB00 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0014 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x0011 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0010 //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x50C0 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x5000 //TX_A_POST_FILT_S_0 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x4C00 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C00 //TX_LAMBDA_PFILT +339 0x7C00 //TX_LAMBDA_PFILT_S_0 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7C00 //TX_LAMBDA_PFILT_S_2 +342 0x7A00 //TX_LAMBDA_PFILT_S_3 +343 0x7C00 //TX_LAMBDA_PFILT_S_4 +344 0x7C00 //TX_LAMBDA_PFILT_S_5 +345 0x7C00 //TX_LAMBDA_PFILT_S_6 +346 0x7C00 //TX_LAMBDA_PFILT_S_7 +347 0x0180 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x2000 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0200 //TX_DT_BINVAD_TH_2 +356 0x0200 //TX_DT_BINVAD_TH_3 +357 0x1F40 //TX_DT_BINVAD_ENDF +358 0x0100 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x4E20 //TX_NOISE_TH_3 +373 0x4E20 //TX_NOISE_TH_4 +374 0x59D8 //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x2710 //TX_NOISE_TH_6 +379 0x0033 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0033 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x7FFF //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x484C //TX_FDEQ_GAIN_3 +571 0x4C4C //TX_FDEQ_GAIN_4 +572 0x544C //TX_FDEQ_GAIN_5 +573 0x5454 //TX_FDEQ_GAIN_6 +574 0x5454 //TX_FDEQ_GAIN_7 +575 0x585A //TX_FDEQ_GAIN_8 +576 0x5C5C //TX_FDEQ_GAIN_9 +577 0x6068 //TX_FDEQ_GAIN_10 +578 0x8894 //TX_FDEQ_GAIN_11 +579 0x94B4 //TX_FDEQ_GAIN_12 +580 0xB4C7 //TX_FDEQ_GAIN_13 +581 0xC7C6 //TX_FDEQ_GAIN_14 +582 0xC6C6 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0304 //TX_FDEQ_BIN_2 +594 0x0405 //TX_FDEQ_BIN_3 +595 0x0607 //TX_FDEQ_BIN_4 +596 0x0809 //TX_FDEQ_BIN_5 +597 0x0A0B //TX_FDEQ_BIN_6 +598 0x0C0D //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x1011 //TX_FDEQ_BIN_9 +601 0x1214 //TX_FDEQ_BIN_10 +602 0x1618 //TX_FDEQ_BIN_11 +603 0x1C1C //TX_FDEQ_BIN_12 +604 0x2020 //TX_FDEQ_BIN_13 +605 0x2020 //TX_FDEQ_BIN_14 +606 0x2011 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4849 //TX_PREEQ_GAIN_MIC0_6 +624 0x4A4B //TX_PREEQ_GAIN_MIC0_7 +625 0x4C4B //TX_PREEQ_GAIN_MIC0_8 +626 0x4A48 //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4C //TX_PREEQ_GAIN_MIC0_10 +628 0x4C4B //TX_PREEQ_GAIN_MIC0_11 +629 0x4838 //TX_PREEQ_GAIN_MIC0_12 +630 0x3858 //TX_PREEQ_GAIN_MIC0_13 +631 0x7060 //TX_PREEQ_GAIN_MIC0_14 +632 0x9870 //TX_PREEQ_GAIN_MIC0_15 +633 0x5848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x4000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4645 //TX_PREEQ_GAIN_MIC1_6 +673 0x4442 //TX_PREEQ_GAIN_MIC1_7 +674 0x4140 //TX_PREEQ_GAIN_MIC1_8 +675 0x3E3D //TX_PREEQ_GAIN_MIC1_9 +676 0x3C3C //TX_PREEQ_GAIN_MIC1_10 +677 0x3C3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3938 //TX_PREEQ_GAIN_MIC1_12 +679 0x3A3C //TX_PREEQ_GAIN_MIC1_13 +680 0x3C3E //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x4000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0C00 //TX_TDDRC_ALPHA_UP_01 +784 0x0C00 //TX_TDDRC_ALPHA_UP_02 +785 0x0C00 //TX_TDDRC_ALPHA_UP_03 +786 0x0C00 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0004 //TX_TDDRC_THRD_0 +855 0x0016 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x0C00 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0A00 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x002C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7B02 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0500 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000A //RX_NS_LVL_CTRL +23 0xF600 //RX_THR_SN_EST +24 0x7000 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0013 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0020 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0036 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0099 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-NB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0008 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2B68 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0B80 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7646 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x7CCC //TX_THR_PITCH_DET_0 +131 0x7000 //TX_THR_PITCH_DET_1 +132 0x6333 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0010 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x1000 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x2000 //TX_C_POST_FLT +168 0x2000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x0064 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x5000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7F00 //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x2000 //TX_DTD_THR2_3 +208 0x2000 //TX_DTD_THR2_4 +209 0x2000 //TX_DTD_THR2_5 +210 0x2000 //TX_DTD_THR2_6 +211 0x4100 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x03E8 //TX_DT_CUT_K +214 0x1000 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0010 //TX_EPD_OFFSET_00 +233 0x0010 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xFA00 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFA00 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xFA00 //TX_THR_SN_EST_6 +249 0xFA00 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0000 //TX_DELTA_THR_SN_EST_2 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0000 //TX_DELTA_THR_SN_EST_4 +255 0x0000 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0000 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x0400 //TX_B_POST_FLT_0 +280 0x0400 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0010 //TX_NS_LVL_CTRL_1 +283 0x0010 //TX_NS_LVL_CTRL_2 +284 0x0010 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 +286 0x0010 //TX_NS_LVL_CTRL_5 +287 0x0010 //TX_NS_LVL_CTRL_6 +288 0x0010 //TX_NS_LVL_CTRL_7 +289 0x000D //TX_MIN_GAIN_S_0 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x000D //TX_MIN_GAIN_S_2 +292 0x000D //TX_MIN_GAIN_S_3 +293 0x000D //TX_MIN_GAIN_S_4 +294 0x000D //TX_MIN_GAIN_S_5 +295 0x000D //TX_MIN_GAIN_S_6 +296 0x000D //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0014 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x1000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x4000 //TX_A_POST_FILT_S_7 +322 0x0400 //TX_B_POST_FILT_0 +323 0x0400 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x2000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x0FA0 //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x1B58 //TX_NOISE_TH_0_2 +369 0x2134 //TX_NOISE_TH_0_3 +370 0x02BC //TX_NOISE_TH_1 +371 0x1F40 //TX_NOISE_TH_2 +372 0x4650 //TX_NOISE_TH_3 +373 0x7148 //TX_NOISE_TH_4 +374 0x044C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x0000 //TX_NOISE_TH_5_4 +378 0x0032 //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x00CE //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x7FFF //TX_NOISEDET_BOOST_TH +412 0x0000 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0280 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2400 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0640 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x2000 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0064 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0014 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D08 //TX_FDEQ_BIN_9 +601 0x0000 //TX_FDEQ_BIN_10 +602 0x0000 //TX_FDEQ_BIN_11 +603 0x0000 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0010 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0608 //TX_PREEQ_BIN_MIC0_0 +642 0x0808 //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x0808 //TX_PREEQ_BIN_MIC0_3 +645 0x0808 //TX_PREEQ_BIN_MIC0_4 +646 0x0808 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0802 //TX_PREEQ_BIN_MIC0_7 +649 0x0000 //TX_PREEQ_BIN_MIC0_8 +650 0x0000 //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0010 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0608 //TX_PREEQ_BIN_MIC1_0 +691 0x0808 //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x0808 //TX_PREEQ_BIN_MIC1_3 +694 0x0808 //TX_PREEQ_BIN_MIC1_4 +695 0x0808 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0802 //TX_PREEQ_BIN_MIC1_7 +698 0x0000 //TX_PREEQ_BIN_MIC1_8 +699 0x0000 //TX_PREEQ_BIN_MIC1_9 +700 0x0000 //TX_PREEQ_BIN_MIC1_10 +701 0x0000 //TX_PREEQ_BIN_MIC1_11 +702 0x0000 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0010 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0802 //TX_PREEQ_BIN_MIC2_7 +747 0x0000 //TX_PREEQ_BIN_MIC2_8 +748 0x0000 //TX_PREEQ_BIN_MIC2_9 +749 0x0000 //TX_PREEQ_BIN_MIC2_10 +750 0x0000 //TX_PREEQ_BIN_MIC2_11 +751 0x0000 //TX_PREEQ_BIN_MIC2_12 +752 0x0000 //TX_PREEQ_BIN_MIC2_13 +753 0x0000 //TX_PREEQ_BIN_MIC2_14 +754 0x0000 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0065 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0065 //TX_MIC_CALIBRATION_2 +768 0x0065 //TX_MIC_CALIBRATION_3 +769 0x0044 //TX_MIC_PWR_BIAS_0 +770 0x0044 //TX_MIC_PWR_BIAS_1 +771 0x0044 //TX_MIC_PWR_BIAS_2 +772 0x0044 //TX_MIC_PWR_BIAS_3 +773 0x000B //TX_GAIN_LIMIT_0 +774 0x000B //TX_GAIN_LIMIT_1 +775 0x000B //TX_GAIN_LIMIT_2 +776 0x000B //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0001 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x05A0 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x0024 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2030 //RX_TDDRC_THRD_2 +115 0x2030 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0478 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x000C //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2030 //RX_TDDRC_THRD_2 +115 0x2030 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0478 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000C //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2030 //RX_TDDRC_THRD_2 +115 0x2030 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0478 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0014 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2030 //RX_TDDRC_THRD_2 +115 0x2030 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0478 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0021 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2030 //RX_TDDRC_THRD_2 +115 0x2030 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0478 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0037 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2030 //RX_TDDRC_THRD_2 +115 0x2030 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0478 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2030 //RX_TDDRC_THRD_2 +115 0x2030 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0478 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0099 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2030 //RX_TDDRC_THRD_2 +115 0x2030 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0478 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-WB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0008 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2B68 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0001 //TX_SAMPLINGFREQ_SIG +7 0x0001 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0B80 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7D83 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0019 //TX_EPD_OFFSET_00 +233 0x0019 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x6000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000F //TX_NS_LVL_CTRL_0 +282 0x000F //TX_NS_LVL_CTRL_1 +283 0x0011 //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x0000 //TX_NS_FP_K_METAL +411 0x7FFF //TX_NOISEDET_BOOST_TH +412 0x0000 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x001C //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0E0F //TX_FDEQ_BIN_10 +602 0x0F10 //TX_FDEQ_BIN_11 +603 0x1011 //TX_FDEQ_BIN_12 +604 0x1104 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0608 //TX_PREEQ_BIN_MIC0_0 +642 0x0808 //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x0808 //TX_PREEQ_BIN_MIC0_3 +645 0x0808 //TX_PREEQ_BIN_MIC0_4 +646 0x0808 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0808 //TX_PREEQ_BIN_MIC0_7 +649 0x0808 //TX_PREEQ_BIN_MIC0_8 +650 0x0808 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0808 //TX_PREEQ_BIN_MIC0_11 +653 0x0808 //TX_PREEQ_BIN_MIC0_12 +654 0x0808 //TX_PREEQ_BIN_MIC0_13 +655 0x0808 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0608 //TX_PREEQ_BIN_MIC1_0 +691 0x0808 //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x0808 //TX_PREEQ_BIN_MIC1_3 +694 0x0808 //TX_PREEQ_BIN_MIC1_4 +695 0x0808 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0808 //TX_PREEQ_BIN_MIC1_7 +698 0x0808 //TX_PREEQ_BIN_MIC1_8 +699 0x0808 //TX_PREEQ_BIN_MIC1_9 +700 0x0808 //TX_PREEQ_BIN_MIC1_10 +701 0x0808 //TX_PREEQ_BIN_MIC1_11 +702 0x0808 //TX_PREEQ_BIN_MIC1_12 +703 0x0808 //TX_PREEQ_BIN_MIC1_13 +704 0x0808 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0001 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x05A0 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x0024 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0001 //RX_SAMPLINGFREQ_SIG +3 0x0001 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x000C //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000C //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0014 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0021 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0037 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0099 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-SWB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2B68 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0B80 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7EFF //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00F0 //TX_EPD_OFFSET_00 +233 0x00F0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x6000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000B //TX_NS_LVL_CTRL_0 +282 0x000F //TX_NS_LVL_CTRL_1 +283 0x0011 //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x2000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7900 //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4868 //TX_PREEQ_GAIN_MIC0_8 +626 0x6860 //TX_PREEQ_GAIN_MIC0_9 +627 0x6048 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x05A0 //TX_TDDRC_DRC_GAIN +867 0x78D6 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x0024 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x1800 //RX_THR_PITCH_DET_0 +14 0x1000 //RX_THR_PITCH_DET_1 +15 0x0800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0003 //RX_NS_LVL_CTRL +23 0x9000 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x000C //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000C //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0014 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0021 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0037 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0099 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0009 //TX_OPERATION_MODE_1 +2 0x0020 //TX_PATCH_REG +3 0x6B6A //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0B4C //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0200 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x61A8 //TX_EAD_THR +151 0x0400 //TX_THR_RE_EST +152 0x3000 //TX_MIN_EQ_RE_EST_0 +153 0x3000 //TX_MIN_EQ_RE_EST_1 +154 0x4000 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x6000 //TX_MIN_EQ_RE_EST_6 +159 0x6000 //TX_MIN_EQ_RE_EST_7 +160 0x6000 //TX_MIN_EQ_RE_EST_8 +161 0x6000 //TX_MIN_EQ_RE_EST_9 +162 0x4000 //TX_MIN_EQ_RE_EST_10 +163 0x4000 //TX_MIN_EQ_RE_EST_11 +164 0x4000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x4000 //TX_LAMBDA_CB_NLE +167 0x3000 //TX_C_POST_FLT +168 0x7FFF //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x0800 //TX_DTD_THR1_0 +198 0x0800 //TX_DTD_THR1_1 +199 0x0800 //TX_DTD_THR1_2 +200 0x0800 //TX_DTD_THR1_3 +201 0x0800 //TX_DTD_THR1_4 +202 0x0800 //TX_DTD_THR1_5 +203 0x0800 //TX_DTD_THR1_6 +204 0x0800 //TX_DTD_THR2_0 +205 0x0800 //TX_DTD_THR2_1 +206 0x0800 //TX_DTD_THR2_2 +207 0x0800 //TX_DTD_THR2_3 +208 0x0800 //TX_DTD_THR2_4 +209 0x0100 //TX_DTD_THR2_5 +210 0x0100 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x03E8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00C0 //TX_EPD_OFFSET_00 +233 0x00C0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF700 //TX_THR_SN_EST_0 +243 0xFB00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF700 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xF600 //TX_THR_SN_EST_5 +248 0xF600 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0200 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0400 //TX_DELTA_THR_SN_EST_2 +253 0x0300 //TX_DELTA_THR_SN_EST_3 +254 0x0600 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x2000 //TX_B_POST_FLT_1 +281 0x0012 //TX_NS_LVL_CTRL_0 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0019 //TX_NS_LVL_CTRL_4 +286 0x0010 //TX_NS_LVL_CTRL_5 +287 0x0010 //TX_NS_LVL_CTRL_6 +288 0x0010 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x0011 //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000F //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000C //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7000 //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x7000 //TX_SNRI_SUP_2 +303 0x7000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0016 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x6000 //TX_A_POST_FILT_S_0 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x6000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x6000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 +321 0x6000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x4000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x2000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7CCD //TX_LAMBDA_PFILT_S_0 +340 0x7CCD //TX_LAMBDA_PFILT_S_1 +341 0x7CCD //TX_LAMBDA_PFILT_S_2 +342 0x7CCD //TX_LAMBDA_PFILT_S_3 +343 0x7CCD //TX_LAMBDA_PFILT_S_4 +344 0x7CCD //TX_LAMBDA_PFILT_S_5 +345 0x7CCD //TX_LAMBDA_PFILT_S_6 +346 0x7CCD //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0500 //TX_A_PEPPER +349 0x1600 //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0020 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x02A6 //TX_NOISE_TH_1 +371 0x04B0 //TX_NOISE_TH_2 +372 0x3194 //TX_NOISE_TH_3 +373 0x0960 //TX_NOISE_TH_4 +374 0x5555 //TX_NOISE_TH_5 +375 0x3FF4 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x0000 //TX_NOISE_TH_5_4 +378 0x02BC //TX_NOISE_TH_6 +379 0x0020 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0020 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0304 //TX_FDEQ_BIN_2 +594 0x0405 //TX_FDEQ_BIN_3 +595 0x0607 //TX_FDEQ_BIN_4 +596 0x0809 //TX_FDEQ_BIN_5 +597 0x0A0B //TX_FDEQ_BIN_6 +598 0x0C0D //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x1011 //TX_FDEQ_BIN_9 +601 0x1214 //TX_FDEQ_BIN_10 +602 0x1618 //TX_FDEQ_BIN_11 +603 0x1C1C //TX_FDEQ_BIN_12 +604 0x2020 //TX_FDEQ_BIN_13 +605 0x2020 //TX_FDEQ_BIN_14 +606 0x2011 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0C00 //TX_TDDRC_ALPHA_UP_01 +784 0x0C00 //TX_TDDRC_ALPHA_UP_02 +785 0x0C00 //TX_TDDRC_ALPHA_UP_03 +786 0x0C00 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0001 //TX_TDDRC_THRD_0 +855 0x0001 //TX_TDDRC_THRD_1 +856 0x1900 //TX_TDDRC_THRD_2 +857 0x1900 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7B00 //TX_TDDRC_SLANT_1 +860 0x0C00 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x07F2 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x002C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7B02 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0500 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000A //RX_NS_LVL_CTRL +23 0xF600 //RX_THR_SN_EST +24 0x7000 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0013 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0020 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0036 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0099 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-NB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0000 //TX_PATCH_REG +3 0x0200 //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0078 //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0302 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0000 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0000 //TX_MICS_OF_PAIR0 +38 0x0000 //TX_MICS_OF_PAIR1 +39 0x0000 //TX_MICS_OF_PAIR2 +40 0x0000 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0003 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x0000 //TX_HD_BIN_MASK +53 0x0000 //TX_HD_SUBAND_MASK +54 0x0000 //TX_HD_FRAME_AVG_MASK +55 0x0000 //TX_HD_MIN_FRQ +56 0x0000 //TX_HD_ALPHA_PSD +57 0x0000 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0x0000 //TX_T_PSDVAT +63 0x0000 //TX_CNT +64 0x0000 //TX_ANTI_HOWL_GAIN +65 0x0000 //TX_MICFORBFMARK_0 +66 0x0000 //TX_MICFORBFMARK_1 +67 0x0000 //TX_MICFORBFMARK_2 +68 0x0000 //TX_MICFORBFMARK_3 +69 0x0000 //TX_MICFORBFMARK_4 +70 0x0000 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x0000 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x0000 //TX_ADCS_GAIN +112 0x0000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x7FFF //TX_BLMIC_BLKFACTOR +116 0x7FFF //TX_BRMIC_BLKFACTOR +117 0x000A //TX_MICBLK_START_BIN +118 0x0041 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x0000 //TX_FE_ENER_TH_MTS +124 0x0000 //TX_FE_ENER_TH_EXP +125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x0000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0020 //TX_MIC_BLOCK_N +128 0x7652 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x7800 //TX_THR_PITCH_DET_0 +131 0x7000 //TX_THR_PITCH_DET_1 +132 0x6000 //TX_THR_PITCH_DET_2 +133 0x0000 //TX_PITCH_BFR_LEN +134 0x0000 //TX_SBD_PITCH_DET +135 0x0000 //TX_TD_AEC_L +136 0x0000 //TX_MU0_UNP_TD_AEC +137 0x0000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x2000 //TX_AEC_REF_GAIN_0 +148 0x2000 //TX_AEC_REF_GAIN_1 +149 0x2000 //TX_AEC_REF_GAIN_2 +150 0x4000 //TX_EAD_THR +151 0x0200 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0100 //TX_MIN_EQ_RE_EST_1 +154 0x0100 //TX_MIN_EQ_RE_EST_2 +155 0x0100 //TX_MIN_EQ_RE_EST_3 +156 0x0100 //TX_MIN_EQ_RE_EST_4 +157 0x0100 //TX_MIN_EQ_RE_EST_5 +158 0x0100 //TX_MIN_EQ_RE_EST_6 +159 0x0100 //TX_MIN_EQ_RE_EST_7 +160 0x0100 //TX_MIN_EQ_RE_EST_8 +161 0x0100 //TX_MIN_EQ_RE_EST_9 +162 0x0100 //TX_MIN_EQ_RE_EST_10 +163 0x0100 //TX_MIN_EQ_RE_EST_11 +164 0x0100 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x0000 //TX_LAMBDA_CB_NLE +167 0x0000 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0008 //TX_SE_HOLD_N +170 0x0050 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x0000 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x0000 //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0000 //TX_FRQ_LIN_LEN +184 0x0000 //TX_FRQ_AEC_LEN_RHO +185 0x0000 //TX_MU0_UNP_FRQ_AEC +186 0x0000 //TX_MU0_PTD_FRQ_AEC +187 0x0000 //TX_MINENOISETH +188 0x0000 //TX_MU0_RE_EST +189 0x0000 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x0000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7333 //TX_DTD_THR1_0 +198 0x7333 //TX_DTD_THR1_1 +199 0x7333 //TX_DTD_THR1_2 +200 0x7333 //TX_DTD_THR1_3 +201 0x7333 //TX_DTD_THR1_4 +202 0x7333 //TX_DTD_THR1_5 +203 0x7333 //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0400 //TX_DT_CUT_K +214 0x0000 //TX_DT_CUT_THR +215 0x0000 //TX_COMFORT_G +216 0x0000 //TX_POWER_YOUT_TH +217 0x0000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x0800 //TX_B_POST_FILT_ECHO_H +230 0x0000 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x0000 //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0000 //TX_DT_RESRV_7 +240 0x0000 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF200 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF800 //TX_THR_SN_EST_2 +245 0xF600 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0A00 //TX_N_SN_EST +267 0x0000 //TX_INBEAM_T +268 0x0000 //TX_INBEAMHOLDT +269 0x1FFF //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x1000 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x0000 //TX_B_POST_FLT_0 +280 0x0000 //TX_B_POST_FLT_1 +281 0x001A //TX_NS_LVL_CTRL_0 +282 0x001A //TX_NS_LVL_CTRL_1 +283 0x0014 //TX_NS_LVL_CTRL_2 +284 0x0014 //TX_NS_LVL_CTRL_3 +285 0x000C //TX_NS_LVL_CTRL_4 +286 0x000C //TX_NS_LVL_CTRL_5 +287 0x000C //TX_NS_LVL_CTRL_6 +288 0x000C //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0014 //TX_MIN_GAIN_S_1 +291 0x0014 //TX_MIN_GAIN_S_2 +292 0x0014 //TX_MIN_GAIN_S_3 +293 0x0014 //TX_MIN_GAIN_S_4 +294 0x0014 //TX_MIN_GAIN_S_5 +295 0x0014 //TX_MIN_GAIN_S_6 +296 0x0014 //TX_MIN_GAIN_S_7 +297 0x0000 //TX_NMOS_SUP +298 0x0064 //TX_NS_MAX_PRI_SNR_TH +299 0x7FFF //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x1200 //TX_THR_LFNS +309 0x0147 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x7FFF //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x7FFF //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x199A //TX_A_POST_FILT_S_1 +316 0x1000 //TX_A_POST_FILT_S_2 +317 0x1000 //TX_A_POST_FILT_S_3 +318 0x6666 //TX_A_POST_FILT_S_4 +319 0x6666 //TX_A_POST_FILT_S_5 +320 0x6666 //TX_A_POST_FILT_S_6 +321 0x6666 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x2000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E00 //TX_LAMBDA_PFILT +339 0x7E00 //TX_LAMBDA_PFILT_S_0 +340 0x7E00 //TX_LAMBDA_PFILT_S_1 +341 0x7E00 //TX_LAMBDA_PFILT_S_2 +342 0x7E00 //TX_LAMBDA_PFILT_S_3 +343 0x7E00 //TX_LAMBDA_PFILT_S_4 +344 0x7E00 //TX_LAMBDA_PFILT_S_5 +345 0x7E00 //TX_LAMBDA_PFILT_S_6 +346 0x7E00 //TX_LAMBDA_PFILT_S_7 +347 0x0010 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x0000 //TX_K_PEPPER_HF +350 0x0000 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0000 //TX_DT_BINVAD_TH_0 +354 0x0000 //TX_DT_BINVAD_TH_1 +355 0x0000 //TX_DT_BINVAD_TH_2 +356 0x0000 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0001 //TX_BF_SGRAD_FLG +362 0x0000 //TX_BF_DVG_TH +363 0x0000 //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x05A0 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x1388 //TX_NOISE_TH_0_2 +369 0x3A98 //TX_NOISE_TH_0_3 +370 0x0C80 //TX_NOISE_TH_1 +371 0x0032 //TX_NOISE_TH_2 +372 0x3D54 //TX_NOISE_TH_3 +373 0x012C //TX_NOISE_TH_4 +374 0x07D0 //TX_NOISE_TH_5 +375 0x6590 //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x00C8 //TX_NOISE_TH_6 +379 0x000A //TX_MINENOISE_TH +380 0x0000 //TX_MINENOISE_MIC0_TH_MTS +381 0x0000 //TX_MINENOISE_MIC0_TH_EXP +382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x6400 //TX_OUT_ENER_S_TH_CLEAN +385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x6400 //TX_OUT_ENER_S_TH_NOISY +387 0x6400 //TX_OUT_ENER_TH_NOISE +388 0x7D00 //TX_OUT_ENER_TH_SPEECH +389 0x0000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0000 //TX_MU_ARSP_EST +396 0x0000 //TX_P_OUTBEAM_MIN_TH +397 0x0000 //TX_EXTRA_NS_L +398 0x0000 //TX_EXTRA_NS_A +399 0x0000 //TX_VR_NOISE_FLOOR_TH +400 0x0000 //TX_MIN_G_LOW300HZ +401 0x0010 //TX_MAXLEVEL_CNG +402 0x0000 //TX_STN_NOISE_TH +403 0x0000 //TX_POST_MASK_SUP +404 0x0000 //TX_POST_MASK_ADJUST +405 0x0014 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x0226 //TX_MINENOISE_MIC0_S_TH +408 0x2879 //TX_MIN_G_CTRL_SSNS +409 0x0400 //TX_METAL_RTO_THR +410 0x0080 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x2000 //TX_RHO_UPB +415 0x0020 //TX_N_HOLD_HS +416 0x0009 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0000 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x0219 //TX_THR_STD_PLH +421 0x09C4 //TX_N_HOLD_STD +422 0x0166 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x0000 //TX_SB_RTO_MEAN_TH_RUB +428 0x2000 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0064 //TX_DESIRED_TALK_HOLDT +431 0x1000 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0000 //TX_HS_VAD_BIN +435 0x0000 //TX_THR_VAD_HS +436 0x0000 //TX_MEAN_RTO_MIN_TH2 +437 0x0000 //TX_SILENCE_T +438 0x4000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x099A //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x001E //TX_DOA_VAD_THR_1 +445 0x001E //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B +453 0x005A //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C +456 0x005A //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D +459 0x005A //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0172 //TX_BF_HOLDOFF_T +473 0x8000 //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x071C //TX_DOA_TRACK_HT +477 0x0280 //TX_N1_HOLD_HF +478 0x0140 //TX_N2_HOLD_HF +479 0x2AAB //TX_BF_RESET_THR_HF +480 0x4000 //TX_DOA_SMOOTH +481 0x0000 //TX_MU_BF +482 0x0200 //TX_BF_MU_LF_B2 +483 0x0000 //TX_BF_FC_END_BIN_B2 +484 0x0000 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0000 //TX_N_DOA_SEED +488 0x0000 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x0000 //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x0000 //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x0000 //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0168 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0004 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0230 //TX_NOR_OFF_TH1 +503 0xD333 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x6666 //TX_MICTOBFGAIN0 +513 0x0014 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x0000 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0028 //TX_SNR_THR +531 0x03E8 //TX_ENGY_THR +532 0x0000 //TX_CORR_HIGH_TH +533 0x0000 //TX_ENGY_THR_2 +534 0x0000 //TX_MEAN_RTO_THR +535 0x0000 //TX_WNS_ENOISE_MIC0_TH +536 0x0000 //TX_RATIOMICL_TH +537 0x0000 //TX_CALIG_HS +538 0x000A //TX_LVL_CTRL +539 0x0000 //TX_WIND_SUPRTO +540 0x0000 //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x0000 //TX_RATIOMICH_TH +543 0x0000 //TX_WIND_INBEAM_L_TH +544 0x0000 //TX_WIND_INBEAM_H_TH +545 0x0000 //TX_WNS_RESRV_0 +546 0x0000 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0000 //TX_BF_LESSCUT_BBIN +554 0x0000 //TX_BF_LESSCUT_EBIN +555 0x0000 //TX_POSTBFB0 +556 0x0000 //TX_POSTBFB +557 0x0000 //TX_POSTBFE +558 0x0000 //TX_SPEECH_SNR_TH +559 0x0000 //TX_PB_MAX_PRI_SNR_TH +560 0x0000 //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0000 //TX_FDEQ_BIN_0 +592 0x0000 //TX_FDEQ_BIN_1 +593 0x0000 //TX_FDEQ_BIN_2 +594 0x0000 //TX_FDEQ_BIN_3 +595 0x0000 //TX_FDEQ_BIN_4 +596 0x0000 //TX_FDEQ_BIN_5 +597 0x0000 //TX_FDEQ_BIN_6 +598 0x0000 //TX_FDEQ_BIN_7 +599 0x0000 //TX_FDEQ_BIN_8 +600 0x0000 //TX_FDEQ_BIN_9 +601 0x0000 //TX_FDEQ_BIN_10 +602 0x0000 //TX_FDEQ_BIN_11 +603 0x0000 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0000 //TX_PREEQ_BIN_MIC0_0 +642 0x0000 //TX_PREEQ_BIN_MIC0_1 +643 0x0000 //TX_PREEQ_BIN_MIC0_2 +644 0x0000 //TX_PREEQ_BIN_MIC0_3 +645 0x0000 //TX_PREEQ_BIN_MIC0_4 +646 0x0000 //TX_PREEQ_BIN_MIC0_5 +647 0x0000 //TX_PREEQ_BIN_MIC0_6 +648 0x0000 //TX_PREEQ_BIN_MIC0_7 +649 0x0000 //TX_PREEQ_BIN_MIC0_8 +650 0x0000 //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0000 //TX_PREEQ_BIN_MIC1_0 +691 0x0000 //TX_PREEQ_BIN_MIC1_1 +692 0x0000 //TX_PREEQ_BIN_MIC1_2 +693 0x0000 //TX_PREEQ_BIN_MIC1_3 +694 0x0000 //TX_PREEQ_BIN_MIC1_4 +695 0x0000 //TX_PREEQ_BIN_MIC1_5 +696 0x0000 //TX_PREEQ_BIN_MIC1_6 +697 0x0000 //TX_PREEQ_BIN_MIC1_7 +698 0x0000 //TX_PREEQ_BIN_MIC1_8 +699 0x0000 //TX_PREEQ_BIN_MIC1_9 +700 0x0000 //TX_PREEQ_BIN_MIC1_10 +701 0x0000 //TX_PREEQ_BIN_MIC1_11 +702 0x0000 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0000 //TX_PREEQ_BIN_MIC2_0 +740 0x0000 //TX_PREEQ_BIN_MIC2_1 +741 0x0000 //TX_PREEQ_BIN_MIC2_2 +742 0x0000 //TX_PREEQ_BIN_MIC2_3 +743 0x0000 //TX_PREEQ_BIN_MIC2_4 +744 0x0000 //TX_PREEQ_BIN_MIC2_5 +745 0x0000 //TX_PREEQ_BIN_MIC2_6 +746 0x0000 //TX_PREEQ_BIN_MIC2_7 +747 0x0000 //TX_PREEQ_BIN_MIC2_8 +748 0x0000 //TX_PREEQ_BIN_MIC2_9 +749 0x0000 //TX_PREEQ_BIN_MIC2_10 +750 0x0000 //TX_PREEQ_BIN_MIC2_11 +751 0x0000 //TX_PREEQ_BIN_MIC2_12 +752 0x0000 //TX_PREEQ_BIN_MIC2_13 +753 0x0000 //TX_PREEQ_BIN_MIC2_14 +754 0x0000 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0064 //TX_MIC_CALIBRATION_0 +766 0x006A //TX_MIC_CALIBRATION_1 +767 0x006A //TX_MIC_CALIBRATION_2 +768 0x006B //TX_MIC_CALIBRATION_3 +769 0x0048 //TX_MIC_PWR_BIAS_0 +770 0x003C //TX_MIC_PWR_BIAS_1 +771 0x003C //TX_MIC_PWR_BIAS_2 +772 0x003C //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0009 //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 +788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 +789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 +790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 +791 0x65AD //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0002 //TX_DEADMIC_SILENCE_TH +817 0x0147 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x0000 //TX_KS_NOISEPASTE_FACTOR +824 0x0000 //TX_KS_CONFIG +825 0x0000 //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x0000 //TX_A_POST_FLT_FP +835 0x0000 //TX_RTO_OUTBEAM_TH +836 0x0000 //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0000 //TX_FFP_RESRV_2 +849 0x0000 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x0E80 //TX_TDDRC_THRD_2 +857 0x3800 //TX_TDDRC_THRD_3 +858 0x2A00 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x0000 //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0000 //TX_TDDRC_SMT_W +866 0x0100 //TX_TDDRC_DRC_GAIN +867 0x0000 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x1EB8 //TX_TFMASKLTH +870 0x170A //TX_TFMASKLTHL +871 0x7FFF //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x4000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x0000 //TX_FASTNS_OUTIN_TH +884 0x0000 //TX_FASTNS_TFMASK_TH +885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 +886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 +887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xD99A //TX_FASTNS_MASK5_TH +890 0x051F //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x003C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0403 //RX_PGA +11 0x7646 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0014 //RX_FDEQ_SUBNUM +39 0x8080 //RX_FDEQ_GAIN_0 +40 0x8054 //RX_FDEQ_GAIN_1 +41 0x5050 //RX_FDEQ_GAIN_2 +42 0x5058 //RX_FDEQ_GAIN_3 +43 0x5C70 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x484C //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x485A //RX_FDEQ_GAIN_8 +48 0x5A58 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0604 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0005 //RX_FILTINDX +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0780 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0015 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0780 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x8080 //RX_FDEQ_GAIN_0 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4C68 //RX_FDEQ_GAIN_4 +44 0x403C //RX_FDEQ_GAIN_5 +45 0x3C38 //RX_FDEQ_GAIN_6 +46 0x3430 //RX_FDEQ_GAIN_7 +47 0x303C //RX_FDEQ_GAIN_8 +48 0x4C50 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0014 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0780 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x8080 //RX_FDEQ_GAIN_0 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4C68 //RX_FDEQ_GAIN_4 +44 0x403C //RX_FDEQ_GAIN_5 +45 0x3C38 //RX_FDEQ_GAIN_6 +46 0x3430 //RX_FDEQ_GAIN_7 +47 0x303C //RX_FDEQ_GAIN_8 +48 0x4C50 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0780 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x8080 //RX_FDEQ_GAIN_0 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4C68 //RX_FDEQ_GAIN_4 +44 0x403C //RX_FDEQ_GAIN_5 +45 0x3C38 //RX_FDEQ_GAIN_6 +46 0x3430 //RX_FDEQ_GAIN_7 +47 0x303C //RX_FDEQ_GAIN_8 +48 0x4C50 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0029 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0780 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x8080 //RX_FDEQ_GAIN_0 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4C68 //RX_FDEQ_GAIN_4 +44 0x403C //RX_FDEQ_GAIN_5 +45 0x3C38 //RX_FDEQ_GAIN_6 +46 0x3430 //RX_FDEQ_GAIN_7 +47 0x303C //RX_FDEQ_GAIN_8 +48 0x4C50 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x003A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0EF7 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x8080 //RX_FDEQ_GAIN_0 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4470 //RX_FDEQ_GAIN_4 +44 0x383C //RX_FDEQ_GAIN_5 +45 0x3C3C //RX_FDEQ_GAIN_6 +46 0x3434 //RX_FDEQ_GAIN_7 +47 0x344C //RX_FDEQ_GAIN_8 +48 0x585C //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x002C //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0EF7 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x8080 //RX_FDEQ_GAIN_0 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4470 //RX_FDEQ_GAIN_4 +44 0x383C //RX_FDEQ_GAIN_5 +45 0x3C3C //RX_FDEQ_GAIN_6 +46 0x3434 //RX_FDEQ_GAIN_7 +47 0x344C //RX_FDEQ_GAIN_8 +48 0x585C //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0051 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0EF7 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x8080 //RX_FDEQ_GAIN_0 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4470 //RX_FDEQ_GAIN_4 +44 0x383C //RX_FDEQ_GAIN_5 +45 0x3C3C //RX_FDEQ_GAIN_6 +46 0x3434 //RX_FDEQ_GAIN_7 +47 0x344C //RX_FDEQ_GAIN_8 +48 0x585C //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-WB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0000 //TX_PATCH_REG +3 0x0200 //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0078 //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0302 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0000 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0000 //TX_MICS_OF_PAIR0 +38 0x0000 //TX_MICS_OF_PAIR1 +39 0x0000 //TX_MICS_OF_PAIR2 +40 0x0000 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0003 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x0000 //TX_HD_BIN_MASK +53 0x0000 //TX_HD_SUBAND_MASK +54 0x0000 //TX_HD_FRAME_AVG_MASK +55 0x0000 //TX_HD_MIN_FRQ +56 0x0000 //TX_HD_ALPHA_PSD +57 0x0000 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0x0000 //TX_T_PSDVAT +63 0x0000 //TX_CNT +64 0x0000 //TX_ANTI_HOWL_GAIN +65 0x0000 //TX_MICFORBFMARK_0 +66 0x0000 //TX_MICFORBFMARK_1 +67 0x0000 //TX_MICFORBFMARK_2 +68 0x0000 //TX_MICFORBFMARK_3 +69 0x0000 //TX_MICFORBFMARK_4 +70 0x0000 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x0000 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x0000 //TX_ADCS_GAIN +112 0x0000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x7FFF //TX_BLMIC_BLKFACTOR +116 0x7FFF //TX_BRMIC_BLKFACTOR +117 0x000A //TX_MICBLK_START_BIN +118 0x0041 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x0000 //TX_FE_ENER_TH_MTS +124 0x0000 //TX_FE_ENER_TH_EXP +125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x0000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0020 //TX_MIC_BLOCK_N +128 0x7652 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x7800 //TX_THR_PITCH_DET_0 +131 0x7000 //TX_THR_PITCH_DET_1 +132 0x6000 //TX_THR_PITCH_DET_2 +133 0x0000 //TX_PITCH_BFR_LEN +134 0x0000 //TX_SBD_PITCH_DET +135 0x0000 //TX_TD_AEC_L +136 0x0000 //TX_MU0_UNP_TD_AEC +137 0x0000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x2000 //TX_AEC_REF_GAIN_0 +148 0x2000 //TX_AEC_REF_GAIN_1 +149 0x2000 //TX_AEC_REF_GAIN_2 +150 0x4000 //TX_EAD_THR +151 0x0200 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0100 //TX_MIN_EQ_RE_EST_1 +154 0x0100 //TX_MIN_EQ_RE_EST_2 +155 0x0100 //TX_MIN_EQ_RE_EST_3 +156 0x0100 //TX_MIN_EQ_RE_EST_4 +157 0x0100 //TX_MIN_EQ_RE_EST_5 +158 0x0100 //TX_MIN_EQ_RE_EST_6 +159 0x0100 //TX_MIN_EQ_RE_EST_7 +160 0x0100 //TX_MIN_EQ_RE_EST_8 +161 0x0100 //TX_MIN_EQ_RE_EST_9 +162 0x0100 //TX_MIN_EQ_RE_EST_10 +163 0x0100 //TX_MIN_EQ_RE_EST_11 +164 0x0100 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x0000 //TX_LAMBDA_CB_NLE +167 0x0000 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0008 //TX_SE_HOLD_N +170 0x0050 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x0000 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x0000 //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0000 //TX_FRQ_LIN_LEN +184 0x0000 //TX_FRQ_AEC_LEN_RHO +185 0x0000 //TX_MU0_UNP_FRQ_AEC +186 0x0000 //TX_MU0_PTD_FRQ_AEC +187 0x0000 //TX_MINENOISETH +188 0x0000 //TX_MU0_RE_EST +189 0x0000 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x0000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7333 //TX_DTD_THR1_0 +198 0x7333 //TX_DTD_THR1_1 +199 0x7333 //TX_DTD_THR1_2 +200 0x7333 //TX_DTD_THR1_3 +201 0x7333 //TX_DTD_THR1_4 +202 0x7333 //TX_DTD_THR1_5 +203 0x7333 //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0400 //TX_DT_CUT_K +214 0x0000 //TX_DT_CUT_THR +215 0x0000 //TX_COMFORT_G +216 0x0000 //TX_POWER_YOUT_TH +217 0x0000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x0800 //TX_B_POST_FILT_ECHO_H +230 0x0000 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x0000 //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0000 //TX_DT_RESRV_7 +240 0x0000 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF200 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF800 //TX_THR_SN_EST_2 +245 0xF600 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0A00 //TX_N_SN_EST +267 0x0000 //TX_INBEAM_T +268 0x0000 //TX_INBEAMHOLDT +269 0x1FFF //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x1000 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x0000 //TX_B_POST_FLT_0 +280 0x0000 //TX_B_POST_FLT_1 +281 0x001A //TX_NS_LVL_CTRL_0 +282 0x001A //TX_NS_LVL_CTRL_1 +283 0x0014 //TX_NS_LVL_CTRL_2 +284 0x0014 //TX_NS_LVL_CTRL_3 +285 0x000C //TX_NS_LVL_CTRL_4 +286 0x000C //TX_NS_LVL_CTRL_5 +287 0x000C //TX_NS_LVL_CTRL_6 +288 0x000C //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0014 //TX_MIN_GAIN_S_1 +291 0x0014 //TX_MIN_GAIN_S_2 +292 0x0014 //TX_MIN_GAIN_S_3 +293 0x0014 //TX_MIN_GAIN_S_4 +294 0x0014 //TX_MIN_GAIN_S_5 +295 0x0014 //TX_MIN_GAIN_S_6 +296 0x0014 //TX_MIN_GAIN_S_7 +297 0x0000 //TX_NMOS_SUP +298 0x0064 //TX_NS_MAX_PRI_SNR_TH +299 0x7FFF //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x1200 //TX_THR_LFNS +309 0x0147 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x7FFF //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x7FFF //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x199A //TX_A_POST_FILT_S_1 +316 0x1000 //TX_A_POST_FILT_S_2 +317 0x1000 //TX_A_POST_FILT_S_3 +318 0x6666 //TX_A_POST_FILT_S_4 +319 0x6666 //TX_A_POST_FILT_S_5 +320 0x6666 //TX_A_POST_FILT_S_6 +321 0x6666 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x2000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E00 //TX_LAMBDA_PFILT +339 0x7E00 //TX_LAMBDA_PFILT_S_0 +340 0x7E00 //TX_LAMBDA_PFILT_S_1 +341 0x7E00 //TX_LAMBDA_PFILT_S_2 +342 0x7E00 //TX_LAMBDA_PFILT_S_3 +343 0x7E00 //TX_LAMBDA_PFILT_S_4 +344 0x7E00 //TX_LAMBDA_PFILT_S_5 +345 0x7E00 //TX_LAMBDA_PFILT_S_6 +346 0x7E00 //TX_LAMBDA_PFILT_S_7 +347 0x0010 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x0000 //TX_K_PEPPER_HF +350 0x0000 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0000 //TX_DT_BINVAD_TH_0 +354 0x0000 //TX_DT_BINVAD_TH_1 +355 0x0000 //TX_DT_BINVAD_TH_2 +356 0x0000 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0001 //TX_BF_SGRAD_FLG +362 0x0000 //TX_BF_DVG_TH +363 0x0000 //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x05A0 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x1388 //TX_NOISE_TH_0_2 +369 0x3A98 //TX_NOISE_TH_0_3 +370 0x0C80 //TX_NOISE_TH_1 +371 0x0032 //TX_NOISE_TH_2 +372 0x3D54 //TX_NOISE_TH_3 +373 0x012C //TX_NOISE_TH_4 +374 0x07D0 //TX_NOISE_TH_5 +375 0x6590 //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x00C8 //TX_NOISE_TH_6 +379 0x000A //TX_MINENOISE_TH +380 0x0000 //TX_MINENOISE_MIC0_TH_MTS +381 0x0000 //TX_MINENOISE_MIC0_TH_EXP +382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x6400 //TX_OUT_ENER_S_TH_CLEAN +385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x6400 //TX_OUT_ENER_S_TH_NOISY +387 0x6400 //TX_OUT_ENER_TH_NOISE +388 0x7D00 //TX_OUT_ENER_TH_SPEECH +389 0x0000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0000 //TX_MU_ARSP_EST +396 0x0000 //TX_P_OUTBEAM_MIN_TH +397 0x0000 //TX_EXTRA_NS_L +398 0x0000 //TX_EXTRA_NS_A +399 0x0000 //TX_VR_NOISE_FLOOR_TH +400 0x0000 //TX_MIN_G_LOW300HZ +401 0x0010 //TX_MAXLEVEL_CNG +402 0x0000 //TX_STN_NOISE_TH +403 0x0000 //TX_POST_MASK_SUP +404 0x0000 //TX_POST_MASK_ADJUST +405 0x0014 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x0226 //TX_MINENOISE_MIC0_S_TH +408 0x2879 //TX_MIN_G_CTRL_SSNS +409 0x0400 //TX_METAL_RTO_THR +410 0x0080 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x2000 //TX_RHO_UPB +415 0x0020 //TX_N_HOLD_HS +416 0x0009 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0000 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x0219 //TX_THR_STD_PLH +421 0x09C4 //TX_N_HOLD_STD +422 0x0166 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x0000 //TX_SB_RTO_MEAN_TH_RUB +428 0x2000 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0064 //TX_DESIRED_TALK_HOLDT +431 0x1000 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0000 //TX_HS_VAD_BIN +435 0x0000 //TX_THR_VAD_HS +436 0x0000 //TX_MEAN_RTO_MIN_TH2 +437 0x0000 //TX_SILENCE_T +438 0x4000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x099A //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x001E //TX_DOA_VAD_THR_1 +445 0x001E //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B +453 0x005A //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C +456 0x005A //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D +459 0x005A //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0172 //TX_BF_HOLDOFF_T +473 0x8000 //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x071C //TX_DOA_TRACK_HT +477 0x0280 //TX_N1_HOLD_HF +478 0x0140 //TX_N2_HOLD_HF +479 0x2AAB //TX_BF_RESET_THR_HF +480 0x4000 //TX_DOA_SMOOTH +481 0x0000 //TX_MU_BF +482 0x0200 //TX_BF_MU_LF_B2 +483 0x0000 //TX_BF_FC_END_BIN_B2 +484 0x0000 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0000 //TX_N_DOA_SEED +488 0x0000 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x0000 //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x0000 //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x0000 //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0168 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0004 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0230 //TX_NOR_OFF_TH1 +503 0xD333 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x6666 //TX_MICTOBFGAIN0 +513 0x0014 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x0000 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0028 //TX_SNR_THR +531 0x03E8 //TX_ENGY_THR +532 0x0000 //TX_CORR_HIGH_TH +533 0x0000 //TX_ENGY_THR_2 +534 0x0000 //TX_MEAN_RTO_THR +535 0x0000 //TX_WNS_ENOISE_MIC0_TH +536 0x0000 //TX_RATIOMICL_TH +537 0x0000 //TX_CALIG_HS +538 0x000A //TX_LVL_CTRL +539 0x0000 //TX_WIND_SUPRTO +540 0x0000 //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x0000 //TX_RATIOMICH_TH +543 0x0000 //TX_WIND_INBEAM_L_TH +544 0x0000 //TX_WIND_INBEAM_H_TH +545 0x0000 //TX_WNS_RESRV_0 +546 0x0000 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0000 //TX_BF_LESSCUT_BBIN +554 0x0000 //TX_BF_LESSCUT_EBIN +555 0x0000 //TX_POSTBFB0 +556 0x0000 //TX_POSTBFB +557 0x0000 //TX_POSTBFE +558 0x0000 //TX_SPEECH_SNR_TH +559 0x0000 //TX_PB_MAX_PRI_SNR_TH +560 0x0000 //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0000 //TX_FDEQ_BIN_0 +592 0x0000 //TX_FDEQ_BIN_1 +593 0x0000 //TX_FDEQ_BIN_2 +594 0x0000 //TX_FDEQ_BIN_3 +595 0x0000 //TX_FDEQ_BIN_4 +596 0x0000 //TX_FDEQ_BIN_5 +597 0x0000 //TX_FDEQ_BIN_6 +598 0x0000 //TX_FDEQ_BIN_7 +599 0x0000 //TX_FDEQ_BIN_8 +600 0x0000 //TX_FDEQ_BIN_9 +601 0x0000 //TX_FDEQ_BIN_10 +602 0x0000 //TX_FDEQ_BIN_11 +603 0x0000 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0000 //TX_PREEQ_BIN_MIC0_0 +642 0x0000 //TX_PREEQ_BIN_MIC0_1 +643 0x0000 //TX_PREEQ_BIN_MIC0_2 +644 0x0000 //TX_PREEQ_BIN_MIC0_3 +645 0x0000 //TX_PREEQ_BIN_MIC0_4 +646 0x0000 //TX_PREEQ_BIN_MIC0_5 +647 0x0000 //TX_PREEQ_BIN_MIC0_6 +648 0x0000 //TX_PREEQ_BIN_MIC0_7 +649 0x0000 //TX_PREEQ_BIN_MIC0_8 +650 0x0000 //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0000 //TX_PREEQ_BIN_MIC1_0 +691 0x0000 //TX_PREEQ_BIN_MIC1_1 +692 0x0000 //TX_PREEQ_BIN_MIC1_2 +693 0x0000 //TX_PREEQ_BIN_MIC1_3 +694 0x0000 //TX_PREEQ_BIN_MIC1_4 +695 0x0000 //TX_PREEQ_BIN_MIC1_5 +696 0x0000 //TX_PREEQ_BIN_MIC1_6 +697 0x0000 //TX_PREEQ_BIN_MIC1_7 +698 0x0000 //TX_PREEQ_BIN_MIC1_8 +699 0x0000 //TX_PREEQ_BIN_MIC1_9 +700 0x0000 //TX_PREEQ_BIN_MIC1_10 +701 0x0000 //TX_PREEQ_BIN_MIC1_11 +702 0x0000 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0000 //TX_PREEQ_BIN_MIC2_0 +740 0x0000 //TX_PREEQ_BIN_MIC2_1 +741 0x0000 //TX_PREEQ_BIN_MIC2_2 +742 0x0000 //TX_PREEQ_BIN_MIC2_3 +743 0x0000 //TX_PREEQ_BIN_MIC2_4 +744 0x0000 //TX_PREEQ_BIN_MIC2_5 +745 0x0000 //TX_PREEQ_BIN_MIC2_6 +746 0x0000 //TX_PREEQ_BIN_MIC2_7 +747 0x0000 //TX_PREEQ_BIN_MIC2_8 +748 0x0000 //TX_PREEQ_BIN_MIC2_9 +749 0x0000 //TX_PREEQ_BIN_MIC2_10 +750 0x0000 //TX_PREEQ_BIN_MIC2_11 +751 0x0000 //TX_PREEQ_BIN_MIC2_12 +752 0x0000 //TX_PREEQ_BIN_MIC2_13 +753 0x0000 //TX_PREEQ_BIN_MIC2_14 +754 0x0000 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0064 //TX_MIC_CALIBRATION_0 +766 0x006A //TX_MIC_CALIBRATION_1 +767 0x006A //TX_MIC_CALIBRATION_2 +768 0x006B //TX_MIC_CALIBRATION_3 +769 0x0048 //TX_MIC_PWR_BIAS_0 +770 0x003C //TX_MIC_PWR_BIAS_1 +771 0x003C //TX_MIC_PWR_BIAS_2 +772 0x003C //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0009 //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 +788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 +789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 +790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 +791 0x65AD //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0002 //TX_DEADMIC_SILENCE_TH +817 0x0147 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x0000 //TX_KS_NOISEPASTE_FACTOR +824 0x0000 //TX_KS_CONFIG +825 0x0000 //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x0000 //TX_A_POST_FLT_FP +835 0x0000 //TX_RTO_OUTBEAM_TH +836 0x0000 //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0000 //TX_FFP_RESRV_2 +849 0x0000 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x0E80 //TX_TDDRC_THRD_2 +857 0x3800 //TX_TDDRC_THRD_3 +858 0x2A00 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x0000 //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0000 //TX_TDDRC_SMT_W +866 0x0100 //TX_TDDRC_DRC_GAIN +867 0x0000 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x1EB8 //TX_TFMASKLTH +870 0x170A //TX_TFMASKLTHL +871 0x7FFF //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x4000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x0000 //TX_FASTNS_OUTIN_TH +884 0x0000 //TX_FASTNS_TFMASK_TH +885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 +886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 +887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xD99A //TX_FASTNS_MASK5_TH +890 0x051F //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x003C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0001 //RX_SAMPLINGFREQ_SIG +3 0x0001 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0403 //RX_PGA +11 0x7B02 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x001C //RX_FDEQ_SUBNUM +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6864 //RX_FDEQ_GAIN_1 +41 0x7070 //RX_FDEQ_GAIN_2 +42 0x6058 //RX_FDEQ_GAIN_3 +43 0x5C5C //RX_FDEQ_GAIN_4 +44 0x8854 //RX_FDEQ_GAIN_5 +45 0x5448 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4860 //RX_FDEQ_GAIN_8 +48 0x6068 //RX_FDEQ_GAIN_9 +49 0x7070 //RX_FDEQ_GAIN_10 +50 0x8070 //RX_FDEQ_GAIN_11 +51 0x6060 //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0204 //RX_FDEQ_BIN_5 +69 0x0A0A //RX_FDEQ_BIN_6 +70 0x0A0A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1C00 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0715 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0780 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x5C5C //RX_FDEQ_GAIN_0 +40 0x5448 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4840 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x6048 //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4038 //RX_FDEQ_GAIN_7 +47 0x3C48 //RX_FDEQ_GAIN_8 +48 0x545C //RX_FDEQ_GAIN_9 +49 0x6864 //RX_FDEQ_GAIN_10 +50 0x7058 //RX_FDEQ_GAIN_11 +51 0x443C //RX_FDEQ_GAIN_12 +52 0x3838 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0204 //RX_FDEQ_BIN_5 +69 0x0A0A //RX_FDEQ_BIN_6 +70 0x0A0A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0014 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0780 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x5C5C //RX_FDEQ_GAIN_0 +40 0x5448 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4840 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x6048 //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4038 //RX_FDEQ_GAIN_7 +47 0x3C48 //RX_FDEQ_GAIN_8 +48 0x545C //RX_FDEQ_GAIN_9 +49 0x6864 //RX_FDEQ_GAIN_10 +50 0x7058 //RX_FDEQ_GAIN_11 +51 0x443C //RX_FDEQ_GAIN_12 +52 0x3838 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0204 //RX_FDEQ_BIN_5 +69 0x0A0A //RX_FDEQ_BIN_6 +70 0x0A0A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0780 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x5C5C //RX_FDEQ_GAIN_0 +40 0x5448 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4840 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x6048 //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4038 //RX_FDEQ_GAIN_7 +47 0x3C48 //RX_FDEQ_GAIN_8 +48 0x545C //RX_FDEQ_GAIN_9 +49 0x6864 //RX_FDEQ_GAIN_10 +50 0x7058 //RX_FDEQ_GAIN_11 +51 0x443C //RX_FDEQ_GAIN_12 +52 0x3838 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0204 //RX_FDEQ_BIN_5 +69 0x0A0A //RX_FDEQ_BIN_6 +70 0x0A0A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x002A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0780 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x5C5C //RX_FDEQ_GAIN_0 +40 0x5448 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4840 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x6048 //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4038 //RX_FDEQ_GAIN_7 +47 0x3C48 //RX_FDEQ_GAIN_8 +48 0x545C //RX_FDEQ_GAIN_9 +49 0x6864 //RX_FDEQ_GAIN_10 +50 0x7058 //RX_FDEQ_GAIN_11 +51 0x443C //RX_FDEQ_GAIN_12 +52 0x3838 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0204 //RX_FDEQ_BIN_5 +69 0x0A0A //RX_FDEQ_BIN_6 +70 0x0A0A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x003D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0EF7 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x685C //RX_FDEQ_GAIN_1 +41 0x6868 //RX_FDEQ_GAIN_2 +42 0x544C //RX_FDEQ_GAIN_3 +43 0x4C54 //RX_FDEQ_GAIN_4 +44 0x704C //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x445C //RX_FDEQ_GAIN_8 +48 0x6068 //RX_FDEQ_GAIN_9 +49 0x7070 //RX_FDEQ_GAIN_10 +50 0x7C74 //RX_FDEQ_GAIN_11 +51 0x6060 //RX_FDEQ_GAIN_12 +52 0x6C6C //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0204 //RX_FDEQ_BIN_5 +69 0x0A0A //RX_FDEQ_BIN_6 +70 0x0A0A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x003D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0EF7 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x685C //RX_FDEQ_GAIN_1 +41 0x6868 //RX_FDEQ_GAIN_2 +42 0x544C //RX_FDEQ_GAIN_3 +43 0x4C54 //RX_FDEQ_GAIN_4 +44 0x704C //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x445C //RX_FDEQ_GAIN_8 +48 0x6068 //RX_FDEQ_GAIN_9 +49 0x7070 //RX_FDEQ_GAIN_10 +50 0x7C74 //RX_FDEQ_GAIN_11 +51 0x6060 //RX_FDEQ_GAIN_12 +52 0x6C6C //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0204 //RX_FDEQ_BIN_5 +69 0x0A0A //RX_FDEQ_BIN_6 +70 0x0A0A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0063 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0EF7 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x685C //RX_FDEQ_GAIN_1 +41 0x6868 //RX_FDEQ_GAIN_2 +42 0x544C //RX_FDEQ_GAIN_3 +43 0x4C54 //RX_FDEQ_GAIN_4 +44 0x704C //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x445C //RX_FDEQ_GAIN_8 +48 0x6068 //RX_FDEQ_GAIN_9 +49 0x7070 //RX_FDEQ_GAIN_10 +50 0x7C74 //RX_FDEQ_GAIN_11 +51 0x6060 //RX_FDEQ_GAIN_12 +52 0x6C6C //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0204 //RX_FDEQ_BIN_5 +69 0x0A0A //RX_FDEQ_BIN_6 +70 0x0A0A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-SWB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0000 //TX_PATCH_REG +3 0x0200 //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0078 //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0302 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0000 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0000 //TX_MICS_OF_PAIR0 +38 0x0000 //TX_MICS_OF_PAIR1 +39 0x0000 //TX_MICS_OF_PAIR2 +40 0x0000 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0003 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x0000 //TX_HD_BIN_MASK +53 0x0000 //TX_HD_SUBAND_MASK +54 0x0000 //TX_HD_FRAME_AVG_MASK +55 0x0000 //TX_HD_MIN_FRQ +56 0x0000 //TX_HD_ALPHA_PSD +57 0x0000 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0x0000 //TX_T_PSDVAT +63 0x0000 //TX_CNT +64 0x0000 //TX_ANTI_HOWL_GAIN +65 0x0000 //TX_MICFORBFMARK_0 +66 0x0000 //TX_MICFORBFMARK_1 +67 0x0000 //TX_MICFORBFMARK_2 +68 0x0000 //TX_MICFORBFMARK_3 +69 0x0000 //TX_MICFORBFMARK_4 +70 0x0000 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x0000 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x0000 //TX_ADCS_GAIN +112 0x0000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x7FFF //TX_BLMIC_BLKFACTOR +116 0x7FFF //TX_BRMIC_BLKFACTOR +117 0x000A //TX_MICBLK_START_BIN +118 0x0041 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x0000 //TX_FE_ENER_TH_MTS +124 0x0000 //TX_FE_ENER_TH_EXP +125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x0000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0020 //TX_MIC_BLOCK_N +128 0x7652 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x7800 //TX_THR_PITCH_DET_0 +131 0x7000 //TX_THR_PITCH_DET_1 +132 0x6000 //TX_THR_PITCH_DET_2 +133 0x0000 //TX_PITCH_BFR_LEN +134 0x0000 //TX_SBD_PITCH_DET +135 0x0000 //TX_TD_AEC_L +136 0x0000 //TX_MU0_UNP_TD_AEC +137 0x0000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x2000 //TX_AEC_REF_GAIN_0 +148 0x2000 //TX_AEC_REF_GAIN_1 +149 0x2000 //TX_AEC_REF_GAIN_2 +150 0x4000 //TX_EAD_THR +151 0x0200 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0100 //TX_MIN_EQ_RE_EST_1 +154 0x0100 //TX_MIN_EQ_RE_EST_2 +155 0x0100 //TX_MIN_EQ_RE_EST_3 +156 0x0100 //TX_MIN_EQ_RE_EST_4 +157 0x0100 //TX_MIN_EQ_RE_EST_5 +158 0x0100 //TX_MIN_EQ_RE_EST_6 +159 0x0100 //TX_MIN_EQ_RE_EST_7 +160 0x0100 //TX_MIN_EQ_RE_EST_8 +161 0x0100 //TX_MIN_EQ_RE_EST_9 +162 0x0100 //TX_MIN_EQ_RE_EST_10 +163 0x0100 //TX_MIN_EQ_RE_EST_11 +164 0x0100 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x0000 //TX_LAMBDA_CB_NLE +167 0x0000 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0008 //TX_SE_HOLD_N +170 0x0050 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x0000 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x0000 //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0000 //TX_FRQ_LIN_LEN +184 0x0000 //TX_FRQ_AEC_LEN_RHO +185 0x0000 //TX_MU0_UNP_FRQ_AEC +186 0x0000 //TX_MU0_PTD_FRQ_AEC +187 0x0000 //TX_MINENOISETH +188 0x0000 //TX_MU0_RE_EST +189 0x0000 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x0000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7333 //TX_DTD_THR1_0 +198 0x7333 //TX_DTD_THR1_1 +199 0x7333 //TX_DTD_THR1_2 +200 0x7333 //TX_DTD_THR1_3 +201 0x7333 //TX_DTD_THR1_4 +202 0x7333 //TX_DTD_THR1_5 +203 0x7333 //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0400 //TX_DT_CUT_K +214 0x0000 //TX_DT_CUT_THR +215 0x0000 //TX_COMFORT_G +216 0x0000 //TX_POWER_YOUT_TH +217 0x0000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x0800 //TX_B_POST_FILT_ECHO_H +230 0x0000 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x0000 //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0000 //TX_DT_RESRV_7 +240 0x0000 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF200 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF800 //TX_THR_SN_EST_2 +245 0xF600 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0A00 //TX_N_SN_EST +267 0x0000 //TX_INBEAM_T +268 0x0000 //TX_INBEAMHOLDT +269 0x1FFF //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x1000 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x0000 //TX_B_POST_FLT_0 +280 0x0000 //TX_B_POST_FLT_1 +281 0x001A //TX_NS_LVL_CTRL_0 +282 0x001A //TX_NS_LVL_CTRL_1 +283 0x0014 //TX_NS_LVL_CTRL_2 +284 0x0014 //TX_NS_LVL_CTRL_3 +285 0x000C //TX_NS_LVL_CTRL_4 +286 0x000C //TX_NS_LVL_CTRL_5 +287 0x000C //TX_NS_LVL_CTRL_6 +288 0x000C //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0014 //TX_MIN_GAIN_S_1 +291 0x0014 //TX_MIN_GAIN_S_2 +292 0x0014 //TX_MIN_GAIN_S_3 +293 0x0014 //TX_MIN_GAIN_S_4 +294 0x0014 //TX_MIN_GAIN_S_5 +295 0x0014 //TX_MIN_GAIN_S_6 +296 0x0014 //TX_MIN_GAIN_S_7 +297 0x0000 //TX_NMOS_SUP +298 0x0064 //TX_NS_MAX_PRI_SNR_TH +299 0x7FFF //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x1200 //TX_THR_LFNS +309 0x0147 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x7FFF //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x7FFF //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x199A //TX_A_POST_FILT_S_1 +316 0x1000 //TX_A_POST_FILT_S_2 +317 0x1000 //TX_A_POST_FILT_S_3 +318 0x6666 //TX_A_POST_FILT_S_4 +319 0x6666 //TX_A_POST_FILT_S_5 +320 0x6666 //TX_A_POST_FILT_S_6 +321 0x6666 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x2000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E00 //TX_LAMBDA_PFILT +339 0x7E00 //TX_LAMBDA_PFILT_S_0 +340 0x7E00 //TX_LAMBDA_PFILT_S_1 +341 0x7E00 //TX_LAMBDA_PFILT_S_2 +342 0x7E00 //TX_LAMBDA_PFILT_S_3 +343 0x7E00 //TX_LAMBDA_PFILT_S_4 +344 0x7E00 //TX_LAMBDA_PFILT_S_5 +345 0x7E00 //TX_LAMBDA_PFILT_S_6 +346 0x7E00 //TX_LAMBDA_PFILT_S_7 +347 0x0010 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x0000 //TX_K_PEPPER_HF +350 0x0000 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0000 //TX_DT_BINVAD_TH_0 +354 0x0000 //TX_DT_BINVAD_TH_1 +355 0x0000 //TX_DT_BINVAD_TH_2 +356 0x0000 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0001 //TX_BF_SGRAD_FLG +362 0x0000 //TX_BF_DVG_TH +363 0x0000 //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x05A0 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x1388 //TX_NOISE_TH_0_2 +369 0x3A98 //TX_NOISE_TH_0_3 +370 0x0C80 //TX_NOISE_TH_1 +371 0x0032 //TX_NOISE_TH_2 +372 0x3D54 //TX_NOISE_TH_3 +373 0x012C //TX_NOISE_TH_4 +374 0x07D0 //TX_NOISE_TH_5 +375 0x6590 //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x00C8 //TX_NOISE_TH_6 +379 0x000A //TX_MINENOISE_TH +380 0x0000 //TX_MINENOISE_MIC0_TH_MTS +381 0x0000 //TX_MINENOISE_MIC0_TH_EXP +382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x6400 //TX_OUT_ENER_S_TH_CLEAN +385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x6400 //TX_OUT_ENER_S_TH_NOISY +387 0x6400 //TX_OUT_ENER_TH_NOISE +388 0x7D00 //TX_OUT_ENER_TH_SPEECH +389 0x0000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0000 //TX_MU_ARSP_EST +396 0x0000 //TX_P_OUTBEAM_MIN_TH +397 0x0000 //TX_EXTRA_NS_L +398 0x0000 //TX_EXTRA_NS_A +399 0x0000 //TX_VR_NOISE_FLOOR_TH +400 0x0000 //TX_MIN_G_LOW300HZ +401 0x0010 //TX_MAXLEVEL_CNG +402 0x0000 //TX_STN_NOISE_TH +403 0x0000 //TX_POST_MASK_SUP +404 0x0000 //TX_POST_MASK_ADJUST +405 0x0014 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x0226 //TX_MINENOISE_MIC0_S_TH +408 0x2879 //TX_MIN_G_CTRL_SSNS +409 0x0400 //TX_METAL_RTO_THR +410 0x0080 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x2000 //TX_RHO_UPB +415 0x0020 //TX_N_HOLD_HS +416 0x0009 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0000 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x0219 //TX_THR_STD_PLH +421 0x09C4 //TX_N_HOLD_STD +422 0x0166 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x0000 //TX_SB_RTO_MEAN_TH_RUB +428 0x2000 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0064 //TX_DESIRED_TALK_HOLDT +431 0x1000 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0000 //TX_HS_VAD_BIN +435 0x0000 //TX_THR_VAD_HS +436 0x0000 //TX_MEAN_RTO_MIN_TH2 +437 0x0000 //TX_SILENCE_T +438 0x4000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x099A //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x001E //TX_DOA_VAD_THR_1 +445 0x001E //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B +453 0x005A //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C +456 0x005A //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D +459 0x005A //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0172 //TX_BF_HOLDOFF_T +473 0x8000 //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x071C //TX_DOA_TRACK_HT +477 0x0280 //TX_N1_HOLD_HF +478 0x0140 //TX_N2_HOLD_HF +479 0x2AAB //TX_BF_RESET_THR_HF +480 0x4000 //TX_DOA_SMOOTH +481 0x0000 //TX_MU_BF +482 0x0200 //TX_BF_MU_LF_B2 +483 0x0000 //TX_BF_FC_END_BIN_B2 +484 0x0000 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0000 //TX_N_DOA_SEED +488 0x0000 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x0000 //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x0000 //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x0000 //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0168 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0004 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0230 //TX_NOR_OFF_TH1 +503 0xD333 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x6666 //TX_MICTOBFGAIN0 +513 0x0014 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x0000 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0028 //TX_SNR_THR +531 0x03E8 //TX_ENGY_THR +532 0x0000 //TX_CORR_HIGH_TH +533 0x0000 //TX_ENGY_THR_2 +534 0x0000 //TX_MEAN_RTO_THR +535 0x0000 //TX_WNS_ENOISE_MIC0_TH +536 0x0000 //TX_RATIOMICL_TH +537 0x0000 //TX_CALIG_HS +538 0x000A //TX_LVL_CTRL +539 0x0000 //TX_WIND_SUPRTO +540 0x0000 //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x0000 //TX_RATIOMICH_TH +543 0x0000 //TX_WIND_INBEAM_L_TH +544 0x0000 //TX_WIND_INBEAM_H_TH +545 0x0000 //TX_WNS_RESRV_0 +546 0x0000 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0000 //TX_BF_LESSCUT_BBIN +554 0x0000 //TX_BF_LESSCUT_EBIN +555 0x0000 //TX_POSTBFB0 +556 0x0000 //TX_POSTBFB +557 0x0000 //TX_POSTBFE +558 0x0000 //TX_SPEECH_SNR_TH +559 0x0000 //TX_PB_MAX_PRI_SNR_TH +560 0x0000 //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0000 //TX_FDEQ_BIN_0 +592 0x0000 //TX_FDEQ_BIN_1 +593 0x0000 //TX_FDEQ_BIN_2 +594 0x0000 //TX_FDEQ_BIN_3 +595 0x0000 //TX_FDEQ_BIN_4 +596 0x0000 //TX_FDEQ_BIN_5 +597 0x0000 //TX_FDEQ_BIN_6 +598 0x0000 //TX_FDEQ_BIN_7 +599 0x0000 //TX_FDEQ_BIN_8 +600 0x0000 //TX_FDEQ_BIN_9 +601 0x0000 //TX_FDEQ_BIN_10 +602 0x0000 //TX_FDEQ_BIN_11 +603 0x0000 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0000 //TX_PREEQ_BIN_MIC0_0 +642 0x0000 //TX_PREEQ_BIN_MIC0_1 +643 0x0000 //TX_PREEQ_BIN_MIC0_2 +644 0x0000 //TX_PREEQ_BIN_MIC0_3 +645 0x0000 //TX_PREEQ_BIN_MIC0_4 +646 0x0000 //TX_PREEQ_BIN_MIC0_5 +647 0x0000 //TX_PREEQ_BIN_MIC0_6 +648 0x0000 //TX_PREEQ_BIN_MIC0_7 +649 0x0000 //TX_PREEQ_BIN_MIC0_8 +650 0x0000 //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0000 //TX_PREEQ_BIN_MIC1_0 +691 0x0000 //TX_PREEQ_BIN_MIC1_1 +692 0x0000 //TX_PREEQ_BIN_MIC1_2 +693 0x0000 //TX_PREEQ_BIN_MIC1_3 +694 0x0000 //TX_PREEQ_BIN_MIC1_4 +695 0x0000 //TX_PREEQ_BIN_MIC1_5 +696 0x0000 //TX_PREEQ_BIN_MIC1_6 +697 0x0000 //TX_PREEQ_BIN_MIC1_7 +698 0x0000 //TX_PREEQ_BIN_MIC1_8 +699 0x0000 //TX_PREEQ_BIN_MIC1_9 +700 0x0000 //TX_PREEQ_BIN_MIC1_10 +701 0x0000 //TX_PREEQ_BIN_MIC1_11 +702 0x0000 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0000 //TX_PREEQ_BIN_MIC2_0 +740 0x0000 //TX_PREEQ_BIN_MIC2_1 +741 0x0000 //TX_PREEQ_BIN_MIC2_2 +742 0x0000 //TX_PREEQ_BIN_MIC2_3 +743 0x0000 //TX_PREEQ_BIN_MIC2_4 +744 0x0000 //TX_PREEQ_BIN_MIC2_5 +745 0x0000 //TX_PREEQ_BIN_MIC2_6 +746 0x0000 //TX_PREEQ_BIN_MIC2_7 +747 0x0000 //TX_PREEQ_BIN_MIC2_8 +748 0x0000 //TX_PREEQ_BIN_MIC2_9 +749 0x0000 //TX_PREEQ_BIN_MIC2_10 +750 0x0000 //TX_PREEQ_BIN_MIC2_11 +751 0x0000 //TX_PREEQ_BIN_MIC2_12 +752 0x0000 //TX_PREEQ_BIN_MIC2_13 +753 0x0000 //TX_PREEQ_BIN_MIC2_14 +754 0x0000 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0064 //TX_MIC_CALIBRATION_0 +766 0x006A //TX_MIC_CALIBRATION_1 +767 0x006A //TX_MIC_CALIBRATION_2 +768 0x006B //TX_MIC_CALIBRATION_3 +769 0x0048 //TX_MIC_PWR_BIAS_0 +770 0x003C //TX_MIC_PWR_BIAS_1 +771 0x003C //TX_MIC_PWR_BIAS_2 +772 0x003C //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0009 //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 +788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 +789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 +790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 +791 0x65AD //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0002 //TX_DEADMIC_SILENCE_TH +817 0x0147 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x0000 //TX_KS_NOISEPASTE_FACTOR +824 0x0000 //TX_KS_CONFIG +825 0x0000 //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x0000 //TX_A_POST_FLT_FP +835 0x0000 //TX_RTO_OUTBEAM_TH +836 0x0000 //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0000 //TX_FFP_RESRV_2 +849 0x0000 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x0E80 //TX_TDDRC_THRD_2 +857 0x3800 //TX_TDDRC_THRD_3 +858 0x2A00 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x0000 //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0000 //TX_TDDRC_SMT_W +866 0x0100 //TX_TDDRC_DRC_GAIN +867 0x0000 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x1EB8 //TX_TFMASKLTH +870 0x170A //TX_TFMASKLTHL +871 0x7FFF //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x4000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x0000 //TX_FASTNS_OUTIN_TH +884 0x0000 //TX_FASTNS_TFMASK_TH +885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 +886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 +887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xD99A //TX_FASTNS_MASK5_TH +890 0x051F //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x003C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0403 //RX_PGA +11 0x7D83 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x7C48 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4860 //RX_FDEQ_GAIN_8 +48 0x7468 //RX_FDEQ_GAIN_9 +49 0x5858 //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x5C54 //RX_FDEQ_GAIN_12 +52 0x5448 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x5858 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0550 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0014 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0780 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x3434 //RX_FDEQ_GAIN_3 +43 0x3840 //RX_FDEQ_GAIN_4 +44 0x4838 //RX_FDEQ_GAIN_5 +45 0x5444 //RX_FDEQ_GAIN_6 +46 0x443C //RX_FDEQ_GAIN_7 +47 0x3C60 //RX_FDEQ_GAIN_8 +48 0x6460 //RX_FDEQ_GAIN_9 +49 0x6064 //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5440 //RX_FDEQ_GAIN_12 +52 0x4040 //RX_FDEQ_GAIN_13 +53 0x4040 //RX_FDEQ_GAIN_14 +54 0x5858 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0013 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0780 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x3434 //RX_FDEQ_GAIN_3 +43 0x3840 //RX_FDEQ_GAIN_4 +44 0x4838 //RX_FDEQ_GAIN_5 +45 0x5444 //RX_FDEQ_GAIN_6 +46 0x443C //RX_FDEQ_GAIN_7 +47 0x3C60 //RX_FDEQ_GAIN_8 +48 0x6460 //RX_FDEQ_GAIN_9 +49 0x6064 //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5440 //RX_FDEQ_GAIN_12 +52 0x4040 //RX_FDEQ_GAIN_13 +53 0x4040 //RX_FDEQ_GAIN_14 +54 0x5858 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0780 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x3434 //RX_FDEQ_GAIN_3 +43 0x3840 //RX_FDEQ_GAIN_4 +44 0x4838 //RX_FDEQ_GAIN_5 +45 0x5444 //RX_FDEQ_GAIN_6 +46 0x443C //RX_FDEQ_GAIN_7 +47 0x3C60 //RX_FDEQ_GAIN_8 +48 0x6460 //RX_FDEQ_GAIN_9 +49 0x6064 //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5440 //RX_FDEQ_GAIN_12 +52 0x4040 //RX_FDEQ_GAIN_13 +53 0x4040 //RX_FDEQ_GAIN_14 +54 0x5858 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0027 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0780 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x3434 //RX_FDEQ_GAIN_3 +43 0x3840 //RX_FDEQ_GAIN_4 +44 0x4838 //RX_FDEQ_GAIN_5 +45 0x5444 //RX_FDEQ_GAIN_6 +46 0x443C //RX_FDEQ_GAIN_7 +47 0x3C60 //RX_FDEQ_GAIN_8 +48 0x6460 //RX_FDEQ_GAIN_9 +49 0x6064 //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5440 //RX_FDEQ_GAIN_12 +52 0x4040 //RX_FDEQ_GAIN_13 +53 0x4040 //RX_FDEQ_GAIN_14 +54 0x5858 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0039 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0EF7 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6850 //RX_FDEQ_GAIN_1 +41 0x5048 //RX_FDEQ_GAIN_2 +42 0x383C //RX_FDEQ_GAIN_3 +43 0x4048 //RX_FDEQ_GAIN_4 +44 0x7040 //RX_FDEQ_GAIN_5 +45 0x4C44 //RX_FDEQ_GAIN_6 +46 0x4448 //RX_FDEQ_GAIN_7 +47 0x4868 //RX_FDEQ_GAIN_8 +48 0x7C70 //RX_FDEQ_GAIN_9 +49 0x707C //RX_FDEQ_GAIN_10 +50 0x786C //RX_FDEQ_GAIN_11 +51 0x6454 //RX_FDEQ_GAIN_12 +52 0x604C //RX_FDEQ_GAIN_13 +53 0x585C //RX_FDEQ_GAIN_14 +54 0x7480 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0034 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0EF7 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6850 //RX_FDEQ_GAIN_1 +41 0x5048 //RX_FDEQ_GAIN_2 +42 0x383C //RX_FDEQ_GAIN_3 +43 0x4048 //RX_FDEQ_GAIN_4 +44 0x7040 //RX_FDEQ_GAIN_5 +45 0x4C44 //RX_FDEQ_GAIN_6 +46 0x4448 //RX_FDEQ_GAIN_7 +47 0x4868 //RX_FDEQ_GAIN_8 +48 0x7C70 //RX_FDEQ_GAIN_9 +49 0x707C //RX_FDEQ_GAIN_10 +50 0x786C //RX_FDEQ_GAIN_11 +51 0x6454 //RX_FDEQ_GAIN_12 +52 0x604C //RX_FDEQ_GAIN_13 +53 0x585C //RX_FDEQ_GAIN_14 +54 0x7480 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0059 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0EF7 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6850 //RX_FDEQ_GAIN_1 +41 0x5048 //RX_FDEQ_GAIN_2 +42 0x383C //RX_FDEQ_GAIN_3 +43 0x4048 //RX_FDEQ_GAIN_4 +44 0x7040 //RX_FDEQ_GAIN_5 +45 0x4C44 //RX_FDEQ_GAIN_6 +46 0x4448 //RX_FDEQ_GAIN_7 +47 0x4868 //RX_FDEQ_GAIN_8 +48 0x7C70 //RX_FDEQ_GAIN_9 +49 0x707C //RX_FDEQ_GAIN_10 +50 0x786C //RX_FDEQ_GAIN_11 +51 0x6454 //RX_FDEQ_GAIN_12 +52 0x604C //RX_FDEQ_GAIN_13 +53 0x585C //RX_FDEQ_GAIN_14 +54 0x7480 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0000 //TX_PATCH_REG +3 0x0200 //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0078 //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0302 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0000 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0000 //TX_MICS_OF_PAIR0 +38 0x0000 //TX_MICS_OF_PAIR1 +39 0x0000 //TX_MICS_OF_PAIR2 +40 0x0000 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0003 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x0000 //TX_HD_BIN_MASK +53 0x0000 //TX_HD_SUBAND_MASK +54 0x0000 //TX_HD_FRAME_AVG_MASK +55 0x0000 //TX_HD_MIN_FRQ +56 0x0000 //TX_HD_ALPHA_PSD +57 0x0000 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0x0000 //TX_T_PSDVAT +63 0x0000 //TX_CNT +64 0x0000 //TX_ANTI_HOWL_GAIN +65 0x0000 //TX_MICFORBFMARK_0 +66 0x0000 //TX_MICFORBFMARK_1 +67 0x0000 //TX_MICFORBFMARK_2 +68 0x0000 //TX_MICFORBFMARK_3 +69 0x0000 //TX_MICFORBFMARK_4 +70 0x0000 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x0000 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x0000 //TX_ADCS_GAIN +112 0x0000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x7FFF //TX_BLMIC_BLKFACTOR +116 0x7FFF //TX_BRMIC_BLKFACTOR +117 0x000A //TX_MICBLK_START_BIN +118 0x0041 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x0000 //TX_FE_ENER_TH_MTS +124 0x0000 //TX_FE_ENER_TH_EXP +125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x0000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0020 //TX_MIC_BLOCK_N +128 0x7652 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x7800 //TX_THR_PITCH_DET_0 +131 0x7000 //TX_THR_PITCH_DET_1 +132 0x6000 //TX_THR_PITCH_DET_2 +133 0x0000 //TX_PITCH_BFR_LEN +134 0x0000 //TX_SBD_PITCH_DET +135 0x0000 //TX_TD_AEC_L +136 0x0000 //TX_MU0_UNP_TD_AEC +137 0x0000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x2000 //TX_AEC_REF_GAIN_0 +148 0x2000 //TX_AEC_REF_GAIN_1 +149 0x2000 //TX_AEC_REF_GAIN_2 +150 0x4000 //TX_EAD_THR +151 0x0200 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0100 //TX_MIN_EQ_RE_EST_1 +154 0x0100 //TX_MIN_EQ_RE_EST_2 +155 0x0100 //TX_MIN_EQ_RE_EST_3 +156 0x0100 //TX_MIN_EQ_RE_EST_4 +157 0x0100 //TX_MIN_EQ_RE_EST_5 +158 0x0100 //TX_MIN_EQ_RE_EST_6 +159 0x0100 //TX_MIN_EQ_RE_EST_7 +160 0x0100 //TX_MIN_EQ_RE_EST_8 +161 0x0100 //TX_MIN_EQ_RE_EST_9 +162 0x0100 //TX_MIN_EQ_RE_EST_10 +163 0x0100 //TX_MIN_EQ_RE_EST_11 +164 0x0100 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x0000 //TX_LAMBDA_CB_NLE +167 0x0000 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0008 //TX_SE_HOLD_N +170 0x0050 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x0000 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x0000 //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0000 //TX_FRQ_LIN_LEN +184 0x0000 //TX_FRQ_AEC_LEN_RHO +185 0x0000 //TX_MU0_UNP_FRQ_AEC +186 0x0000 //TX_MU0_PTD_FRQ_AEC +187 0x0000 //TX_MINENOISETH +188 0x0000 //TX_MU0_RE_EST +189 0x0000 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x0000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7333 //TX_DTD_THR1_0 +198 0x7333 //TX_DTD_THR1_1 +199 0x7333 //TX_DTD_THR1_2 +200 0x7333 //TX_DTD_THR1_3 +201 0x7333 //TX_DTD_THR1_4 +202 0x7333 //TX_DTD_THR1_5 +203 0x7333 //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0400 //TX_DT_CUT_K +214 0x0000 //TX_DT_CUT_THR +215 0x0000 //TX_COMFORT_G +216 0x0000 //TX_POWER_YOUT_TH +217 0x0000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x0800 //TX_B_POST_FILT_ECHO_H +230 0x0000 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x0000 //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0000 //TX_DT_RESRV_7 +240 0x0000 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF200 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF800 //TX_THR_SN_EST_2 +245 0xF600 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0A00 //TX_N_SN_EST +267 0x0000 //TX_INBEAM_T +268 0x0000 //TX_INBEAMHOLDT +269 0x1FFF //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x1000 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x0000 //TX_B_POST_FLT_0 +280 0x0000 //TX_B_POST_FLT_1 +281 0x001A //TX_NS_LVL_CTRL_0 +282 0x001A //TX_NS_LVL_CTRL_1 +283 0x0014 //TX_NS_LVL_CTRL_2 +284 0x0014 //TX_NS_LVL_CTRL_3 +285 0x000C //TX_NS_LVL_CTRL_4 +286 0x000C //TX_NS_LVL_CTRL_5 +287 0x000C //TX_NS_LVL_CTRL_6 +288 0x000C //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0014 //TX_MIN_GAIN_S_1 +291 0x0014 //TX_MIN_GAIN_S_2 +292 0x0014 //TX_MIN_GAIN_S_3 +293 0x0014 //TX_MIN_GAIN_S_4 +294 0x0014 //TX_MIN_GAIN_S_5 +295 0x0014 //TX_MIN_GAIN_S_6 +296 0x0014 //TX_MIN_GAIN_S_7 +297 0x0000 //TX_NMOS_SUP +298 0x0064 //TX_NS_MAX_PRI_SNR_TH +299 0x7FFF //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x1200 //TX_THR_LFNS +309 0x0147 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x7FFF //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x7FFF //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x199A //TX_A_POST_FILT_S_1 +316 0x1000 //TX_A_POST_FILT_S_2 +317 0x1000 //TX_A_POST_FILT_S_3 +318 0x6666 //TX_A_POST_FILT_S_4 +319 0x6666 //TX_A_POST_FILT_S_5 +320 0x6666 //TX_A_POST_FILT_S_6 +321 0x6666 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x2000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E00 //TX_LAMBDA_PFILT +339 0x7E00 //TX_LAMBDA_PFILT_S_0 +340 0x7E00 //TX_LAMBDA_PFILT_S_1 +341 0x7E00 //TX_LAMBDA_PFILT_S_2 +342 0x7E00 //TX_LAMBDA_PFILT_S_3 +343 0x7E00 //TX_LAMBDA_PFILT_S_4 +344 0x7E00 //TX_LAMBDA_PFILT_S_5 +345 0x7E00 //TX_LAMBDA_PFILT_S_6 +346 0x7E00 //TX_LAMBDA_PFILT_S_7 +347 0x0010 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x0000 //TX_K_PEPPER_HF +350 0x0000 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0000 //TX_DT_BINVAD_TH_0 +354 0x0000 //TX_DT_BINVAD_TH_1 +355 0x0000 //TX_DT_BINVAD_TH_2 +356 0x0000 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0001 //TX_BF_SGRAD_FLG +362 0x0000 //TX_BF_DVG_TH +363 0x0000 //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x05A0 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x1388 //TX_NOISE_TH_0_2 +369 0x3A98 //TX_NOISE_TH_0_3 +370 0x0C80 //TX_NOISE_TH_1 +371 0x0032 //TX_NOISE_TH_2 +372 0x3D54 //TX_NOISE_TH_3 +373 0x012C //TX_NOISE_TH_4 +374 0x07D0 //TX_NOISE_TH_5 +375 0x6590 //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x00C8 //TX_NOISE_TH_6 +379 0x000A //TX_MINENOISE_TH +380 0x0000 //TX_MINENOISE_MIC0_TH_MTS +381 0x0000 //TX_MINENOISE_MIC0_TH_EXP +382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x6400 //TX_OUT_ENER_S_TH_CLEAN +385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x6400 //TX_OUT_ENER_S_TH_NOISY +387 0x6400 //TX_OUT_ENER_TH_NOISE +388 0x7D00 //TX_OUT_ENER_TH_SPEECH +389 0x0000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0000 //TX_MU_ARSP_EST +396 0x0000 //TX_P_OUTBEAM_MIN_TH +397 0x0000 //TX_EXTRA_NS_L +398 0x0000 //TX_EXTRA_NS_A +399 0x0000 //TX_VR_NOISE_FLOOR_TH +400 0x0000 //TX_MIN_G_LOW300HZ +401 0x0010 //TX_MAXLEVEL_CNG +402 0x0000 //TX_STN_NOISE_TH +403 0x0000 //TX_POST_MASK_SUP +404 0x0000 //TX_POST_MASK_ADJUST +405 0x0014 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x0226 //TX_MINENOISE_MIC0_S_TH +408 0x2879 //TX_MIN_G_CTRL_SSNS +409 0x0400 //TX_METAL_RTO_THR +410 0x0080 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x2000 //TX_RHO_UPB +415 0x0020 //TX_N_HOLD_HS +416 0x0009 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0000 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x0219 //TX_THR_STD_PLH +421 0x09C4 //TX_N_HOLD_STD +422 0x0166 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x0000 //TX_SB_RTO_MEAN_TH_RUB +428 0x2000 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0064 //TX_DESIRED_TALK_HOLDT +431 0x1000 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0000 //TX_HS_VAD_BIN +435 0x0000 //TX_THR_VAD_HS +436 0x0000 //TX_MEAN_RTO_MIN_TH2 +437 0x0000 //TX_SILENCE_T +438 0x4000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x099A //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x001E //TX_DOA_VAD_THR_1 +445 0x001E //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B +453 0x005A //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C +456 0x005A //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D +459 0x005A //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0172 //TX_BF_HOLDOFF_T +473 0x8000 //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x071C //TX_DOA_TRACK_HT +477 0x0280 //TX_N1_HOLD_HF +478 0x0140 //TX_N2_HOLD_HF +479 0x2AAB //TX_BF_RESET_THR_HF +480 0x4000 //TX_DOA_SMOOTH +481 0x0000 //TX_MU_BF +482 0x0200 //TX_BF_MU_LF_B2 +483 0x0000 //TX_BF_FC_END_BIN_B2 +484 0x0000 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0000 //TX_N_DOA_SEED +488 0x0000 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x0000 //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x0000 //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x0000 //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0168 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0004 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0230 //TX_NOR_OFF_TH1 +503 0xD333 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x6666 //TX_MICTOBFGAIN0 +513 0x0014 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x0000 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0028 //TX_SNR_THR +531 0x03E8 //TX_ENGY_THR +532 0x0000 //TX_CORR_HIGH_TH +533 0x0000 //TX_ENGY_THR_2 +534 0x0000 //TX_MEAN_RTO_THR +535 0x0000 //TX_WNS_ENOISE_MIC0_TH +536 0x0000 //TX_RATIOMICL_TH +537 0x0000 //TX_CALIG_HS +538 0x000A //TX_LVL_CTRL +539 0x0000 //TX_WIND_SUPRTO +540 0x0000 //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x0000 //TX_RATIOMICH_TH +543 0x0000 //TX_WIND_INBEAM_L_TH +544 0x0000 //TX_WIND_INBEAM_H_TH +545 0x0000 //TX_WNS_RESRV_0 +546 0x0000 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0000 //TX_BF_LESSCUT_BBIN +554 0x0000 //TX_BF_LESSCUT_EBIN +555 0x0000 //TX_POSTBFB0 +556 0x0000 //TX_POSTBFB +557 0x0000 //TX_POSTBFE +558 0x0000 //TX_SPEECH_SNR_TH +559 0x0000 //TX_PB_MAX_PRI_SNR_TH +560 0x0000 //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0000 //TX_FDEQ_BIN_0 +592 0x0000 //TX_FDEQ_BIN_1 +593 0x0000 //TX_FDEQ_BIN_2 +594 0x0000 //TX_FDEQ_BIN_3 +595 0x0000 //TX_FDEQ_BIN_4 +596 0x0000 //TX_FDEQ_BIN_5 +597 0x0000 //TX_FDEQ_BIN_6 +598 0x0000 //TX_FDEQ_BIN_7 +599 0x0000 //TX_FDEQ_BIN_8 +600 0x0000 //TX_FDEQ_BIN_9 +601 0x0000 //TX_FDEQ_BIN_10 +602 0x0000 //TX_FDEQ_BIN_11 +603 0x0000 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0000 //TX_PREEQ_BIN_MIC0_0 +642 0x0000 //TX_PREEQ_BIN_MIC0_1 +643 0x0000 //TX_PREEQ_BIN_MIC0_2 +644 0x0000 //TX_PREEQ_BIN_MIC0_3 +645 0x0000 //TX_PREEQ_BIN_MIC0_4 +646 0x0000 //TX_PREEQ_BIN_MIC0_5 +647 0x0000 //TX_PREEQ_BIN_MIC0_6 +648 0x0000 //TX_PREEQ_BIN_MIC0_7 +649 0x0000 //TX_PREEQ_BIN_MIC0_8 +650 0x0000 //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0000 //TX_PREEQ_BIN_MIC1_0 +691 0x0000 //TX_PREEQ_BIN_MIC1_1 +692 0x0000 //TX_PREEQ_BIN_MIC1_2 +693 0x0000 //TX_PREEQ_BIN_MIC1_3 +694 0x0000 //TX_PREEQ_BIN_MIC1_4 +695 0x0000 //TX_PREEQ_BIN_MIC1_5 +696 0x0000 //TX_PREEQ_BIN_MIC1_6 +697 0x0000 //TX_PREEQ_BIN_MIC1_7 +698 0x0000 //TX_PREEQ_BIN_MIC1_8 +699 0x0000 //TX_PREEQ_BIN_MIC1_9 +700 0x0000 //TX_PREEQ_BIN_MIC1_10 +701 0x0000 //TX_PREEQ_BIN_MIC1_11 +702 0x0000 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0000 //TX_PREEQ_BIN_MIC2_0 +740 0x0000 //TX_PREEQ_BIN_MIC2_1 +741 0x0000 //TX_PREEQ_BIN_MIC2_2 +742 0x0000 //TX_PREEQ_BIN_MIC2_3 +743 0x0000 //TX_PREEQ_BIN_MIC2_4 +744 0x0000 //TX_PREEQ_BIN_MIC2_5 +745 0x0000 //TX_PREEQ_BIN_MIC2_6 +746 0x0000 //TX_PREEQ_BIN_MIC2_7 +747 0x0000 //TX_PREEQ_BIN_MIC2_8 +748 0x0000 //TX_PREEQ_BIN_MIC2_9 +749 0x0000 //TX_PREEQ_BIN_MIC2_10 +750 0x0000 //TX_PREEQ_BIN_MIC2_11 +751 0x0000 //TX_PREEQ_BIN_MIC2_12 +752 0x0000 //TX_PREEQ_BIN_MIC2_13 +753 0x0000 //TX_PREEQ_BIN_MIC2_14 +754 0x0000 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0064 //TX_MIC_CALIBRATION_0 +766 0x006A //TX_MIC_CALIBRATION_1 +767 0x006A //TX_MIC_CALIBRATION_2 +768 0x006B //TX_MIC_CALIBRATION_3 +769 0x0048 //TX_MIC_PWR_BIAS_0 +770 0x003C //TX_MIC_PWR_BIAS_1 +771 0x003C //TX_MIC_PWR_BIAS_2 +772 0x003C //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0009 //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 +788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 +789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 +790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 +791 0x65AD //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0002 //TX_DEADMIC_SILENCE_TH +817 0x0147 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x0000 //TX_KS_NOISEPASTE_FACTOR +824 0x0000 //TX_KS_CONFIG +825 0x0000 //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x0000 //TX_A_POST_FLT_FP +835 0x0000 //TX_RTO_OUTBEAM_TH +836 0x0000 //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0000 //TX_FFP_RESRV_2 +849 0x0000 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x0E80 //TX_TDDRC_THRD_2 +857 0x3800 //TX_TDDRC_THRD_3 +858 0x2A00 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x0000 //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0000 //TX_TDDRC_SMT_W +866 0x0100 //TX_TDDRC_DRC_GAIN +867 0x0000 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x1EB8 //TX_TFMASKLTH +870 0x170A //TX_TFMASKLTHL +871 0x7FFF //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x4000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x0000 //TX_FASTNS_OUTIN_TH +884 0x0000 //TX_FASTNS_TFMASK_TH +885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 +886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 +887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xD99A //TX_FASTNS_MASK5_TH +890 0x051F //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x002C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +10 0x0403 //RX_PGA +11 0x7E56 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0014 //RX_NS_LVL_CTRL +23 0xF400 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0012 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0012 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0025 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0035 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x004D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0074 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-NB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x6F7C //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0002 //TX_MIC_DATA_SRC0 +42 0x0000 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x053D //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7646 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0100 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7500 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0200 //TX_MIN_EQ_RE_EST_0 +153 0x0200 //TX_MIN_EQ_RE_EST_1 +154 0x0200 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x1800 //TX_MIN_EQ_RE_EST_7 +160 0x1800 //TX_MIN_EQ_RE_EST_8 +161 0x3000 //TX_MIN_EQ_RE_EST_9 +162 0x4000 //TX_MIN_EQ_RE_EST_10 +163 0x6000 //TX_MIN_EQ_RE_EST_11 +164 0x7FFF //TX_MIN_EQ_RE_EST_12 +165 0x2000 //TX_LAMBDA_RE_EST +166 0x0000 //TX_LAMBDA_CB_NLE +167 0x4000 //TX_C_POST_FLT +168 0x2000 //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x05DC //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7FF0 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x1F40 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x1000 //TX_ADPT_STRICT_L +222 0x1000 //TX_ADPT_STRICT_H +223 0x0001 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x0640 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x05DC //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF900 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0050 //TX_DELTA_THR_SN_EST_0 +251 0x01A0 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x7F00 //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0800 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0012 //TX_NS_LVL_CTRL_1 +283 0x0012 //TX_NS_LVL_CTRL_2 +284 0x0015 //TX_NS_LVL_CTRL_3 +285 0x0012 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0011 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000D //TX_MIN_GAIN_S_2 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000F //TX_MIN_GAIN_S_4 +294 0x000F //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x4000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x3000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x2400 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x2000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x1000 //TX_A_POST_FILT_S_4 +319 0x3000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x5000 //TX_B_POST_FILT_4 +327 0x3000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x6000 //TX_B_LESSCUT_RTO_S_1 +332 0x6000 //TX_B_LESSCUT_RTO_S_2 +333 0x6000 //TX_B_LESSCUT_RTO_S_3 +334 0x6000 //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E00 //TX_LAMBDA_PFILT +339 0x7D00 //TX_LAMBDA_PFILT_S_0 +340 0x7900 //TX_LAMBDA_PFILT_S_1 +341 0x7C00 //TX_LAMBDA_PFILT_S_2 +342 0x7900 //TX_LAMBDA_PFILT_S_3 +343 0x7000 //TX_LAMBDA_PFILT_S_4 +344 0x7D00 //TX_LAMBDA_PFILT_S_5 +345 0x7D00 //TX_LAMBDA_PFILT_S_6 +346 0x7D00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0100 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0FA0 //TX_DT_BINVAD_ENDF +358 0x7000 //TX_C_POST_FLT_DT +359 0x4000 //TX_NS_B_POST_FLT_LESSCUT +360 0x01B0 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x03ED //TX_NOISE_TH_2 +372 0x2EE0 //TX_NOISE_TH_3 +373 0x5528 //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0FA0 //TX_NOISE_TH_6 +379 0x000A //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x1000 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x000A //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x007A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x5000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x7FFF //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0014 //TX_FDEQ_SUBNUM +567 0x5050 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x483C //TX_FDEQ_GAIN_3 +571 0x3034 //TX_FDEQ_GAIN_4 +572 0x3048 //TX_FDEQ_GAIN_5 +573 0x4840 //TX_FDEQ_GAIN_6 +574 0x403C //TX_FDEQ_GAIN_7 +575 0x262C //TX_FDEQ_GAIN_8 +576 0x3A3C //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0000 //TX_FDEQ_BIN_10 +602 0x0000 //TX_FDEQ_BIN_11 +603 0x0000 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0014 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4A4C //TX_PREEQ_GAIN_MIC0_8 +626 0x4E50 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x0000 //TX_PREEQ_BIN_MIC1_10 +701 0x0000 //TX_PREEQ_BIN_MIC1_11 +702 0x0000 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0000 //TX_PREEQ_BIN_MIC2_0 +740 0x0000 //TX_PREEQ_BIN_MIC2_1 +741 0x0000 //TX_PREEQ_BIN_MIC2_2 +742 0x0000 //TX_PREEQ_BIN_MIC2_3 +743 0x0000 //TX_PREEQ_BIN_MIC2_4 +744 0x0000 //TX_PREEQ_BIN_MIC2_5 +745 0x0000 //TX_PREEQ_BIN_MIC2_6 +746 0x0000 //TX_PREEQ_BIN_MIC2_7 +747 0x0000 //TX_PREEQ_BIN_MIC2_8 +748 0x0000 //TX_PREEQ_BIN_MIC2_9 +749 0x0000 //TX_PREEQ_BIN_MIC2_10 +750 0x0000 //TX_PREEQ_BIN_MIC2_11 +751 0x0000 //TX_PREEQ_BIN_MIC2_12 +752 0x0000 //TX_PREEQ_BIN_MIC2_13 +753 0x0000 //TX_PREEQ_BIN_MIC2_14 +754 0x0000 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0065 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0065 //TX_MIC_CALIBRATION_2 +768 0x0065 //TX_MIC_CALIBRATION_3 +769 0x0044 //TX_MIC_PWR_BIAS_0 +770 0x0044 //TX_MIC_PWR_BIAS_1 +771 0x0044 //TX_MIC_PWR_BIAS_2 +772 0x0044 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x4000 //TX_TDDRC_ALPHA_UP_01 +784 0x4000 //TX_TDDRC_ALPHA_UP_02 +785 0x4000 //TX_TDDRC_ALPHA_UP_03 +786 0x4000 //TX_TDDRC_ALPHA_UP_04 +787 0x6000 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0004 //TX_TDDRC_THRD_0 +855 0x0010 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x4000 //TX_TDDRC_ALPHA_UP_00 +861 0x6000 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x08EA //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x0040 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x050D //RX_PGA +11 0x7652 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0000 //RX_PITCH_BFR_LEN +17 0x0000 //RX_SBD_PITCH_DET +18 0x0000 //RX_PP_RESRV_0 +19 0x0000 //RX_PP_RESRV_1 +20 0xF800 //RX_N_SN_EST +21 0x0000 //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0000 //RX_FENS_RESRV_1 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +30 0x0000 //RX_EXTRA_NS_L +31 0x0000 //RX_EXTRA_NS_A +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x0000 //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0003 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0010 //RX_MAXLEVEL_CNG +132 0x0000 //RX_BWE_UV_TH +133 0x0000 //RX_BWE_UV_TH2 +134 0x0000 //RX_BWE_UV_TH3 +135 0x0000 //RX_BWE_V_TH +136 0x0000 //RX_BWE_GAIN1_V_TH1 +137 0x0000 //RX_BWE_GAIN1_V_TH2 +138 0x0000 //RX_BWE_UV_EQ +139 0x0000 //RX_BWE_V_EQ +140 0x0000 //RX_BWE_TONE_TH +141 0x0000 //RX_BWE_UV_HOLD_T +142 0x0000 //RX_BWE_GAIN2_ALPHA +143 0x0000 //RX_BWE_GAIN3_ALPHA +144 0x0000 //RX_BWE_CUTOFF +145 0x0000 //RX_BWE_GAINFILL +146 0x0000 //RX_BWE_MAXTH_TONE +147 0x0000 //RX_BWE_EQ_0 +148 0x0000 //RX_BWE_EQ_1 +149 0x0000 //RX_BWE_EQ_2 +150 0x0000 //RX_BWE_EQ_3 +151 0x0000 //RX_BWE_EQ_4 +152 0x0000 //RX_BWE_EQ_5 +153 0x0000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-WB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x6F7C //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0001 //TX_SAMPLINGFREQ_SIG +7 0x0001 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0002 //TX_MIC_DATA_SRC0 +42 0x0000 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x053D //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0C00 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0004 //TX_MAINMIC_BLKFACTOR +114 0x0004 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0300 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6800 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x3000 //TX_MIN_EQ_RE_EST_0 +153 0x0100 //TX_MIN_EQ_RE_EST_1 +154 0x0200 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x1B00 //TX_LAMBDA_RE_EST +166 0x4000 //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x5000 //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x0020 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x76D0 //TX_DTD_THR1_0 +198 0x76D0 //TX_DTD_THR1_1 +199 0x76D0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 +206 0x5000 //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x03E8 //TX_DT_CUT_K +214 0x0010 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x044C //TX_RATIO_DT_L_TH_HIGH +226 0x7800 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFB00 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0014 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x0011 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0010 //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x50C0 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x5000 //TX_A_POST_FILT_S_0 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x4C00 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C00 //TX_LAMBDA_PFILT +339 0x7C00 //TX_LAMBDA_PFILT_S_0 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7C00 //TX_LAMBDA_PFILT_S_2 +342 0x7A00 //TX_LAMBDA_PFILT_S_3 +343 0x7C00 //TX_LAMBDA_PFILT_S_4 +344 0x7C00 //TX_LAMBDA_PFILT_S_5 +345 0x7C00 //TX_LAMBDA_PFILT_S_6 +346 0x7C00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0800 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0032 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x017E //TX_NOISE_TH_1 +371 0x0230 //TX_NOISE_TH_2 +372 0x3492 //TX_NOISE_TH_3 +373 0x4E20 //TX_NOISE_TH_4 +374 0x55B8 //TX_NOISE_TH_5 +375 0x49E6 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0F0A //TX_NOISE_TH_6 +379 0x0033 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0033 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x5454 //TX_FDEQ_GAIN_0 +568 0x5448 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4850 //TX_FDEQ_GAIN_5 +573 0x5050 //TX_FDEQ_GAIN_6 +574 0x5448 //TX_FDEQ_GAIN_7 +575 0x464C //TX_FDEQ_GAIN_8 +576 0x5050 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0F10 //TX_FDEQ_BIN_10 +602 0x1011 //TX_FDEQ_BIN_11 +603 0x1112 //TX_FDEQ_BIN_12 +604 0x120B //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x484A //TX_PREEQ_GAIN_MIC0_8 +626 0x4B4C //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4A //TX_PREEQ_GAIN_MIC0_10 +628 0x4A48 //TX_PREEQ_GAIN_MIC0_11 +629 0x4C4C //TX_PREEQ_GAIN_MIC0_12 +630 0x4C4C //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x0F10 //TX_PREEQ_BIN_MIC0_10 +652 0x1011 //TX_PREEQ_BIN_MIC0_11 +653 0x1112 //TX_PREEQ_BIN_MIC0_12 +654 0x120B //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 +676 0x403E //TX_PREEQ_GAIN_MIC1_10 +677 0x3D3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3C3C //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0F10 //TX_PREEQ_BIN_MIC1_9 +700 0x1011 //TX_PREEQ_BIN_MIC1_10 +701 0x1112 //TX_PREEQ_BIN_MIC1_11 +702 0x1208 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0001 //TX_TDDRC_THRD_0 +855 0x0002 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0B39 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x0040 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x050D //RX_PGA +11 0x7652 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0000 //RX_PITCH_BFR_LEN +17 0x0000 //RX_SBD_PITCH_DET +18 0x0000 //RX_PP_RESRV_0 +19 0x0000 //RX_PP_RESRV_1 +20 0xF800 //RX_N_SN_EST +21 0x0000 //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0000 //RX_FENS_RESRV_1 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +30 0x0000 //RX_EXTRA_NS_L +31 0x0000 //RX_EXTRA_NS_A +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x0000 //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0003 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0010 //RX_MAXLEVEL_CNG +132 0x0000 //RX_BWE_UV_TH +133 0x0000 //RX_BWE_UV_TH2 +134 0x0000 //RX_BWE_UV_TH3 +135 0x0000 //RX_BWE_V_TH +136 0x0000 //RX_BWE_GAIN1_V_TH1 +137 0x0000 //RX_BWE_GAIN1_V_TH2 +138 0x0000 //RX_BWE_UV_EQ +139 0x0000 //RX_BWE_V_EQ +140 0x0000 //RX_BWE_TONE_TH +141 0x0000 //RX_BWE_UV_HOLD_T +142 0x0000 //RX_BWE_GAIN2_ALPHA +143 0x0000 //RX_BWE_GAIN3_ALPHA +144 0x0000 //RX_BWE_CUTOFF +145 0x0000 //RX_BWE_GAINFILL +146 0x0000 //RX_BWE_MAXTH_TONE +147 0x0000 //RX_BWE_EQ_0 +148 0x0000 //RX_BWE_EQ_1 +149 0x0000 //RX_BWE_EQ_2 +150 0x0000 //RX_BWE_EQ_3 +151 0x0000 //RX_BWE_EQ_4 +152 0x0000 //RX_BWE_EQ_5 +153 0x0000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-SWB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x6F7C //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0002 //TX_MIC_DATA_SRC0 +42 0x0000 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7D83 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0400 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7600 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x2000 //TX_MIN_EQ_RE_EST_0 +153 0x0600 //TX_MIN_EQ_RE_EST_1 +154 0x3000 //TX_MIN_EQ_RE_EST_2 +155 0x3000 //TX_MIN_EQ_RE_EST_3 +156 0x3000 //TX_MIN_EQ_RE_EST_4 +157 0x3000 //TX_MIN_EQ_RE_EST_5 +158 0x3000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x7800 //TX_MIN_EQ_RE_EST_8 +161 0x7800 //TX_MIN_EQ_RE_EST_9 +162 0x7800 //TX_MIN_EQ_RE_EST_10 +163 0x7800 //TX_MIN_EQ_RE_EST_11 +164 0x7800 //TX_MIN_EQ_RE_EST_12 +165 0x0880 //TX_LAMBDA_RE_EST +166 0x7FFF //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x05DC //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7FF0 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 +206 0x5000 //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x36B0 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x733C //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x3A98 //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFA00 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0000 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x003C //TX_NS_LVL_CTRL_1 +283 0x003C //TX_NS_LVL_CTRL_2 +284 0x0024 //TX_NS_LVL_CTRL_3 +285 0x003C //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x0011 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0010 //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x1400 //TX_SNRI_SUP_1 +302 0x1400 //TX_SNRI_SUP_2 +303 0x1400 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x50C0 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x5000 //TX_A_POST_FILT_S_0 +315 0x7C00 //TX_A_POST_FILT_S_1 +316 0x4C00 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x6000 //TX_B_POST_FILT_2 +325 0x6000 //TX_B_POST_FILT_3 +326 0x6000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C00 //TX_LAMBDA_PFILT +339 0x7D00 //TX_LAMBDA_PFILT_S_0 +340 0x7D00 //TX_LAMBDA_PFILT_S_1 +341 0x7D00 //TX_LAMBDA_PFILT_S_2 +342 0x7D00 //TX_LAMBDA_PFILT_S_3 +343 0x7D00 //TX_LAMBDA_PFILT_S_4 +344 0x7D00 //TX_LAMBDA_PFILT_S_5 +345 0x7D00 //TX_LAMBDA_PFILT_S_6 +346 0x7D00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0040 //TX_DT_BINVAD_TH_0 +354 0x0040 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 +356 0x0100 //TX_DT_BINVAD_TH_3 +357 0x36B0 //TX_DT_BINVAD_ENDF +358 0x0200 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x01F4 //TX_NOISE_TH_2 +372 0x36B0 //TX_NOISE_TH_3 +373 0x2710 //TX_NOISE_TH_4 +374 0x2CEC //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0DAC //TX_NOISE_TH_6 +379 0x0050 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0050 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4000 //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x5450 //TX_FDEQ_GAIN_0 +568 0x4C48 //TX_FDEQ_GAIN_1 +569 0x4850 //TX_FDEQ_GAIN_2 +570 0x5050 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x484E //TX_FDEQ_GAIN_5 +573 0x4E5E //TX_FDEQ_GAIN_6 +574 0x584E //TX_FDEQ_GAIN_7 +575 0x4C4E //TX_FDEQ_GAIN_8 +576 0x564E //TX_FDEQ_GAIN_9 +577 0x5058 //TX_FDEQ_GAIN_10 +578 0x625C //TX_FDEQ_GAIN_11 +579 0x6C6C //TX_FDEQ_GAIN_12 +580 0x7086 //TX_FDEQ_GAIN_13 +581 0x869C //TX_FDEQ_GAIN_14 +582 0xB0B0 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x284A //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x494A //TX_PREEQ_GAIN_MIC0_8 +626 0x4B4C //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4A //TX_PREEQ_GAIN_MIC0_10 +628 0x484B //TX_PREEQ_GAIN_MIC0_11 +629 0x4C4C //TX_PREEQ_GAIN_MIC0_12 +630 0x4B48 //TX_PREEQ_GAIN_MIC0_13 +631 0x3838 //TX_PREEQ_GAIN_MIC0_14 +632 0x3835 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1719 //TX_PREEQ_BIN_MIC0_11 +653 0x1B1E //TX_PREEQ_BIN_MIC0_12 +654 0x1E1E //TX_PREEQ_BIN_MIC0_13 +655 0x1E28 //TX_PREEQ_BIN_MIC0_14 +656 0x282C //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 +676 0x403E //TX_PREEQ_GAIN_MIC1_10 +677 0x3D3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3C3C //TX_PREEQ_GAIN_MIC1_12 +679 0x3C39 //TX_PREEQ_GAIN_MIC1_13 +680 0x3838 //TX_PREEQ_GAIN_MIC1_14 +681 0x3A3C //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x282C //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0xF200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0003 //TX_TDDRC_THRD_0 +855 0x0004 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0C97 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x0040 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x050D //RX_PGA +11 0x7652 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0000 //RX_PITCH_BFR_LEN +17 0x0000 //RX_SBD_PITCH_DET +18 0x0000 //RX_PP_RESRV_0 +19 0x0000 //RX_PP_RESRV_1 +20 0xF800 //RX_N_SN_EST +21 0x0000 //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0000 //RX_FENS_RESRV_1 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +30 0x0000 //RX_EXTRA_NS_L +31 0x0000 //RX_EXTRA_NS_A +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x0000 //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0003 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0010 //RX_MAXLEVEL_CNG +132 0x0000 //RX_BWE_UV_TH +133 0x0000 //RX_BWE_UV_TH2 +134 0x0000 //RX_BWE_UV_TH3 +135 0x0000 //RX_BWE_V_TH +136 0x0000 //RX_BWE_GAIN1_V_TH1 +137 0x0000 //RX_BWE_GAIN1_V_TH2 +138 0x0000 //RX_BWE_UV_EQ +139 0x0000 //RX_BWE_V_EQ +140 0x0000 //RX_BWE_TONE_TH +141 0x0000 //RX_BWE_UV_HOLD_T +142 0x0000 //RX_BWE_GAIN2_ALPHA +143 0x0000 //RX_BWE_GAIN3_ALPHA +144 0x0000 //RX_BWE_CUTOFF +145 0x0000 //RX_BWE_GAINFILL +146 0x0000 //RX_BWE_MAXTH_TONE +147 0x0000 //RX_BWE_EQ_0 +148 0x0000 //RX_BWE_EQ_1 +149 0x0000 //RX_BWE_EQ_2 +150 0x0000 //RX_BWE_EQ_3 +151 0x0000 //RX_BWE_EQ_4 +152 0x0000 //RX_BWE_EQ_5 +153 0x0000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x6B7C //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0002 //TX_MIC_DATA_SRC0 +42 0x0000 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0300 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x2000 //TX_MIN_EQ_RE_EST_1 +154 0x2000 //TX_MIN_EQ_RE_EST_2 +155 0x4000 //TX_MIN_EQ_RE_EST_3 +156 0x4000 //TX_MIN_EQ_RE_EST_4 +157 0x7FFF //TX_MIN_EQ_RE_EST_5 +158 0x7FFF //TX_MIN_EQ_RE_EST_6 +159 0x7FFF //TX_MIN_EQ_RE_EST_7 +160 0x7FFF //TX_MIN_EQ_RE_EST_8 +161 0x7FFF //TX_MIN_EQ_RE_EST_9 +162 0x7FFF //TX_MIN_EQ_RE_EST_10 +163 0x7FFF //TX_MIN_EQ_RE_EST_11 +164 0x7FFF //TX_MIN_EQ_RE_EST_12 +165 0x0700 //TX_LAMBDA_RE_EST +166 0x0CCD //TX_LAMBDA_CB_NLE +167 0x2000 //TX_C_POST_FLT +168 0x7FFF //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x09C4 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7D00 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0DAC //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1194 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0063 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x0A28 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFB00 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0100 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0014 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x0011 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0010 //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x50C0 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x5000 //TX_A_POST_FILT_S_0 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x4C00 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C00 //TX_LAMBDA_PFILT +339 0x7C00 //TX_LAMBDA_PFILT_S_0 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7C00 //TX_LAMBDA_PFILT_S_2 +342 0x7A00 //TX_LAMBDA_PFILT_S_3 +343 0x7C00 //TX_LAMBDA_PFILT_S_4 +344 0x7C00 //TX_LAMBDA_PFILT_S_5 +345 0x7C00 //TX_LAMBDA_PFILT_S_6 +346 0x7C00 //TX_LAMBDA_PFILT_S_7 +347 0x0180 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x2000 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0200 //TX_DT_BINVAD_TH_2 +356 0x0200 //TX_DT_BINVAD_TH_3 +357 0x1F40 //TX_DT_BINVAD_ENDF +358 0x0100 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x4E20 //TX_NOISE_TH_3 +373 0x4E20 //TX_NOISE_TH_4 +374 0x59D8 //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x2710 //TX_NOISE_TH_6 +379 0x0033 //TX_MINENOISE_TH +380 0x4000 //TX_MINENOISE_MIC0_TH_MTS +381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP +382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0800 //TX_MU_ARSP_EST +396 0x00C8 //TX_P_OUTBEAM_MIN_TH +397 0x0002 //TX_EXTRA_NS_L +398 0x0800 //TX_EXTRA_NS_A +399 0x0005 //TX_VR_NOISE_FLOOR_TH +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0033 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x7FFF //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x484C //TX_FDEQ_GAIN_3 +571 0x4C4C //TX_FDEQ_GAIN_4 +572 0x544C //TX_FDEQ_GAIN_5 +573 0x5454 //TX_FDEQ_GAIN_6 +574 0x5454 //TX_FDEQ_GAIN_7 +575 0x585A //TX_FDEQ_GAIN_8 +576 0x5C5C //TX_FDEQ_GAIN_9 +577 0x6068 //TX_FDEQ_GAIN_10 +578 0x8894 //TX_FDEQ_GAIN_11 +579 0x94B4 //TX_FDEQ_GAIN_12 +580 0xB4C7 //TX_FDEQ_GAIN_13 +581 0xC7C6 //TX_FDEQ_GAIN_14 +582 0xC6C6 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0304 //TX_FDEQ_BIN_2 +594 0x0405 //TX_FDEQ_BIN_3 +595 0x0607 //TX_FDEQ_BIN_4 +596 0x0809 //TX_FDEQ_BIN_5 +597 0x0A0B //TX_FDEQ_BIN_6 +598 0x0C0D //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x1011 //TX_FDEQ_BIN_9 +601 0x1214 //TX_FDEQ_BIN_10 +602 0x1618 //TX_FDEQ_BIN_11 +603 0x1C1C //TX_FDEQ_BIN_12 +604 0x2020 //TX_FDEQ_BIN_13 +605 0x2020 //TX_FDEQ_BIN_14 +606 0x2011 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4849 //TX_PREEQ_GAIN_MIC0_6 +624 0x4A4B //TX_PREEQ_GAIN_MIC0_7 +625 0x4C4B //TX_PREEQ_GAIN_MIC0_8 +626 0x4A48 //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4C //TX_PREEQ_GAIN_MIC0_10 +628 0x4C4B //TX_PREEQ_GAIN_MIC0_11 +629 0x4838 //TX_PREEQ_GAIN_MIC0_12 +630 0x3858 //TX_PREEQ_GAIN_MIC0_13 +631 0x7060 //TX_PREEQ_GAIN_MIC0_14 +632 0x9870 //TX_PREEQ_GAIN_MIC0_15 +633 0x5848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x4000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4645 //TX_PREEQ_GAIN_MIC1_6 +673 0x4442 //TX_PREEQ_GAIN_MIC1_7 +674 0x4140 //TX_PREEQ_GAIN_MIC1_8 +675 0x3E3D //TX_PREEQ_GAIN_MIC1_9 +676 0x3C3C //TX_PREEQ_GAIN_MIC1_10 +677 0x3C3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3938 //TX_PREEQ_GAIN_MIC1_12 +679 0x3A3C //TX_PREEQ_GAIN_MIC1_13 +680 0x3C3E //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x4000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0C00 //TX_TDDRC_ALPHA_UP_01 +784 0x0C00 //TX_TDDRC_ALPHA_UP_02 +785 0x0C00 //TX_TDDRC_ALPHA_UP_03 +786 0x0C00 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0004 //TX_TDDRC_THRD_0 +855 0x0016 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x0C00 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0A00 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x0040 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x050D //RX_PGA +11 0x7652 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0000 //RX_PITCH_BFR_LEN +17 0x0000 //RX_SBD_PITCH_DET +18 0x0000 //RX_PP_RESRV_0 +19 0x0000 //RX_PP_RESRV_1 +20 0xF800 //RX_N_SN_EST +21 0x0000 //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0000 //RX_FENS_RESRV_1 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +30 0x0000 //RX_EXTRA_NS_L +31 0x0000 //RX_EXTRA_NS_A +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x0000 //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0003 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0010 //RX_MAXLEVEL_CNG +132 0x0000 //RX_BWE_UV_TH +133 0x0000 //RX_BWE_UV_TH2 +134 0x0000 //RX_BWE_UV_TH3 +135 0x0000 //RX_BWE_V_TH +136 0x0000 //RX_BWE_GAIN1_V_TH1 +137 0x0000 //RX_BWE_GAIN1_V_TH2 +138 0x0000 //RX_BWE_UV_EQ +139 0x0000 //RX_BWE_V_EQ +140 0x0000 //RX_BWE_TONE_TH +141 0x0000 //RX_BWE_UV_HOLD_T +142 0x0000 //RX_BWE_GAIN2_ALPHA +143 0x0000 //RX_BWE_GAIN3_ALPHA +144 0x0000 //RX_BWE_CUTOFF +145 0x0000 //RX_BWE_GAINFILL +146 0x0000 //RX_BWE_MAXTH_TONE +147 0x0000 //RX_BWE_EQ_0 +148 0x0000 //RX_BWE_EQ_1 +149 0x0000 //RX_BWE_EQ_2 +150 0x0000 //RX_BWE_EQ_3 +151 0x0000 //RX_BWE_EQ_4 +152 0x0000 //RX_BWE_EQ_5 +153 0x0000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-NB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0000 //TX_PATCH_REG +3 0x0200 //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0078 //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0302 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0000 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0000 //TX_MICS_OF_PAIR0 +38 0x0000 //TX_MICS_OF_PAIR1 +39 0x0000 //TX_MICS_OF_PAIR2 +40 0x0000 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0003 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x0000 //TX_HD_BIN_MASK +53 0x0000 //TX_HD_SUBAND_MASK +54 0x0000 //TX_HD_FRAME_AVG_MASK +55 0x0000 //TX_HD_MIN_FRQ +56 0x0000 //TX_HD_ALPHA_PSD +57 0x0000 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0x0000 //TX_T_PSDVAT +63 0x0000 //TX_CNT +64 0x0000 //TX_ANTI_HOWL_GAIN +65 0x0000 //TX_MICFORBFMARK_0 +66 0x0000 //TX_MICFORBFMARK_1 +67 0x0000 //TX_MICFORBFMARK_2 +68 0x0000 //TX_MICFORBFMARK_3 +69 0x0000 //TX_MICFORBFMARK_4 +70 0x0000 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x0000 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x0000 //TX_ADCS_GAIN +112 0x0000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x7FFF //TX_BLMIC_BLKFACTOR +116 0x7FFF //TX_BRMIC_BLKFACTOR +117 0x000A //TX_MICBLK_START_BIN +118 0x0041 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x0000 //TX_FE_ENER_TH_MTS +124 0x0000 //TX_FE_ENER_TH_EXP +125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x0000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0020 //TX_MIC_BLOCK_N +128 0x7652 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x7800 //TX_THR_PITCH_DET_0 +131 0x7000 //TX_THR_PITCH_DET_1 +132 0x6000 //TX_THR_PITCH_DET_2 +133 0x0000 //TX_PITCH_BFR_LEN +134 0x0000 //TX_SBD_PITCH_DET +135 0x0000 //TX_TD_AEC_L +136 0x0000 //TX_MU0_UNP_TD_AEC +137 0x0000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x2000 //TX_AEC_REF_GAIN_0 +148 0x2000 //TX_AEC_REF_GAIN_1 +149 0x2000 //TX_AEC_REF_GAIN_2 +150 0x4000 //TX_EAD_THR +151 0x0200 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0100 //TX_MIN_EQ_RE_EST_1 +154 0x0100 //TX_MIN_EQ_RE_EST_2 +155 0x0100 //TX_MIN_EQ_RE_EST_3 +156 0x0100 //TX_MIN_EQ_RE_EST_4 +157 0x0100 //TX_MIN_EQ_RE_EST_5 +158 0x0100 //TX_MIN_EQ_RE_EST_6 +159 0x0100 //TX_MIN_EQ_RE_EST_7 +160 0x0100 //TX_MIN_EQ_RE_EST_8 +161 0x0100 //TX_MIN_EQ_RE_EST_9 +162 0x0100 //TX_MIN_EQ_RE_EST_10 +163 0x0100 //TX_MIN_EQ_RE_EST_11 +164 0x0100 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x0000 //TX_LAMBDA_CB_NLE +167 0x0000 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0008 //TX_SE_HOLD_N +170 0x0050 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x0000 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x0000 //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0000 //TX_FRQ_LIN_LEN +184 0x0000 //TX_FRQ_AEC_LEN_RHO +185 0x0000 //TX_MU0_UNP_FRQ_AEC +186 0x0000 //TX_MU0_PTD_FRQ_AEC +187 0x0000 //TX_MINENOISETH +188 0x0000 //TX_MU0_RE_EST +189 0x0000 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x0000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7333 //TX_DTD_THR1_0 +198 0x7333 //TX_DTD_THR1_1 +199 0x7333 //TX_DTD_THR1_2 +200 0x7333 //TX_DTD_THR1_3 +201 0x7333 //TX_DTD_THR1_4 +202 0x7333 //TX_DTD_THR1_5 +203 0x7333 //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0400 //TX_DT_CUT_K +214 0x0000 //TX_DT_CUT_THR +215 0x0000 //TX_COMFORT_G +216 0x0000 //TX_POWER_YOUT_TH +217 0x0000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x0800 //TX_B_POST_FILT_ECHO_H +230 0x0000 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x0000 //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0000 //TX_DT_RESRV_7 +240 0x0000 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF200 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF800 //TX_THR_SN_EST_2 +245 0xF600 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0A00 //TX_N_SN_EST +267 0x0000 //TX_INBEAM_T +268 0x0000 //TX_INBEAMHOLDT +269 0x1FFF //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x1000 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x0000 //TX_B_POST_FLT_0 +280 0x0000 //TX_B_POST_FLT_1 +281 0x001A //TX_NS_LVL_CTRL_0 +282 0x001A //TX_NS_LVL_CTRL_1 +283 0x0014 //TX_NS_LVL_CTRL_2 +284 0x0014 //TX_NS_LVL_CTRL_3 +285 0x000C //TX_NS_LVL_CTRL_4 +286 0x000C //TX_NS_LVL_CTRL_5 +287 0x000C //TX_NS_LVL_CTRL_6 +288 0x000C //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0014 //TX_MIN_GAIN_S_1 +291 0x0014 //TX_MIN_GAIN_S_2 +292 0x0014 //TX_MIN_GAIN_S_3 +293 0x0014 //TX_MIN_GAIN_S_4 +294 0x0014 //TX_MIN_GAIN_S_5 +295 0x0014 //TX_MIN_GAIN_S_6 +296 0x0014 //TX_MIN_GAIN_S_7 +297 0x0000 //TX_NMOS_SUP +298 0x0064 //TX_NS_MAX_PRI_SNR_TH +299 0x7FFF //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x1200 //TX_THR_LFNS +309 0x0147 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x7FFF //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x7FFF //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x199A //TX_A_POST_FILT_S_1 +316 0x1000 //TX_A_POST_FILT_S_2 +317 0x1000 //TX_A_POST_FILT_S_3 +318 0x6666 //TX_A_POST_FILT_S_4 +319 0x6666 //TX_A_POST_FILT_S_5 +320 0x6666 //TX_A_POST_FILT_S_6 +321 0x6666 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x2000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E00 //TX_LAMBDA_PFILT +339 0x7E00 //TX_LAMBDA_PFILT_S_0 +340 0x7E00 //TX_LAMBDA_PFILT_S_1 +341 0x7E00 //TX_LAMBDA_PFILT_S_2 +342 0x7E00 //TX_LAMBDA_PFILT_S_3 +343 0x7E00 //TX_LAMBDA_PFILT_S_4 +344 0x7E00 //TX_LAMBDA_PFILT_S_5 +345 0x7E00 //TX_LAMBDA_PFILT_S_6 +346 0x7E00 //TX_LAMBDA_PFILT_S_7 +347 0x0010 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x0000 //TX_K_PEPPER_HF +350 0x0000 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0000 //TX_DT_BINVAD_TH_0 +354 0x0000 //TX_DT_BINVAD_TH_1 +355 0x0000 //TX_DT_BINVAD_TH_2 +356 0x0000 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0001 //TX_BF_SGRAD_FLG +362 0x0000 //TX_BF_DVG_TH +363 0x0000 //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x05A0 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x1388 //TX_NOISE_TH_0_2 +369 0x3A98 //TX_NOISE_TH_0_3 +370 0x0C80 //TX_NOISE_TH_1 +371 0x0032 //TX_NOISE_TH_2 +372 0x3D54 //TX_NOISE_TH_3 +373 0x012C //TX_NOISE_TH_4 +374 0x07D0 //TX_NOISE_TH_5 +375 0x6590 //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x00C8 //TX_NOISE_TH_6 +379 0x000A //TX_MINENOISE_TH +380 0x0000 //TX_MINENOISE_MIC0_TH_MTS +381 0x0000 //TX_MINENOISE_MIC0_TH_EXP +382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x6400 //TX_OUT_ENER_S_TH_CLEAN +385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x6400 //TX_OUT_ENER_S_TH_NOISY +387 0x6400 //TX_OUT_ENER_TH_NOISE +388 0x7D00 //TX_OUT_ENER_TH_SPEECH +389 0x0000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0000 //TX_MU_ARSP_EST +396 0x0000 //TX_P_OUTBEAM_MIN_TH +397 0x0000 //TX_EXTRA_NS_L +398 0x0000 //TX_EXTRA_NS_A +399 0x0000 //TX_VR_NOISE_FLOOR_TH +400 0x0000 //TX_MIN_G_LOW300HZ +401 0x0010 //TX_MAXLEVEL_CNG +402 0x0000 //TX_STN_NOISE_TH +403 0x0000 //TX_POST_MASK_SUP +404 0x0000 //TX_POST_MASK_ADJUST +405 0x0014 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x0226 //TX_MINENOISE_MIC0_S_TH +408 0x2879 //TX_MIN_G_CTRL_SSNS +409 0x0400 //TX_METAL_RTO_THR +410 0x0080 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x2000 //TX_RHO_UPB +415 0x0020 //TX_N_HOLD_HS +416 0x0009 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0000 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x0219 //TX_THR_STD_PLH +421 0x09C4 //TX_N_HOLD_STD +422 0x0166 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x0000 //TX_SB_RTO_MEAN_TH_RUB +428 0x2000 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0064 //TX_DESIRED_TALK_HOLDT +431 0x1000 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0000 //TX_HS_VAD_BIN +435 0x0000 //TX_THR_VAD_HS +436 0x0000 //TX_MEAN_RTO_MIN_TH2 +437 0x0000 //TX_SILENCE_T +438 0x4000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x099A //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x001E //TX_DOA_VAD_THR_1 +445 0x001E //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B +453 0x005A //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C +456 0x005A //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D +459 0x005A //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0172 //TX_BF_HOLDOFF_T +473 0x8000 //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x071C //TX_DOA_TRACK_HT +477 0x0280 //TX_N1_HOLD_HF +478 0x0140 //TX_N2_HOLD_HF +479 0x2AAB //TX_BF_RESET_THR_HF +480 0x4000 //TX_DOA_SMOOTH +481 0x0000 //TX_MU_BF +482 0x0200 //TX_BF_MU_LF_B2 +483 0x0000 //TX_BF_FC_END_BIN_B2 +484 0x0000 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0000 //TX_N_DOA_SEED +488 0x0000 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x0000 //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x0000 //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x0000 //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0168 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0004 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0230 //TX_NOR_OFF_TH1 +503 0xD333 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x6666 //TX_MICTOBFGAIN0 +513 0x0014 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x0000 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0028 //TX_SNR_THR +531 0x03E8 //TX_ENGY_THR +532 0x0000 //TX_CORR_HIGH_TH +533 0x0000 //TX_ENGY_THR_2 +534 0x0000 //TX_MEAN_RTO_THR +535 0x0000 //TX_WNS_ENOISE_MIC0_TH +536 0x0000 //TX_RATIOMICL_TH +537 0x0000 //TX_CALIG_HS +538 0x000A //TX_LVL_CTRL +539 0x0000 //TX_WIND_SUPRTO +540 0x0000 //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x0000 //TX_RATIOMICH_TH +543 0x0000 //TX_WIND_INBEAM_L_TH +544 0x0000 //TX_WIND_INBEAM_H_TH +545 0x0000 //TX_WNS_RESRV_0 +546 0x0000 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0000 //TX_BF_LESSCUT_BBIN +554 0x0000 //TX_BF_LESSCUT_EBIN +555 0x0000 //TX_POSTBFB0 +556 0x0000 //TX_POSTBFB +557 0x0000 //TX_POSTBFE +558 0x0000 //TX_SPEECH_SNR_TH +559 0x0000 //TX_PB_MAX_PRI_SNR_TH +560 0x0000 //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0000 //TX_FDEQ_BIN_0 +592 0x0000 //TX_FDEQ_BIN_1 +593 0x0000 //TX_FDEQ_BIN_2 +594 0x0000 //TX_FDEQ_BIN_3 +595 0x0000 //TX_FDEQ_BIN_4 +596 0x0000 //TX_FDEQ_BIN_5 +597 0x0000 //TX_FDEQ_BIN_6 +598 0x0000 //TX_FDEQ_BIN_7 +599 0x0000 //TX_FDEQ_BIN_8 +600 0x0000 //TX_FDEQ_BIN_9 +601 0x0000 //TX_FDEQ_BIN_10 +602 0x0000 //TX_FDEQ_BIN_11 +603 0x0000 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0000 //TX_PREEQ_BIN_MIC0_0 +642 0x0000 //TX_PREEQ_BIN_MIC0_1 +643 0x0000 //TX_PREEQ_BIN_MIC0_2 +644 0x0000 //TX_PREEQ_BIN_MIC0_3 +645 0x0000 //TX_PREEQ_BIN_MIC0_4 +646 0x0000 //TX_PREEQ_BIN_MIC0_5 +647 0x0000 //TX_PREEQ_BIN_MIC0_6 +648 0x0000 //TX_PREEQ_BIN_MIC0_7 +649 0x0000 //TX_PREEQ_BIN_MIC0_8 +650 0x0000 //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0000 //TX_PREEQ_BIN_MIC1_0 +691 0x0000 //TX_PREEQ_BIN_MIC1_1 +692 0x0000 //TX_PREEQ_BIN_MIC1_2 +693 0x0000 //TX_PREEQ_BIN_MIC1_3 +694 0x0000 //TX_PREEQ_BIN_MIC1_4 +695 0x0000 //TX_PREEQ_BIN_MIC1_5 +696 0x0000 //TX_PREEQ_BIN_MIC1_6 +697 0x0000 //TX_PREEQ_BIN_MIC1_7 +698 0x0000 //TX_PREEQ_BIN_MIC1_8 +699 0x0000 //TX_PREEQ_BIN_MIC1_9 +700 0x0000 //TX_PREEQ_BIN_MIC1_10 +701 0x0000 //TX_PREEQ_BIN_MIC1_11 +702 0x0000 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0000 //TX_PREEQ_BIN_MIC2_0 +740 0x0000 //TX_PREEQ_BIN_MIC2_1 +741 0x0000 //TX_PREEQ_BIN_MIC2_2 +742 0x0000 //TX_PREEQ_BIN_MIC2_3 +743 0x0000 //TX_PREEQ_BIN_MIC2_4 +744 0x0000 //TX_PREEQ_BIN_MIC2_5 +745 0x0000 //TX_PREEQ_BIN_MIC2_6 +746 0x0000 //TX_PREEQ_BIN_MIC2_7 +747 0x0000 //TX_PREEQ_BIN_MIC2_8 +748 0x0000 //TX_PREEQ_BIN_MIC2_9 +749 0x0000 //TX_PREEQ_BIN_MIC2_10 +750 0x0000 //TX_PREEQ_BIN_MIC2_11 +751 0x0000 //TX_PREEQ_BIN_MIC2_12 +752 0x0000 //TX_PREEQ_BIN_MIC2_13 +753 0x0000 //TX_PREEQ_BIN_MIC2_14 +754 0x0000 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0064 //TX_MIC_CALIBRATION_0 +766 0x006A //TX_MIC_CALIBRATION_1 +767 0x006A //TX_MIC_CALIBRATION_2 +768 0x006B //TX_MIC_CALIBRATION_3 +769 0x0048 //TX_MIC_PWR_BIAS_0 +770 0x003C //TX_MIC_PWR_BIAS_1 +771 0x003C //TX_MIC_PWR_BIAS_2 +772 0x003C //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0009 //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 +788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 +789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 +790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 +791 0x65AD //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0002 //TX_DEADMIC_SILENCE_TH +817 0x0147 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x0000 //TX_KS_NOISEPASTE_FACTOR +824 0x0000 //TX_KS_CONFIG +825 0x0000 //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x0000 //TX_A_POST_FLT_FP +835 0x0000 //TX_RTO_OUTBEAM_TH +836 0x0000 //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0000 //TX_FFP_RESRV_2 +849 0x0000 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x0E80 //TX_TDDRC_THRD_2 +857 0x3800 //TX_TDDRC_THRD_3 +858 0x2A00 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x0000 //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0000 //TX_TDDRC_SMT_W +866 0x0100 //TX_TDDRC_DRC_GAIN +867 0x0000 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x1EB8 //TX_TFMASKLTH +870 0x170A //TX_TFMASKLTHL +871 0x7FFF //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x4000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x0000 //TX_FASTNS_OUTIN_TH +884 0x0000 //TX_FASTNS_TFMASK_TH +885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 +886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 +887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xD99A //TX_FASTNS_MASK5_TH +890 0x051F //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x0040 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x050D //RX_PGA +11 0x7652 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0000 //RX_PITCH_BFR_LEN +17 0x0000 //RX_SBD_PITCH_DET +18 0x0000 //RX_PP_RESRV_0 +19 0x0000 //RX_PP_RESRV_1 +20 0xF800 //RX_N_SN_EST +21 0x0000 //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0000 //RX_FENS_RESRV_1 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +30 0x0000 //RX_EXTRA_NS_L +31 0x0000 //RX_EXTRA_NS_A +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x0000 //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0003 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0010 //RX_MAXLEVEL_CNG +132 0x0000 //RX_BWE_UV_TH +133 0x0000 //RX_BWE_UV_TH2 +134 0x0000 //RX_BWE_UV_TH3 +135 0x0000 //RX_BWE_V_TH +136 0x0000 //RX_BWE_GAIN1_V_TH1 +137 0x0000 //RX_BWE_GAIN1_V_TH2 +138 0x0000 //RX_BWE_UV_EQ +139 0x0000 //RX_BWE_V_EQ +140 0x0000 //RX_BWE_TONE_TH +141 0x0000 //RX_BWE_UV_HOLD_T +142 0x0000 //RX_BWE_GAIN2_ALPHA +143 0x0000 //RX_BWE_GAIN3_ALPHA +144 0x0000 //RX_BWE_CUTOFF +145 0x0000 //RX_BWE_GAINFILL +146 0x0000 //RX_BWE_MAXTH_TONE +147 0x0000 //RX_BWE_EQ_0 +148 0x0000 //RX_BWE_EQ_1 +149 0x0000 //RX_BWE_EQ_2 +150 0x0000 //RX_BWE_EQ_3 +151 0x0000 //RX_BWE_EQ_4 +152 0x0000 //RX_BWE_EQ_5 +153 0x0000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-WB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0000 //TX_PATCH_REG +3 0x0200 //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0078 //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0302 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0000 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0000 //TX_MICS_OF_PAIR0 +38 0x0000 //TX_MICS_OF_PAIR1 +39 0x0000 //TX_MICS_OF_PAIR2 +40 0x0000 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0003 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x0000 //TX_HD_BIN_MASK +53 0x0000 //TX_HD_SUBAND_MASK +54 0x0000 //TX_HD_FRAME_AVG_MASK +55 0x0000 //TX_HD_MIN_FRQ +56 0x0000 //TX_HD_ALPHA_PSD +57 0x0000 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0x0000 //TX_T_PSDVAT +63 0x0000 //TX_CNT +64 0x0000 //TX_ANTI_HOWL_GAIN +65 0x0000 //TX_MICFORBFMARK_0 +66 0x0000 //TX_MICFORBFMARK_1 +67 0x0000 //TX_MICFORBFMARK_2 +68 0x0000 //TX_MICFORBFMARK_3 +69 0x0000 //TX_MICFORBFMARK_4 +70 0x0000 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x0000 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x0000 //TX_ADCS_GAIN +112 0x0000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x7FFF //TX_BLMIC_BLKFACTOR +116 0x7FFF //TX_BRMIC_BLKFACTOR +117 0x000A //TX_MICBLK_START_BIN +118 0x0041 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x0000 //TX_FE_ENER_TH_MTS +124 0x0000 //TX_FE_ENER_TH_EXP +125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x0000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0020 //TX_MIC_BLOCK_N +128 0x7652 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x7800 //TX_THR_PITCH_DET_0 +131 0x7000 //TX_THR_PITCH_DET_1 +132 0x6000 //TX_THR_PITCH_DET_2 +133 0x0000 //TX_PITCH_BFR_LEN +134 0x0000 //TX_SBD_PITCH_DET +135 0x0000 //TX_TD_AEC_L +136 0x0000 //TX_MU0_UNP_TD_AEC +137 0x0000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x2000 //TX_AEC_REF_GAIN_0 +148 0x2000 //TX_AEC_REF_GAIN_1 +149 0x2000 //TX_AEC_REF_GAIN_2 +150 0x4000 //TX_EAD_THR +151 0x0200 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0100 //TX_MIN_EQ_RE_EST_1 +154 0x0100 //TX_MIN_EQ_RE_EST_2 +155 0x0100 //TX_MIN_EQ_RE_EST_3 +156 0x0100 //TX_MIN_EQ_RE_EST_4 +157 0x0100 //TX_MIN_EQ_RE_EST_5 +158 0x0100 //TX_MIN_EQ_RE_EST_6 +159 0x0100 //TX_MIN_EQ_RE_EST_7 +160 0x0100 //TX_MIN_EQ_RE_EST_8 +161 0x0100 //TX_MIN_EQ_RE_EST_9 +162 0x0100 //TX_MIN_EQ_RE_EST_10 +163 0x0100 //TX_MIN_EQ_RE_EST_11 +164 0x0100 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x0000 //TX_LAMBDA_CB_NLE +167 0x0000 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0008 //TX_SE_HOLD_N +170 0x0050 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x0000 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x0000 //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0000 //TX_FRQ_LIN_LEN +184 0x0000 //TX_FRQ_AEC_LEN_RHO +185 0x0000 //TX_MU0_UNP_FRQ_AEC +186 0x0000 //TX_MU0_PTD_FRQ_AEC +187 0x0000 //TX_MINENOISETH +188 0x0000 //TX_MU0_RE_EST +189 0x0000 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x0000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7333 //TX_DTD_THR1_0 +198 0x7333 //TX_DTD_THR1_1 +199 0x7333 //TX_DTD_THR1_2 +200 0x7333 //TX_DTD_THR1_3 +201 0x7333 //TX_DTD_THR1_4 +202 0x7333 //TX_DTD_THR1_5 +203 0x7333 //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0400 //TX_DT_CUT_K +214 0x0000 //TX_DT_CUT_THR +215 0x0000 //TX_COMFORT_G +216 0x0000 //TX_POWER_YOUT_TH +217 0x0000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x0800 //TX_B_POST_FILT_ECHO_H +230 0x0000 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x0000 //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0000 //TX_DT_RESRV_7 +240 0x0000 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF200 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF800 //TX_THR_SN_EST_2 +245 0xF600 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0A00 //TX_N_SN_EST +267 0x0000 //TX_INBEAM_T +268 0x0000 //TX_INBEAMHOLDT +269 0x1FFF //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x1000 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x0000 //TX_B_POST_FLT_0 +280 0x0000 //TX_B_POST_FLT_1 +281 0x001A //TX_NS_LVL_CTRL_0 +282 0x001A //TX_NS_LVL_CTRL_1 +283 0x0014 //TX_NS_LVL_CTRL_2 +284 0x0014 //TX_NS_LVL_CTRL_3 +285 0x000C //TX_NS_LVL_CTRL_4 +286 0x000C //TX_NS_LVL_CTRL_5 +287 0x000C //TX_NS_LVL_CTRL_6 +288 0x000C //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0014 //TX_MIN_GAIN_S_1 +291 0x0014 //TX_MIN_GAIN_S_2 +292 0x0014 //TX_MIN_GAIN_S_3 +293 0x0014 //TX_MIN_GAIN_S_4 +294 0x0014 //TX_MIN_GAIN_S_5 +295 0x0014 //TX_MIN_GAIN_S_6 +296 0x0014 //TX_MIN_GAIN_S_7 +297 0x0000 //TX_NMOS_SUP +298 0x0064 //TX_NS_MAX_PRI_SNR_TH +299 0x7FFF //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x1200 //TX_THR_LFNS +309 0x0147 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x7FFF //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x7FFF //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x199A //TX_A_POST_FILT_S_1 +316 0x1000 //TX_A_POST_FILT_S_2 +317 0x1000 //TX_A_POST_FILT_S_3 +318 0x6666 //TX_A_POST_FILT_S_4 +319 0x6666 //TX_A_POST_FILT_S_5 +320 0x6666 //TX_A_POST_FILT_S_6 +321 0x6666 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x2000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E00 //TX_LAMBDA_PFILT +339 0x7E00 //TX_LAMBDA_PFILT_S_0 +340 0x7E00 //TX_LAMBDA_PFILT_S_1 +341 0x7E00 //TX_LAMBDA_PFILT_S_2 +342 0x7E00 //TX_LAMBDA_PFILT_S_3 +343 0x7E00 //TX_LAMBDA_PFILT_S_4 +344 0x7E00 //TX_LAMBDA_PFILT_S_5 +345 0x7E00 //TX_LAMBDA_PFILT_S_6 +346 0x7E00 //TX_LAMBDA_PFILT_S_7 +347 0x0010 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x0000 //TX_K_PEPPER_HF +350 0x0000 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0000 //TX_DT_BINVAD_TH_0 +354 0x0000 //TX_DT_BINVAD_TH_1 +355 0x0000 //TX_DT_BINVAD_TH_2 +356 0x0000 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0001 //TX_BF_SGRAD_FLG +362 0x0000 //TX_BF_DVG_TH +363 0x0000 //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x05A0 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x1388 //TX_NOISE_TH_0_2 +369 0x3A98 //TX_NOISE_TH_0_3 +370 0x0C80 //TX_NOISE_TH_1 +371 0x0032 //TX_NOISE_TH_2 +372 0x3D54 //TX_NOISE_TH_3 +373 0x012C //TX_NOISE_TH_4 +374 0x07D0 //TX_NOISE_TH_5 +375 0x6590 //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x00C8 //TX_NOISE_TH_6 +379 0x000A //TX_MINENOISE_TH +380 0x0000 //TX_MINENOISE_MIC0_TH_MTS +381 0x0000 //TX_MINENOISE_MIC0_TH_EXP +382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x6400 //TX_OUT_ENER_S_TH_CLEAN +385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x6400 //TX_OUT_ENER_S_TH_NOISY +387 0x6400 //TX_OUT_ENER_TH_NOISE +388 0x7D00 //TX_OUT_ENER_TH_SPEECH +389 0x0000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0000 //TX_MU_ARSP_EST +396 0x0000 //TX_P_OUTBEAM_MIN_TH +397 0x0000 //TX_EXTRA_NS_L +398 0x0000 //TX_EXTRA_NS_A +399 0x0000 //TX_VR_NOISE_FLOOR_TH +400 0x0000 //TX_MIN_G_LOW300HZ +401 0x0010 //TX_MAXLEVEL_CNG +402 0x0000 //TX_STN_NOISE_TH +403 0x0000 //TX_POST_MASK_SUP +404 0x0000 //TX_POST_MASK_ADJUST +405 0x0014 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x0226 //TX_MINENOISE_MIC0_S_TH +408 0x2879 //TX_MIN_G_CTRL_SSNS +409 0x0400 //TX_METAL_RTO_THR +410 0x0080 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x2000 //TX_RHO_UPB +415 0x0020 //TX_N_HOLD_HS +416 0x0009 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0000 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x0219 //TX_THR_STD_PLH +421 0x09C4 //TX_N_HOLD_STD +422 0x0166 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x0000 //TX_SB_RTO_MEAN_TH_RUB +428 0x2000 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0064 //TX_DESIRED_TALK_HOLDT +431 0x1000 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0000 //TX_HS_VAD_BIN +435 0x0000 //TX_THR_VAD_HS +436 0x0000 //TX_MEAN_RTO_MIN_TH2 +437 0x0000 //TX_SILENCE_T +438 0x4000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x099A //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x001E //TX_DOA_VAD_THR_1 +445 0x001E //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B +453 0x005A //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C +456 0x005A //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D +459 0x005A //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0172 //TX_BF_HOLDOFF_T +473 0x8000 //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x071C //TX_DOA_TRACK_HT +477 0x0280 //TX_N1_HOLD_HF +478 0x0140 //TX_N2_HOLD_HF +479 0x2AAB //TX_BF_RESET_THR_HF +480 0x4000 //TX_DOA_SMOOTH +481 0x0000 //TX_MU_BF +482 0x0200 //TX_BF_MU_LF_B2 +483 0x0000 //TX_BF_FC_END_BIN_B2 +484 0x0000 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0000 //TX_N_DOA_SEED +488 0x0000 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x0000 //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x0000 //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x0000 //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0168 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0004 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0230 //TX_NOR_OFF_TH1 +503 0xD333 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x6666 //TX_MICTOBFGAIN0 +513 0x0014 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x0000 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0028 //TX_SNR_THR +531 0x03E8 //TX_ENGY_THR +532 0x0000 //TX_CORR_HIGH_TH +533 0x0000 //TX_ENGY_THR_2 +534 0x0000 //TX_MEAN_RTO_THR +535 0x0000 //TX_WNS_ENOISE_MIC0_TH +536 0x0000 //TX_RATIOMICL_TH +537 0x0000 //TX_CALIG_HS +538 0x000A //TX_LVL_CTRL +539 0x0000 //TX_WIND_SUPRTO +540 0x0000 //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x0000 //TX_RATIOMICH_TH +543 0x0000 //TX_WIND_INBEAM_L_TH +544 0x0000 //TX_WIND_INBEAM_H_TH +545 0x0000 //TX_WNS_RESRV_0 +546 0x0000 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0000 //TX_BF_LESSCUT_BBIN +554 0x0000 //TX_BF_LESSCUT_EBIN +555 0x0000 //TX_POSTBFB0 +556 0x0000 //TX_POSTBFB +557 0x0000 //TX_POSTBFE +558 0x0000 //TX_SPEECH_SNR_TH +559 0x0000 //TX_PB_MAX_PRI_SNR_TH +560 0x0000 //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0000 //TX_FDEQ_BIN_0 +592 0x0000 //TX_FDEQ_BIN_1 +593 0x0000 //TX_FDEQ_BIN_2 +594 0x0000 //TX_FDEQ_BIN_3 +595 0x0000 //TX_FDEQ_BIN_4 +596 0x0000 //TX_FDEQ_BIN_5 +597 0x0000 //TX_FDEQ_BIN_6 +598 0x0000 //TX_FDEQ_BIN_7 +599 0x0000 //TX_FDEQ_BIN_8 +600 0x0000 //TX_FDEQ_BIN_9 +601 0x0000 //TX_FDEQ_BIN_10 +602 0x0000 //TX_FDEQ_BIN_11 +603 0x0000 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0000 //TX_PREEQ_BIN_MIC0_0 +642 0x0000 //TX_PREEQ_BIN_MIC0_1 +643 0x0000 //TX_PREEQ_BIN_MIC0_2 +644 0x0000 //TX_PREEQ_BIN_MIC0_3 +645 0x0000 //TX_PREEQ_BIN_MIC0_4 +646 0x0000 //TX_PREEQ_BIN_MIC0_5 +647 0x0000 //TX_PREEQ_BIN_MIC0_6 +648 0x0000 //TX_PREEQ_BIN_MIC0_7 +649 0x0000 //TX_PREEQ_BIN_MIC0_8 +650 0x0000 //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0000 //TX_PREEQ_BIN_MIC1_0 +691 0x0000 //TX_PREEQ_BIN_MIC1_1 +692 0x0000 //TX_PREEQ_BIN_MIC1_2 +693 0x0000 //TX_PREEQ_BIN_MIC1_3 +694 0x0000 //TX_PREEQ_BIN_MIC1_4 +695 0x0000 //TX_PREEQ_BIN_MIC1_5 +696 0x0000 //TX_PREEQ_BIN_MIC1_6 +697 0x0000 //TX_PREEQ_BIN_MIC1_7 +698 0x0000 //TX_PREEQ_BIN_MIC1_8 +699 0x0000 //TX_PREEQ_BIN_MIC1_9 +700 0x0000 //TX_PREEQ_BIN_MIC1_10 +701 0x0000 //TX_PREEQ_BIN_MIC1_11 +702 0x0000 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0000 //TX_PREEQ_BIN_MIC2_0 +740 0x0000 //TX_PREEQ_BIN_MIC2_1 +741 0x0000 //TX_PREEQ_BIN_MIC2_2 +742 0x0000 //TX_PREEQ_BIN_MIC2_3 +743 0x0000 //TX_PREEQ_BIN_MIC2_4 +744 0x0000 //TX_PREEQ_BIN_MIC2_5 +745 0x0000 //TX_PREEQ_BIN_MIC2_6 +746 0x0000 //TX_PREEQ_BIN_MIC2_7 +747 0x0000 //TX_PREEQ_BIN_MIC2_8 +748 0x0000 //TX_PREEQ_BIN_MIC2_9 +749 0x0000 //TX_PREEQ_BIN_MIC2_10 +750 0x0000 //TX_PREEQ_BIN_MIC2_11 +751 0x0000 //TX_PREEQ_BIN_MIC2_12 +752 0x0000 //TX_PREEQ_BIN_MIC2_13 +753 0x0000 //TX_PREEQ_BIN_MIC2_14 +754 0x0000 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0064 //TX_MIC_CALIBRATION_0 +766 0x006A //TX_MIC_CALIBRATION_1 +767 0x006A //TX_MIC_CALIBRATION_2 +768 0x006B //TX_MIC_CALIBRATION_3 +769 0x0048 //TX_MIC_PWR_BIAS_0 +770 0x003C //TX_MIC_PWR_BIAS_1 +771 0x003C //TX_MIC_PWR_BIAS_2 +772 0x003C //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0009 //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 +788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 +789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 +790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 +791 0x65AD //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0002 //TX_DEADMIC_SILENCE_TH +817 0x0147 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x0000 //TX_KS_NOISEPASTE_FACTOR +824 0x0000 //TX_KS_CONFIG +825 0x0000 //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x0000 //TX_A_POST_FLT_FP +835 0x0000 //TX_RTO_OUTBEAM_TH +836 0x0000 //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0000 //TX_FFP_RESRV_2 +849 0x0000 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x0E80 //TX_TDDRC_THRD_2 +857 0x3800 //TX_TDDRC_THRD_3 +858 0x2A00 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x0000 //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0000 //TX_TDDRC_SMT_W +866 0x0100 //TX_TDDRC_DRC_GAIN +867 0x0000 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x1EB8 //TX_TFMASKLTH +870 0x170A //TX_TFMASKLTHL +871 0x7FFF //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x4000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x0000 //TX_FASTNS_OUTIN_TH +884 0x0000 //TX_FASTNS_TFMASK_TH +885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 +886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 +887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xD99A //TX_FASTNS_MASK5_TH +890 0x051F //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x0040 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x050D //RX_PGA +11 0x7652 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0000 //RX_PITCH_BFR_LEN +17 0x0000 //RX_SBD_PITCH_DET +18 0x0000 //RX_PP_RESRV_0 +19 0x0000 //RX_PP_RESRV_1 +20 0xF800 //RX_N_SN_EST +21 0x0000 //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0000 //RX_FENS_RESRV_1 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +30 0x0000 //RX_EXTRA_NS_L +31 0x0000 //RX_EXTRA_NS_A +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x0000 //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0003 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0010 //RX_MAXLEVEL_CNG +132 0x0000 //RX_BWE_UV_TH +133 0x0000 //RX_BWE_UV_TH2 +134 0x0000 //RX_BWE_UV_TH3 +135 0x0000 //RX_BWE_V_TH +136 0x0000 //RX_BWE_GAIN1_V_TH1 +137 0x0000 //RX_BWE_GAIN1_V_TH2 +138 0x0000 //RX_BWE_UV_EQ +139 0x0000 //RX_BWE_V_EQ +140 0x0000 //RX_BWE_TONE_TH +141 0x0000 //RX_BWE_UV_HOLD_T +142 0x0000 //RX_BWE_GAIN2_ALPHA +143 0x0000 //RX_BWE_GAIN3_ALPHA +144 0x0000 //RX_BWE_CUTOFF +145 0x0000 //RX_BWE_GAINFILL +146 0x0000 //RX_BWE_MAXTH_TONE +147 0x0000 //RX_BWE_EQ_0 +148 0x0000 //RX_BWE_EQ_1 +149 0x0000 //RX_BWE_EQ_2 +150 0x0000 //RX_BWE_EQ_3 +151 0x0000 //RX_BWE_EQ_4 +152 0x0000 //RX_BWE_EQ_5 +153 0x0000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-SWB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0000 //TX_PATCH_REG +3 0x0200 //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0078 //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0302 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0000 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0000 //TX_MICS_OF_PAIR0 +38 0x0000 //TX_MICS_OF_PAIR1 +39 0x0000 //TX_MICS_OF_PAIR2 +40 0x0000 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0003 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x0000 //TX_HD_BIN_MASK +53 0x0000 //TX_HD_SUBAND_MASK +54 0x0000 //TX_HD_FRAME_AVG_MASK +55 0x0000 //TX_HD_MIN_FRQ +56 0x0000 //TX_HD_ALPHA_PSD +57 0x0000 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0x0000 //TX_T_PSDVAT +63 0x0000 //TX_CNT +64 0x0000 //TX_ANTI_HOWL_GAIN +65 0x0000 //TX_MICFORBFMARK_0 +66 0x0000 //TX_MICFORBFMARK_1 +67 0x0000 //TX_MICFORBFMARK_2 +68 0x0000 //TX_MICFORBFMARK_3 +69 0x0000 //TX_MICFORBFMARK_4 +70 0x0000 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x0000 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x0000 //TX_ADCS_GAIN +112 0x0000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x7FFF //TX_BLMIC_BLKFACTOR +116 0x7FFF //TX_BRMIC_BLKFACTOR +117 0x000A //TX_MICBLK_START_BIN +118 0x0041 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x0000 //TX_FE_ENER_TH_MTS +124 0x0000 //TX_FE_ENER_TH_EXP +125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x0000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0020 //TX_MIC_BLOCK_N +128 0x7652 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x7800 //TX_THR_PITCH_DET_0 +131 0x7000 //TX_THR_PITCH_DET_1 +132 0x6000 //TX_THR_PITCH_DET_2 +133 0x0000 //TX_PITCH_BFR_LEN +134 0x0000 //TX_SBD_PITCH_DET +135 0x0000 //TX_TD_AEC_L +136 0x0000 //TX_MU0_UNP_TD_AEC +137 0x0000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x2000 //TX_AEC_REF_GAIN_0 +148 0x2000 //TX_AEC_REF_GAIN_1 +149 0x2000 //TX_AEC_REF_GAIN_2 +150 0x4000 //TX_EAD_THR +151 0x0200 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0100 //TX_MIN_EQ_RE_EST_1 +154 0x0100 //TX_MIN_EQ_RE_EST_2 +155 0x0100 //TX_MIN_EQ_RE_EST_3 +156 0x0100 //TX_MIN_EQ_RE_EST_4 +157 0x0100 //TX_MIN_EQ_RE_EST_5 +158 0x0100 //TX_MIN_EQ_RE_EST_6 +159 0x0100 //TX_MIN_EQ_RE_EST_7 +160 0x0100 //TX_MIN_EQ_RE_EST_8 +161 0x0100 //TX_MIN_EQ_RE_EST_9 +162 0x0100 //TX_MIN_EQ_RE_EST_10 +163 0x0100 //TX_MIN_EQ_RE_EST_11 +164 0x0100 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x0000 //TX_LAMBDA_CB_NLE +167 0x0000 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0008 //TX_SE_HOLD_N +170 0x0050 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x0000 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x0000 //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0000 //TX_FRQ_LIN_LEN +184 0x0000 //TX_FRQ_AEC_LEN_RHO +185 0x0000 //TX_MU0_UNP_FRQ_AEC +186 0x0000 //TX_MU0_PTD_FRQ_AEC +187 0x0000 //TX_MINENOISETH +188 0x0000 //TX_MU0_RE_EST +189 0x0000 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x0000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7333 //TX_DTD_THR1_0 +198 0x7333 //TX_DTD_THR1_1 +199 0x7333 //TX_DTD_THR1_2 +200 0x7333 //TX_DTD_THR1_3 +201 0x7333 //TX_DTD_THR1_4 +202 0x7333 //TX_DTD_THR1_5 +203 0x7333 //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0400 //TX_DT_CUT_K +214 0x0000 //TX_DT_CUT_THR +215 0x0000 //TX_COMFORT_G +216 0x0000 //TX_POWER_YOUT_TH +217 0x0000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x0800 //TX_B_POST_FILT_ECHO_H +230 0x0000 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x0000 //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0000 //TX_DT_RESRV_7 +240 0x0000 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF200 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF800 //TX_THR_SN_EST_2 +245 0xF600 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0A00 //TX_N_SN_EST +267 0x0000 //TX_INBEAM_T +268 0x0000 //TX_INBEAMHOLDT +269 0x1FFF //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x1000 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x0000 //TX_B_POST_FLT_0 +280 0x0000 //TX_B_POST_FLT_1 +281 0x001A //TX_NS_LVL_CTRL_0 +282 0x001A //TX_NS_LVL_CTRL_1 +283 0x0014 //TX_NS_LVL_CTRL_2 +284 0x0014 //TX_NS_LVL_CTRL_3 +285 0x000C //TX_NS_LVL_CTRL_4 +286 0x000C //TX_NS_LVL_CTRL_5 +287 0x000C //TX_NS_LVL_CTRL_6 +288 0x000C //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0014 //TX_MIN_GAIN_S_1 +291 0x0014 //TX_MIN_GAIN_S_2 +292 0x0014 //TX_MIN_GAIN_S_3 +293 0x0014 //TX_MIN_GAIN_S_4 +294 0x0014 //TX_MIN_GAIN_S_5 +295 0x0014 //TX_MIN_GAIN_S_6 +296 0x0014 //TX_MIN_GAIN_S_7 +297 0x0000 //TX_NMOS_SUP +298 0x0064 //TX_NS_MAX_PRI_SNR_TH +299 0x7FFF //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x1200 //TX_THR_LFNS +309 0x0147 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x7FFF //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x7FFF //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x199A //TX_A_POST_FILT_S_1 +316 0x1000 //TX_A_POST_FILT_S_2 +317 0x1000 //TX_A_POST_FILT_S_3 +318 0x6666 //TX_A_POST_FILT_S_4 +319 0x6666 //TX_A_POST_FILT_S_5 +320 0x6666 //TX_A_POST_FILT_S_6 +321 0x6666 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x2000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E00 //TX_LAMBDA_PFILT +339 0x7E00 //TX_LAMBDA_PFILT_S_0 +340 0x7E00 //TX_LAMBDA_PFILT_S_1 +341 0x7E00 //TX_LAMBDA_PFILT_S_2 +342 0x7E00 //TX_LAMBDA_PFILT_S_3 +343 0x7E00 //TX_LAMBDA_PFILT_S_4 +344 0x7E00 //TX_LAMBDA_PFILT_S_5 +345 0x7E00 //TX_LAMBDA_PFILT_S_6 +346 0x7E00 //TX_LAMBDA_PFILT_S_7 +347 0x0010 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x0000 //TX_K_PEPPER_HF +350 0x0000 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0000 //TX_DT_BINVAD_TH_0 +354 0x0000 //TX_DT_BINVAD_TH_1 +355 0x0000 //TX_DT_BINVAD_TH_2 +356 0x0000 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0001 //TX_BF_SGRAD_FLG +362 0x0000 //TX_BF_DVG_TH +363 0x0000 //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x05A0 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x1388 //TX_NOISE_TH_0_2 +369 0x3A98 //TX_NOISE_TH_0_3 +370 0x0C80 //TX_NOISE_TH_1 +371 0x0032 //TX_NOISE_TH_2 +372 0x3D54 //TX_NOISE_TH_3 +373 0x012C //TX_NOISE_TH_4 +374 0x07D0 //TX_NOISE_TH_5 +375 0x6590 //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x00C8 //TX_NOISE_TH_6 +379 0x000A //TX_MINENOISE_TH +380 0x0000 //TX_MINENOISE_MIC0_TH_MTS +381 0x0000 //TX_MINENOISE_MIC0_TH_EXP +382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x6400 //TX_OUT_ENER_S_TH_CLEAN +385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x6400 //TX_OUT_ENER_S_TH_NOISY +387 0x6400 //TX_OUT_ENER_TH_NOISE +388 0x7D00 //TX_OUT_ENER_TH_SPEECH +389 0x0000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0000 //TX_MU_ARSP_EST +396 0x0000 //TX_P_OUTBEAM_MIN_TH +397 0x0000 //TX_EXTRA_NS_L +398 0x0000 //TX_EXTRA_NS_A +399 0x0000 //TX_VR_NOISE_FLOOR_TH +400 0x0000 //TX_MIN_G_LOW300HZ +401 0x0010 //TX_MAXLEVEL_CNG +402 0x0000 //TX_STN_NOISE_TH +403 0x0000 //TX_POST_MASK_SUP +404 0x0000 //TX_POST_MASK_ADJUST +405 0x0014 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x0226 //TX_MINENOISE_MIC0_S_TH +408 0x2879 //TX_MIN_G_CTRL_SSNS +409 0x0400 //TX_METAL_RTO_THR +410 0x0080 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x2000 //TX_RHO_UPB +415 0x0020 //TX_N_HOLD_HS +416 0x0009 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0000 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x0219 //TX_THR_STD_PLH +421 0x09C4 //TX_N_HOLD_STD +422 0x0166 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x0000 //TX_SB_RTO_MEAN_TH_RUB +428 0x2000 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0064 //TX_DESIRED_TALK_HOLDT +431 0x1000 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0000 //TX_HS_VAD_BIN +435 0x0000 //TX_THR_VAD_HS +436 0x0000 //TX_MEAN_RTO_MIN_TH2 +437 0x0000 //TX_SILENCE_T +438 0x4000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x099A //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x001E //TX_DOA_VAD_THR_1 +445 0x001E //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B +453 0x005A //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C +456 0x005A //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D +459 0x005A //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0172 //TX_BF_HOLDOFF_T +473 0x8000 //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x071C //TX_DOA_TRACK_HT +477 0x0280 //TX_N1_HOLD_HF +478 0x0140 //TX_N2_HOLD_HF +479 0x2AAB //TX_BF_RESET_THR_HF +480 0x4000 //TX_DOA_SMOOTH +481 0x0000 //TX_MU_BF +482 0x0200 //TX_BF_MU_LF_B2 +483 0x0000 //TX_BF_FC_END_BIN_B2 +484 0x0000 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0000 //TX_N_DOA_SEED +488 0x0000 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x0000 //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x0000 //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x0000 //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0168 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0004 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0230 //TX_NOR_OFF_TH1 +503 0xD333 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x6666 //TX_MICTOBFGAIN0 +513 0x0014 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x0000 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0028 //TX_SNR_THR +531 0x03E8 //TX_ENGY_THR +532 0x0000 //TX_CORR_HIGH_TH +533 0x0000 //TX_ENGY_THR_2 +534 0x0000 //TX_MEAN_RTO_THR +535 0x0000 //TX_WNS_ENOISE_MIC0_TH +536 0x0000 //TX_RATIOMICL_TH +537 0x0000 //TX_CALIG_HS +538 0x000A //TX_LVL_CTRL +539 0x0000 //TX_WIND_SUPRTO +540 0x0000 //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x0000 //TX_RATIOMICH_TH +543 0x0000 //TX_WIND_INBEAM_L_TH +544 0x0000 //TX_WIND_INBEAM_H_TH +545 0x0000 //TX_WNS_RESRV_0 +546 0x0000 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0000 //TX_BF_LESSCUT_BBIN +554 0x0000 //TX_BF_LESSCUT_EBIN +555 0x0000 //TX_POSTBFB0 +556 0x0000 //TX_POSTBFB +557 0x0000 //TX_POSTBFE +558 0x0000 //TX_SPEECH_SNR_TH +559 0x0000 //TX_PB_MAX_PRI_SNR_TH +560 0x0000 //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0000 //TX_FDEQ_BIN_0 +592 0x0000 //TX_FDEQ_BIN_1 +593 0x0000 //TX_FDEQ_BIN_2 +594 0x0000 //TX_FDEQ_BIN_3 +595 0x0000 //TX_FDEQ_BIN_4 +596 0x0000 //TX_FDEQ_BIN_5 +597 0x0000 //TX_FDEQ_BIN_6 +598 0x0000 //TX_FDEQ_BIN_7 +599 0x0000 //TX_FDEQ_BIN_8 +600 0x0000 //TX_FDEQ_BIN_9 +601 0x0000 //TX_FDEQ_BIN_10 +602 0x0000 //TX_FDEQ_BIN_11 +603 0x0000 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0000 //TX_PREEQ_BIN_MIC0_0 +642 0x0000 //TX_PREEQ_BIN_MIC0_1 +643 0x0000 //TX_PREEQ_BIN_MIC0_2 +644 0x0000 //TX_PREEQ_BIN_MIC0_3 +645 0x0000 //TX_PREEQ_BIN_MIC0_4 +646 0x0000 //TX_PREEQ_BIN_MIC0_5 +647 0x0000 //TX_PREEQ_BIN_MIC0_6 +648 0x0000 //TX_PREEQ_BIN_MIC0_7 +649 0x0000 //TX_PREEQ_BIN_MIC0_8 +650 0x0000 //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0000 //TX_PREEQ_BIN_MIC1_0 +691 0x0000 //TX_PREEQ_BIN_MIC1_1 +692 0x0000 //TX_PREEQ_BIN_MIC1_2 +693 0x0000 //TX_PREEQ_BIN_MIC1_3 +694 0x0000 //TX_PREEQ_BIN_MIC1_4 +695 0x0000 //TX_PREEQ_BIN_MIC1_5 +696 0x0000 //TX_PREEQ_BIN_MIC1_6 +697 0x0000 //TX_PREEQ_BIN_MIC1_7 +698 0x0000 //TX_PREEQ_BIN_MIC1_8 +699 0x0000 //TX_PREEQ_BIN_MIC1_9 +700 0x0000 //TX_PREEQ_BIN_MIC1_10 +701 0x0000 //TX_PREEQ_BIN_MIC1_11 +702 0x0000 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0000 //TX_PREEQ_BIN_MIC2_0 +740 0x0000 //TX_PREEQ_BIN_MIC2_1 +741 0x0000 //TX_PREEQ_BIN_MIC2_2 +742 0x0000 //TX_PREEQ_BIN_MIC2_3 +743 0x0000 //TX_PREEQ_BIN_MIC2_4 +744 0x0000 //TX_PREEQ_BIN_MIC2_5 +745 0x0000 //TX_PREEQ_BIN_MIC2_6 +746 0x0000 //TX_PREEQ_BIN_MIC2_7 +747 0x0000 //TX_PREEQ_BIN_MIC2_8 +748 0x0000 //TX_PREEQ_BIN_MIC2_9 +749 0x0000 //TX_PREEQ_BIN_MIC2_10 +750 0x0000 //TX_PREEQ_BIN_MIC2_11 +751 0x0000 //TX_PREEQ_BIN_MIC2_12 +752 0x0000 //TX_PREEQ_BIN_MIC2_13 +753 0x0000 //TX_PREEQ_BIN_MIC2_14 +754 0x0000 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0064 //TX_MIC_CALIBRATION_0 +766 0x006A //TX_MIC_CALIBRATION_1 +767 0x006A //TX_MIC_CALIBRATION_2 +768 0x006B //TX_MIC_CALIBRATION_3 +769 0x0048 //TX_MIC_PWR_BIAS_0 +770 0x003C //TX_MIC_PWR_BIAS_1 +771 0x003C //TX_MIC_PWR_BIAS_2 +772 0x003C //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0009 //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 +788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 +789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 +790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 +791 0x65AD //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0002 //TX_DEADMIC_SILENCE_TH +817 0x0147 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x0000 //TX_KS_NOISEPASTE_FACTOR +824 0x0000 //TX_KS_CONFIG +825 0x0000 //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x0000 //TX_A_POST_FLT_FP +835 0x0000 //TX_RTO_OUTBEAM_TH +836 0x0000 //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0000 //TX_FFP_RESRV_2 +849 0x0000 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x0E80 //TX_TDDRC_THRD_2 +857 0x3800 //TX_TDDRC_THRD_3 +858 0x2A00 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x0000 //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0000 //TX_TDDRC_SMT_W +866 0x0100 //TX_TDDRC_DRC_GAIN +867 0x0000 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x1EB8 //TX_TFMASKLTH +870 0x170A //TX_TFMASKLTHL +871 0x7FFF //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x4000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x0000 //TX_FASTNS_OUTIN_TH +884 0x0000 //TX_FASTNS_TFMASK_TH +885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 +886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 +887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xD99A //TX_FASTNS_MASK5_TH +890 0x051F //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x0040 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x050D //RX_PGA +11 0x7652 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0000 //RX_PITCH_BFR_LEN +17 0x0000 //RX_SBD_PITCH_DET +18 0x0000 //RX_PP_RESRV_0 +19 0x0000 //RX_PP_RESRV_1 +20 0xF800 //RX_N_SN_EST +21 0x0000 //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0000 //RX_FENS_RESRV_1 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +30 0x0000 //RX_EXTRA_NS_L +31 0x0000 //RX_EXTRA_NS_A +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x0000 //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0003 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0010 //RX_MAXLEVEL_CNG +132 0x0000 //RX_BWE_UV_TH +133 0x0000 //RX_BWE_UV_TH2 +134 0x0000 //RX_BWE_UV_TH3 +135 0x0000 //RX_BWE_V_TH +136 0x0000 //RX_BWE_GAIN1_V_TH1 +137 0x0000 //RX_BWE_GAIN1_V_TH2 +138 0x0000 //RX_BWE_UV_EQ +139 0x0000 //RX_BWE_V_EQ +140 0x0000 //RX_BWE_TONE_TH +141 0x0000 //RX_BWE_UV_HOLD_T +142 0x0000 //RX_BWE_GAIN2_ALPHA +143 0x0000 //RX_BWE_GAIN3_ALPHA +144 0x0000 //RX_BWE_CUTOFF +145 0x0000 //RX_BWE_GAINFILL +146 0x0000 //RX_BWE_MAXTH_TONE +147 0x0000 //RX_BWE_EQ_0 +148 0x0000 //RX_BWE_EQ_1 +149 0x0000 //RX_BWE_EQ_2 +150 0x0000 //RX_BWE_EQ_3 +151 0x0000 //RX_BWE_EQ_4 +152 0x0000 //RX_BWE_EQ_5 +153 0x0000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+RX +#TOTAL_CUSTOM_STEP 7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0000 //TX_PATCH_REG +3 0x0200 //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0078 //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0302 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0000 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0000 //TX_MICS_OF_PAIR0 +38 0x0000 //TX_MICS_OF_PAIR1 +39 0x0000 //TX_MICS_OF_PAIR2 +40 0x0000 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0003 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x0000 //TX_HD_BIN_MASK +53 0x0000 //TX_HD_SUBAND_MASK +54 0x0000 //TX_HD_FRAME_AVG_MASK +55 0x0000 //TX_HD_MIN_FRQ +56 0x0000 //TX_HD_ALPHA_PSD +57 0x0000 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0x0000 //TX_T_PSDVAT +63 0x0000 //TX_CNT +64 0x0000 //TX_ANTI_HOWL_GAIN +65 0x0000 //TX_MICFORBFMARK_0 +66 0x0000 //TX_MICFORBFMARK_1 +67 0x0000 //TX_MICFORBFMARK_2 +68 0x0000 //TX_MICFORBFMARK_3 +69 0x0000 //TX_MICFORBFMARK_4 +70 0x0000 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x0000 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x0000 //TX_ADCS_GAIN +112 0x0000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x7FFF //TX_BLMIC_BLKFACTOR +116 0x7FFF //TX_BRMIC_BLKFACTOR +117 0x000A //TX_MICBLK_START_BIN +118 0x0041 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x0000 //TX_FE_ENER_TH_MTS +124 0x0000 //TX_FE_ENER_TH_EXP +125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x0000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0020 //TX_MIC_BLOCK_N +128 0x7652 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x7800 //TX_THR_PITCH_DET_0 +131 0x7000 //TX_THR_PITCH_DET_1 +132 0x6000 //TX_THR_PITCH_DET_2 +133 0x0000 //TX_PITCH_BFR_LEN +134 0x0000 //TX_SBD_PITCH_DET +135 0x0000 //TX_TD_AEC_L +136 0x0000 //TX_MU0_UNP_TD_AEC +137 0x0000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x2000 //TX_AEC_REF_GAIN_0 +148 0x2000 //TX_AEC_REF_GAIN_1 +149 0x2000 //TX_AEC_REF_GAIN_2 +150 0x4000 //TX_EAD_THR +151 0x0200 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0100 //TX_MIN_EQ_RE_EST_1 +154 0x0100 //TX_MIN_EQ_RE_EST_2 +155 0x0100 //TX_MIN_EQ_RE_EST_3 +156 0x0100 //TX_MIN_EQ_RE_EST_4 +157 0x0100 //TX_MIN_EQ_RE_EST_5 +158 0x0100 //TX_MIN_EQ_RE_EST_6 +159 0x0100 //TX_MIN_EQ_RE_EST_7 +160 0x0100 //TX_MIN_EQ_RE_EST_8 +161 0x0100 //TX_MIN_EQ_RE_EST_9 +162 0x0100 //TX_MIN_EQ_RE_EST_10 +163 0x0100 //TX_MIN_EQ_RE_EST_11 +164 0x0100 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x0000 //TX_LAMBDA_CB_NLE +167 0x0000 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0008 //TX_SE_HOLD_N +170 0x0050 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x0000 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x0000 //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0000 //TX_FRQ_LIN_LEN +184 0x0000 //TX_FRQ_AEC_LEN_RHO +185 0x0000 //TX_MU0_UNP_FRQ_AEC +186 0x0000 //TX_MU0_PTD_FRQ_AEC +187 0x0000 //TX_MINENOISETH +188 0x0000 //TX_MU0_RE_EST +189 0x0000 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x0000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7333 //TX_DTD_THR1_0 +198 0x7333 //TX_DTD_THR1_1 +199 0x7333 //TX_DTD_THR1_2 +200 0x7333 //TX_DTD_THR1_3 +201 0x7333 //TX_DTD_THR1_4 +202 0x7333 //TX_DTD_THR1_5 +203 0x7333 //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0400 //TX_DT_CUT_K +214 0x0000 //TX_DT_CUT_THR +215 0x0000 //TX_COMFORT_G +216 0x0000 //TX_POWER_YOUT_TH +217 0x0000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x0800 //TX_B_POST_FILT_ECHO_H +230 0x0000 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x0000 //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0000 //TX_DT_RESRV_7 +240 0x0000 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF200 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF800 //TX_THR_SN_EST_2 +245 0xF600 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0A00 //TX_N_SN_EST +267 0x0000 //TX_INBEAM_T +268 0x0000 //TX_INBEAMHOLDT +269 0x1FFF //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x1000 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x0000 //TX_B_POST_FLT_0 +280 0x0000 //TX_B_POST_FLT_1 +281 0x001A //TX_NS_LVL_CTRL_0 +282 0x001A //TX_NS_LVL_CTRL_1 +283 0x0014 //TX_NS_LVL_CTRL_2 +284 0x0014 //TX_NS_LVL_CTRL_3 +285 0x000C //TX_NS_LVL_CTRL_4 +286 0x000C //TX_NS_LVL_CTRL_5 +287 0x000C //TX_NS_LVL_CTRL_6 +288 0x000C //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0014 //TX_MIN_GAIN_S_1 +291 0x0014 //TX_MIN_GAIN_S_2 +292 0x0014 //TX_MIN_GAIN_S_3 +293 0x0014 //TX_MIN_GAIN_S_4 +294 0x0014 //TX_MIN_GAIN_S_5 +295 0x0014 //TX_MIN_GAIN_S_6 +296 0x0014 //TX_MIN_GAIN_S_7 +297 0x0000 //TX_NMOS_SUP +298 0x0064 //TX_NS_MAX_PRI_SNR_TH +299 0x7FFF //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x1200 //TX_THR_LFNS +309 0x0147 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x7FFF //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x7FFF //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x199A //TX_A_POST_FILT_S_1 +316 0x1000 //TX_A_POST_FILT_S_2 +317 0x1000 //TX_A_POST_FILT_S_3 +318 0x6666 //TX_A_POST_FILT_S_4 +319 0x6666 //TX_A_POST_FILT_S_5 +320 0x6666 //TX_A_POST_FILT_S_6 +321 0x6666 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x2000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E00 //TX_LAMBDA_PFILT +339 0x7E00 //TX_LAMBDA_PFILT_S_0 +340 0x7E00 //TX_LAMBDA_PFILT_S_1 +341 0x7E00 //TX_LAMBDA_PFILT_S_2 +342 0x7E00 //TX_LAMBDA_PFILT_S_3 +343 0x7E00 //TX_LAMBDA_PFILT_S_4 +344 0x7E00 //TX_LAMBDA_PFILT_S_5 +345 0x7E00 //TX_LAMBDA_PFILT_S_6 +346 0x7E00 //TX_LAMBDA_PFILT_S_7 +347 0x0010 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x0000 //TX_K_PEPPER_HF +350 0x0000 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0000 //TX_DT_BINVAD_TH_0 +354 0x0000 //TX_DT_BINVAD_TH_1 +355 0x0000 //TX_DT_BINVAD_TH_2 +356 0x0000 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0001 //TX_BF_SGRAD_FLG +362 0x0000 //TX_BF_DVG_TH +363 0x0000 //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x05A0 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x1388 //TX_NOISE_TH_0_2 +369 0x3A98 //TX_NOISE_TH_0_3 +370 0x0C80 //TX_NOISE_TH_1 +371 0x0032 //TX_NOISE_TH_2 +372 0x3D54 //TX_NOISE_TH_3 +373 0x012C //TX_NOISE_TH_4 +374 0x07D0 //TX_NOISE_TH_5 +375 0x6590 //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x00C8 //TX_NOISE_TH_6 +379 0x000A //TX_MINENOISE_TH +380 0x0000 //TX_MINENOISE_MIC0_TH_MTS +381 0x0000 //TX_MINENOISE_MIC0_TH_EXP +382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS +383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +384 0x6400 //TX_OUT_ENER_S_TH_CLEAN +385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x6400 //TX_OUT_ENER_S_TH_NOISY +387 0x6400 //TX_OUT_ENER_TH_NOISE +388 0x7D00 //TX_OUT_ENER_TH_SPEECH +389 0x0000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_CSX_ALPHA_0 +392 0x0000 //TX_CSX_ALPHA_1 +393 0x0000 //TX_CSX_ALPHA_2 +394 0x0000 //TX_CSX_ALPHA_3 +395 0x0000 //TX_MU_ARSP_EST +396 0x0000 //TX_P_OUTBEAM_MIN_TH +397 0x0000 //TX_EXTRA_NS_L +398 0x0000 //TX_EXTRA_NS_A +399 0x0000 //TX_VR_NOISE_FLOOR_TH +400 0x0000 //TX_MIN_G_LOW300HZ +401 0x0010 //TX_MAXLEVEL_CNG +402 0x0000 //TX_STN_NOISE_TH +403 0x0000 //TX_POST_MASK_SUP +404 0x0000 //TX_POST_MASK_ADJUST +405 0x0014 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x0226 //TX_MINENOISE_MIC0_S_TH +408 0x2879 //TX_MIN_G_CTRL_SSNS +409 0x0400 //TX_METAL_RTO_THR +410 0x0080 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x2000 //TX_RHO_UPB +415 0x0020 //TX_N_HOLD_HS +416 0x0009 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0000 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x0219 //TX_THR_STD_PLH +421 0x09C4 //TX_N_HOLD_STD +422 0x0166 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x0000 //TX_SB_RTO_MEAN_TH_RUB +428 0x2000 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0064 //TX_DESIRED_TALK_HOLDT +431 0x1000 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0000 //TX_HS_VAD_BIN +435 0x0000 //TX_THR_VAD_HS +436 0x0000 //TX_MEAN_RTO_MIN_TH2 +437 0x0000 //TX_SILENCE_T +438 0x4000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x099A //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x001E //TX_DOA_VAD_THR_1 +445 0x001E //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B +453 0x005A //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C +456 0x005A //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D +459 0x005A //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0172 //TX_BF_HOLDOFF_T +473 0x8000 //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x071C //TX_DOA_TRACK_HT +477 0x0280 //TX_N1_HOLD_HF +478 0x0140 //TX_N2_HOLD_HF +479 0x2AAB //TX_BF_RESET_THR_HF +480 0x4000 //TX_DOA_SMOOTH +481 0x0000 //TX_MU_BF +482 0x0200 //TX_BF_MU_LF_B2 +483 0x0000 //TX_BF_FC_END_BIN_B2 +484 0x0000 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0000 //TX_N_DOA_SEED +488 0x0000 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x0000 //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x0000 //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x0000 //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0168 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0004 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0230 //TX_NOR_OFF_TH1 +503 0xD333 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x6666 //TX_MICTOBFGAIN0 +513 0x0014 //TX_FASTMUE_TH +514 0x0000 //TX_DERVB_LEN_0 +515 0x0000 //TX_DERVB_LEN_1 +516 0x0000 //TX_RHO_DERVB +517 0x0000 //TX_MIC_INDX_DERVB +518 0x0000 //TX_MU_DERVB +519 0x0000 //TX_DR_RESRV_0 +520 0x0000 //TX_DR_RESRV_1 +521 0x0000 //TX_DR_RESRV_2 +522 0x0000 //TX_DR_RESRV_3 +523 0x0000 //TX_DR_RESRV_4 +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x0000 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0028 //TX_SNR_THR +531 0x03E8 //TX_ENGY_THR +532 0x0000 //TX_CORR_HIGH_TH +533 0x0000 //TX_ENGY_THR_2 +534 0x0000 //TX_MEAN_RTO_THR +535 0x0000 //TX_WNS_ENOISE_MIC0_TH +536 0x0000 //TX_RATIOMICL_TH +537 0x0000 //TX_CALIG_HS +538 0x000A //TX_LVL_CTRL +539 0x0000 //TX_WIND_SUPRTO +540 0x0000 //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x0000 //TX_RATIOMICH_TH +543 0x0000 //TX_WIND_INBEAM_L_TH +544 0x0000 //TX_WIND_INBEAM_H_TH +545 0x0000 //TX_WNS_RESRV_0 +546 0x0000 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0000 //TX_BF_LESSCUT_BBIN +554 0x0000 //TX_BF_LESSCUT_EBIN +555 0x0000 //TX_POSTBFB0 +556 0x0000 //TX_POSTBFB +557 0x0000 //TX_POSTBFE +558 0x0000 //TX_SPEECH_SNR_TH +559 0x0000 //TX_PB_MAX_PRI_SNR_TH +560 0x0000 //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0000 //TX_FDEQ_BIN_0 +592 0x0000 //TX_FDEQ_BIN_1 +593 0x0000 //TX_FDEQ_BIN_2 +594 0x0000 //TX_FDEQ_BIN_3 +595 0x0000 //TX_FDEQ_BIN_4 +596 0x0000 //TX_FDEQ_BIN_5 +597 0x0000 //TX_FDEQ_BIN_6 +598 0x0000 //TX_FDEQ_BIN_7 +599 0x0000 //TX_FDEQ_BIN_8 +600 0x0000 //TX_FDEQ_BIN_9 +601 0x0000 //TX_FDEQ_BIN_10 +602 0x0000 //TX_FDEQ_BIN_11 +603 0x0000 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0000 //TX_PREEQ_BIN_MIC0_0 +642 0x0000 //TX_PREEQ_BIN_MIC0_1 +643 0x0000 //TX_PREEQ_BIN_MIC0_2 +644 0x0000 //TX_PREEQ_BIN_MIC0_3 +645 0x0000 //TX_PREEQ_BIN_MIC0_4 +646 0x0000 //TX_PREEQ_BIN_MIC0_5 +647 0x0000 //TX_PREEQ_BIN_MIC0_6 +648 0x0000 //TX_PREEQ_BIN_MIC0_7 +649 0x0000 //TX_PREEQ_BIN_MIC0_8 +650 0x0000 //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0000 //TX_PREEQ_BIN_MIC1_0 +691 0x0000 //TX_PREEQ_BIN_MIC1_1 +692 0x0000 //TX_PREEQ_BIN_MIC1_2 +693 0x0000 //TX_PREEQ_BIN_MIC1_3 +694 0x0000 //TX_PREEQ_BIN_MIC1_4 +695 0x0000 //TX_PREEQ_BIN_MIC1_5 +696 0x0000 //TX_PREEQ_BIN_MIC1_6 +697 0x0000 //TX_PREEQ_BIN_MIC1_7 +698 0x0000 //TX_PREEQ_BIN_MIC1_8 +699 0x0000 //TX_PREEQ_BIN_MIC1_9 +700 0x0000 //TX_PREEQ_BIN_MIC1_10 +701 0x0000 //TX_PREEQ_BIN_MIC1_11 +702 0x0000 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0000 //TX_PREEQ_BIN_MIC2_0 +740 0x0000 //TX_PREEQ_BIN_MIC2_1 +741 0x0000 //TX_PREEQ_BIN_MIC2_2 +742 0x0000 //TX_PREEQ_BIN_MIC2_3 +743 0x0000 //TX_PREEQ_BIN_MIC2_4 +744 0x0000 //TX_PREEQ_BIN_MIC2_5 +745 0x0000 //TX_PREEQ_BIN_MIC2_6 +746 0x0000 //TX_PREEQ_BIN_MIC2_7 +747 0x0000 //TX_PREEQ_BIN_MIC2_8 +748 0x0000 //TX_PREEQ_BIN_MIC2_9 +749 0x0000 //TX_PREEQ_BIN_MIC2_10 +750 0x0000 //TX_PREEQ_BIN_MIC2_11 +751 0x0000 //TX_PREEQ_BIN_MIC2_12 +752 0x0000 //TX_PREEQ_BIN_MIC2_13 +753 0x0000 //TX_PREEQ_BIN_MIC2_14 +754 0x0000 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0064 //TX_MIC_CALIBRATION_0 +766 0x006A //TX_MIC_CALIBRATION_1 +767 0x006A //TX_MIC_CALIBRATION_2 +768 0x006B //TX_MIC_CALIBRATION_3 +769 0x0048 //TX_MIC_PWR_BIAS_0 +770 0x003C //TX_MIC_PWR_BIAS_1 +771 0x003C //TX_MIC_PWR_BIAS_2 +772 0x003C //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0009 //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 +788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 +789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 +790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 +791 0x65AD //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0002 //TX_DEADMIC_SILENCE_TH +817 0x0147 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x0000 //TX_KS_NOISEPASTE_FACTOR +824 0x0000 //TX_KS_CONFIG +825 0x0000 //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x0000 //TX_A_POST_FLT_FP +835 0x0000 //TX_RTO_OUTBEAM_TH +836 0x0000 //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0000 //TX_FFP_RESRV_2 +849 0x0000 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x0E80 //TX_TDDRC_THRD_2 +857 0x3800 //TX_TDDRC_THRD_3 +858 0x2A00 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x0000 //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0000 //TX_TDDRC_SMT_W +866 0x0100 //TX_TDDRC_DRC_GAIN +867 0x0000 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x1EB8 //TX_TFMASKLTH +870 0x170A //TX_TFMASKLTHL +871 0x7FFF //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x4000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x0000 //TX_FASTNS_OUTIN_TH +884 0x0000 //TX_FASTNS_TFMASK_TH +885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 +886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 +887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xD99A //TX_FASTNS_MASK5_TH +890 0x051F //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +#RX +0 0x0040 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x050D //RX_PGA +11 0x7652 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0000 //RX_PITCH_BFR_LEN +17 0x0000 //RX_SBD_PITCH_DET +18 0x0000 //RX_PP_RESRV_0 +19 0x0000 //RX_PP_RESRV_1 +20 0xF800 //RX_N_SN_EST +21 0x0000 //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0000 //RX_FENS_RESRV_1 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +30 0x0000 //RX_EXTRA_NS_L +31 0x0000 //RX_EXTRA_NS_A +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x0000 //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0003 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0010 //RX_MAXLEVEL_CNG +132 0x0000 //RX_BWE_UV_TH +133 0x0000 //RX_BWE_UV_TH2 +134 0x0000 //RX_BWE_UV_TH3 +135 0x0000 //RX_BWE_V_TH +136 0x0000 //RX_BWE_GAIN1_V_TH1 +137 0x0000 //RX_BWE_GAIN1_V_TH2 +138 0x0000 //RX_BWE_UV_EQ +139 0x0000 //RX_BWE_V_EQ +140 0x0000 //RX_BWE_TONE_TH +141 0x0000 //RX_BWE_UV_HOLD_T +142 0x0000 //RX_BWE_GAIN2_ALPHA +143 0x0000 //RX_BWE_GAIN3_ALPHA +144 0x0000 //RX_BWE_CUTOFF +145 0x0000 //RX_BWE_GAINFILL +146 0x0000 //RX_BWE_MAXTH_TONE +147 0x0000 //RX_BWE_EQ_0 +148 0x0000 //RX_BWE_EQ_1 +149 0x0000 //RX_BWE_EQ_2 +150 0x0000 //RX_BWE_EQ_3 +151 0x0000 //RX_BWE_EQ_4 +152 0x0000 //RX_BWE_EQ_5 +153 0x0000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 + diff --git a/audio/bluejay/tuning/waves/tests/test_config.ini b/audio/bluejay/tuning/waves/tests/test_config.ini new file mode 100644 index 0000000..ba12a8e --- /dev/null +++ b/audio/bluejay/tuning/waves/tests/test_config.ini @@ -0,0 +1,58 @@ +######################################################################################################## +# (Optional) The supported features list for platform vendors to query from. +# Platform vendors should call maxxaudio_qdsp_is_feature_supported with a string to query from the list. +# This config has no effect in the MaxxAudioQdspHalController. It's only meaningful for platform vendors. +# Putting any value other than 1 would be equivalent to not supported. +######################################################################################################## +[HAL_SUPPORTED_FEATURES] +CUSTOM_ACTION_256=1 + +######################################################################################################## +# This defined the options of supported sample rates. +# This can be configured by Waves or platform vendor. +######################################################################################################## +[HAL_SUPPORTED_SAMPLE_RATES] +SR_COMMON = 48000 + +######################################################################################################## +# (Optional) The subtypes that applies to different angles(0, 90, 180, 270). Can be empty if not applicable. +# This can be configured by Waves or platform vendor. +######################################################################################################## +[HAL_ORIENTATION_SUBTYPES] +OST_SPEAKER = 0:12,90:13,180:12,270:0|13 + +######################################################################################################## +# This defines available preset configurations. +# This should be configured by Waves only unless platform vendor is familiar with MPS structure. +######################################################################################################## +[HAL_SUPPORTED_PRESETS] +SPEAKER_MUSIC = OM:1,SM:2,OST:OST_SPEAKER +SPEAKER_SAFE_MUSIC = OM:10,SM:2,OST:OST_SPEAKER +SPEAKER_SAFE_CALL = OM:10,SM:2,OST:OST_SPEAKER +HEADSET_MUSIC = OM:2,SM:2 + +######################################################################################################## +# This defines available CONTROL configurations. Only define the CONTROL if you need it. +# The numbers could vary from device to device. +# This can be configured by Waves or platform vendor. +######################################################################################################## +[HAL_SUPPORTED_CONTROLS] +SPEAKER_INSTANCE = INSTANCE:1,DEV:0,SR:SR_COMMON,PRESET:SPEAKER_MUSIC|SPEAKER_SAFE_MUSIC|SPEAKER_SAFE_CALL +A2DP_INSTANCE = INSTANCE:2,DEV:0,SR:SR_COMMON,PRESET:HEADSET_MUSIC +USB_HEADPHONE_INSTANCE = INSTANCE:4,DEV:0,SR:SR_COMMON,PRESET:HEADSET_MUSIC + +[COEFS_CONVERTER_SETTING] +AlgFxPath=/vendor/lib/libAlgFx_HiFi3z.so +AlgFxPath64=/vendor/lib64/libAlgFx_HiFi3z.so +# do not modify the following if not necessary +#AudioFormatType=0 +#AudioFormatChannels=2 +#AudioFormatSampleRate=48000 +#AudioFormatBitsPerSample=32 +#AudioFormatSampleSize=4 +#AudioFormatIncrement=8 + +[CUSTOM_ACTION_256] +CASE_1=PRIORITY:0,NUMBERS:2:0|1,PRESET:SPEAKER_MUSIC +CASE_2=PRIORITY:1,NUMBERS:1|2|4194304:2|3|4,PRESET:SPEAKER_SAFE_CALL +CASE_3=PRIORITY:2,NUMBERS:1|4194304:0|1,PRESET:SPEAKER_SAFE_MUSIC diff --git a/audio/bluejay/tuning/waves/tests/test_preset.mps b/audio/bluejay/tuning/waves/tests/test_preset.mps new file mode 100644 index 0000000000000000000000000000000000000000..bd08ee30a1ee969ddde614206486e06935e0a2d3 GIT binary patch literal 186955 zcmeI537i$h)%MS@$OTabL8Echk&pn2D61ku9kvJwnn7>{Wd@i56k%A@fF|CkxV}bW zK1Eb;Kqc;A68B}=B?}2ejERcbFh+!EOe=z0l<(B->3Yrp_sy^ji0|nicZUB|cirmh z>h9{Qr=QcWr0)s+Uu!`75>Y`D`9TdEP{E!=d;9;(@-z7~*po5?%cfRNC?8W^P&jzf z^zx~b$|e>Mt1K@&r+jLI7AFtu*S~mBdD+;?@slT&Pixq;-^BCEr%#?deSD)9H7gZQ zm{dGq@|bfPH!GR&-SUaW{mvUZt;^ounKZm?^u+SwZXTFPPMd~cZzm*NB(O2n`wgnCRF3*sk1+?ejVWS3>O&U9>eBxOD*Np#>TM9JD zx=3lLp%I`rHx5uTp7#hqv6D(qGw9CpzZw`(%}oQy*ER!mW;s6THbl)e>;;IO9K&?A zB5nZ~9u)$*aLWMMvZz%6DO+m|(nQkSVs{{bs7S*>fNoq2Ao{w7b{g7ikVBV#PhURF zL)YALNOZV|o9FsvrR#{*Vs`|fkUIgGj|31M3Hfi%GDi83;gIp1S znn&XR86FRa-2?#9*?=lO2S79tkl}LyM3Xd31}x!90MQgchNl8zHw{2E9k7JY0}!1L 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It's only meaningful for platform vendors. +# Putting any value other than 1 would be equivalent to not supported. +######################################################################################################## +[HAL_SUPPORTED_FEATURES] +CUSTOM_ACTION_256=1 + +######################################################################################################## +# This defined the options of supported sample rates. +# This can be configured by Waves or platform vendor. +######################################################################################################## +[HAL_SUPPORTED_SAMPLE_RATES] +SR_COMMON = 48000 + +######################################################################################################## +# (Optional) The subtypes that applies to different angles(0, 90, 180, 270). Can be empty if not applicable. +# This can be configured by Waves or platform vendor. +######################################################################################################## +[HAL_ORIENTATION_SUBTYPES] +OST_SPEAKER = 0:12,90:13,180:12,270:0|13 + +######################################################################################################## +# This defines available preset configurations. +# This should be configured by Waves only unless platform vendor is familiar with MPS structure. +######################################################################################################## +[HAL_SUPPORTED_PRESETS] +SPEAKER_MUSIC = OM:1,SM:2,OST:OST_SPEAKER +SPEAKER_SAFE_MUSIC = OM:10,SM:2,OST:OST_SPEAKER +SPEAKER_SAFE_CALL = OM:10,SM:2,OST:OST_SPEAKER +HEADSET_MUSIC = OM:2,SM:2 + +######################################################################################################## +# This defines available CONTROL configurations. Only define the CONTROL if you need it. +# The numbers could vary from device to device. +# This can be configured by Waves or platform vendor. +######################################################################################################## +[HAL_SUPPORTED_CONTROLS] +SPEAKER_INSTANCE = INSTANCE:1,DEV:0,SR:SR_COMMON,PRESET:SPEAKER_MUSIC|SPEAKER_SAFE_MUSIC|SPEAKER_SAFE_CALL +A2DP_INSTANCE = INSTANCE:2,DEV:0,SR:SR_COMMON,PRESET:HEADSET_MUSIC +USB_HEADPHONE_INSTANCE = INSTANCE:4,DEV:0,SR:SR_COMMON,PRESET:HEADSET_MUSIC + +[COEFS_CONVERTER_SETTING] +AlgFxPath=/vendor/lib/libAlgFx_HiFi3z.so +AlgFxPath64=/vendor/lib64/libAlgFx_HiFi3z.so +# do not modify the following if not necessary +#AudioFormatType=0 +#AudioFormatChannels=2 +#AudioFormatSampleRate=48000 +#AudioFormatBitsPerSample=32 +#AudioFormatSampleSize=4 +#AudioFormatIncrement=8 + +[CUSTOM_ACTION_256] +CASE_1=PRIORITY:0,NUMBERS:2:0|1,PRESET:SPEAKER_MUSIC +CASE_2=PRIORITY:1,NUMBERS:1|2|4194304:2|3|4,PRESET:SPEAKER_SAFE_CALL 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file mode 100644 index 0000000..1191877 --- /dev/null +++ b/init.insmod.bluejay.cfg @@ -0,0 +1,18 @@ +########################################################## +# init.insmod.bluejay.cfg # +# This file contains bluejay specific kernel modules to # +# load at init time by init.insmod.sh script # +########################################################## + +# Load device specific kernel modules +# Modules here will be loaded *after* all common modules +modprobe|bcmdhd4389.ko +modprobe|snd-soc-cs35l41-i2c.ko +modprobe|cl_dsp.ko +modprobe|input-cs40l26-i2c.ko +modprobe|ftm5.ko +modprobe|sec_touch.ko +modprobe|snd-soc-cs40l26.ko + +# All device specific modules loaded +setprop|vendor.device.modules.ready diff --git a/media_profiles_bluejay.xml b/media_profiles_bluejay.xml new file mode 100644 index 0000000..2b333b3 --- /dev/null +++ b/media_profiles_bluejay.xml @@ -0,0 +1,1086 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +]> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/nfc/libnfc-hal-st.conf b/nfc/libnfc-hal-st.conf new file mode 100644 index 0000000..0035a70 --- /dev/null +++ b/nfc/libnfc-hal-st.conf @@ -0,0 +1,159 @@ +########################### Start of libnf-hal-st_aosp.conf ########################### + +############################################################################### +############################################################################### +# ST HAL trace log level +STNFC_HAL_LOGLEVEL=1 +NFC_DEBUG_ENABLED=0 + +############################################################################### +# Vendor specific mode to enable FW (RF & SWP) traces. +STNFC_FW_DEBUG_ENABLED=0 + +############################################################################### +# File used for NFA storage +NFA_STORAGE="/data/nfc" + +############################################################################### +# Keep the nfa storage file. +PRESERVE_STORAGE=1 + +############################################################################### +# In Switch OFF mode (phone switched-off), specify the desired CE mode to +# the controller. +# 0: No card-emulation; DEFAULT +# 1: Switch-off card-emulation enabled +CE_ON_SWITCH_OFF_STATE=1 + +############################################################################### +# Vendor specific mode to support the USB charging mode if VPSIO=1 in switch off. +STNFC_USB_CHARGING_MODE=1 + +############################################################################### +# Vendor Specific Proprietary Protocol & Discovery Configuration +# Set to 0xFF if unsupported +# byte[0] NCI_PROTOCOL_18092_ACTIVE +# byte[1] NCI_PROTOCOL_B_PRIME +# byte[2] NCI_PROTOCOL_DUAL +# byte[3] NCI_PROTOCOL_15693 +# byte[4] NCI_PROTOCOL_KOVIO +# byte[5] NCI_PROTOCOL_MIFARE +# byte[6] NCI_DISCOVERY_TYPE_POLL_KOVIO +# byte[7] NCI_DISCOVERY_TYPE_POLL_B_PRIME +# byte[8] NCI_DISCOVERY_TYPE_LISTEN_B_PRIME +NFA_PROPRIETARY_CFG={05:FF:FF:06:8A:90:77:FF:FF} + +############################################################################### +# Choose the presence-check algorithm for type-4 tag. If not defined, +# the default value is 1. +# 0 NFA_RW_PRES_CHK_DEFAULT; Let stack selects an algorithm +# 1 NFA_RW_PRES_CHK_I_BLOCK; ISO-DEP protocol's empty I-block +# 2 NFA_RW_PRES_CHK_RESET; Deactivate to Sleep, then re-activate +# 3 NFA_RW_PRES_CHK_RB_CH0; Type-4 tag protocol's ReadBinary command on channel 0 +# 4 NFA_RW_PRES_CHK_RB_CH3; Type-4 tag protocol's ReadBinary command on channel 3 +# 5 NFA_RW_PRES_CHK_ISO_DEP_NAK; presence check command ISO-DEP NAK as per NCI2.0 +PRESENCE_CHECK_ALGORITHM=5 + +############################################################################### +# Name of the NCI HAL module to use +# If unset, falls back to nfc_nci.bcm2079x +NCI_HAL_MODULE="nfc_nci.st21nfc" + +############################################################################### +# White list to be set at startup. +DEVICE_HOST_WHITE_LIST={02:C0} + +############################################################################### +# BAIL OUT value for P2P +# Implements algorithm for NFC-DEP protocol priority over ISO-DEP protocol. +POLL_BAIL_OUT_MODE=1 + +############################################################################### +# Extended APDU length for ISO_DEP +ISO_DEP_MAX_TRANSCEIVE=0xFEFF + +############################################################################### +# Configure the NFC Extras to open and use a static pipe. If the value is +# not set or set to 0, then the default is use a dynamic pipe based on a +# destination gate (see NFA_HCI_DEFAULT_DEST_GATE). Note there is a value +# for each EE (ESE/SIM) +OFF_HOST_ESE_PIPE_ID=0x5E +OFF_HOST_SIM_PIPE_ID=0x3E + +############################################################################### +#Set the default Felica T3T System Code OffHost route Location : +#This settings will be used when application does not set this parameter +# host 0x00 +# eSE 0x82 (eSE), 0x86 (eUICC/SPI-SE) +# UICC 0x81 (UICC_1), 0x85 (UICC_2) +DEFAULT_SYS_CODE_ROUTE=0x86 + +############################################################################### +#Set the Felica T3T System Code supported power state: +DEFAULT_SYS_CODE_PWR_STATE=0x3B + +############################################################################### +# Path and Files used for FW update binaries storage +STNFC_FW_PATH_STORAGE="/vendor/firmware" +STNFC_FW_BIN_NAME="/st54j_fw.bin" +STNFC_FW_CONF_NAME="/st54j_conf.bin" + +############################################################################### +# Default off-host route for Felica. +# This settings will be used when application does not set this parameter +# host 0x00 +# eSE 0x82 (eSE), 0x86 (eUICC/SPI-SE) +# UICC 0x81 (UICC_1), 0x85 (UICC_2) +DEFAULT_NFCF_ROUTE=0x86 + +############################################################################### +# Configure the default off-host route. +# used for technology A and B routing +# eSE 0x82 (eSE), 0x86 (eUICC/SPI-SE) +# UICC 0x81 (UICC_1), 0x85 (UICC_2) +DEFAULT_OFFHOST_ROUTE=0x81 + +############################################################################### +# Configure the default AID route. +# host 0x00 +# eSE 0x82 (eSE), 0x86 (eUICC/SPI-SE) +# UICC 0x81 (UICC_1), 0x85 (UICC_2) +DEFAULT_ROUTE=0x00 + +############################################################################### +# Configure the NFCEEIDs of offhost UICC. +# UICC 0x81 (UICC_1), 0x85 (UICC_2) +OFFHOST_ROUTE_UICC={81} + +############################################################################### +# Configure the NFCEEIDs of offhost eSEs. +# eSE 0x82 (eSE), 0x86 (eUICC/SPI-SE) +OFFHOST_ROUTE_ESE={86} + +############################################################################### +# Configure the list of NFCEE for the ISO-DEP routing. +# host 0x00 +# eSE 0x82 (eSE), 0x86 (eUICC/SPI-SE) +# UICC 0x81 (UICC_1), 0x85 (UICC_2) +DEFAULT_ISODEP_ROUTE=0x81 + +############################################################################### +# Configure the HAL Clock control +# enable 0x01 +# disable 0x00 default value +STNFC_CONTROL_CLK=0x01 + +################################################################################ +# Configure the ACTIVE_RW timer +# Default 0x00, set 0x01 to enable it +STNFC_ACTIVERW_TIMER=0x01 + +################################################################################ +# Core configuration settings +CORE_CONF_PROP={ 20, 02, 0a, 03, + a1, 01, 1e, + a2, 01, 19, + 80, 01, 01 +} + + diff --git a/nfc/libnfc-nci.conf b/nfc/libnfc-nci.conf new file mode 100644 index 0000000..c17296a --- /dev/null +++ b/nfc/libnfc-nci.conf @@ -0,0 +1,115 @@ +############################################################################### +# Application options +NFC_DEBUG_ENABLED=0 + +############################################################################### +# File used for NFA storage +NFA_STORAGE="/data/nfc" + +############################################################################### +# Force UICC to only listen to the following technology(s). +# The bits are defined as tNFA_TECHNOLOGY_MASK in nfa_api.h. +# Default is NFA_TECHNOLOGY_MASK_A | NFA_TECHNOLOGY_MASK_B | NFA_TECHNOLOGY_MASK_F +UICC_LISTEN_TECH_MASK=0x07 + +############################################################################### +# Set HOST default listen to the following technology(s). +# The bits are defined as tNFA_TECHNOLOGY_MASK in nfa_api.h. +# Default is NFA_TECHNOLOGY_MASK_A | NFA_TECHNOLOGY_MASK_F +# 0x07 = A + B + F +HOST_LISTEN_TECH_MASK=0x07 + +############################################################################### +# AID for Empty Select command +# If specified, this AID will be substituted when an Empty SELECT command is +# detected. The first byte is the length of the AID. Maximum length is 16. +AID_FOR_EMPTY_SELECT={08:A0:00:00:01:51:00:00:00} + +############################################################################### +# When screen is turned off, specify the desired power state of the controller. +# 0: power-off-sleep state; DEFAULT +# 1: full-power state +# 2: screen-off card-emulation (CE4/CE3/CE1 modes are used) +SCREEN_OFF_POWER_STATE=1 + +############################################################################### +# Force tag polling for the following technology(s). +# The bits are defined as tNFA_TECHNOLOGY_MASK in nfa_api.h. +# Default is NFA_TECHNOLOGY_MASK_A | NFA_TECHNOLOGY_MASK_B | +# NFA_TECHNOLOGY_MASK_F | NFA_TECHNOLOGY_MASK_ISO15693 | +# NFA_TECHNOLOGY_MASK_B_PRIME | NFA_TECHNOLOGY_MASK_KOVIO | +# NFA_TECHNOLOGY_MASK_ACTIVE +# +# Notable bits: +# NFA_TECHNOLOGY_MASK_A 0x01 /* NFC Technology A */ +# NFA_TECHNOLOGY_MASK_B 0x02 /* NFC Technology B */ +# NFA_TECHNOLOGY_MASK_F 0x04 /* NFC Technology F */ +# NFA_TECHNOLOGY_MASK_ISO15693 0x08 /* Proprietary Technology */ +# NFA_TECHNOLOGY_MASK_KOVIO 0x20 /* Proprietary Technology */ +# NFA_TECHNOLOGY_MASK_ACTIVE 0x40 /* NFC Technology Active */ +POLLING_TECH_MASK=0x2F + +############################################################################### +# Force P2P to only listen for the following technology(s). +# The bits are defined as tNFA_TECHNOLOGY_MASK in nfa_api.h. +# Default is NFA_TECHNOLOGY_MASK_A | NFA_TECHNOLOGY_MASK_F | +# NFA_TECHNOLOGY_MASK_ACTIVE +# +# Notable bits: +# NFA_TECHNOLOGY_MASK_A 0x01 /* NFC Technology A */ +# NFA_TECHNOLOGY_MASK_F 0x04 /* NFC Technology F */ +# NFA_TECHNOLOGY_MASK_ACTIVE 0x40 /* NFC Technology Active */ +P2P_LISTEN_TECH_MASK=0x00 + +PRESERVE_STORAGE=0x01 + +############################################################################### +# Override the stack default for NFA_EE_MAX_EE_SUPPORTED set in nfc_target.h. +# The value is set to 3 by default as it assumes we will discover 0xF2, +# 0xF3, and 0xF4. If a platform will exclude and SE, this value can be reduced +# so that the stack will not wait any longer than necessary. +# Maximum EE supported number +# NXP PN547C2 0x02 +# NXP PN65T 0x03 +# NXP PN548C2 0x02 +# NXP PN66T 0x03 +NFA_MAX_EE_SUPPORTED=0x02 + +############################################################################### +# AID_MATCHING constants +# AID_MATCHING_EXACT_ONLY 0x00 +# AID_MATCHING_EXACT_OR_PREFIX 0x01 +# AID_MATCHING_PREFIX_ONLY 0x02 +# AID_MATCHING_EXACT_OR_SUBSET_OR_PREFIX 0x03 +AID_MATCHING_MODE=0x03 + +############################################################################### +#Set the default Felica T3T System Code : +#This settings will be used when application does not set this parameter +DEFAULT_SYS_CODE={FE:FE} + +############################################################################### +# Value of NIC parameter NFCC_COFNIG_CONTROL +# 0x00 NFCC is not allowed to manage RF configuration +# 0x01 NFCC is allowed to manage RF configuration +NFCC_CONFIG_CONTROL=0x01 + +############################################################################### +#Set if the AID routing should be blocked for the power modes not supported. +NFA_AID_BLOCK_ROUTE=1 + +############################################################################### +#Set the OffHost AID supported power state: +OFFHOST_AID_ROUTE_PWR_STATE=0x3B + +############################################################################### +# Mifare Tag implementation +# 0: General implementation +# 1: Legacy implementation +LEGACY_MIFARE_READER=0 + +############################################################################### +# Nfc recovery implementation +# 0: Crash Nfc Service +# 1: Toggle Nfc state +RECOVERY_OPTION=1 diff --git a/nfc/libse-gto-hal.conf b/nfc/libse-gto-hal.conf new file mode 100644 index 0000000..f4e443d --- /dev/null +++ b/nfc/libse-gto-hal.conf @@ -0,0 +1,2 @@ +#Gemalto SPI devnode +GTO_DEV=/dev/st54spi; diff --git a/nfc/manifest_nfc.xml b/nfc/manifest_nfc.xml new file mode 100644 index 0000000..bf6b7cc --- /dev/null +++ b/nfc/manifest_nfc.xml @@ -0,0 +1,11 @@ + + + android.hardware.nfc + hwbinder + 1.2 + + INfc + default + + + diff --git a/nfc/manifest_se_bluejay.xml b/nfc/manifest_se_bluejay.xml new file mode 100644 index 0000000..9e5cee9 --- /dev/null +++ b/nfc/manifest_se_bluejay.xml @@ -0,0 +1,7 @@ + + + android.hardware.secure_element + hwbinder + @1.2::ISecureElement/eSE1 + + diff --git a/powerstats/bluejay/Android.bp b/powerstats/bluejay/Android.bp new file mode 100644 index 0000000..e5ca506 --- /dev/null +++ b/powerstats/bluejay/Android.bp @@ -0,0 +1,44 @@ +// Copyright (C) 2021 The Android Open Source Project +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +soong_namespace { + imports: [ + "hardware/google/pixel", + "device/google/gs101", + ] +} + +package { + // See: http://go/android-license-faq + // A large-scale-change added 'default_applicable_licenses' to import + // all of the 'license_kinds' from "//device/google/bluejay:device_google_bluejay_license" + // to get the below license kinds: + // SPDX-license-identifier-Apache-2.0 + default_applicable_licenses: [ + "//device/google/bluejay:device_google_bluejay_license", + ], +} + +cc_binary { + name: "android.hardware.power.stats-service.pixel", + defaults: ["powerstats_pixel_binary_defaults"], + + srcs: [ + "*.cpp", + ], + + shared_libs: [ + "android.hardware.power.stats-impl.gs101", + ], +} diff --git a/powerstats/bluejay/service.cpp b/powerstats/bluejay/service.cpp new file mode 100644 index 0000000..0fe1c04 --- /dev/null +++ b/powerstats/bluejay/service.cpp @@ -0,0 +1,74 @@ +/* + * Copyright (C) 2021 The Android Open Source Project + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#define LOG_TAG "android.hardware.power.stats-service.pixel" + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +using aidl::android::hardware::power::stats::DisplayStateResidencyDataProvider; +using aidl::android::hardware::power::stats::EnergyConsumerType; +using aidl::android::hardware::power::stats::PowerStatsEnergyConsumer; + +void addDisplay(std::shared_ptr p) { + // Add display residency stats + std::vector states = { + "Off", + "LP: 1080x2400@30", + "On: 1080x2400@60", + "HBM: 1080x2400@60", + }; + + p->addStateResidencyDataProvider(std::make_unique( + "Display", + "/sys/class/backlight/panel0-backlight/state", + states)); + + // Add display energy consumer + p->addEnergyConsumer(PowerStatsEnergyConsumer::createMeterAndEntityConsumer( + p, EnergyConsumerType::DISPLAY, "display", {"VSYS_PWR_DISPLAY"}, "Display", + {{"LP: 1080x2400@30", 1}, + {"On: 1080x2400@60", 2}, + {"HBM: 1080x2400@60", 3}})); +} + +int main() { + LOG(INFO) << "Pixel PowerStats HAL AIDL Service is starting."; + + // single thread + ABinderProcess_setThreadPoolMaxThreadCount(0); + + std::shared_ptr p = ndk::SharedRefBase::make(); + + addGs101CommonDataProviders(p); + addDisplay(p); + addNFC(p, "/sys/devices/platform/10960000.hsi2c/i2c-3/i2c-st21nfc/power_stats"); + + const std::string instance = std::string() + PowerStats::descriptor + "/default"; + binder_status_t status = AServiceManager_addService(p->asBinder().get(), instance.c_str()); + LOG_ALWAYS_FATAL_IF(status != STATUS_OK); + + ABinderProcess_joinThreadPool(); + return EXIT_FAILURE; // should not reach +} diff --git a/self-extractors_bluejay/Android.mk b/self-extractors_bluejay/Android.mk new file mode 100644 index 0000000..e69de29 diff --git a/self-extractors_bluejay/METADATA b/self-extractors_bluejay/METADATA new file mode 100644 index 0000000..d97975c --- /dev/null +++ b/self-extractors_bluejay/METADATA @@ -0,0 +1,3 @@ +third_party { + license_type: NOTICE +} diff --git a/self-extractors_bluejay/PART1 b/self-extractors_bluejay/PART1 new file mode 100644 index 0000000..935267e --- /dev/null +++ b/self-extractors_bluejay/PART1 @@ -0,0 +1,12 @@ +# +# Usage is subject to the enclosed license agreement + +echo +echo The license for this software will now be displayed. +echo You must agree to this license before using this software. +echo +echo -n Press Enter to view the license +read dummy +echo + +more << __EOF__ diff --git a/self-extractors_bluejay/PART2 b/self-extractors_bluejay/PART2 new file mode 100644 index 0000000..30e8d43 --- /dev/null +++ b/self-extractors_bluejay/PART2 @@ -0,0 +1,22 @@ +__EOF__ + +if test $? != 0 +then + echo ERROR: Couldn\'t display license file 1>&2 + exit 1 +fi + +echo + +echo -n Type \"I ACCEPT\" if you agree to the terms of the license:\ +read typed + +if test "$typed" != I\ ACCEPT +then + echo + echo You didn\'t accept the license. Extraction aborted. + exit 2 +fi + +echo + diff --git a/self-extractors_bluejay/PART3 b/self-extractors_bluejay/PART3 new file mode 100644 index 0000000..6847be5 --- /dev/null +++ b/self-extractors_bluejay/PART3 @@ -0,0 +1,12 @@ + +if test $? != 0 +then + echo + echo ERROR: Couldn\'t extract files. 1>&2 + exit 3 +else + echo + echo Files extracted successfully. +fi +exit 0 + diff --git a/self-extractors_bluejay/PROLOGUE b/self-extractors_bluejay/PROLOGUE new file mode 100644 index 0000000..c856ef1 --- /dev/null +++ b/self-extractors_bluejay/PROLOGUE @@ -0,0 +1,2 @@ +#!/bin/bash +# diff --git a/self-extractors_bluejay/extract-lists.txt b/self-extractors_bluejay/extract-lists.txt new file mode 100644 index 0000000..97de4a3 --- /dev/null +++ b/self-extractors_bluejay/extract-lists.txt @@ -0,0 +1,20 @@ + google_devices) + TO_EXTRACT="\ + IMAGES/vbmeta_vendor.img \ + IMAGES/vendor.img \ + IMAGES/vendor_dlkm.img \ + RADIO/bootloader.img \ + RADIO/radio.img \ + system_ext/etc/permissions/com.shannon.imsservice.xml \ + system_ext/etc/permissions/com.shannon.qualifiednetworksservice.xml \ + system_ext/etc/permissions/com.shannon.rcsservice.xml \ + system_ext/etc/permissions/oemrilhook.xml \ + system_ext/framework/oemrilhook.jar \ + system_ext/lib64/libmediaadaptor.so \ + system_ext/lib/libmediaadaptor.so \ + system_ext/priv-app/ShannonRcs/ShannonRcs.apk \ + system_ext/priv-app/ShannonIms/ShannonIms.apk \ + system_ext/priv-app/ShannonQualifiedNetworksService/ShannonQualifiedNetworksService.apk \ + " + ;; + diff --git a/self-extractors_bluejay/google_devices/COPYRIGHT b/self-extractors_bluejay/google_devices/COPYRIGHT new file mode 100644 index 0000000..db593ae --- /dev/null +++ b/self-extractors_bluejay/google_devices/COPYRIGHT @@ -0,0 +1 @@ +# (C) Google Inc. diff --git a/self-extractors_bluejay/google_devices/LICENSE b/self-extractors_bluejay/google_devices/LICENSE new file mode 100644 index 0000000..6b4042b --- /dev/null +++ b/self-extractors_bluejay/google_devices/LICENSE @@ -0,0 +1,264 @@ +THIS DEVELOPER SOFTWARE LICENSE AGREEMENT (THE "AGREEMENT") IS A LEGALLY +BINDING AGREEMENT BETWEEN Google Inc. ("LICENSOR") AND +YOU OR THE LEGAL ENTITY YOU REPRESENT ("You" or its possessive, "Your"). BY +TYPING "I ACCEPT" WHERE INDICATED YOU ACKNOWLEDGE THAT YOU HAVE READ THIS +AGREEMENT, UNDERSTAND IT AND AGREE TO BE BOUND BY ITS TERMS AND CONDITIONS. +IF YOU DO NOT AGREE TO THESE TERMS YOU MUST DISCONTINUE THE INSTALLATION +PROCESS AND YOU SHALL NOT USE THE SOFTWARE OR RETAIN ANY COPIES OF THE +SOFTWARE OR DOCUMENTATION. ANY USE OR POSSESSION OF THE SOFTWARE BY YOU IS +SUBJECT TO THE TERMS AND CONDITIONS SET FORTH IN THIS AGREEMENT. IF THE +SOFTWARE IS INSTALLED ON A COMPUTER OWNED BY A CORPORATION OR OTHER LEGAL +ENTITY, THEN YOU REPRESENT AND WARRANT THAT YOU HAVE THE AUTHORITY TO BIND +SUCH ENTITY TO THE TERMS AND CONDITIONS OF THIS AGREEMENT. + + 1. Special Definitions + + a. The term "Android" means the open source mobile platform, software + stack, operating system, middleware, application programming + interfaces and mobile applications under the trade-name "Android" + distributed at Android.com. + + b. The term "Android Applications" means a software application or + open-source contribution developed by You, designed to operate with + Android that does not contain or incorporate any of the Software. + + c. The term "Authorized Android Enabled Device" means only the device + identified on the site from which You downloaded the Software. + The term "Software" means the Licensor's proprietary software and + libraries in object code form, designed for use on the Authorized + Android Enabled Device. + + d. The term "Authorized Android Enabled Device Software" means a + packaged build for Authorized Android Enabled Devices, consisting + of files suitable for installation on an Authorized Android Enabled + Device using a mechanism such as fastboot mode or recovery mode. + + 2. License Grant + + a. Subject to the terms of this Agreement, Licensor hereby grants to + You, free of charge, a non-exclusive, non-sublicensable, + non-transferable, limited copyright license, during the term of + this Agreement, to download, install and use the Software + internally in machine-readable (i.e., object code) form and the + Documentation for non-commercial use on an Authorized Android + Enabled Device and non-commercial redistribution for academic + purposes only of a reasonable number of copies of the Authorized + Android Enabled Device Software (the "Limited Purpose"). You may + grant your end users the right to use the Software for + non-commercial purposes on an Authorized Android Enabled Device. + The license to the Software granted to You hereunder is solely for + the Limited Purpose set forth in this section, and the Software + shall not be used for any other purpose. + + 3. Restrictions + + a. Retention of Rights. The entire right, title and interest in the + Software shall remain with Licensor and, unless specified in + writing hereunder, no rights are granted to any of the Software. + Except for the right to use the Software for the Limited Purpose, + the delivery of the Software to You does not convey to You any + intellectual property rights in the Software, including, but not + limited to any rights under any patent, trademark, copyright, or + trade secret. Neither the delivery of the Software to You nor any + terms set forth herein shall be construed to grant to You, either + expressly, by implication or by way of estoppel, any license under + any patents or other intellectual property rights covering or + relating to any other product or invention or any combination of + the Software with any other product. Any rights not expressly + granted to You herein are reserved by Licensor. + + b. No Commercialization or Distribution of the Software and + Documentation. Except as expressly provided in Section 2 of this + Agreement, You shall have no right to (i) copy, disclose, + distribute, publically perform, publically display, transfer, + alter, modify, translate, disassemble, decompile, reverse engineer, + or adapt the Software and Documentation, or any portion thereof, or + create any derivative works based thereon; (ii) rent, lease, + assign, sublicense, resell, disclose or otherwise transfer the + Software and Documentation in whole or in part to any third party + (iii) use the Software and Documentation except for the Limited + Purpose, (iv) remove or alter any of the copyright or proprietary + notices contained in any of the Software and Documentation. For the + purposes of clarity, nothing in this Agreement prohibits You from + making and distributing Android Applications under commercial or + non-commercial terms, provided that You shall not contain, + incorporate, and/or compile the Software or any of its derivative + works, in whole or in part, into Your Android Applications and/or + any software/devices created by You or by third parties acting on + Your behalf. You and any such third party shall comply with all of + the terms and conditions of this Agreement. + + c. No Reverse Engineering. Except for any portions of the Software + provided to You in source code format and except for any third + party code distributed with the Software that is licensed under + contrary terms, You will not reverse engineer, disassemble, + decompile, or translate the Software, or otherwise attempt to + derive the source code version of the Software, except if and to + the extent expressly permitted under any applicable law. + + d. Third Party Software. You agree that Android may contain third + party software. You agree that you may not distribute such third + party software for any purpose without appropriate licenses from + the applicable third party or parties. + + e. No Transfer or Assignment. You shall not assign any of its rights + or obligations under this Agreement. Any attempted assignment in + contravention of this Section shall be void. + + f. Licensor shall retain all title, ownership and Intellectual + Property Rights in and to the Software and any derivative thereof. + "Intellectual Property Rights" shall mean all patent, copyright, + trade secret, trademark and other proprietary and intellectual + property rights, including moral rights. + + g. Neither this Agreement, nor any act by Licensor or its Affiliates + persuant to this Agreement or relating to the Software (including, + without limitation, the provision by Licensor or its Affiliates of + the Software) shall provide to You any license or any other rights + whatsoever under any patents, trademarks, trade secrets, copyrights + or any other intellectual property rights of Licensor or its + Affiliates, except for the copyrights expressly set forth in this + Agreement. You understand and agree that: + + h. Neither this Agreement, nor delivery of the Software alone or in + combination with any Licensor ASIC grants you any right to + practice, or any other right at all with respect to, any patent of + Licensor or its Affiliates, and + + i. A separating license agreement from Motorola Incorporated is needed + to use or practice any patent of Licensor or its Affiliates. + + j. You agree not to contend in any context that, as a result of the + provision or use of this software, either Licensor or Affiliate has + any obligation to extend, or Licensor or any other party has + obtained any right to, any license, whether express or implied, + with respect to any patent of Licensor or its Affiliates for any + purpose. For the purposes of this agreement, "Affiliate" means + (i) any corporation or any other legal entity that owns, directly + or indirectly, more than fifty percent (50%) of the shares, equity + interest or other securities of any entity entitled to vote for + election of directors (or other managing authority), or (ii) any + corporation or any other legal entity fifty percent (50%) or more + of whose shares, equity interest, or other securities entitled to + vote for election of directors (or other managing authority) is + owned or controlled by an entity, either directly or indirectly. + + 4. Indemnity + + a. You agree to indemnify and hold harmless Licensor, Google, and + their officers, directors, customers, employees and successors and + assigns (each an "Indemnified Party") against any and all claims, + demands, causes of action, losses, liabilities, damages, costs and + expenses, incurred by the Indemnified Party (including but not + limited to costs of defense, investigation and reasonable + attorney's fees) arising out of, resulting from or related to + (i) any software, products, documentation, content, materials or + derivative works created or developed by You using the Software + which causes an infringement of any patent, copyright, trademark, + trade secret, or other property, publicity or privacy rights of any + third parties arising in any jurisdiction anywhere in the world, + (ii) the download, distribution, installation, storage, execution, + use or transfer of such software, products, documentation, content, + materials or derivative works by any person or entity, and/or + (iii) any breach of this Agreement by You. If requested by an + Indemnified Party, You agree to defend such Indemnified Party in + connection with any third party claims, demands, or causes of + action resulting from, arising out of or in connection with any of + the foregoing. + + 5. Limitation of Liability + + a. TO THE MAXIMUM EXTENT PERMITTED UNDER APPLICABLE LAWS, UNDER NO + CIRCUMSTANCES, INCLUDING WITHOUT LIMITATION NEGLIGENCE, SHALL + LICENSOR, GOOGLE, THEIR AFFILIATES AND/OR ITS DIRECTORS, OFFICERS, + EMPLOYEES OR AGENTS BE LIABLE FOR ANY INDIRECT, INCIDENTAL, + SPECIAL, PUNITIVE OR CONSEQUENTIAL DAMAGES (INCLUDING BUT NOT + LIMITED TO DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS + INTERRUPTION, LOSS OF BUSINESS INFORMATION AND THE LIKE) ARISING + OUT OF OR IN CONNECTION WITH THE SOFTWARE OR ANY DOWNLOAD, + INSTALLATION OR USE OF, OR INABILITY TO USE, THE SOFTWARE, EVEN IF + LICENSOR OR GOOGLE HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH + DAMAGES. SOME JURISDICTIONS DO NOT ALLOW THE LIMITATION OR + EXCLUSION OF LIABILITY FOR INCIDENTAL OR CONSEQUENTIAL DAMAGES SO + THE ABOVE LIMITATION OR EXCLUSION MAY NOT APPLY OR MAY BE LIMITED. + IN NO EVENT SHALL LICENSOR'S OR GOOGLE'S TOTAL AGGREGATE LIABILITY + TO YOU FOR ANY AND ALL DAMAGES, LOSSES, CLAIMS AND CAUSES OF + ACTIONS (WHETHER IN CONTRACT, TORT, INCLUDING NEGLIGENCE, + INDEMNIFICATION OR OTHERWISE) EXCEED ONE HUNDRED U.S. DOLLARS + (US$100). THE LIMITATIONS SET FORTH IN THIS PARAGRAPH SHALL BE + DEEMED TO APPLY TO THE MAXIMUM EXTENT PERMITTED BY APPLICABLE LAW. + THE PARTIES HAVE FULLY CONSIDERED THE FOREGOING ALLOCATION OF RISK + AND FIND IT REASONABLE, AND THAT THE FOREGOING LIMITATIONS IN THIS + PARAGRAPH ARE AN ESSENTIAL BASIS OF THE BARGAIN BETWEEN THE + PARTIES. + + 6. No Warranty + + a. LICENSOR AND GOOGLE MAKE NO WARRANTIES, EXPRESS OR IMPLIED, WITH + RESPECT TO THE SOFTWARE AND DOCUMENTATION PROVIDED UNDER THIS + AGREEMENT, INCLUDING BUT NOT LIMITED TO ANY WARRANTY OF + MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR AGAINST + INFRINGEMENT, OR ANY EXPRESS OR IMPLIED WARRANTY ARISING OUT OF + TRADE USAGE OR OUT OF A COURSE OF DEALING OR COURSE OF PERFORMANCE. + NOTHING CONTAINED IN THIS AGREEMENT SHALL BE CONSTRUED AS A + WARRANTY OR REPRESENTATION BY LICENSOR (I) AS TO THE VALIDITY OR + SCOPE OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT + AND (II) THAT ANY MANUFACTURE OR USE WILL BE FREE FROM INFRINGEMENT + OF PATENTS, COPYRIGHTS OR OTHER INTELLECTUAL PROPERTY RIGHTS OF + OTHERS, AND IT SHALL BE THE SOLE RESPONSIBILITY OF YOU TO MAKE SUCH + DETERMINATION AS IS NECESSARY WITH RESPECT TO THE ACQUISITION OF + LICENSES UNDER PATENTS AND OTHER INTELLECTUAL PROPERTY OF THIRD + PARTIES. LICENSOR AND GOOGLE SHALL NOT HAVE ANY OBLIGATION TO + PROVIDE ANY TECHNICAL SUPPORT OF THE SOFTWARE UNDER THIS AGREEMENT. + + 7. Term and Termination + + a. This Agreement shall be effective on the date You accept this + Agreement and shall remain in effect until terminated as provided + herein. You may terminate the Agreement at any time by deleting and + destroying all copies of the Software and all related information + in Your possession or control. This Agreement terminates + immediately and automatically, with or without notice, if You fail + to comply with any provision hereof. Additionally, Licensor may at + any time terminate this Agreement, without cause, upon notice to + You. Upon termination You must delete or destroy all copies of the + Software in Your possession, and the license granted to You in this + Agreement shall terminate. Sections 3, 4, 5, 6 and 8 shall survive + the termination of this Agreement. + + 8. Miscellaneous + + a. Governing Law. This Agreement is governed and interpreted in + accordance with the laws of the State of California without giving + effect to its conflict of laws provisions. The United Nations + Convention on Contracts for the International Sale of Goods is + expressly disclaimed and shall not apply. Any claim arising out of + or related to this Agreement must be brought exclusively in a + federal or state court located in Santa Clara County, California + and You consent to the jurisdiction and venue of such courts. + + b. Waiver and Severability. The failure of either party to require + performance by the other party of any provision of this Agreement + shall not affect the full right to require such performance at any + time thereafter; nor shall the waiver by either party of a breach + of any provision of this Agreement be taken or held to be a waiver + of the provision itself. Severability. If any provision of this + Agreement is unenforceable or invalid under any applicable law or + is so held by applicable court decision, such unenforceability or + invalidity shall not render this Agreement unenforceable or invalid + as a whole, and such provision shall be changed and interpreted so + as to best accomplish the objectives of such unenforceable or + invalid provision within the limits of applicable law or + applicable court decisions. + + c. Amendment and Modification. This Agreement and any of its terms and + provisions may only be amended, modified, supplemented or waived in + a writing signed by both parties hereto. + + d. Compliance with Laws. You shall comply with all applicable laws, + rules, and regulations in connection with its activities under this + Agreement. + + e. Entire Agreement. This Agreement completely and exclusively states + the agreement between You and Licensor regarding this subject + matter. diff --git a/self-extractors_bluejay/google_devices/staging/Android.bp.txt b/self-extractors_bluejay/google_devices/staging/Android.bp.txt new file mode 100644 index 0000000..a440353 --- /dev/null +++ b/self-extractors_bluejay/google_devices/staging/Android.bp.txt @@ -0,0 +1,54 @@ +// Copyright (C) 2021 The Android Open Source Project +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +soong_namespace { +} + +cc_prebuilt_library_shared { + name: "libmediaadaptor", + arch: { + arm: { + srcs: ["libmediaadaptor.so"], + shared_libs: [ + "libandroid_runtime", + "libbinder", + "libc++", + "liblog", + "libmedia", + "libnativehelper", + "libstagefright", + "libutils", + ], + }, + arm64: { + srcs: ["lib64/libmediaadaptor.so"], + shared_libs: [ + "libandroid_runtime", + "libbinder", + "libc++", + "liblog", + "libmedia", + "libnativehelper", + "libstagefright", + "libutils", + ], + }, + }, + compile_multilib: "both", + system_ext_specific: true, + strip: { + none: true, + }, +} + diff --git a/self-extractors_bluejay/google_devices/staging/Android.mk b/self-extractors_bluejay/google_devices/staging/Android.mk new file mode 100644 index 0000000..4bb909d --- /dev/null +++ b/self-extractors_bluejay/google_devices/staging/Android.mk @@ -0,0 +1,73 @@ +# +# Copyright (C) 2021 The Android Open-Source Project +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +LOCAL_PATH := $(call my-dir) + +ifneq ($(filter bluejay,$(TARGET_DEVICE)),) + $(call add-radio-file,bootloader.img) + $(call add-radio-file,radio.img) +endif + +ifneq ($(filter bluejay,$(TARGET_DEVICE)),) +include $(CLEAR_VARS) +LOCAL_MODULE_SUFFIX := $(COMMON_ANDROID_PACKAGE_SUFFIX) +LOCAL_MODULE := ShannonQualifiedNetworksService +LOCAL_MODULE_TAGS := optional +LOCAL_BUILT_MODULE_STEM := package.apk +LOCAL_SYSTEM_EXT_MODULE := true +LOCAL_PRIVILEGED_MODULE := true +LOCAL_MODULE_OWNER := samsung +LOCAL_MODULE_CLASS := APPS +LOCAL_SRC_FILES := $(LOCAL_MODULE).apk +LOCAL_CERTIFICATE := platform +LOCAL_LICENSE_KINDS := SPDX-license-identifier-Apache-2.0 +LOCAL_LICENSE_CONDITIONS := notice +LOCAL_NOTICE_FILE := $(LOCAL_PATH)/../COPYRIGHT $(LOCAL_PATH)/../LICENSE +include $(BUILD_PREBUILT) + +include $(CLEAR_VARS) +LOCAL_MODULE_SUFFIX := $(COMMON_ANDROID_PACKAGE_SUFFIX) +LOCAL_MODULE := ShannonIms +LOCAL_MODULE_TAGS := optional +LOCAL_BUILT_MODULE_STEM := package.apk +LOCAL_SYSTEM_EXT_MODULE := true +LOCAL_PRIVILEGED_MODULE := true +LOCAL_MODULE_OWNER := samsung +LOCAL_MODULE_CLASS := APPS +LOCAL_SRC_FILES := $(LOCAL_MODULE).apk +LOCAL_CERTIFICATE := platform +LOCAL_LICENSE_KINDS := SPDX-license-identifier-Apache-2.0 +LOCAL_LICENSE_CONDITIONS := notice +LOCAL_NOTICE_FILE := $(LOCAL_PATH)/../COPYRIGHT $(LOCAL_PATH)/../LICENSE +include $(BUILD_PREBUILT) + +include $(CLEAR_VARS) +LOCAL_MODULE_SUFFIX := $(COMMON_ANDROID_PACKAGE_SUFFIX) +LOCAL_MODULE := ShannonRcs +LOCAL_MODULE_TAGS := optional +LOCAL_BUILT_MODULE_STEM := package.apk +LOCAL_SYSTEM_EXT_MODULE := true +LOCAL_PRIVILEGED_MODULE := true +LOCAL_MODULE_OWNER := samsung +LOCAL_MODULE_CLASS := APPS +LOCAL_SRC_FILES := $(LOCAL_MODULE).apk +LOCAL_CERTIFICATE := platform +LOCAL_LICENSE_KINDS := SPDX-license-identifier-Apache-2.0 +LOCAL_LICENSE_CONDITIONS := notice +LOCAL_NOTICE_FILE := $(LOCAL_PATH)/../COPYRIGHT $(LOCAL_PATH)/../LICENSE +include $(BUILD_PREBUILT) + +endif diff --git a/self-extractors_bluejay/google_devices/staging/BoardConfigPartial.mk b/self-extractors_bluejay/google_devices/staging/BoardConfigPartial.mk new file mode 100644 index 0000000..bc64c4b --- /dev/null +++ b/self-extractors_bluejay/google_devices/staging/BoardConfigPartial.mk @@ -0,0 +1,37 @@ +# Copyright 2021 The Android Open Source Project +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +BOARD_PREBUILT_VENDORIMAGE := vendor/google_devices/bluejay/proprietary/vendor.img + +BOARD_PREBUILT_VENDOR_DLKMIMAGE := vendor/google_devices/bluejay/proprietary/vendor_dlkm.img + +TARGET_COPY_OUT_VENDOR_DLKM := vendor_dlkm + +BOARD_AVB_VBMETA_VENDOR := vendor +BOARD_AVB_VBMETA_VENDOR_KEY_PATH := external/avb/test/data/testkey_rsa2048.pem +BOARD_AVB_VBMETA_VENDOR_ALGORITHM := SHA256_RSA2048 +BOARD_AVB_VBMETA_VENDOR_ROLLBACK_INDEX := $(PLATFORM_SECURITY_PATCH_TIMESTAMP) +BOARD_AVB_VBMETA_VENDOR_ROLLBACK_INDEX_LOCATION := 3 + +AB_OTA_PARTITIONS += \ + vbmeta_vendor \ + vendor \ + vendor_dlkm \ + +-include vendor/google/tools/android-info.mk +ifdef USE_ANDROID_INFO + TARGET_BOARD_INFO_FILE := vendor/google_devices/bluejay/android-info.txt +endif + +VENDOR_BLOBS_LICENSE := vendor/google_devices/bluejay/LICENSE diff --git a/self-extractors_bluejay/google_devices/staging/device-partial.mk b/self-extractors_bluejay/google_devices/staging/device-partial.mk new file mode 100644 index 0000000..c820eb8 --- /dev/null +++ b/self-extractors_bluejay/google_devices/staging/device-partial.mk @@ -0,0 +1,34 @@ +# Copyright 2021 The Android Open Source Project +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +PRODUCT_SOONG_NAMESPACES += \ + vendor/google_devices/bluejay/proprietary \ + +# AOSP packages required by the blobs +PRODUCT_PACKAGES := \ + ShannonQualifiedNetworksService \ + ShannonIms \ + ShannonRcs \ + +PRODUCT_PACKAGES += \ + libmediaadaptor \ + +# blob(s) necessary for bluejay hardware +PRODUCT_COPY_FILES := \ + vendor/google_devices/bluejay/proprietary/com.shannon.imsservice.xml:system_ext/etc/permissions/com.shannon.imsservice.xml:samsung \ + vendor/google_devices/bluejay/proprietary/com.shannon.qualifiednetworksservice.xml:system_ext/etc/permissions/com.shannon.qualifiednetworksservice.xml:samsung \ + vendor/google_devices/bluejay/proprietary/com.shannon.rcsservice.xml:system_ext/etc/permissions/com.shannon.rcsservice.xml:samsung \ + vendor/google_devices/bluejay/proprietary/oemrilhook.xml:system_ext/etc/permissions/oemrilhook.xml:samsung \ + vendor/google_devices/bluejay/proprietary/oemrilhook.jar:system_ext/framework/oemrilhook.jar:samsung \ + diff --git a/self-extractors_bluejay/root/android-info.txt b/self-extractors_bluejay/root/android-info.txt new file mode 100644 index 0000000..147373d --- /dev/null +++ b/self-extractors_bluejay/root/android-info.txt @@ -0,0 +1,6 @@ +require board=bluejay +require version-bootloader=bluejay-1.1-7933863 + + + +require version-baseband=g5123b-91479-210917-B-7742460 diff --git a/self-extractors_bluejay/root/proprietary/BoardConfigVendor.mk b/self-extractors_bluejay/root/proprietary/BoardConfigVendor.mk new file mode 100644 index 0000000..8961a85 --- /dev/null +++ b/self-extractors_bluejay/root/proprietary/BoardConfigVendor.mk @@ -0,0 +1,17 @@ +# Copyright 2021 The Android Open Source Project +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +LOCAL_STEM := bluejay/BoardConfigPartial.mk + +-include vendor/google_devices/$(LOCAL_STEM) diff --git a/self-extractors_bluejay/root/proprietary/device-vendor.mk b/self-extractors_bluejay/root/proprietary/device-vendor.mk new file mode 100644 index 0000000..4a50075 --- /dev/null +++ b/self-extractors_bluejay/root/proprietary/device-vendor.mk @@ -0,0 +1,17 @@ +# Copyright 2021 The Android Open Source Project +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +LOCAL_STEM := bluejay/device-partial.mk + +$(call inherit-product-if-exists, vendor/google_devices/$(LOCAL_STEM)) diff --git a/thermal_info_config_bluejay.json b/thermal_info_config_bluejay.json new file mode 100644 index 0000000..7e7641c --- /dev/null +++ b/thermal_info_config_bluejay.json @@ -0,0 +1,980 @@ +{ + "Sensors":[ + { + "Name":"neutral_therm", + "Type":"UNKNOWN", + "HotThreshold":[ + "NAN", + "33.0", + "NAN", + "NAN", + "NAN", + "NAN", + "NAN" + ], + "HotHysteresis":[ + 0.0, + 0.9, + 0.0, + 0.0, + 0.0, + 0.0, + 0.0 + ], + "TempPath":"/dev/thermal/tz-by-name/neutral_therm/adc_channel/channel_temp", + "VrThreshold":"NAN", + "Multiplier":0.001, + "PollingDelay":60000, + "PassiveDelay":7000 + }, + { + "Name":"skin_therm1", + "Type":"UNKNOWN", + "HotThreshold":[ + "NAN", + "NAN", + "NAN", + "NAN", + "NAN", + "NAN", + "NAN" + ], + "TempPath":"/dev/thermal/tz-by-name/skin_therm1/adc_channel/channel_temp", + "VrThreshold":"NAN", + "Multiplier":0.001 + }, + { + "Name":"skin_therm2", + "Type":"UNKNOWN", + "HotThreshold":[ + "NAN", + "NAN", + "NAN", + "NAN", + "NAN", + "NAN", + "NAN" + ], + "TempPath":"/dev/thermal/tz-by-name/skin_therm2/adc_channel/channel_temp", + "VrThreshold":"NAN", + "Multiplier":0.001 + }, + { + "Name":"disp_therm", + "Type":"UNKNOWN", + "HotThreshold":[ + "NAN", + "NAN", + "NAN", + "NAN", + "NAN", + "NAN", + "NAN" + ], + "TempPath":"/dev/thermal/tz-by-name/disp_therm/adc_channel/channel_temp", + "VrThreshold":"NAN", + "Multiplier":0.001 + }, + { + "Name":"gnss_tcxo_therm", + "Type":"UNKNOWN", + "HotThreshold":[ + "NAN", + "NAN", + "NAN", + "NAN", + "NAN", + "NAN", + "NAN" + ], + "TempPath":"/dev/thermal/tz-by-name/gnss_tcxo_therm/adc_channel/channel_temp", + "VrThreshold":"NAN", + "Multiplier":0.001 + }, + { + "Name":"usb_pwr_therm2", + "Type":"UNKNOWN", + "HotThreshold":[ + "NAN", + "39.0", + "NAN", + "NAN", + "NAN", + "NAN", + "NAN" + ], + "HotHysteresis":[ + "0.0", + "0.9", + "0.0", + "0.0", + "0.0", + "0.0", + "0.0" + ], + "TempPath":"/dev/thermal/tz-by-name/usb_pwr_therm2/adc_channel/channel_temp", + "VrThreshold":"NAN", + "Multiplier":0.001 + }, + { + "Name":"charger_skin_therm", + "Type":"UNKNOWN", + "HotThreshold":[ + "NAN", + "NAN", + "NAN", + "NAN", + "NAN", + "NAN", + "NAN" + ], + "TempPath":"/dev/thermal/tz-by-name/charger_skin_therm/adc_channel/channel_temp", + "VrThreshold":"NAN", + "Multiplier":0.001 + }, + { + "Name":"VIRTUAL-NEUTRAL-SKIN2", + "Type":"UNKNOWN", + "VirtualSensor":true, + "Formula":"WEIGHTED_AVG", + "Combination":[ + "neutral_therm", + "skin_therm2" + ], + "Coefficient":[ + "0.62", + "0.38" + ], + "HotThreshold":[ + "NAN", + "NAN", + "NAN", + "NAN", + "NAN", + "NAN", + "NAN" + ], + "VrThreshold":"NAN", + "Multiplier":0.001 + }, + { + "Name":"VIRTUAL-NEUTRAL", + "Type":"UNKNOWN", + "VirtualSensor":true, + "Formula":"WEIGHTED_AVG", + "Combination":[ + "neutral_therm", + "skin_therm1", + "disp_therm", + "skin_therm2", + "gnss_tcxo_therm" + ], + "Coefficient":[ + "0.35", + "0.2", + "0.1", + "0.15", + "0.2" + ], + "HotThreshold":[ + "NAN", + "NAN", + "NAN", + "NAN", + "NAN", + "NAN", + "NAN" + ], + "VrThreshold":"NAN", + "Multiplier":0.001 + }, + { + "Name":"VIRTUAL-SKIN", + "Type":"SKIN", + "VirtualSensor":true, + "TriggerSensor":"neutral_therm", + "Formula":"MAXIMUM", + "Combination":[ + "VIRTUAL-NEUTRAL-SKIN2", + "VIRTUAL-NEUTRAL" + ], + "Coefficient":[ + "1.0", + "1.0" + ], + "HotThreshold":[ + "NAN", + "39.0", + "43.0", + "45.0", + "47.0", + "52.0", + "55.0" + ], + "HotHysteresis":[ + "0.0", + "1.9", + "1.9", + "1.9", + "1.9", + "1.9", + "1.9" + ], + "VrThreshold":"NAN", + "Multiplier":0.001, + "SendPowerHint":true, + "Monitor":true, + "PollingDelay":300000, + "PassiveDelay":7000, + "PIDInfo": { + "K_Po":["NAN", "NAN", 1500, 1500, "NAN", "NAN", "NAN"], + "K_Pu":["NAN", "NAN", 1500, 750, "NAN", "NAN", "NAN"], + "K_I":["NAN", "NAN", 20, 0, "NAN", "NAN", "NAN"], + "K_D":["NAN", "NAN", 10, 0, "NAN", "NAN", "NAN"], + "I_Max":["NAN", "NAN", 1000, 0, "NAN", "NAN", "NAN"], + "S_Power":["NAN", "NAN", 3500, 1500, "NAN", "NAN", "NAN"], + "MinAllocPower":["NAN", "NAN", 2500, 1500, "NAN", "NAN", "NAN"], + "MaxAllocPower":["NAN", "NAN", 9500, 3000, "NAN", "NAN", "NAN"], + "I_Cutoff":["NAN", "NAN", 2, 0, "NAN", "NAN", "NAN"] + }, + "BindedCdevInfo": [ + { + "CdevRequest": "thermal-cpufreq-0", + "CdevWeightForPID": [0.085, 0.085, 0.085, 0.085, 0.085, 0.085, 0.085], + "CdevCeiling": [3, 3, 6, 7, 8, 10, 10], + "LimitInfo": [0, 0, 0, 0, 8, 10, 10], + "BindedPowerRail": "S4M_VDD_CPUCL0", + "PowerThreshold": [200, 200, 200, 200, 50, 0, 0], + "ReleaseLogic": "DECREASE" + }, + { + "CdevRequest": "thermal-cpufreq-1", + "CdevWeightForPID": [0.08, 0.08, 0.08, 0.08, 0.08, 0.08, 0.08], + "CdevCeiling": [7, 7, 8, 9, 11, 13, 13], + "LimitInfo": [0, 0, 0, 0, 11, 13, 13], + "BindedPowerRail": "S3M_VDD_CPUCL1", + "PowerThreshold": [200, 200, 200, 200, 50, 0, 0], + "ReleaseLogic": "DECREASE" + }, + { + "CdevRequest": "thermal-cpufreq-2", + "CdevWeightForPID": [0.38, 0.38, 0.38, 0.38, 0.38, 0.38, 0.38], + "CdevCeiling": [11, 11, 14, 14, 14, 16, 16], + "LimitInfo": [0, 0, 0, 0, 14, 16, 16], + "BindedPowerRail": "S2M_VDD_CPUCL2", + "PowerThreshold": [200, 200, 200, 200, 50, 0, 0], + "ReleaseLogic": "DECREASE" + }, + { + "CdevRequest": "thermal-gpufreq-0", + "CdevWeightForPID": [0.455, 0.455, 0.455, 0.455, 0.455, 0.455, 0.455], + "CdevCeiling": [7, 7, 8, 9, 10, 11, 11], + "LimitInfo": [0, 0, 0, 0, 10, 11, 11], + "BindedPowerRail": "S2S_VDD_G3D", + "PowerThreshold": [200, 200, 200, 200, 50, 0, 0], + "ReleaseLogic": "DECREASE" + }, + { + "CdevRequest": "tpu_cooling", + "LimitInfo": [0, 2, 3, 4, 5, 5, 5] + } + ] + }, + { + "Name":"VIRTUAL-SKIN-CHARGE", + "Type":"UNKNOWN", + "VirtualSensor":true, + "TriggerSensor":"neutral_therm", + "Formula":"MAXIMUM", + "Combination":[ + "VIRTUAL-NEUTRAL-SKIN2", + "VIRTUAL-NEUTRAL" + ], + "Coefficient":[ + "1.0", + "1.0" + ], + "HotThreshold":[ + "NAN", + "39.0", + "41.0", + "43.0", + "45.0", + "47.0", + "55.0" + ], + "HotHysteresis":[ + 0.0, + 1.9, + 1.9, + 1.9, + 1.9, + 1.9, + 1.9 + ], + "VrThreshold":"NAN", + "Multiplier":0.001, + "Monitor":true, + "PollingDelay":300000, + "PassiveDelay":7000, + "BindedCdevInfo": [ + { + "CdevRequest": "fcc", + "LimitInfo": [0, 4, 6, 6, 8, 8, 8], + "BindedPowerRail": "POWER_FOR_CHARGING_THROTTLING", + "PowerThreshold": [500, 500, 500, 500, 500, 0, 0], + "CdevFloorWithPowerLink": [0, 0, 3, 6, 6 ,8 ,8], + "ReleaseLogic": "RELEASE_TO_FLOOR", + "ThrottlingWithPowerLink":true + } + ] + }, + { + "Name":"cellular-emergency", + "Type":"POWER_AMPLIFIER", + "VirtualSensor":true, + "TriggerSensor":"neutral_therm", + "Formula":"MAXIMUM", + "Combination":[ + "VIRTUAL-NEUTRAL-SKIN2", + "VIRTUAL-NEUTRAL" + ], + "Coefficient":[ + "1.0", + "1.0" + ], + "HotThreshold":[ + "NAN", + "NAN", + "NAN", + "NAN", + "NAN", + "54", + "NAN" + ], + "HotHysteresis":[ + "0.0", + "0.0", + "0.0", + "0.0", + "0.0", + "1.9", + "0.0" + ], + "VrThreshold":"NAN", + "Multiplier":0.001, + "Monitor":true, + "PollingDelay":300000, + "PassiveDelay":7000 + }, + { + "Name":"USB2-MINUS-CHG", + "Type":"UNKNOWN", + "VirtualSensor":true, + "Formula":"WEIGHTED_AVG", + "Combination":[ + "usb_pwr_therm2", + "charger_skin_therm" + ], + "Coefficient":[ + "1.0", + "-1.0" + ], + "HotThreshold":[ + "NAN", + "NAN", + "NAN", + "NAN", + "NAN", + "NAN", + "NAN" + ], + "VrThreshold":"NAN", + "Multiplier":0.001 + }, + { + "Name":"VIRTUAL-USB-THROTTLING", + "Type":"USB_PORT", + "VirtualSensor":true, + "Formula":"COUNT_THRESHOLD", + "TriggerSensor":"usb_pwr_therm2", + "Combination":[ + "usb_pwr_therm2", + "USB2-MINUS-CHG" + ], + "Coefficient":[ + "39000", + "7000" + ], + "HotThreshold":[ + "NAN", + "NAN", + "NAN", + "NAN", + "2.0", + "NAN", + "NAN" + ], + "BindedCdevInfo":[ + { + "CdevRequest": "usbc-port", + "LimitInfo": [0, 0, 0, 0, 1, 1, 1] + } + ], + "VrThreshold":"NAN", + "Multiplier":1, + "PollingDelay":60000, + "PassiveDelay":7000 + }, + { + "Name":"VIRTUAL-USB-UI", + "Type":"USB_PORT", + "VirtualSensor":true, + "Formula":"COUNT_THRESHOLD", + "TriggerSensor":"usb_pwr_therm2", + "Combination":[ + "usb_pwr_therm2", + "USB2-MINUS-CHG" + ], + "Coefficient":[ + "39000", + "10000" + ], + "HotThreshold":[ + "NAN", + "NAN", + "NAN", + "NAN", + "NAN", + "2.0", + "NAN" + ], + "VrThreshold":"NAN", + "Multiplier":1, + "Monitor":true, + "PollingDelay":60000, + "PassiveDelay":7000 + }, + { + "Name":"battery_cycle", + "Type":"BCL_VOLTAGE", + "HotThreshold":[ + "NAN", + "NAN", + "NAN", + "NAN", + "NAN", + "NAN", + "NAN" + ], + "VrThreshold":"NAN", + "Multiplier":1, + "Monitor":false + }, + { + "Name":"battery", + "Type":"BATTERY", + "HotThreshold":[ + "NAN", + "NAN", + "NAN", + "NAN", + "NAN", + "NAN", + "NAN" + ], + "VrThreshold":"NAN", + "Multiplier":0.001, + "Monitor":false + }, + { + "Name":"critical-battery-cell", + "Type":"BCL_VOLTAGE", + "VirtualSensor":true, + "Formula":"COUNT_THRESHOLD", + "TriggerSensor": "vdroop1", + "Combination":[ + "battery", + "battery_cycle", + "vdroop1" + ], + "Coefficient":[ + "-10000", + "400", + "1200" + ], + "HotThreshold":[ + "NAN", + "NAN", + "NAN", + "NAN", + "NAN", + 3.00, + "NAN" + ], + "VrThreshold":"NAN", + "Multiplier":1, + "Monitor":true + }, + { + "Name":"FLASH_LED_REDUCE", + "Type":"UNKNOWN", + "VirtualSensor":true, + "Formula":"COUNT_THRESHOLD", + "TriggerSensor": "vdroop1", + "Combination":[ + "battery", + "battery_cycle", + "vdroop1" + ], + "Coefficient":[ + "-10000", + "400", + "1200" + ], + "HotThreshold":[ + "NAN", + "NAN", + "NAN", + "NAN", + 3.00, + "NAN", + "NAN" + ], + "VrThreshold":"NAN", + "Multiplier":1, + "Monitor":true, + "SendPowerHint":true + }, + { + "Name":"soc", + "Type":"BCL_PERCENTAGE", + "HotThreshold":[ + "NAN", + "NAN", + "NAN", + 90, + 93, + 96, + "NAN" + ], + "VrThreshold":"NAN", + "Multiplier":1, + "Monitor":true + }, + { + "Name":"batoilo", + "Type":"BCL_CURRENT", + "HotThreshold":[ + "NAN", + "NAN", + "NAN", + "NAN", + 5000, + "NAN", + "NAN" + ], + "HotHysteresis":[ + 0.0, + 0.0, + 0.0, + 0.0, + 100, + 0.0, + 0.0 + ], + "VrThreshold":"NAN", + "Multiplier":1, + "Monitor":true + }, + { + "Name":"vdroop1", + "Type":"BCL_VOLTAGE", + "HotThreshold":[ + "NAN", + "NAN", + "NAN", + "NAN", + 1150, + "NAN", + "NAN" + ], + "HotHysteresis":[ + 0.0, + 0.0, + 0.0, + 0.0, + 100, + 0.0, + 0.0 + ], + "VrThreshold":"NAN", + "Multiplier":1, + "Monitor":true + }, + { + "Name":"vdroop2", + "Type":"BCL_VOLTAGE", + "HotThreshold":[ + "NAN", + "NAN", + "NAN", + "NAN", + 1350, + "NAN", + "NAN" + ], + "HotHysteresis":[ + 0.0, + 0.0, + 0.0, + 0.0, + 100, + 0.0, + 0.0 + ], + "VrThreshold":"NAN", + "Multiplier":1, + "Monitor":true + }, + { + "Name":"smpl_gm", + "Type":"BCL_VOLTAGE", + "HotThreshold":[ + "NAN", + "NAN", + "NAN", + "NAN", + 1400, + "NAN", + "NAN" + ], + "HotHysteresis":[ + 0.0, + 0.0, + 0.0, + 0.0, + 100, + 0.0, + 0.0 + ], + "VrThreshold":"NAN", + "Multiplier":1, + "Monitor":true + }, + { + "Name":"ocp_cpu1", + "Type":"BCL_CURRENT", + "HotThreshold":[ + "NAN", + "NAN", + "NAN", + "NAN", + 7000, + "NAN", + "NAN" + ], + "HotHysteresis":[ + 0.0, + 0.0, + 0.0, + 0.0, + 100, + 0.0, + 0.0 + ], + "VrThreshold":"NAN", + "Multiplier":1, + "Monitor":true + }, + { + "Name":"ocp_cpu2", + "Type":"BCL_CURRENT", + "HotThreshold":[ + "NAN", + "NAN", + "NAN", + "NAN", + 12000, + "NAN", + "NAN" + ], + "HotHysteresis":[ + 0.0, + 0.0, + 0.0, + 0.0, + 100, + 0.0, + 0.0 + ], + "VrThreshold":"NAN", + "Multiplier":1, + "Monitor":true + }, + { + "Name":"ocp_tpu", + "Type":"BCL_CURRENT", + "HotThreshold":[ + "NAN", + "NAN", + "NAN", + "NAN", + 10500, + "NAN", + "NAN" + ], + "HotHysteresis":[ + 0.0, + 0.0, + 0.0, + 0.0, + 100, + 0.0, + 0.0 + ], + "VrThreshold":"NAN", + "Multiplier":1, + "Monitor":true + }, + { + "Name":"ocp_gpu", + "Type":"BCL_CURRENT", + "HotThreshold":[ + "NAN", + "NAN", + "NAN", + "NAN", + 12000, + "NAN", + "NAN" + ], + "HotHysteresis":[ + 0.0, + 0.0, + 0.0, + 0.0, + 100, + 0.0, + 0.0 + ], + "VrThreshold":"NAN", + "Multiplier":1, + "Monitor":true + }, + { + "Name":"soft_ocp_cpu2", + "Type":"BCL_CURRENT", + "HotThreshold":[ + "NAN", + "NAN", + "NAN", + "NAN", + 9000, + "NAN", + "NAN" + ], + "HotHysteresis":[ + 0.0, + 0.0, + 0.0, + 0.0, + 100, + 0.0, + 0.0 + ], + "VrThreshold":"NAN", + "Multiplier":1, + "Monitor":true + }, + { + "Name":"soft_ocp_cpu1", + "Type":"BCL_CURRENT", + "HotThreshold":[ + "NAN", + "NAN", + "NAN", + "NAN", + 7000, + "NAN", + "NAN" + ], + "HotHysteresis":[ + 0.0, + 0.0, + 0.0, + 0.0, + 100, + 0.0, + 0.0 + ], + "VrThreshold":"NAN", + "Multiplier":1, + "Monitor":true + }, + { + "Name":"soft_ocp_tpu", + "Type":"BCL_CURRENT", + "HotThreshold":[ + "NAN", + "NAN", + "NAN", + "NAN", + 8500, + "NAN", + "NAN" + ], + "HotHysteresis":[ + 0.0, + 0.0, + 0.0, + 0.0, + 100, + 0.0, + 0.0 + ], + "VrThreshold":"NAN", + "Multiplier":1, + "Monitor":true + }, + { + "Name":"soft_ocp_gpu", + "Type":"BCL_CURRENT", + "HotThreshold":[ + "NAN", + "NAN", + "NAN", + "NAN", + 9000, + "NAN", + "NAN" + ], + "HotHysteresis":[ + 0.0, + 0.0, + 0.0, + 0.0, + 100, + 0.0, + 0.0 + ], + "VrThreshold":"NAN", + "Multiplier":1, + "Monitor":true + }, + { + "Name":"TPU", + "Type":"NPU", + "HotThreshold":[ + "NAN", + "NAN", + "NAN", + "NAN", + "NAN", + "NAN", + 115.0 + ], + "VrThreshold":"NAN", + "Multiplier":0.001 + } + ], + "CoolingDevices":[ + { + "Name":"thermal-cpufreq-0", + "Type":"CPU", + "WritePath":"/dev/thermal/cdev-by-name/thermal-cpufreq-0/user_vote", + "State2Power":["436", "372", "320", "248", "224", "188", "164", "120", "80", "60", "24"], + "PowerRail":"S4M_VDD_CPUCL0" + }, + { + "Name":"thermal-cpufreq-1", + "Type":"CPU", + "WritePath":"/dev/thermal/cdev-by-name/thermal-cpufreq-1/user_vote", + "State2Power":["1260", "1074", "904", "730", "594", "476", "374", "314", "240", "200", "162", "130", "94", "60"], + "PowerRail":"S3M_VDD_CPUCL1" + }, + { + "Name":"thermal-cpufreq-2", + "Type":"CPU", + "WritePath":"/dev/thermal/cdev-by-name/thermal-cpufreq-2/user_vote", + "State2Power":["4406", "3874", "3500", "3052", "2704", "2334", "2176", "1864", "1492", "1362", "1116", "908", "756", "594", "478", "388", "178"], + "PowerRail":"S2M_VDD_CPUCL2" + }, + { + "Name":"thermal-gpufreq-0", + "Type":"GPU", + "WritePath":"/dev/thermal/cdev-by-name/thermal-gpufreq-0/user_vote", + "State2Power":["4599", "3727", "3259", "2378", "2044", "1813", "1449", "1223", "1007", "804", "633", "452"], + "PowerRail":"S2S_VDD_G3D" + }, + { + "Name":"tpu_cooling", + "Type":"NPU", + "WritePath":"/dev/thermal/cdev-by-name/tpu_cooling/user_vote" + }, + { + "Name":"fcc", + "Type":"BATTERY" + }, + { + "Name":"usbc-port", + "Type":"BATTERY" + } + ], + "PowerRails":[ + { + "Name":"VSYS_PWR_DISPLAY" + }, + { + "Name":"S2M_VDD_CPUCL2", + "PowerSampleDelay":14000, + "PowerSampleCount":5 + }, + { + "Name":"S3M_VDD_CPUCL1", + "PowerSampleDelay":14000, + "PowerSampleCount":5 + }, + { + "Name":"S4M_VDD_CPUCL0", + "PowerSampleDelay":14000, + "PowerSampleCount":5 + }, + { + "Name":"S2S_VDD_G3D", + "PowerSampleDelay":14000, + "PowerSampleCount":5 + }, + { + "Name":"S5M_VDD_INT" + }, + { + "Name":"S1M_VDD_MIF" + }, + { + "Name":"POWER_FOR_CHARGING_THROTTLING", + "VirtualRails":true, + "Formula":"WEIGHTED_AVG", + "Combination":[ + "VSYS_PWR_DISPLAY", + "S2M_VDD_CPUCL2", + "S3M_VDD_CPUCL1", + "S4M_VDD_CPUCL0", + "S5M_VDD_INT", + "S1M_VDD_MIF", + "S2S_VDD_G3D" + ], + "Coefficient":[ + "1.0", + "1.0", + "1.0", + "1.0", + "1.0", + "1.0", + "1.0" + ], + "PowerSampleDelay":14000, + "PowerSampleCount":5 + } + ] +}