Snap for 11753769 from 36fa0f3094
to 24Q3-release
Change-Id: I28f2739d152ccbaef33bde3a4c157d03f174f1c2
This commit is contained in:
commit
10fb18c478
44 changed files with 2387 additions and 2341 deletions
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@ -71,8 +71,6 @@
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||||||
<ctl name="R ASPTX4 Slot Position" value="7" />
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<ctl name="R ASPTX4 Slot Position" value="7" />
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||||||
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||||||
<!-- Cirrus Booster Amp DRE and VBST config-->
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<!-- Cirrus Booster Amp DRE and VBST config-->
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||||||
<ctl name="VBSTMON Output Switch" value="1" />
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||||||
<ctl name="R VBSTMON Output Switch" value="1" />
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||||||
<ctl name="DRE DRE Switch" value="1" />
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<ctl name="DRE DRE Switch" value="1" />
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||||||
<ctl name="R DRE DRE Switch" value="1" />
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<ctl name="R DRE DRE Switch" value="1" />
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||||||
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||||||
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@ -144,7 +142,6 @@
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||||||
<ctl name="TDM_1_RX Mixer EP5" value="0" />
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<ctl name="TDM_1_RX Mixer EP5" value="0" />
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||||||
<ctl name="TDM_1_RX Mixer EP6" value="0" />
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<ctl name="TDM_1_RX Mixer EP6" value="0" />
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||||||
<ctl name="TDM_1_RX Mixer EP7" value="0" />
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<ctl name="TDM_1_RX Mixer EP7" value="0" />
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||||||
<ctl name="TDM_1_RX Mixer EP8" value="0" />
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||||||
<ctl name="TDM_1_RX Mixer NoHost1" value="0" />
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<ctl name="TDM_1_RX Mixer NoHost1" value="0" />
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||||||
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<ctl name="USB_RX Mixer EP1" value="0" />
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<ctl name="USB_RX Mixer EP1" value="0" />
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@ -1226,53 +1223,9 @@
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<ctl name="NoHost1 TX Mixer TDM_0_TX" value="1" />
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<ctl name="NoHost1 TX Mixer TDM_0_TX" value="1" />
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</path>
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</path>
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<path name="telephony-rx (VOICE_DOWNLINK) -> in-call-capture-0">
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<path name="in-call-capture-source-0 -> in-call-capture-0" />
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<ctl name="Incall Capture Stream0" value="DL" />
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<path name="in-call-capture-source-1 -> in-call-capture-1" />
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</path>
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<path name="in-call-capture-source-2 -> in-call-capture-2" />
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<path name="telephony-rx (VOICE_UPLINK) -> in-call-capture-0">
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<ctl name="Incall Capture Stream0" value="UL" />
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</path>
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<path name="telephony-rx (VOICE_CALL) -> in-call-capture-0">
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<ctl name="Incall Capture Stream0" value="UL_DL" />
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</path>
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<path name="telephony-rx -> in-call-capture-0">
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<ctl name="Incall Capture Stream0" value="DL" />
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</path>
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<path name="telephony-rx (VOICE_DOWNLINK) -> in-call-capture-1">
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<ctl name="Incall Capture Stream1" value="DL" />
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</path>
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<path name="telephony-rx (VOICE_UPLINK) -> in-call-capture-1">
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<ctl name="Incall Capture Stream1" value="UL" />
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</path>
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<path name="telephony-rx (VOICE_CALL) -> in-call-capture-1">
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<ctl name="Incall Capture Stream1" value="UL_DL" />
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</path>
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<path name="telephony-rx -> in-call-capture-1">
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<ctl name="Incall Capture Stream1" value="DL" />
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</path>
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<path name="telephony-rx (VOICE_DOWNLINK) -> in-call-capture-2">
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<ctl name="Incall Capture Stream2" value="DL" />
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</path>
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<path name="telephony-rx (VOICE_UPLINK) -> in-call-capture-2">
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<ctl name="Incall Capture Stream2" value="UL" />
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</path>
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<path name="telephony-rx (VOICE_CALL) -> in-call-capture-2">
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<ctl name="Incall Capture Stream2" value="UL_DL" />
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</path>
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<path name="telephony-rx -> in-call-capture-2">
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<ctl name="Incall Capture Stream2" value="DL" />
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</path>
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||||||
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<!-- codec setting -->
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<!-- codec setting -->
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||||||
<!-- Rx device -->
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<!-- Rx device -->
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||||||
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@ -1419,6 +1372,54 @@
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||||||
<path name="usb-microphones" />
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<path name="usb-microphones" />
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||||||
</path>
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</path>
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<path name="in-call-capture-source-0 (VOICE_DOWNLINK)">
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<ctl name="Incall Capture Stream0" value="DL" />
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</path>
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||||||
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||||||
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<path name="in-call-capture-source-0 (VOICE_UPLINK)">
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||||||
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<ctl name="Incall Capture Stream0" value="UL" />
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</path>
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||||||
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||||||
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<path name="in-call-capture-source-0 (VOICE_CALL)">
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<ctl name="Incall Capture Stream0" value="UL_DL" />
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</path>
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||||||
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<path name="in-call-capture-source-0">
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<path name="in-call-capture-source-0 (VOICE_DOWNLINK)" />
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</path>
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<path name="in-call-capture-source-1 (VOICE_DOWNLINK)">
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<ctl name="Incall Capture Stream1" value="DL" />
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</path>
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||||||
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||||||
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<path name="in-call-capture-source-1 (VOICE_UPLINK)">
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<ctl name="Incall Capture Stream1" value="UL" />
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</path>
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<path name="in-call-capture-source-1 (VOICE_CALL)">
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<ctl name="Incall Capture Stream1" value="UL_DL" />
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</path>
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<path name="in-call-capture-source-1">
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<path name="in-call-capture-source-1 (VOICE_DOWNLINK)" />
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</path>
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<path name="in-call-capture-source-2 (VOICE_DOWNLINK)">
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<ctl name="Incall Capture Stream2" value="DL" />
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</path>
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||||||
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<path name="in-call-capture-source-2 (VOICE_UPLINK)">
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||||||
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<ctl name="Incall Capture Stream2" value="UL" />
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||||||
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</path>
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||||||
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<path name="in-call-capture-source-2 (VOICE_CALL)">
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||||||
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<ctl name="Incall Capture Stream2" value="UL_DL" />
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</path>
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||||||
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<path name="in-call-capture-source-2">
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<path name="in-call-capture-source-2 (VOICE_DOWNLINK)" />
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||||||
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</path>
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||||||
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||||||
<!-- cs35l41 specific path to load firmware in cs35l41.c -->
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<!-- cs35l41 specific path to load firmware in cs35l41.c -->
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||||||
<path name="cs35l41-load-protection-firmware-start">
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<path name="cs35l41-load-protection-firmware-start">
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||||||
<!-- Enable it after get the protection firmware -->
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<!-- Enable it after get the protection firmware -->
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||||||
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@ -3,7 +3,7 @@
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||||||
#EXPORT_FLAG BLUETOOTH
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#EXPORT_FLAG BLUETOOTH
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#PARAM_MODE FULL
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#PARAM_MODE FULL
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||||||
#SAVE_MODE 3
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#SAVE_MODE 3
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||||||
#SAVE_TIME 2024-04-12 17:06:15
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#SAVE_TIME 2024-04-19 15:21:57
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||||||
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||||||
#CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-NB
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#CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-NB
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||||||
#PARAM_TYPE TX+2RX
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#PARAM_TYPE TX+2RX
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Binary file not shown.
File diff suppressed because it is too large
Load diff
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@ -3,7 +3,7 @@
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#EXPORT_FLAG HANDSFREE
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#EXPORT_FLAG HANDSFREE
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#PARAM_MODE FULL
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#PARAM_MODE FULL
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||||||
#SAVE_MODE 3
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#SAVE_MODE 3
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||||||
#SAVE_TIME 2024-04-12 17:05:10
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#SAVE_TIME 2024-04-19 15:21:30
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#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-NB
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#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-NB
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#PARAM_TYPE TX+2RX
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#PARAM_TYPE TX+2RX
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@ -3,7 +3,7 @@
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#EXPORT_FLAG HEADSET
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#EXPORT_FLAG HEADSET
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#PARAM_MODE FULL
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#PARAM_MODE FULL
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#SAVE_MODE 3
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#SAVE_MODE 3
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#SAVE_TIME 2024-04-12 17:04:42
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#SAVE_TIME 2024-04-19 15:22:29
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#CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-NB
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#CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-NB
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#PARAM_TYPE TX+2RX
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#PARAM_TYPE TX+2RX
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@ -71,8 +71,6 @@
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||||||
<ctl name="R ASPTX4 Slot Position" value="7" />
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<ctl name="R ASPTX4 Slot Position" value="7" />
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||||||
|
|
||||||
<!-- Cirrus Booster Amp DRE and VBST config-->
|
<!-- Cirrus Booster Amp DRE and VBST config-->
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||||||
<ctl name="VBSTMON Output Switch" value="1" />
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|
||||||
<ctl name="R VBSTMON Output Switch" value="1" />
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||||||
<ctl name="DRE DRE Switch" value="1" />
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<ctl name="DRE DRE Switch" value="1" />
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||||||
<ctl name="R DRE DRE Switch" value="1" />
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<ctl name="R DRE DRE Switch" value="1" />
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||||||
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||||||
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@ -144,7 +142,6 @@
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||||||
<ctl name="TDM_1_RX Mixer EP5" value="0" />
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<ctl name="TDM_1_RX Mixer EP5" value="0" />
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||||||
<ctl name="TDM_1_RX Mixer EP6" value="0" />
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<ctl name="TDM_1_RX Mixer EP6" value="0" />
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||||||
<ctl name="TDM_1_RX Mixer EP7" value="0" />
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<ctl name="TDM_1_RX Mixer EP7" value="0" />
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||||||
<ctl name="TDM_1_RX Mixer EP8" value="0" />
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<ctl name="TDM_1_RX Mixer NoHost1" value="0" />
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<ctl name="TDM_1_RX Mixer NoHost1" value="0" />
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||||||
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<ctl name="USB_RX Mixer EP1" value="0" />
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<ctl name="USB_RX Mixer EP1" value="0" />
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||||||
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@ -1226,53 +1223,9 @@
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||||||
<ctl name="NoHost1 TX Mixer TDM_0_TX" value="1" />
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<ctl name="NoHost1 TX Mixer TDM_0_TX" value="1" />
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||||||
</path>
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</path>
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||||||
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||||||
<path name="telephony-rx (VOICE_DOWNLINK) -> in-call-capture-0">
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<path name="in-call-capture-source-0 -> in-call-capture-0" />
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||||||
<ctl name="Incall Capture Stream0" value="DL" />
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<path name="in-call-capture-source-1 -> in-call-capture-1" />
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||||||
</path>
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<path name="in-call-capture-source-2 -> in-call-capture-2" />
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||||||
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||||||
<path name="telephony-rx (VOICE_UPLINK) -> in-call-capture-0">
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|
||||||
<ctl name="Incall Capture Stream0" value="UL" />
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|
||||||
</path>
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|
||||||
|
|
||||||
<path name="telephony-rx (VOICE_CALL) -> in-call-capture-0">
|
|
||||||
<ctl name="Incall Capture Stream0" value="UL_DL" />
|
|
||||||
</path>
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|
||||||
|
|
||||||
<path name="telephony-rx -> in-call-capture-0">
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|
||||||
<ctl name="Incall Capture Stream0" value="DL" />
|
|
||||||
</path>
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|
||||||
|
|
||||||
<path name="telephony-rx (VOICE_DOWNLINK) -> in-call-capture-1">
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|
||||||
<ctl name="Incall Capture Stream1" value="DL" />
|
|
||||||
</path>
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|
||||||
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|
||||||
<path name="telephony-rx (VOICE_UPLINK) -> in-call-capture-1">
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|
||||||
<ctl name="Incall Capture Stream1" value="UL" />
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|
||||||
</path>
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|
||||||
|
|
||||||
<path name="telephony-rx (VOICE_CALL) -> in-call-capture-1">
|
|
||||||
<ctl name="Incall Capture Stream1" value="UL_DL" />
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|
||||||
</path>
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|
||||||
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|
||||||
<path name="telephony-rx -> in-call-capture-1">
|
|
||||||
<ctl name="Incall Capture Stream1" value="DL" />
|
|
||||||
</path>
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|
||||||
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|
||||||
<path name="telephony-rx (VOICE_DOWNLINK) -> in-call-capture-2">
|
|
||||||
<ctl name="Incall Capture Stream2" value="DL" />
|
|
||||||
</path>
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|
||||||
|
|
||||||
<path name="telephony-rx (VOICE_UPLINK) -> in-call-capture-2">
|
|
||||||
<ctl name="Incall Capture Stream2" value="UL" />
|
|
||||||
</path>
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|
||||||
|
|
||||||
<path name="telephony-rx (VOICE_CALL) -> in-call-capture-2">
|
|
||||||
<ctl name="Incall Capture Stream2" value="UL_DL" />
|
|
||||||
</path>
|
|
||||||
|
|
||||||
<path name="telephony-rx -> in-call-capture-2">
|
|
||||||
<ctl name="Incall Capture Stream2" value="DL" />
|
|
||||||
</path>
|
|
||||||
|
|
||||||
<!-- codec setting -->
|
<!-- codec setting -->
|
||||||
<!-- Rx device -->
|
<!-- Rx device -->
|
||||||
|
@ -1419,6 +1372,54 @@
|
||||||
<path name="usb-microphones" />
|
<path name="usb-microphones" />
|
||||||
</path>
|
</path>
|
||||||
|
|
||||||
|
<path name="in-call-capture-source-0 (VOICE_DOWNLINK)">
|
||||||
|
<ctl name="Incall Capture Stream0" value="DL" />
|
||||||
|
</path>
|
||||||
|
|
||||||
|
<path name="in-call-capture-source-0 (VOICE_UPLINK)">
|
||||||
|
<ctl name="Incall Capture Stream0" value="UL" />
|
||||||
|
</path>
|
||||||
|
|
||||||
|
<path name="in-call-capture-source-0 (VOICE_CALL)">
|
||||||
|
<ctl name="Incall Capture Stream0" value="UL_DL" />
|
||||||
|
</path>
|
||||||
|
|
||||||
|
<path name="in-call-capture-source-0">
|
||||||
|
<path name="in-call-capture-source-0 (VOICE_DOWNLINK)" />
|
||||||
|
</path>
|
||||||
|
|
||||||
|
<path name="in-call-capture-source-1 (VOICE_DOWNLINK)">
|
||||||
|
<ctl name="Incall Capture Stream1" value="DL" />
|
||||||
|
</path>
|
||||||
|
|
||||||
|
<path name="in-call-capture-source-1 (VOICE_UPLINK)">
|
||||||
|
<ctl name="Incall Capture Stream1" value="UL" />
|
||||||
|
</path>
|
||||||
|
|
||||||
|
<path name="in-call-capture-source-1 (VOICE_CALL)">
|
||||||
|
<ctl name="Incall Capture Stream1" value="UL_DL" />
|
||||||
|
</path>
|
||||||
|
|
||||||
|
<path name="in-call-capture-source-1">
|
||||||
|
<path name="in-call-capture-source-1 (VOICE_DOWNLINK)" />
|
||||||
|
</path>
|
||||||
|
|
||||||
|
<path name="in-call-capture-source-2 (VOICE_DOWNLINK)">
|
||||||
|
<ctl name="Incall Capture Stream2" value="DL" />
|
||||||
|
</path>
|
||||||
|
|
||||||
|
<path name="in-call-capture-source-2 (VOICE_UPLINK)">
|
||||||
|
<ctl name="Incall Capture Stream2" value="UL" />
|
||||||
|
</path>
|
||||||
|
|
||||||
|
<path name="in-call-capture-source-2 (VOICE_CALL)">
|
||||||
|
<ctl name="Incall Capture Stream2" value="UL_DL" />
|
||||||
|
</path>
|
||||||
|
|
||||||
|
<path name="in-call-capture-source-2">
|
||||||
|
<path name="in-call-capture-source-2 (VOICE_DOWNLINK)" />
|
||||||
|
</path>
|
||||||
|
|
||||||
<!-- cs35l41 specific path to load firmware in cs35l41.c -->
|
<!-- cs35l41 specific path to load firmware in cs35l41.c -->
|
||||||
<path name="cs35l41-load-protection-firmware-start">
|
<path name="cs35l41-load-protection-firmware-start">
|
||||||
<!-- Enable it after get the protection firmware -->
|
<!-- Enable it after get the protection firmware -->
|
||||||
|
|
Binary file not shown.
|
@ -3,7 +3,7 @@
|
||||||
#EXPORT_FLAG BLUETOOTH
|
#EXPORT_FLAG BLUETOOTH
|
||||||
#PARAM_MODE FULL
|
#PARAM_MODE FULL
|
||||||
#SAVE_MODE 3
|
#SAVE_MODE 3
|
||||||
#SAVE_TIME 2024-04-12 17:37:15
|
#SAVE_TIME 2024-04-19 14:52:55
|
||||||
|
|
||||||
#CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-NB
|
#CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-NB
|
||||||
#PARAM_TYPE TX+2RX
|
#PARAM_TYPE TX+2RX
|
||||||
|
@ -5549,7 +5549,7 @@
|
||||||
147 0x0400 //TX_AEC_REF_GAIN_0
|
147 0x0400 //TX_AEC_REF_GAIN_0
|
||||||
148 0x0800 //TX_AEC_REF_GAIN_1
|
148 0x0800 //TX_AEC_REF_GAIN_1
|
||||||
149 0x0800 //TX_AEC_REF_GAIN_2
|
149 0x0800 //TX_AEC_REF_GAIN_2
|
||||||
150 0x7000 //TX_EAD_THR
|
150 0x7788 //TX_EAD_THR
|
||||||
151 0x1000 //TX_THR_RE_EST
|
151 0x1000 //TX_THR_RE_EST
|
||||||
152 0x1000 //TX_MIN_EQ_RE_EST_0
|
152 0x1000 //TX_MIN_EQ_RE_EST_0
|
||||||
153 0x0600 //TX_MIN_EQ_RE_EST_1
|
153 0x0600 //TX_MIN_EQ_RE_EST_1
|
||||||
|
@ -5564,13 +5564,13 @@
|
||||||
162 0x7800 //TX_MIN_EQ_RE_EST_10
|
162 0x7800 //TX_MIN_EQ_RE_EST_10
|
||||||
163 0x7800 //TX_MIN_EQ_RE_EST_11
|
163 0x7800 //TX_MIN_EQ_RE_EST_11
|
||||||
164 0x7800 //TX_MIN_EQ_RE_EST_12
|
164 0x7800 //TX_MIN_EQ_RE_EST_12
|
||||||
165 0x6000 //TX_LAMBDA_RE_EST
|
165 0x1000 //TX_LAMBDA_RE_EST
|
||||||
166 0x3000 //TX_LAMBDA_CB_NLE
|
166 0x3000 //TX_LAMBDA_CB_NLE
|
||||||
167 0x0000 //TX_C_POST_FLT
|
167 0x0000 //TX_C_POST_FLT
|
||||||
168 0x4000 //TX_GAIN_NP
|
168 0x4000 //TX_GAIN_NP
|
||||||
169 0x0270 //TX_SE_HOLD_N
|
169 0x0270 //TX_SE_HOLD_N
|
||||||
170 0x00C8 //TX_DT_HOLD_N
|
170 0x00C8 //TX_DT_HOLD_N
|
||||||
171 0x0140 //TX_DT2_HOLD_N
|
171 0x01F0 //TX_DT2_HOLD_N
|
||||||
172 0x6666 //TX_AEC_RESRV_0
|
172 0x6666 //TX_AEC_RESRV_0
|
||||||
173 0x0000 //TX_AEC_RESRV_1
|
173 0x0000 //TX_AEC_RESRV_1
|
||||||
174 0x0014 //TX_AEC_RESRV_2
|
174 0x0014 //TX_AEC_RESRV_2
|
||||||
|
@ -5598,18 +5598,18 @@
|
||||||
196 0x0000 //TX_NORMENERHIGHTHL
|
196 0x0000 //TX_NORMENERHIGHTHL
|
||||||
197 0x6D60 //TX_DTD_THR1_0
|
197 0x6D60 //TX_DTD_THR1_0
|
||||||
198 0x5DC0 //TX_DTD_THR1_1
|
198 0x5DC0 //TX_DTD_THR1_1
|
||||||
199 0x7E5E //TX_DTD_THR1_2
|
199 0x64C8 //TX_DTD_THR1_2
|
||||||
200 0x7F8A //TX_DTD_THR1_3
|
200 0x7F8A //TX_DTD_THR1_3
|
||||||
201 0x7FFF //TX_DTD_THR1_4
|
201 0x7FFF //TX_DTD_THR1_4
|
||||||
202 0x7FFF //TX_DTD_THR1_5
|
202 0x7FFF //TX_DTD_THR1_5
|
||||||
203 0x7FFF //TX_DTD_THR1_6
|
203 0x61A8 //TX_DTD_THR1_6
|
||||||
204 0x7E00 //TX_DTD_THR2_0
|
204 0x7E00 //TX_DTD_THR2_0
|
||||||
205 0x7E00 //TX_DTD_THR2_1
|
205 0x7E00 //TX_DTD_THR2_1
|
||||||
206 0x5000 //TX_DTD_THR2_2
|
206 0x7E00 //TX_DTD_THR2_2
|
||||||
207 0x5000 //TX_DTD_THR2_3
|
207 0x5000 //TX_DTD_THR2_3
|
||||||
208 0x5000 //TX_DTD_THR2_4
|
208 0x5000 //TX_DTD_THR2_4
|
||||||
209 0x5000 //TX_DTD_THR2_5
|
209 0x5000 //TX_DTD_THR2_5
|
||||||
210 0x5000 //TX_DTD_THR2_6
|
210 0x7E00 //TX_DTD_THR2_6
|
||||||
211 0x7FFF //TX_DTD_THR3
|
211 0x7FFF //TX_DTD_THR3
|
||||||
212 0x0000 //TX_SPK_CUT_K
|
212 0x0000 //TX_SPK_CUT_K
|
||||||
213 0x3E80 //TX_DT_CUT_K
|
213 0x3E80 //TX_DT_CUT_K
|
||||||
|
@ -5624,16 +5624,16 @@
|
||||||
222 0x023E //TX_ADPT_STRICT_H
|
222 0x023E //TX_ADPT_STRICT_H
|
||||||
223 0x0001 //TX_RATIO_DT_L_TH_LOW
|
223 0x0001 //TX_RATIO_DT_L_TH_LOW
|
||||||
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
|
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
|
||||||
225 0x157C //TX_RATIO_DT_L_TH_HIGH
|
225 0x3E80 //TX_RATIO_DT_L_TH_HIGH
|
||||||
226 0x6590 //TX_RATIO_DT_H_TH_HIGH
|
226 0x6590 //TX_RATIO_DT_H_TH_HIGH
|
||||||
227 0x0001 //TX_RATIO_DT_L0_TH
|
227 0x0001 //TX_RATIO_DT_L0_TH
|
||||||
228 0x2000 //TX_B_POST_FILT_ECHO_L
|
228 0x7FFF //TX_B_POST_FILT_ECHO_L
|
||||||
229 0x7FFF //TX_B_POST_FILT_ECHO_H
|
229 0x7FFF //TX_B_POST_FILT_ECHO_H
|
||||||
230 0x0200 //TX_MIN_G_CTRL_ECHO
|
230 0x0200 //TX_MIN_G_CTRL_ECHO
|
||||||
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
|
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
|
||||||
232 0x0000 //TX_EPD_OFFSET_00
|
232 0x0000 //TX_EPD_OFFSET_00
|
||||||
233 0x0000 //TX_EPD_OFFST_01
|
233 0x0000 //TX_EPD_OFFST_01
|
||||||
234 0x0DAC //TX_RATIO_DT_L0_TH_HIGH
|
234 0x0FA0 //TX_RATIO_DT_L0_TH_HIGH
|
||||||
235 0x7FFF //TX_RATIO_DT_H_TH_CUT
|
235 0x7FFF //TX_RATIO_DT_H_TH_CUT
|
||||||
236 0x7FFF //TX_MIN_EQ_RE_EST_13
|
236 0x7FFF //TX_MIN_EQ_RE_EST_13
|
||||||
237 0x0000 //TX_DTD_THR1_7
|
237 0x0000 //TX_DTD_THR1_7
|
||||||
|
@ -5974,8 +5974,8 @@
|
||||||
572 0x5254 //TX_FDEQ_GAIN_5
|
572 0x5254 //TX_FDEQ_GAIN_5
|
||||||
573 0x5C5C //TX_FDEQ_GAIN_6
|
573 0x5C5C //TX_FDEQ_GAIN_6
|
||||||
574 0x5C5A //TX_FDEQ_GAIN_7
|
574 0x5C5A //TX_FDEQ_GAIN_7
|
||||||
575 0x5654 //TX_FDEQ_GAIN_8
|
575 0x565A //TX_FDEQ_GAIN_8
|
||||||
576 0x5050 //TX_FDEQ_GAIN_9
|
576 0x5650 //TX_FDEQ_GAIN_9
|
||||||
577 0x5454 //TX_FDEQ_GAIN_10
|
577 0x5454 //TX_FDEQ_GAIN_10
|
||||||
578 0x4C54 //TX_FDEQ_GAIN_11
|
578 0x4C54 //TX_FDEQ_GAIN_11
|
||||||
579 0x5458 //TX_FDEQ_GAIN_12
|
579 0x5458 //TX_FDEQ_GAIN_12
|
||||||
|
@ -6265,7 +6265,7 @@
|
||||||
863 0x199A //TX_TDDRC_HMNC_GAIN
|
863 0x199A //TX_TDDRC_HMNC_GAIN
|
||||||
864 0x0000 //TX_TDDRC_SMT_FLAG
|
864 0x0000 //TX_TDDRC_SMT_FLAG
|
||||||
865 0x0CCD //TX_TDDRC_SMT_W
|
865 0x0CCD //TX_TDDRC_SMT_W
|
||||||
866 0x1523 //TX_TDDRC_DRC_GAIN
|
866 0x13F4 //TX_TDDRC_DRC_GAIN
|
||||||
867 0x7FFF //TX_TDDRC_LMT_THRD
|
867 0x7FFF //TX_TDDRC_LMT_THRD
|
||||||
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
||||||
869 0x0000 //TX_TFMASKLTH
|
869 0x0000 //TX_TFMASKLTH
|
||||||
|
@ -6344,14 +6344,14 @@
|
||||||
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
|
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
|
||||||
943 0x0100 //TX_MIC_VOLUME_MIC1MUTE
|
943 0x0100 //TX_MIC_VOLUME_MIC1MUTE
|
||||||
944 0xE4A8 //TX_TFMASKM4_2_DT_THR
|
944 0xE4A8 //TX_TFMASKM4_2_DT_THR
|
||||||
945 0x6590 //TX_MEAN_GAIN500HZ_DT_THR
|
945 0x7436 //TX_MEAN_GAIN500HZ_DT_THR
|
||||||
946 0x000A //TX_MUTE_REF_POW_TH
|
946 0x000A //TX_MUTE_REF_POW_TH
|
||||||
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
||||||
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
||||||
949 0x4000 //TX_PRE_MASK_SUP
|
949 0x4000 //TX_PRE_MASK_SUP
|
||||||
950 0x00C0 //TX_SDPCRN_GAIN
|
950 0x00C0 //TX_SDPCRN_GAIN
|
||||||
951 0x7333 //TX_EASSA_CUT_GAINTH
|
951 0x7333 //TX_EASSA_CUT_GAINTH
|
||||||
952 0x0100 //TX_DT_HARME_ENDF
|
952 0x0002 //TX_DT_HARME_ENDF
|
||||||
953 0x7FFF //TX_NSSAMASK_MORENS
|
953 0x7FFF //TX_NSSAMASK_MORENS
|
||||||
954 0x1000 //TX_CGMMMASK_MORENS
|
954 0x1000 //TX_CGMMMASK_MORENS
|
||||||
955 0x0CCD //TX_DPCRN_MASK_MORENS_ECHO
|
955 0x0CCD //TX_DPCRN_MASK_MORENS_ECHO
|
||||||
|
@ -10939,7 +10939,7 @@
|
||||||
147 0x0400 //TX_AEC_REF_GAIN_0
|
147 0x0400 //TX_AEC_REF_GAIN_0
|
||||||
148 0x0800 //TX_AEC_REF_GAIN_1
|
148 0x0800 //TX_AEC_REF_GAIN_1
|
||||||
149 0x0800 //TX_AEC_REF_GAIN_2
|
149 0x0800 //TX_AEC_REF_GAIN_2
|
||||||
150 0x7000 //TX_EAD_THR
|
150 0x7788 //TX_EAD_THR
|
||||||
151 0x1000 //TX_THR_RE_EST
|
151 0x1000 //TX_THR_RE_EST
|
||||||
152 0x1000 //TX_MIN_EQ_RE_EST_0
|
152 0x1000 //TX_MIN_EQ_RE_EST_0
|
||||||
153 0x0600 //TX_MIN_EQ_RE_EST_1
|
153 0x0600 //TX_MIN_EQ_RE_EST_1
|
||||||
|
@ -10954,13 +10954,13 @@
|
||||||
162 0x7800 //TX_MIN_EQ_RE_EST_10
|
162 0x7800 //TX_MIN_EQ_RE_EST_10
|
||||||
163 0x7800 //TX_MIN_EQ_RE_EST_11
|
163 0x7800 //TX_MIN_EQ_RE_EST_11
|
||||||
164 0x7800 //TX_MIN_EQ_RE_EST_12
|
164 0x7800 //TX_MIN_EQ_RE_EST_12
|
||||||
165 0x6000 //TX_LAMBDA_RE_EST
|
165 0x1000 //TX_LAMBDA_RE_EST
|
||||||
166 0x3000 //TX_LAMBDA_CB_NLE
|
166 0x3000 //TX_LAMBDA_CB_NLE
|
||||||
167 0x0000 //TX_C_POST_FLT
|
167 0x0000 //TX_C_POST_FLT
|
||||||
168 0x4000 //TX_GAIN_NP
|
168 0x4000 //TX_GAIN_NP
|
||||||
169 0x0270 //TX_SE_HOLD_N
|
169 0x0270 //TX_SE_HOLD_N
|
||||||
170 0x00C8 //TX_DT_HOLD_N
|
170 0x00C8 //TX_DT_HOLD_N
|
||||||
171 0x0140 //TX_DT2_HOLD_N
|
171 0x01F0 //TX_DT2_HOLD_N
|
||||||
172 0x6666 //TX_AEC_RESRV_0
|
172 0x6666 //TX_AEC_RESRV_0
|
||||||
173 0x0000 //TX_AEC_RESRV_1
|
173 0x0000 //TX_AEC_RESRV_1
|
||||||
174 0x0014 //TX_AEC_RESRV_2
|
174 0x0014 //TX_AEC_RESRV_2
|
||||||
|
@ -10988,18 +10988,18 @@
|
||||||
196 0x0000 //TX_NORMENERHIGHTHL
|
196 0x0000 //TX_NORMENERHIGHTHL
|
||||||
197 0x6D60 //TX_DTD_THR1_0
|
197 0x6D60 //TX_DTD_THR1_0
|
||||||
198 0x5DC0 //TX_DTD_THR1_1
|
198 0x5DC0 //TX_DTD_THR1_1
|
||||||
199 0x7E5E //TX_DTD_THR1_2
|
199 0x64C8 //TX_DTD_THR1_2
|
||||||
200 0x7F8A //TX_DTD_THR1_3
|
200 0x7F8A //TX_DTD_THR1_3
|
||||||
201 0x7FFF //TX_DTD_THR1_4
|
201 0x7FFF //TX_DTD_THR1_4
|
||||||
202 0x7FFF //TX_DTD_THR1_5
|
202 0x7FFF //TX_DTD_THR1_5
|
||||||
203 0x7FFF //TX_DTD_THR1_6
|
203 0x61A8 //TX_DTD_THR1_6
|
||||||
204 0x7E00 //TX_DTD_THR2_0
|
204 0x7E00 //TX_DTD_THR2_0
|
||||||
205 0x7E00 //TX_DTD_THR2_1
|
205 0x7E00 //TX_DTD_THR2_1
|
||||||
206 0x5000 //TX_DTD_THR2_2
|
206 0x7E00 //TX_DTD_THR2_2
|
||||||
207 0x5000 //TX_DTD_THR2_3
|
207 0x5000 //TX_DTD_THR2_3
|
||||||
208 0x5000 //TX_DTD_THR2_4
|
208 0x5000 //TX_DTD_THR2_4
|
||||||
209 0x5000 //TX_DTD_THR2_5
|
209 0x5000 //TX_DTD_THR2_5
|
||||||
210 0x5000 //TX_DTD_THR2_6
|
210 0x7E00 //TX_DTD_THR2_6
|
||||||
211 0x7FFF //TX_DTD_THR3
|
211 0x7FFF //TX_DTD_THR3
|
||||||
212 0x0000 //TX_SPK_CUT_K
|
212 0x0000 //TX_SPK_CUT_K
|
||||||
213 0x3E80 //TX_DT_CUT_K
|
213 0x3E80 //TX_DT_CUT_K
|
||||||
|
@ -11014,16 +11014,16 @@
|
||||||
222 0x023E //TX_ADPT_STRICT_H
|
222 0x023E //TX_ADPT_STRICT_H
|
||||||
223 0x0001 //TX_RATIO_DT_L_TH_LOW
|
223 0x0001 //TX_RATIO_DT_L_TH_LOW
|
||||||
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
|
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
|
||||||
225 0x157C //TX_RATIO_DT_L_TH_HIGH
|
225 0x3E80 //TX_RATIO_DT_L_TH_HIGH
|
||||||
226 0x6590 //TX_RATIO_DT_H_TH_HIGH
|
226 0x6590 //TX_RATIO_DT_H_TH_HIGH
|
||||||
227 0x0001 //TX_RATIO_DT_L0_TH
|
227 0x0001 //TX_RATIO_DT_L0_TH
|
||||||
228 0x2000 //TX_B_POST_FILT_ECHO_L
|
228 0x7FFF //TX_B_POST_FILT_ECHO_L
|
||||||
229 0x7FFF //TX_B_POST_FILT_ECHO_H
|
229 0x7FFF //TX_B_POST_FILT_ECHO_H
|
||||||
230 0x0200 //TX_MIN_G_CTRL_ECHO
|
230 0x0200 //TX_MIN_G_CTRL_ECHO
|
||||||
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
|
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
|
||||||
232 0x0000 //TX_EPD_OFFSET_00
|
232 0x0000 //TX_EPD_OFFSET_00
|
||||||
233 0x0000 //TX_EPD_OFFST_01
|
233 0x0000 //TX_EPD_OFFST_01
|
||||||
234 0x0DAC //TX_RATIO_DT_L0_TH_HIGH
|
234 0x0FA0 //TX_RATIO_DT_L0_TH_HIGH
|
||||||
235 0x7FFF //TX_RATIO_DT_H_TH_CUT
|
235 0x7FFF //TX_RATIO_DT_H_TH_CUT
|
||||||
236 0x7FFF //TX_MIN_EQ_RE_EST_13
|
236 0x7FFF //TX_MIN_EQ_RE_EST_13
|
||||||
237 0x0000 //TX_DTD_THR1_7
|
237 0x0000 //TX_DTD_THR1_7
|
||||||
|
@ -11364,8 +11364,8 @@
|
||||||
572 0x5254 //TX_FDEQ_GAIN_5
|
572 0x5254 //TX_FDEQ_GAIN_5
|
||||||
573 0x5C5C //TX_FDEQ_GAIN_6
|
573 0x5C5C //TX_FDEQ_GAIN_6
|
||||||
574 0x5C5A //TX_FDEQ_GAIN_7
|
574 0x5C5A //TX_FDEQ_GAIN_7
|
||||||
575 0x5654 //TX_FDEQ_GAIN_8
|
575 0x565A //TX_FDEQ_GAIN_8
|
||||||
576 0x5050 //TX_FDEQ_GAIN_9
|
576 0x5650 //TX_FDEQ_GAIN_9
|
||||||
577 0x5454 //TX_FDEQ_GAIN_10
|
577 0x5454 //TX_FDEQ_GAIN_10
|
||||||
578 0x4C54 //TX_FDEQ_GAIN_11
|
578 0x4C54 //TX_FDEQ_GAIN_11
|
||||||
579 0x5458 //TX_FDEQ_GAIN_12
|
579 0x5458 //TX_FDEQ_GAIN_12
|
||||||
|
@ -11655,7 +11655,7 @@
|
||||||
863 0x199A //TX_TDDRC_HMNC_GAIN
|
863 0x199A //TX_TDDRC_HMNC_GAIN
|
||||||
864 0x0000 //TX_TDDRC_SMT_FLAG
|
864 0x0000 //TX_TDDRC_SMT_FLAG
|
||||||
865 0x0CCD //TX_TDDRC_SMT_W
|
865 0x0CCD //TX_TDDRC_SMT_W
|
||||||
866 0x1523 //TX_TDDRC_DRC_GAIN
|
866 0x13F4 //TX_TDDRC_DRC_GAIN
|
||||||
867 0x7FFF //TX_TDDRC_LMT_THRD
|
867 0x7FFF //TX_TDDRC_LMT_THRD
|
||||||
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
||||||
869 0x0000 //TX_TFMASKLTH
|
869 0x0000 //TX_TFMASKLTH
|
||||||
|
@ -11734,14 +11734,14 @@
|
||||||
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
|
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
|
||||||
943 0x0100 //TX_MIC_VOLUME_MIC1MUTE
|
943 0x0100 //TX_MIC_VOLUME_MIC1MUTE
|
||||||
944 0xE4A8 //TX_TFMASKM4_2_DT_THR
|
944 0xE4A8 //TX_TFMASKM4_2_DT_THR
|
||||||
945 0x6590 //TX_MEAN_GAIN500HZ_DT_THR
|
945 0x7436 //TX_MEAN_GAIN500HZ_DT_THR
|
||||||
946 0x000A //TX_MUTE_REF_POW_TH
|
946 0x000A //TX_MUTE_REF_POW_TH
|
||||||
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
||||||
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
||||||
949 0x4000 //TX_PRE_MASK_SUP
|
949 0x4000 //TX_PRE_MASK_SUP
|
||||||
950 0x00C0 //TX_SDPCRN_GAIN
|
950 0x00C0 //TX_SDPCRN_GAIN
|
||||||
951 0x7333 //TX_EASSA_CUT_GAINTH
|
951 0x7333 //TX_EASSA_CUT_GAINTH
|
||||||
952 0x0100 //TX_DT_HARME_ENDF
|
952 0x0002 //TX_DT_HARME_ENDF
|
||||||
953 0x7FFF //TX_NSSAMASK_MORENS
|
953 0x7FFF //TX_NSSAMASK_MORENS
|
||||||
954 0x1000 //TX_CGMMMASK_MORENS
|
954 0x1000 //TX_CGMMMASK_MORENS
|
||||||
955 0x0CCD //TX_DPCRN_MASK_MORENS_ECHO
|
955 0x0CCD //TX_DPCRN_MASK_MORENS_ECHO
|
||||||
|
|
|
@ -3,7 +3,7 @@
|
||||||
#EXPORT_FLAG HANDSET
|
#EXPORT_FLAG HANDSET
|
||||||
#PARAM_MODE FULL
|
#PARAM_MODE FULL
|
||||||
#SAVE_MODE 3
|
#SAVE_MODE 3
|
||||||
#SAVE_TIME 2024-04-12 17:37:12
|
#SAVE_TIME 2024-04-19 14:52:53
|
||||||
|
|
||||||
#CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-NB
|
#CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-NB
|
||||||
#PARAM_TYPE TX+2RX
|
#PARAM_TYPE TX+2RX
|
||||||
|
|
Binary file not shown.
File diff suppressed because it is too large
Load diff
Binary file not shown.
|
@ -3,7 +3,7 @@
|
||||||
#EXPORT_FLAG HEADSET
|
#EXPORT_FLAG HEADSET
|
||||||
#PARAM_MODE FULL
|
#PARAM_MODE FULL
|
||||||
#SAVE_MODE 3
|
#SAVE_MODE 3
|
||||||
#SAVE_TIME 2024-04-12 17:37:06
|
#SAVE_TIME 2024-04-19 14:52:48
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#CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-NB
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#CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-NB
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||||||
#PARAM_TYPE TX+2RX
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#PARAM_TYPE TX+2RX
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||||||
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@ -32499,7 +32499,7 @@
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||||||
147 0x0400 //TX_AEC_REF_GAIN_0
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147 0x0400 //TX_AEC_REF_GAIN_0
|
||||||
148 0x0800 //TX_AEC_REF_GAIN_1
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148 0x0800 //TX_AEC_REF_GAIN_1
|
||||||
149 0x0800 //TX_AEC_REF_GAIN_2
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149 0x0800 //TX_AEC_REF_GAIN_2
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||||||
150 0x7000 //TX_EAD_THR
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150 0x7788 //TX_EAD_THR
|
||||||
151 0x1000 //TX_THR_RE_EST
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151 0x1000 //TX_THR_RE_EST
|
||||||
152 0x1000 //TX_MIN_EQ_RE_EST_0
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152 0x1000 //TX_MIN_EQ_RE_EST_0
|
||||||
153 0x0600 //TX_MIN_EQ_RE_EST_1
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153 0x0600 //TX_MIN_EQ_RE_EST_1
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||||||
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@ -32514,13 +32514,13 @@
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||||||
162 0x7800 //TX_MIN_EQ_RE_EST_10
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162 0x7800 //TX_MIN_EQ_RE_EST_10
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||||||
163 0x7800 //TX_MIN_EQ_RE_EST_11
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163 0x7800 //TX_MIN_EQ_RE_EST_11
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||||||
164 0x7800 //TX_MIN_EQ_RE_EST_12
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164 0x7800 //TX_MIN_EQ_RE_EST_12
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||||||
165 0x6000 //TX_LAMBDA_RE_EST
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165 0x1000 //TX_LAMBDA_RE_EST
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||||||
166 0x3000 //TX_LAMBDA_CB_NLE
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166 0x3000 //TX_LAMBDA_CB_NLE
|
||||||
167 0x0000 //TX_C_POST_FLT
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167 0x0000 //TX_C_POST_FLT
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||||||
168 0x4000 //TX_GAIN_NP
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168 0x4000 //TX_GAIN_NP
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||||||
169 0x0270 //TX_SE_HOLD_N
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169 0x0270 //TX_SE_HOLD_N
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||||||
170 0x00C8 //TX_DT_HOLD_N
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170 0x00C8 //TX_DT_HOLD_N
|
||||||
171 0x0140 //TX_DT2_HOLD_N
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171 0x01F0 //TX_DT2_HOLD_N
|
||||||
172 0x6666 //TX_AEC_RESRV_0
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172 0x6666 //TX_AEC_RESRV_0
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||||||
173 0x0000 //TX_AEC_RESRV_1
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173 0x0000 //TX_AEC_RESRV_1
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||||||
174 0x0014 //TX_AEC_RESRV_2
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174 0x0014 //TX_AEC_RESRV_2
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||||||
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@ -32548,18 +32548,18 @@
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||||||
196 0x0000 //TX_NORMENERHIGHTHL
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196 0x0000 //TX_NORMENERHIGHTHL
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||||||
197 0x6D60 //TX_DTD_THR1_0
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197 0x6D60 //TX_DTD_THR1_0
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||||||
198 0x5DC0 //TX_DTD_THR1_1
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198 0x5DC0 //TX_DTD_THR1_1
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||||||
199 0x7E5E //TX_DTD_THR1_2
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199 0x64C8 //TX_DTD_THR1_2
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||||||
200 0x7F8A //TX_DTD_THR1_3
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200 0x7F8A //TX_DTD_THR1_3
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||||||
201 0x7FFF //TX_DTD_THR1_4
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201 0x7FFF //TX_DTD_THR1_4
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||||||
202 0x7FFF //TX_DTD_THR1_5
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202 0x7FFF //TX_DTD_THR1_5
|
||||||
203 0x7FFF //TX_DTD_THR1_6
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203 0x61A8 //TX_DTD_THR1_6
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||||||
204 0x7E00 //TX_DTD_THR2_0
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204 0x7E00 //TX_DTD_THR2_0
|
||||||
205 0x7E00 //TX_DTD_THR2_1
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205 0x7E00 //TX_DTD_THR2_1
|
||||||
206 0x5000 //TX_DTD_THR2_2
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206 0x7E00 //TX_DTD_THR2_2
|
||||||
207 0x5000 //TX_DTD_THR2_3
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207 0x5000 //TX_DTD_THR2_3
|
||||||
208 0x5000 //TX_DTD_THR2_4
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208 0x5000 //TX_DTD_THR2_4
|
||||||
209 0x5000 //TX_DTD_THR2_5
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209 0x5000 //TX_DTD_THR2_5
|
||||||
210 0x5000 //TX_DTD_THR2_6
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210 0x7E00 //TX_DTD_THR2_6
|
||||||
211 0x7FFF //TX_DTD_THR3
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211 0x7FFF //TX_DTD_THR3
|
||||||
212 0x0000 //TX_SPK_CUT_K
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212 0x0000 //TX_SPK_CUT_K
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||||||
213 0x3E80 //TX_DT_CUT_K
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213 0x3E80 //TX_DT_CUT_K
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||||||
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@ -32574,16 +32574,16 @@
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||||||
222 0x023E //TX_ADPT_STRICT_H
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222 0x023E //TX_ADPT_STRICT_H
|
||||||
223 0x0001 //TX_RATIO_DT_L_TH_LOW
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223 0x0001 //TX_RATIO_DT_L_TH_LOW
|
||||||
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
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224 0x3A98 //TX_RATIO_DT_H_TH_LOW
|
||||||
225 0x157C //TX_RATIO_DT_L_TH_HIGH
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225 0x3E80 //TX_RATIO_DT_L_TH_HIGH
|
||||||
226 0x6590 //TX_RATIO_DT_H_TH_HIGH
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226 0x6590 //TX_RATIO_DT_H_TH_HIGH
|
||||||
227 0x0001 //TX_RATIO_DT_L0_TH
|
227 0x0001 //TX_RATIO_DT_L0_TH
|
||||||
228 0x2000 //TX_B_POST_FILT_ECHO_L
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228 0x7FFF //TX_B_POST_FILT_ECHO_L
|
||||||
229 0x7FFF //TX_B_POST_FILT_ECHO_H
|
229 0x7FFF //TX_B_POST_FILT_ECHO_H
|
||||||
230 0x0200 //TX_MIN_G_CTRL_ECHO
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230 0x0200 //TX_MIN_G_CTRL_ECHO
|
||||||
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
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231 0x1000 //TX_B_LESSCUT_RTO_ECHO
|
||||||
232 0x0000 //TX_EPD_OFFSET_00
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232 0x0000 //TX_EPD_OFFSET_00
|
||||||
233 0x0000 //TX_EPD_OFFST_01
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233 0x0000 //TX_EPD_OFFST_01
|
||||||
234 0x0DAC //TX_RATIO_DT_L0_TH_HIGH
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234 0x0FA0 //TX_RATIO_DT_L0_TH_HIGH
|
||||||
235 0x7FFF //TX_RATIO_DT_H_TH_CUT
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235 0x7FFF //TX_RATIO_DT_H_TH_CUT
|
||||||
236 0x7FFF //TX_MIN_EQ_RE_EST_13
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236 0x7FFF //TX_MIN_EQ_RE_EST_13
|
||||||
237 0x0000 //TX_DTD_THR1_7
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237 0x0000 //TX_DTD_THR1_7
|
||||||
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@ -32924,8 +32924,8 @@
|
||||||
572 0x5254 //TX_FDEQ_GAIN_5
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572 0x5254 //TX_FDEQ_GAIN_5
|
||||||
573 0x5C5C //TX_FDEQ_GAIN_6
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573 0x5C5C //TX_FDEQ_GAIN_6
|
||||||
574 0x5C5A //TX_FDEQ_GAIN_7
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574 0x5C5A //TX_FDEQ_GAIN_7
|
||||||
575 0x5654 //TX_FDEQ_GAIN_8
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575 0x565A //TX_FDEQ_GAIN_8
|
||||||
576 0x5050 //TX_FDEQ_GAIN_9
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576 0x5650 //TX_FDEQ_GAIN_9
|
||||||
577 0x5454 //TX_FDEQ_GAIN_10
|
577 0x5454 //TX_FDEQ_GAIN_10
|
||||||
578 0x4C54 //TX_FDEQ_GAIN_11
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578 0x4C54 //TX_FDEQ_GAIN_11
|
||||||
579 0x5458 //TX_FDEQ_GAIN_12
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579 0x5458 //TX_FDEQ_GAIN_12
|
||||||
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@ -33215,7 +33215,7 @@
|
||||||
863 0x199A //TX_TDDRC_HMNC_GAIN
|
863 0x199A //TX_TDDRC_HMNC_GAIN
|
||||||
864 0x0000 //TX_TDDRC_SMT_FLAG
|
864 0x0000 //TX_TDDRC_SMT_FLAG
|
||||||
865 0x0CCD //TX_TDDRC_SMT_W
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865 0x0CCD //TX_TDDRC_SMT_W
|
||||||
866 0x1523 //TX_TDDRC_DRC_GAIN
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866 0x13F4 //TX_TDDRC_DRC_GAIN
|
||||||
867 0x7FFF //TX_TDDRC_LMT_THRD
|
867 0x7FFF //TX_TDDRC_LMT_THRD
|
||||||
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
||||||
869 0x0000 //TX_TFMASKLTH
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869 0x0000 //TX_TFMASKLTH
|
||||||
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@ -33294,14 +33294,14 @@
|
||||||
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
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942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
|
||||||
943 0x0100 //TX_MIC_VOLUME_MIC1MUTE
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943 0x0100 //TX_MIC_VOLUME_MIC1MUTE
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||||||
944 0xE4A8 //TX_TFMASKM4_2_DT_THR
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944 0xE4A8 //TX_TFMASKM4_2_DT_THR
|
||||||
945 0x6590 //TX_MEAN_GAIN500HZ_DT_THR
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945 0x7436 //TX_MEAN_GAIN500HZ_DT_THR
|
||||||
946 0x000A //TX_MUTE_REF_POW_TH
|
946 0x000A //TX_MUTE_REF_POW_TH
|
||||||
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
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947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
||||||
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
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948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
||||||
949 0x4000 //TX_PRE_MASK_SUP
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949 0x4000 //TX_PRE_MASK_SUP
|
||||||
950 0x00C0 //TX_SDPCRN_GAIN
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950 0x00C0 //TX_SDPCRN_GAIN
|
||||||
951 0x7333 //TX_EASSA_CUT_GAINTH
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951 0x7333 //TX_EASSA_CUT_GAINTH
|
||||||
952 0x0100 //TX_DT_HARME_ENDF
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952 0x0002 //TX_DT_HARME_ENDF
|
||||||
953 0x7FFF //TX_NSSAMASK_MORENS
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953 0x7FFF //TX_NSSAMASK_MORENS
|
||||||
954 0x1000 //TX_CGMMMASK_MORENS
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954 0x1000 //TX_CGMMMASK_MORENS
|
||||||
955 0x0CCD //TX_DPCRN_MASK_MORENS_ECHO
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955 0x0CCD //TX_DPCRN_MASK_MORENS_ECHO
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||||||
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@ -37889,7 +37889,7 @@
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||||||
147 0x0400 //TX_AEC_REF_GAIN_0
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147 0x0400 //TX_AEC_REF_GAIN_0
|
||||||
148 0x0800 //TX_AEC_REF_GAIN_1
|
148 0x0800 //TX_AEC_REF_GAIN_1
|
||||||
149 0x0800 //TX_AEC_REF_GAIN_2
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149 0x0800 //TX_AEC_REF_GAIN_2
|
||||||
150 0x7000 //TX_EAD_THR
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150 0x7788 //TX_EAD_THR
|
||||||
151 0x1000 //TX_THR_RE_EST
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151 0x1000 //TX_THR_RE_EST
|
||||||
152 0x1000 //TX_MIN_EQ_RE_EST_0
|
152 0x1000 //TX_MIN_EQ_RE_EST_0
|
||||||
153 0x0600 //TX_MIN_EQ_RE_EST_1
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153 0x0600 //TX_MIN_EQ_RE_EST_1
|
||||||
|
@ -37904,13 +37904,13 @@
|
||||||
162 0x7800 //TX_MIN_EQ_RE_EST_10
|
162 0x7800 //TX_MIN_EQ_RE_EST_10
|
||||||
163 0x7800 //TX_MIN_EQ_RE_EST_11
|
163 0x7800 //TX_MIN_EQ_RE_EST_11
|
||||||
164 0x7800 //TX_MIN_EQ_RE_EST_12
|
164 0x7800 //TX_MIN_EQ_RE_EST_12
|
||||||
165 0x6000 //TX_LAMBDA_RE_EST
|
165 0x1000 //TX_LAMBDA_RE_EST
|
||||||
166 0x3000 //TX_LAMBDA_CB_NLE
|
166 0x3000 //TX_LAMBDA_CB_NLE
|
||||||
167 0x0000 //TX_C_POST_FLT
|
167 0x0000 //TX_C_POST_FLT
|
||||||
168 0x4000 //TX_GAIN_NP
|
168 0x4000 //TX_GAIN_NP
|
||||||
169 0x0270 //TX_SE_HOLD_N
|
169 0x0270 //TX_SE_HOLD_N
|
||||||
170 0x00C8 //TX_DT_HOLD_N
|
170 0x00C8 //TX_DT_HOLD_N
|
||||||
171 0x0140 //TX_DT2_HOLD_N
|
171 0x01F0 //TX_DT2_HOLD_N
|
||||||
172 0x6666 //TX_AEC_RESRV_0
|
172 0x6666 //TX_AEC_RESRV_0
|
||||||
173 0x0000 //TX_AEC_RESRV_1
|
173 0x0000 //TX_AEC_RESRV_1
|
||||||
174 0x0014 //TX_AEC_RESRV_2
|
174 0x0014 //TX_AEC_RESRV_2
|
||||||
|
@ -37938,18 +37938,18 @@
|
||||||
196 0x0000 //TX_NORMENERHIGHTHL
|
196 0x0000 //TX_NORMENERHIGHTHL
|
||||||
197 0x6D60 //TX_DTD_THR1_0
|
197 0x6D60 //TX_DTD_THR1_0
|
||||||
198 0x5DC0 //TX_DTD_THR1_1
|
198 0x5DC0 //TX_DTD_THR1_1
|
||||||
199 0x7E5E //TX_DTD_THR1_2
|
199 0x64C8 //TX_DTD_THR1_2
|
||||||
200 0x7F8A //TX_DTD_THR1_3
|
200 0x7F8A //TX_DTD_THR1_3
|
||||||
201 0x7FFF //TX_DTD_THR1_4
|
201 0x7FFF //TX_DTD_THR1_4
|
||||||
202 0x7FFF //TX_DTD_THR1_5
|
202 0x7FFF //TX_DTD_THR1_5
|
||||||
203 0x7FFF //TX_DTD_THR1_6
|
203 0x61A8 //TX_DTD_THR1_6
|
||||||
204 0x7E00 //TX_DTD_THR2_0
|
204 0x7E00 //TX_DTD_THR2_0
|
||||||
205 0x7E00 //TX_DTD_THR2_1
|
205 0x7E00 //TX_DTD_THR2_1
|
||||||
206 0x5000 //TX_DTD_THR2_2
|
206 0x7E00 //TX_DTD_THR2_2
|
||||||
207 0x5000 //TX_DTD_THR2_3
|
207 0x5000 //TX_DTD_THR2_3
|
||||||
208 0x5000 //TX_DTD_THR2_4
|
208 0x5000 //TX_DTD_THR2_4
|
||||||
209 0x5000 //TX_DTD_THR2_5
|
209 0x5000 //TX_DTD_THR2_5
|
||||||
210 0x5000 //TX_DTD_THR2_6
|
210 0x7E00 //TX_DTD_THR2_6
|
||||||
211 0x7FFF //TX_DTD_THR3
|
211 0x7FFF //TX_DTD_THR3
|
||||||
212 0x0000 //TX_SPK_CUT_K
|
212 0x0000 //TX_SPK_CUT_K
|
||||||
213 0x3E80 //TX_DT_CUT_K
|
213 0x3E80 //TX_DT_CUT_K
|
||||||
|
@ -37964,16 +37964,16 @@
|
||||||
222 0x023E //TX_ADPT_STRICT_H
|
222 0x023E //TX_ADPT_STRICT_H
|
||||||
223 0x0001 //TX_RATIO_DT_L_TH_LOW
|
223 0x0001 //TX_RATIO_DT_L_TH_LOW
|
||||||
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
|
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
|
||||||
225 0x157C //TX_RATIO_DT_L_TH_HIGH
|
225 0x3E80 //TX_RATIO_DT_L_TH_HIGH
|
||||||
226 0x6590 //TX_RATIO_DT_H_TH_HIGH
|
226 0x6590 //TX_RATIO_DT_H_TH_HIGH
|
||||||
227 0x0001 //TX_RATIO_DT_L0_TH
|
227 0x0001 //TX_RATIO_DT_L0_TH
|
||||||
228 0x2000 //TX_B_POST_FILT_ECHO_L
|
228 0x7FFF //TX_B_POST_FILT_ECHO_L
|
||||||
229 0x7FFF //TX_B_POST_FILT_ECHO_H
|
229 0x7FFF //TX_B_POST_FILT_ECHO_H
|
||||||
230 0x0200 //TX_MIN_G_CTRL_ECHO
|
230 0x0200 //TX_MIN_G_CTRL_ECHO
|
||||||
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
|
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
|
||||||
232 0x0000 //TX_EPD_OFFSET_00
|
232 0x0000 //TX_EPD_OFFSET_00
|
||||||
233 0x0000 //TX_EPD_OFFST_01
|
233 0x0000 //TX_EPD_OFFST_01
|
||||||
234 0x0DAC //TX_RATIO_DT_L0_TH_HIGH
|
234 0x0FA0 //TX_RATIO_DT_L0_TH_HIGH
|
||||||
235 0x7FFF //TX_RATIO_DT_H_TH_CUT
|
235 0x7FFF //TX_RATIO_DT_H_TH_CUT
|
||||||
236 0x7FFF //TX_MIN_EQ_RE_EST_13
|
236 0x7FFF //TX_MIN_EQ_RE_EST_13
|
||||||
237 0x0000 //TX_DTD_THR1_7
|
237 0x0000 //TX_DTD_THR1_7
|
||||||
|
@ -38314,8 +38314,8 @@
|
||||||
572 0x5254 //TX_FDEQ_GAIN_5
|
572 0x5254 //TX_FDEQ_GAIN_5
|
||||||
573 0x5C5C //TX_FDEQ_GAIN_6
|
573 0x5C5C //TX_FDEQ_GAIN_6
|
||||||
574 0x5C5A //TX_FDEQ_GAIN_7
|
574 0x5C5A //TX_FDEQ_GAIN_7
|
||||||
575 0x5654 //TX_FDEQ_GAIN_8
|
575 0x565A //TX_FDEQ_GAIN_8
|
||||||
576 0x5050 //TX_FDEQ_GAIN_9
|
576 0x5650 //TX_FDEQ_GAIN_9
|
||||||
577 0x5454 //TX_FDEQ_GAIN_10
|
577 0x5454 //TX_FDEQ_GAIN_10
|
||||||
578 0x4C54 //TX_FDEQ_GAIN_11
|
578 0x4C54 //TX_FDEQ_GAIN_11
|
||||||
579 0x5458 //TX_FDEQ_GAIN_12
|
579 0x5458 //TX_FDEQ_GAIN_12
|
||||||
|
@ -38605,7 +38605,7 @@
|
||||||
863 0x199A //TX_TDDRC_HMNC_GAIN
|
863 0x199A //TX_TDDRC_HMNC_GAIN
|
||||||
864 0x0000 //TX_TDDRC_SMT_FLAG
|
864 0x0000 //TX_TDDRC_SMT_FLAG
|
||||||
865 0x0CCD //TX_TDDRC_SMT_W
|
865 0x0CCD //TX_TDDRC_SMT_W
|
||||||
866 0x1523 //TX_TDDRC_DRC_GAIN
|
866 0x13F4 //TX_TDDRC_DRC_GAIN
|
||||||
867 0x7FFF //TX_TDDRC_LMT_THRD
|
867 0x7FFF //TX_TDDRC_LMT_THRD
|
||||||
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
||||||
869 0x0000 //TX_TFMASKLTH
|
869 0x0000 //TX_TFMASKLTH
|
||||||
|
@ -38684,14 +38684,14 @@
|
||||||
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
|
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
|
||||||
943 0x0100 //TX_MIC_VOLUME_MIC1MUTE
|
943 0x0100 //TX_MIC_VOLUME_MIC1MUTE
|
||||||
944 0xE4A8 //TX_TFMASKM4_2_DT_THR
|
944 0xE4A8 //TX_TFMASKM4_2_DT_THR
|
||||||
945 0x6590 //TX_MEAN_GAIN500HZ_DT_THR
|
945 0x7436 //TX_MEAN_GAIN500HZ_DT_THR
|
||||||
946 0x000A //TX_MUTE_REF_POW_TH
|
946 0x000A //TX_MUTE_REF_POW_TH
|
||||||
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
||||||
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
||||||
949 0x4000 //TX_PRE_MASK_SUP
|
949 0x4000 //TX_PRE_MASK_SUP
|
||||||
950 0x00C0 //TX_SDPCRN_GAIN
|
950 0x00C0 //TX_SDPCRN_GAIN
|
||||||
951 0x7333 //TX_EASSA_CUT_GAINTH
|
951 0x7333 //TX_EASSA_CUT_GAINTH
|
||||||
952 0x0100 //TX_DT_HARME_ENDF
|
952 0x0002 //TX_DT_HARME_ENDF
|
||||||
953 0x7FFF //TX_NSSAMASK_MORENS
|
953 0x7FFF //TX_NSSAMASK_MORENS
|
||||||
954 0x1000 //TX_CGMMMASK_MORENS
|
954 0x1000 //TX_CGMMMASK_MORENS
|
||||||
955 0x0CCD //TX_DPCRN_MASK_MORENS_ECHO
|
955 0x0CCD //TX_DPCRN_MASK_MORENS_ECHO
|
||||||
|
@ -60468,7 +60468,7 @@
|
||||||
121 0x199A //RX_TDDRC_HMNC_GAIN
|
121 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
122 0x0001 //RX_TDDRC_SMT_FLAG
|
122 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
123 0x0CCD //RX_TDDRC_SMT_W
|
123 0x0CCD //RX_TDDRC_SMT_W
|
||||||
124 0x064F //RX_TDDRC_DRC_GAIN
|
124 0x05A0 //RX_TDDRC_DRC_GAIN
|
||||||
38 0x0020 //RX_FDEQ_SUBNUM
|
38 0x0020 //RX_FDEQ_SUBNUM
|
||||||
39 0x7755 //RX_FDEQ_GAIN_0
|
39 0x7755 //RX_FDEQ_GAIN_0
|
||||||
40 0x4A4A //RX_FDEQ_GAIN_1
|
40 0x4A4A //RX_FDEQ_GAIN_1
|
||||||
|
@ -60567,7 +60567,7 @@
|
||||||
121 0x199A //RX_TDDRC_HMNC_GAIN
|
121 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
122 0x0001 //RX_TDDRC_SMT_FLAG
|
122 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
123 0x0CCD //RX_TDDRC_SMT_W
|
123 0x0CCD //RX_TDDRC_SMT_W
|
||||||
124 0x064F //RX_TDDRC_DRC_GAIN
|
124 0x05A0 //RX_TDDRC_DRC_GAIN
|
||||||
38 0x0020 //RX_FDEQ_SUBNUM
|
38 0x0020 //RX_FDEQ_SUBNUM
|
||||||
39 0x7755 //RX_FDEQ_GAIN_0
|
39 0x7755 //RX_FDEQ_GAIN_0
|
||||||
40 0x4A4A //RX_FDEQ_GAIN_1
|
40 0x4A4A //RX_FDEQ_GAIN_1
|
||||||
|
@ -60666,7 +60666,7 @@
|
||||||
121 0x199A //RX_TDDRC_HMNC_GAIN
|
121 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
122 0x0001 //RX_TDDRC_SMT_FLAG
|
122 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
123 0x0CCD //RX_TDDRC_SMT_W
|
123 0x0CCD //RX_TDDRC_SMT_W
|
||||||
124 0x064F //RX_TDDRC_DRC_GAIN
|
124 0x05A0 //RX_TDDRC_DRC_GAIN
|
||||||
38 0x0020 //RX_FDEQ_SUBNUM
|
38 0x0020 //RX_FDEQ_SUBNUM
|
||||||
39 0x7755 //RX_FDEQ_GAIN_0
|
39 0x7755 //RX_FDEQ_GAIN_0
|
||||||
40 0x4A4A //RX_FDEQ_GAIN_1
|
40 0x4A4A //RX_FDEQ_GAIN_1
|
||||||
|
@ -60765,7 +60765,7 @@
|
||||||
121 0x199A //RX_TDDRC_HMNC_GAIN
|
121 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
122 0x0001 //RX_TDDRC_SMT_FLAG
|
122 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
123 0x0CCD //RX_TDDRC_SMT_W
|
123 0x0CCD //RX_TDDRC_SMT_W
|
||||||
124 0x064F //RX_TDDRC_DRC_GAIN
|
124 0x05A0 //RX_TDDRC_DRC_GAIN
|
||||||
38 0x0020 //RX_FDEQ_SUBNUM
|
38 0x0020 //RX_FDEQ_SUBNUM
|
||||||
39 0x7755 //RX_FDEQ_GAIN_0
|
39 0x7755 //RX_FDEQ_GAIN_0
|
||||||
40 0x4A4A //RX_FDEQ_GAIN_1
|
40 0x4A4A //RX_FDEQ_GAIN_1
|
||||||
|
@ -60864,7 +60864,7 @@
|
||||||
121 0x199A //RX_TDDRC_HMNC_GAIN
|
121 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
122 0x0001 //RX_TDDRC_SMT_FLAG
|
122 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
123 0x0CCD //RX_TDDRC_SMT_W
|
123 0x0CCD //RX_TDDRC_SMT_W
|
||||||
124 0x064F //RX_TDDRC_DRC_GAIN
|
124 0x05A0 //RX_TDDRC_DRC_GAIN
|
||||||
38 0x0020 //RX_FDEQ_SUBNUM
|
38 0x0020 //RX_FDEQ_SUBNUM
|
||||||
39 0x7755 //RX_FDEQ_GAIN_0
|
39 0x7755 //RX_FDEQ_GAIN_0
|
||||||
40 0x4A4A //RX_FDEQ_GAIN_1
|
40 0x4A4A //RX_FDEQ_GAIN_1
|
||||||
|
@ -60963,7 +60963,7 @@
|
||||||
121 0x199A //RX_TDDRC_HMNC_GAIN
|
121 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
122 0x0001 //RX_TDDRC_SMT_FLAG
|
122 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
123 0x0CCD //RX_TDDRC_SMT_W
|
123 0x0CCD //RX_TDDRC_SMT_W
|
||||||
124 0x064F //RX_TDDRC_DRC_GAIN
|
124 0x05A0 //RX_TDDRC_DRC_GAIN
|
||||||
38 0x0020 //RX_FDEQ_SUBNUM
|
38 0x0020 //RX_FDEQ_SUBNUM
|
||||||
39 0x8266 //RX_FDEQ_GAIN_0
|
39 0x8266 //RX_FDEQ_GAIN_0
|
||||||
40 0x5252 //RX_FDEQ_GAIN_1
|
40 0x5252 //RX_FDEQ_GAIN_1
|
||||||
|
@ -61062,7 +61062,7 @@
|
||||||
121 0x199A //RX_TDDRC_HMNC_GAIN
|
121 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
122 0x0001 //RX_TDDRC_SMT_FLAG
|
122 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
123 0x0CCD //RX_TDDRC_SMT_W
|
123 0x0CCD //RX_TDDRC_SMT_W
|
||||||
124 0x064F //RX_TDDRC_DRC_GAIN
|
124 0x05A0 //RX_TDDRC_DRC_GAIN
|
||||||
38 0x0020 //RX_FDEQ_SUBNUM
|
38 0x0020 //RX_FDEQ_SUBNUM
|
||||||
39 0x8266 //RX_FDEQ_GAIN_0
|
39 0x8266 //RX_FDEQ_GAIN_0
|
||||||
40 0x5252 //RX_FDEQ_GAIN_1
|
40 0x5252 //RX_FDEQ_GAIN_1
|
||||||
|
@ -61319,7 +61319,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x064F //RX_TDDRC_DRC_GAIN
|
281 0x05A0 //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0020 //RX_FDEQ_SUBNUM
|
195 0x0020 //RX_FDEQ_SUBNUM
|
||||||
196 0x7755 //RX_FDEQ_GAIN_0
|
196 0x7755 //RX_FDEQ_GAIN_0
|
||||||
197 0x4A4A //RX_FDEQ_GAIN_1
|
197 0x4A4A //RX_FDEQ_GAIN_1
|
||||||
|
@ -61418,7 +61418,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x064F //RX_TDDRC_DRC_GAIN
|
281 0x05A0 //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0020 //RX_FDEQ_SUBNUM
|
195 0x0020 //RX_FDEQ_SUBNUM
|
||||||
196 0x7755 //RX_FDEQ_GAIN_0
|
196 0x7755 //RX_FDEQ_GAIN_0
|
||||||
197 0x4A4A //RX_FDEQ_GAIN_1
|
197 0x4A4A //RX_FDEQ_GAIN_1
|
||||||
|
@ -61517,7 +61517,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x064F //RX_TDDRC_DRC_GAIN
|
281 0x05A0 //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0020 //RX_FDEQ_SUBNUM
|
195 0x0020 //RX_FDEQ_SUBNUM
|
||||||
196 0x7755 //RX_FDEQ_GAIN_0
|
196 0x7755 //RX_FDEQ_GAIN_0
|
||||||
197 0x4A4A //RX_FDEQ_GAIN_1
|
197 0x4A4A //RX_FDEQ_GAIN_1
|
||||||
|
@ -61616,7 +61616,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x064F //RX_TDDRC_DRC_GAIN
|
281 0x05A0 //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0020 //RX_FDEQ_SUBNUM
|
195 0x0020 //RX_FDEQ_SUBNUM
|
||||||
196 0x7755 //RX_FDEQ_GAIN_0
|
196 0x7755 //RX_FDEQ_GAIN_0
|
||||||
197 0x4A4A //RX_FDEQ_GAIN_1
|
197 0x4A4A //RX_FDEQ_GAIN_1
|
||||||
|
@ -61715,7 +61715,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x064F //RX_TDDRC_DRC_GAIN
|
281 0x05A0 //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0020 //RX_FDEQ_SUBNUM
|
195 0x0020 //RX_FDEQ_SUBNUM
|
||||||
196 0x7755 //RX_FDEQ_GAIN_0
|
196 0x7755 //RX_FDEQ_GAIN_0
|
||||||
197 0x4A4A //RX_FDEQ_GAIN_1
|
197 0x4A4A //RX_FDEQ_GAIN_1
|
||||||
|
@ -61814,7 +61814,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x064F //RX_TDDRC_DRC_GAIN
|
281 0x05A0 //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0020 //RX_FDEQ_SUBNUM
|
195 0x0020 //RX_FDEQ_SUBNUM
|
||||||
196 0x8266 //RX_FDEQ_GAIN_0
|
196 0x8266 //RX_FDEQ_GAIN_0
|
||||||
197 0x5252 //RX_FDEQ_GAIN_1
|
197 0x5252 //RX_FDEQ_GAIN_1
|
||||||
|
@ -61913,7 +61913,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x064F //RX_TDDRC_DRC_GAIN
|
281 0x05A0 //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0020 //RX_FDEQ_SUBNUM
|
195 0x0020 //RX_FDEQ_SUBNUM
|
||||||
196 0x8266 //RX_FDEQ_GAIN_0
|
196 0x8266 //RX_FDEQ_GAIN_0
|
||||||
197 0x5252 //RX_FDEQ_GAIN_1
|
197 0x5252 //RX_FDEQ_GAIN_1
|
||||||
|
@ -65858,7 +65858,7 @@
|
||||||
121 0x199A //RX_TDDRC_HMNC_GAIN
|
121 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
122 0x0001 //RX_TDDRC_SMT_FLAG
|
122 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
123 0x0CCD //RX_TDDRC_SMT_W
|
123 0x0CCD //RX_TDDRC_SMT_W
|
||||||
124 0x064F //RX_TDDRC_DRC_GAIN
|
124 0x05A0 //RX_TDDRC_DRC_GAIN
|
||||||
38 0x0020 //RX_FDEQ_SUBNUM
|
38 0x0020 //RX_FDEQ_SUBNUM
|
||||||
39 0x7755 //RX_FDEQ_GAIN_0
|
39 0x7755 //RX_FDEQ_GAIN_0
|
||||||
40 0x4A4A //RX_FDEQ_GAIN_1
|
40 0x4A4A //RX_FDEQ_GAIN_1
|
||||||
|
@ -65957,7 +65957,7 @@
|
||||||
121 0x199A //RX_TDDRC_HMNC_GAIN
|
121 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
122 0x0001 //RX_TDDRC_SMT_FLAG
|
122 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
123 0x0CCD //RX_TDDRC_SMT_W
|
123 0x0CCD //RX_TDDRC_SMT_W
|
||||||
124 0x064F //RX_TDDRC_DRC_GAIN
|
124 0x05A0 //RX_TDDRC_DRC_GAIN
|
||||||
38 0x0020 //RX_FDEQ_SUBNUM
|
38 0x0020 //RX_FDEQ_SUBNUM
|
||||||
39 0x7755 //RX_FDEQ_GAIN_0
|
39 0x7755 //RX_FDEQ_GAIN_0
|
||||||
40 0x4A4A //RX_FDEQ_GAIN_1
|
40 0x4A4A //RX_FDEQ_GAIN_1
|
||||||
|
@ -66056,7 +66056,7 @@
|
||||||
121 0x199A //RX_TDDRC_HMNC_GAIN
|
121 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
122 0x0001 //RX_TDDRC_SMT_FLAG
|
122 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
123 0x0CCD //RX_TDDRC_SMT_W
|
123 0x0CCD //RX_TDDRC_SMT_W
|
||||||
124 0x064F //RX_TDDRC_DRC_GAIN
|
124 0x05A0 //RX_TDDRC_DRC_GAIN
|
||||||
38 0x0020 //RX_FDEQ_SUBNUM
|
38 0x0020 //RX_FDEQ_SUBNUM
|
||||||
39 0x7755 //RX_FDEQ_GAIN_0
|
39 0x7755 //RX_FDEQ_GAIN_0
|
||||||
40 0x4A4A //RX_FDEQ_GAIN_1
|
40 0x4A4A //RX_FDEQ_GAIN_1
|
||||||
|
@ -66155,7 +66155,7 @@
|
||||||
121 0x199A //RX_TDDRC_HMNC_GAIN
|
121 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
122 0x0001 //RX_TDDRC_SMT_FLAG
|
122 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
123 0x0CCD //RX_TDDRC_SMT_W
|
123 0x0CCD //RX_TDDRC_SMT_W
|
||||||
124 0x064F //RX_TDDRC_DRC_GAIN
|
124 0x05A0 //RX_TDDRC_DRC_GAIN
|
||||||
38 0x0020 //RX_FDEQ_SUBNUM
|
38 0x0020 //RX_FDEQ_SUBNUM
|
||||||
39 0x7755 //RX_FDEQ_GAIN_0
|
39 0x7755 //RX_FDEQ_GAIN_0
|
||||||
40 0x4A4A //RX_FDEQ_GAIN_1
|
40 0x4A4A //RX_FDEQ_GAIN_1
|
||||||
|
@ -66254,7 +66254,7 @@
|
||||||
121 0x199A //RX_TDDRC_HMNC_GAIN
|
121 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
122 0x0001 //RX_TDDRC_SMT_FLAG
|
122 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
123 0x0CCD //RX_TDDRC_SMT_W
|
123 0x0CCD //RX_TDDRC_SMT_W
|
||||||
124 0x064F //RX_TDDRC_DRC_GAIN
|
124 0x05A0 //RX_TDDRC_DRC_GAIN
|
||||||
38 0x0020 //RX_FDEQ_SUBNUM
|
38 0x0020 //RX_FDEQ_SUBNUM
|
||||||
39 0x7755 //RX_FDEQ_GAIN_0
|
39 0x7755 //RX_FDEQ_GAIN_0
|
||||||
40 0x4A4A //RX_FDEQ_GAIN_1
|
40 0x4A4A //RX_FDEQ_GAIN_1
|
||||||
|
@ -66353,7 +66353,7 @@
|
||||||
121 0x199A //RX_TDDRC_HMNC_GAIN
|
121 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
122 0x0001 //RX_TDDRC_SMT_FLAG
|
122 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
123 0x0CCD //RX_TDDRC_SMT_W
|
123 0x0CCD //RX_TDDRC_SMT_W
|
||||||
124 0x064F //RX_TDDRC_DRC_GAIN
|
124 0x05A0 //RX_TDDRC_DRC_GAIN
|
||||||
38 0x0020 //RX_FDEQ_SUBNUM
|
38 0x0020 //RX_FDEQ_SUBNUM
|
||||||
39 0x8266 //RX_FDEQ_GAIN_0
|
39 0x8266 //RX_FDEQ_GAIN_0
|
||||||
40 0x5252 //RX_FDEQ_GAIN_1
|
40 0x5252 //RX_FDEQ_GAIN_1
|
||||||
|
@ -66452,7 +66452,7 @@
|
||||||
121 0x199A //RX_TDDRC_HMNC_GAIN
|
121 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
122 0x0001 //RX_TDDRC_SMT_FLAG
|
122 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
123 0x0CCD //RX_TDDRC_SMT_W
|
123 0x0CCD //RX_TDDRC_SMT_W
|
||||||
124 0x064F //RX_TDDRC_DRC_GAIN
|
124 0x05A0 //RX_TDDRC_DRC_GAIN
|
||||||
38 0x0020 //RX_FDEQ_SUBNUM
|
38 0x0020 //RX_FDEQ_SUBNUM
|
||||||
39 0x8266 //RX_FDEQ_GAIN_0
|
39 0x8266 //RX_FDEQ_GAIN_0
|
||||||
40 0x5252 //RX_FDEQ_GAIN_1
|
40 0x5252 //RX_FDEQ_GAIN_1
|
||||||
|
@ -66709,7 +66709,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x064F //RX_TDDRC_DRC_GAIN
|
281 0x05A0 //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0020 //RX_FDEQ_SUBNUM
|
195 0x0020 //RX_FDEQ_SUBNUM
|
||||||
196 0x7755 //RX_FDEQ_GAIN_0
|
196 0x7755 //RX_FDEQ_GAIN_0
|
||||||
197 0x4A4A //RX_FDEQ_GAIN_1
|
197 0x4A4A //RX_FDEQ_GAIN_1
|
||||||
|
@ -66808,7 +66808,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x064F //RX_TDDRC_DRC_GAIN
|
281 0x05A0 //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0020 //RX_FDEQ_SUBNUM
|
195 0x0020 //RX_FDEQ_SUBNUM
|
||||||
196 0x7755 //RX_FDEQ_GAIN_0
|
196 0x7755 //RX_FDEQ_GAIN_0
|
||||||
197 0x4A4A //RX_FDEQ_GAIN_1
|
197 0x4A4A //RX_FDEQ_GAIN_1
|
||||||
|
@ -66907,7 +66907,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x064F //RX_TDDRC_DRC_GAIN
|
281 0x05A0 //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0020 //RX_FDEQ_SUBNUM
|
195 0x0020 //RX_FDEQ_SUBNUM
|
||||||
196 0x7755 //RX_FDEQ_GAIN_0
|
196 0x7755 //RX_FDEQ_GAIN_0
|
||||||
197 0x4A4A //RX_FDEQ_GAIN_1
|
197 0x4A4A //RX_FDEQ_GAIN_1
|
||||||
|
@ -67006,7 +67006,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x064F //RX_TDDRC_DRC_GAIN
|
281 0x05A0 //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0020 //RX_FDEQ_SUBNUM
|
195 0x0020 //RX_FDEQ_SUBNUM
|
||||||
196 0x7755 //RX_FDEQ_GAIN_0
|
196 0x7755 //RX_FDEQ_GAIN_0
|
||||||
197 0x4A4A //RX_FDEQ_GAIN_1
|
197 0x4A4A //RX_FDEQ_GAIN_1
|
||||||
|
@ -67105,7 +67105,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x064F //RX_TDDRC_DRC_GAIN
|
281 0x05A0 //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0020 //RX_FDEQ_SUBNUM
|
195 0x0020 //RX_FDEQ_SUBNUM
|
||||||
196 0x7755 //RX_FDEQ_GAIN_0
|
196 0x7755 //RX_FDEQ_GAIN_0
|
||||||
197 0x4A4A //RX_FDEQ_GAIN_1
|
197 0x4A4A //RX_FDEQ_GAIN_1
|
||||||
|
@ -67204,7 +67204,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x064F //RX_TDDRC_DRC_GAIN
|
281 0x05A0 //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0020 //RX_FDEQ_SUBNUM
|
195 0x0020 //RX_FDEQ_SUBNUM
|
||||||
196 0x8266 //RX_FDEQ_GAIN_0
|
196 0x8266 //RX_FDEQ_GAIN_0
|
||||||
197 0x5252 //RX_FDEQ_GAIN_1
|
197 0x5252 //RX_FDEQ_GAIN_1
|
||||||
|
@ -67303,7 +67303,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x064F //RX_TDDRC_DRC_GAIN
|
281 0x05A0 //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0020 //RX_FDEQ_SUBNUM
|
195 0x0020 //RX_FDEQ_SUBNUM
|
||||||
196 0x8266 //RX_FDEQ_GAIN_0
|
196 0x8266 //RX_FDEQ_GAIN_0
|
||||||
197 0x5252 //RX_FDEQ_GAIN_1
|
197 0x5252 //RX_FDEQ_GAIN_1
|
||||||
|
@ -72924,7 +72924,7 @@
|
||||||
147 0x0400 //TX_AEC_REF_GAIN_0
|
147 0x0400 //TX_AEC_REF_GAIN_0
|
||||||
148 0x0800 //TX_AEC_REF_GAIN_1
|
148 0x0800 //TX_AEC_REF_GAIN_1
|
||||||
149 0x0800 //TX_AEC_REF_GAIN_2
|
149 0x0800 //TX_AEC_REF_GAIN_2
|
||||||
150 0x7000 //TX_EAD_THR
|
150 0x7788 //TX_EAD_THR
|
||||||
151 0x1000 //TX_THR_RE_EST
|
151 0x1000 //TX_THR_RE_EST
|
||||||
152 0x1000 //TX_MIN_EQ_RE_EST_0
|
152 0x1000 //TX_MIN_EQ_RE_EST_0
|
||||||
153 0x0600 //TX_MIN_EQ_RE_EST_1
|
153 0x0600 //TX_MIN_EQ_RE_EST_1
|
||||||
|
@ -72939,13 +72939,13 @@
|
||||||
162 0x7800 //TX_MIN_EQ_RE_EST_10
|
162 0x7800 //TX_MIN_EQ_RE_EST_10
|
||||||
163 0x7800 //TX_MIN_EQ_RE_EST_11
|
163 0x7800 //TX_MIN_EQ_RE_EST_11
|
||||||
164 0x7800 //TX_MIN_EQ_RE_EST_12
|
164 0x7800 //TX_MIN_EQ_RE_EST_12
|
||||||
165 0x6000 //TX_LAMBDA_RE_EST
|
165 0x1000 //TX_LAMBDA_RE_EST
|
||||||
166 0x3000 //TX_LAMBDA_CB_NLE
|
166 0x3000 //TX_LAMBDA_CB_NLE
|
||||||
167 0x0000 //TX_C_POST_FLT
|
167 0x0000 //TX_C_POST_FLT
|
||||||
168 0x4000 //TX_GAIN_NP
|
168 0x4000 //TX_GAIN_NP
|
||||||
169 0x0270 //TX_SE_HOLD_N
|
169 0x0270 //TX_SE_HOLD_N
|
||||||
170 0x00C8 //TX_DT_HOLD_N
|
170 0x00C8 //TX_DT_HOLD_N
|
||||||
171 0x0140 //TX_DT2_HOLD_N
|
171 0x01F0 //TX_DT2_HOLD_N
|
||||||
172 0x6666 //TX_AEC_RESRV_0
|
172 0x6666 //TX_AEC_RESRV_0
|
||||||
173 0x0000 //TX_AEC_RESRV_1
|
173 0x0000 //TX_AEC_RESRV_1
|
||||||
174 0x0014 //TX_AEC_RESRV_2
|
174 0x0014 //TX_AEC_RESRV_2
|
||||||
|
@ -72973,18 +72973,18 @@
|
||||||
196 0x0000 //TX_NORMENERHIGHTHL
|
196 0x0000 //TX_NORMENERHIGHTHL
|
||||||
197 0x6D60 //TX_DTD_THR1_0
|
197 0x6D60 //TX_DTD_THR1_0
|
||||||
198 0x5DC0 //TX_DTD_THR1_1
|
198 0x5DC0 //TX_DTD_THR1_1
|
||||||
199 0x7E5E //TX_DTD_THR1_2
|
199 0x64C8 //TX_DTD_THR1_2
|
||||||
200 0x7F8A //TX_DTD_THR1_3
|
200 0x7F8A //TX_DTD_THR1_3
|
||||||
201 0x7FFF //TX_DTD_THR1_4
|
201 0x7FFF //TX_DTD_THR1_4
|
||||||
202 0x7FFF //TX_DTD_THR1_5
|
202 0x7FFF //TX_DTD_THR1_5
|
||||||
203 0x7FFF //TX_DTD_THR1_6
|
203 0x61A8 //TX_DTD_THR1_6
|
||||||
204 0x7E00 //TX_DTD_THR2_0
|
204 0x7E00 //TX_DTD_THR2_0
|
||||||
205 0x7E00 //TX_DTD_THR2_1
|
205 0x7E00 //TX_DTD_THR2_1
|
||||||
206 0x5000 //TX_DTD_THR2_2
|
206 0x7E00 //TX_DTD_THR2_2
|
||||||
207 0x5000 //TX_DTD_THR2_3
|
207 0x5000 //TX_DTD_THR2_3
|
||||||
208 0x5000 //TX_DTD_THR2_4
|
208 0x5000 //TX_DTD_THR2_4
|
||||||
209 0x5000 //TX_DTD_THR2_5
|
209 0x5000 //TX_DTD_THR2_5
|
||||||
210 0x5000 //TX_DTD_THR2_6
|
210 0x7E00 //TX_DTD_THR2_6
|
||||||
211 0x7FFF //TX_DTD_THR3
|
211 0x7FFF //TX_DTD_THR3
|
||||||
212 0x0000 //TX_SPK_CUT_K
|
212 0x0000 //TX_SPK_CUT_K
|
||||||
213 0x3E80 //TX_DT_CUT_K
|
213 0x3E80 //TX_DT_CUT_K
|
||||||
|
@ -72999,16 +72999,16 @@
|
||||||
222 0x023E //TX_ADPT_STRICT_H
|
222 0x023E //TX_ADPT_STRICT_H
|
||||||
223 0x0001 //TX_RATIO_DT_L_TH_LOW
|
223 0x0001 //TX_RATIO_DT_L_TH_LOW
|
||||||
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
|
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
|
||||||
225 0x157C //TX_RATIO_DT_L_TH_HIGH
|
225 0x3E80 //TX_RATIO_DT_L_TH_HIGH
|
||||||
226 0x6590 //TX_RATIO_DT_H_TH_HIGH
|
226 0x6590 //TX_RATIO_DT_H_TH_HIGH
|
||||||
227 0x0001 //TX_RATIO_DT_L0_TH
|
227 0x0001 //TX_RATIO_DT_L0_TH
|
||||||
228 0x2000 //TX_B_POST_FILT_ECHO_L
|
228 0x7FFF //TX_B_POST_FILT_ECHO_L
|
||||||
229 0x7FFF //TX_B_POST_FILT_ECHO_H
|
229 0x7FFF //TX_B_POST_FILT_ECHO_H
|
||||||
230 0x0200 //TX_MIN_G_CTRL_ECHO
|
230 0x0200 //TX_MIN_G_CTRL_ECHO
|
||||||
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
|
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
|
||||||
232 0x0000 //TX_EPD_OFFSET_00
|
232 0x0000 //TX_EPD_OFFSET_00
|
||||||
233 0x0000 //TX_EPD_OFFST_01
|
233 0x0000 //TX_EPD_OFFST_01
|
||||||
234 0x0DAC //TX_RATIO_DT_L0_TH_HIGH
|
234 0x0FA0 //TX_RATIO_DT_L0_TH_HIGH
|
||||||
235 0x7FFF //TX_RATIO_DT_H_TH_CUT
|
235 0x7FFF //TX_RATIO_DT_H_TH_CUT
|
||||||
236 0x7FFF //TX_MIN_EQ_RE_EST_13
|
236 0x7FFF //TX_MIN_EQ_RE_EST_13
|
||||||
237 0x0000 //TX_DTD_THR1_7
|
237 0x0000 //TX_DTD_THR1_7
|
||||||
|
@ -73349,8 +73349,8 @@
|
||||||
572 0x5254 //TX_FDEQ_GAIN_5
|
572 0x5254 //TX_FDEQ_GAIN_5
|
||||||
573 0x5C5C //TX_FDEQ_GAIN_6
|
573 0x5C5C //TX_FDEQ_GAIN_6
|
||||||
574 0x5C5A //TX_FDEQ_GAIN_7
|
574 0x5C5A //TX_FDEQ_GAIN_7
|
||||||
575 0x5654 //TX_FDEQ_GAIN_8
|
575 0x565A //TX_FDEQ_GAIN_8
|
||||||
576 0x5050 //TX_FDEQ_GAIN_9
|
576 0x5650 //TX_FDEQ_GAIN_9
|
||||||
577 0x5454 //TX_FDEQ_GAIN_10
|
577 0x5454 //TX_FDEQ_GAIN_10
|
||||||
578 0x4C54 //TX_FDEQ_GAIN_11
|
578 0x4C54 //TX_FDEQ_GAIN_11
|
||||||
579 0x5458 //TX_FDEQ_GAIN_12
|
579 0x5458 //TX_FDEQ_GAIN_12
|
||||||
|
@ -73640,7 +73640,7 @@
|
||||||
863 0x199A //TX_TDDRC_HMNC_GAIN
|
863 0x199A //TX_TDDRC_HMNC_GAIN
|
||||||
864 0x0000 //TX_TDDRC_SMT_FLAG
|
864 0x0000 //TX_TDDRC_SMT_FLAG
|
||||||
865 0x0CCD //TX_TDDRC_SMT_W
|
865 0x0CCD //TX_TDDRC_SMT_W
|
||||||
866 0x1523 //TX_TDDRC_DRC_GAIN
|
866 0x13F4 //TX_TDDRC_DRC_GAIN
|
||||||
867 0x7FFF //TX_TDDRC_LMT_THRD
|
867 0x7FFF //TX_TDDRC_LMT_THRD
|
||||||
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
||||||
869 0x0000 //TX_TFMASKLTH
|
869 0x0000 //TX_TFMASKLTH
|
||||||
|
@ -73719,14 +73719,14 @@
|
||||||
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
|
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
|
||||||
943 0x0100 //TX_MIC_VOLUME_MIC1MUTE
|
943 0x0100 //TX_MIC_VOLUME_MIC1MUTE
|
||||||
944 0xE4A8 //TX_TFMASKM4_2_DT_THR
|
944 0xE4A8 //TX_TFMASKM4_2_DT_THR
|
||||||
945 0x6590 //TX_MEAN_GAIN500HZ_DT_THR
|
945 0x7436 //TX_MEAN_GAIN500HZ_DT_THR
|
||||||
946 0x000A //TX_MUTE_REF_POW_TH
|
946 0x000A //TX_MUTE_REF_POW_TH
|
||||||
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
||||||
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
||||||
949 0x4000 //TX_PRE_MASK_SUP
|
949 0x4000 //TX_PRE_MASK_SUP
|
||||||
950 0x00C0 //TX_SDPCRN_GAIN
|
950 0x00C0 //TX_SDPCRN_GAIN
|
||||||
951 0x7333 //TX_EASSA_CUT_GAINTH
|
951 0x7333 //TX_EASSA_CUT_GAINTH
|
||||||
952 0x0100 //TX_DT_HARME_ENDF
|
952 0x0002 //TX_DT_HARME_ENDF
|
||||||
953 0x7FFF //TX_NSSAMASK_MORENS
|
953 0x7FFF //TX_NSSAMASK_MORENS
|
||||||
954 0x1000 //TX_CGMMMASK_MORENS
|
954 0x1000 //TX_CGMMMASK_MORENS
|
||||||
955 0x0CCD //TX_DPCRN_MASK_MORENS_ECHO
|
955 0x0CCD //TX_DPCRN_MASK_MORENS_ECHO
|
||||||
|
@ -78314,7 +78314,7 @@
|
||||||
147 0x0400 //TX_AEC_REF_GAIN_0
|
147 0x0400 //TX_AEC_REF_GAIN_0
|
||||||
148 0x0800 //TX_AEC_REF_GAIN_1
|
148 0x0800 //TX_AEC_REF_GAIN_1
|
||||||
149 0x0800 //TX_AEC_REF_GAIN_2
|
149 0x0800 //TX_AEC_REF_GAIN_2
|
||||||
150 0x7000 //TX_EAD_THR
|
150 0x7788 //TX_EAD_THR
|
||||||
151 0x1000 //TX_THR_RE_EST
|
151 0x1000 //TX_THR_RE_EST
|
||||||
152 0x1000 //TX_MIN_EQ_RE_EST_0
|
152 0x1000 //TX_MIN_EQ_RE_EST_0
|
||||||
153 0x0600 //TX_MIN_EQ_RE_EST_1
|
153 0x0600 //TX_MIN_EQ_RE_EST_1
|
||||||
|
@ -78329,13 +78329,13 @@
|
||||||
162 0x7800 //TX_MIN_EQ_RE_EST_10
|
162 0x7800 //TX_MIN_EQ_RE_EST_10
|
||||||
163 0x7800 //TX_MIN_EQ_RE_EST_11
|
163 0x7800 //TX_MIN_EQ_RE_EST_11
|
||||||
164 0x7800 //TX_MIN_EQ_RE_EST_12
|
164 0x7800 //TX_MIN_EQ_RE_EST_12
|
||||||
165 0x6000 //TX_LAMBDA_RE_EST
|
165 0x1000 //TX_LAMBDA_RE_EST
|
||||||
166 0x3000 //TX_LAMBDA_CB_NLE
|
166 0x3000 //TX_LAMBDA_CB_NLE
|
||||||
167 0x0000 //TX_C_POST_FLT
|
167 0x0000 //TX_C_POST_FLT
|
||||||
168 0x4000 //TX_GAIN_NP
|
168 0x4000 //TX_GAIN_NP
|
||||||
169 0x0270 //TX_SE_HOLD_N
|
169 0x0270 //TX_SE_HOLD_N
|
||||||
170 0x00C8 //TX_DT_HOLD_N
|
170 0x00C8 //TX_DT_HOLD_N
|
||||||
171 0x0140 //TX_DT2_HOLD_N
|
171 0x01F0 //TX_DT2_HOLD_N
|
||||||
172 0x6666 //TX_AEC_RESRV_0
|
172 0x6666 //TX_AEC_RESRV_0
|
||||||
173 0x0000 //TX_AEC_RESRV_1
|
173 0x0000 //TX_AEC_RESRV_1
|
||||||
174 0x0014 //TX_AEC_RESRV_2
|
174 0x0014 //TX_AEC_RESRV_2
|
||||||
|
@ -78363,18 +78363,18 @@
|
||||||
196 0x0000 //TX_NORMENERHIGHTHL
|
196 0x0000 //TX_NORMENERHIGHTHL
|
||||||
197 0x6D60 //TX_DTD_THR1_0
|
197 0x6D60 //TX_DTD_THR1_0
|
||||||
198 0x5DC0 //TX_DTD_THR1_1
|
198 0x5DC0 //TX_DTD_THR1_1
|
||||||
199 0x7E5E //TX_DTD_THR1_2
|
199 0x64C8 //TX_DTD_THR1_2
|
||||||
200 0x7F8A //TX_DTD_THR1_3
|
200 0x7F8A //TX_DTD_THR1_3
|
||||||
201 0x7FFF //TX_DTD_THR1_4
|
201 0x7FFF //TX_DTD_THR1_4
|
||||||
202 0x7FFF //TX_DTD_THR1_5
|
202 0x7FFF //TX_DTD_THR1_5
|
||||||
203 0x7FFF //TX_DTD_THR1_6
|
203 0x61A8 //TX_DTD_THR1_6
|
||||||
204 0x7E00 //TX_DTD_THR2_0
|
204 0x7E00 //TX_DTD_THR2_0
|
||||||
205 0x7E00 //TX_DTD_THR2_1
|
205 0x7E00 //TX_DTD_THR2_1
|
||||||
206 0x5000 //TX_DTD_THR2_2
|
206 0x7E00 //TX_DTD_THR2_2
|
||||||
207 0x5000 //TX_DTD_THR2_3
|
207 0x5000 //TX_DTD_THR2_3
|
||||||
208 0x5000 //TX_DTD_THR2_4
|
208 0x5000 //TX_DTD_THR2_4
|
||||||
209 0x5000 //TX_DTD_THR2_5
|
209 0x5000 //TX_DTD_THR2_5
|
||||||
210 0x5000 //TX_DTD_THR2_6
|
210 0x7E00 //TX_DTD_THR2_6
|
||||||
211 0x7FFF //TX_DTD_THR3
|
211 0x7FFF //TX_DTD_THR3
|
||||||
212 0x0000 //TX_SPK_CUT_K
|
212 0x0000 //TX_SPK_CUT_K
|
||||||
213 0x3E80 //TX_DT_CUT_K
|
213 0x3E80 //TX_DT_CUT_K
|
||||||
|
@ -78389,16 +78389,16 @@
|
||||||
222 0x023E //TX_ADPT_STRICT_H
|
222 0x023E //TX_ADPT_STRICT_H
|
||||||
223 0x0001 //TX_RATIO_DT_L_TH_LOW
|
223 0x0001 //TX_RATIO_DT_L_TH_LOW
|
||||||
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
|
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
|
||||||
225 0x157C //TX_RATIO_DT_L_TH_HIGH
|
225 0x3E80 //TX_RATIO_DT_L_TH_HIGH
|
||||||
226 0x6590 //TX_RATIO_DT_H_TH_HIGH
|
226 0x6590 //TX_RATIO_DT_H_TH_HIGH
|
||||||
227 0x0001 //TX_RATIO_DT_L0_TH
|
227 0x0001 //TX_RATIO_DT_L0_TH
|
||||||
228 0x2000 //TX_B_POST_FILT_ECHO_L
|
228 0x7FFF //TX_B_POST_FILT_ECHO_L
|
||||||
229 0x7FFF //TX_B_POST_FILT_ECHO_H
|
229 0x7FFF //TX_B_POST_FILT_ECHO_H
|
||||||
230 0x0200 //TX_MIN_G_CTRL_ECHO
|
230 0x0200 //TX_MIN_G_CTRL_ECHO
|
||||||
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
|
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
|
||||||
232 0x0000 //TX_EPD_OFFSET_00
|
232 0x0000 //TX_EPD_OFFSET_00
|
||||||
233 0x0000 //TX_EPD_OFFST_01
|
233 0x0000 //TX_EPD_OFFST_01
|
||||||
234 0x0DAC //TX_RATIO_DT_L0_TH_HIGH
|
234 0x0FA0 //TX_RATIO_DT_L0_TH_HIGH
|
||||||
235 0x7FFF //TX_RATIO_DT_H_TH_CUT
|
235 0x7FFF //TX_RATIO_DT_H_TH_CUT
|
||||||
236 0x7FFF //TX_MIN_EQ_RE_EST_13
|
236 0x7FFF //TX_MIN_EQ_RE_EST_13
|
||||||
237 0x0000 //TX_DTD_THR1_7
|
237 0x0000 //TX_DTD_THR1_7
|
||||||
|
@ -78739,8 +78739,8 @@
|
||||||
572 0x5254 //TX_FDEQ_GAIN_5
|
572 0x5254 //TX_FDEQ_GAIN_5
|
||||||
573 0x5C5C //TX_FDEQ_GAIN_6
|
573 0x5C5C //TX_FDEQ_GAIN_6
|
||||||
574 0x5C5A //TX_FDEQ_GAIN_7
|
574 0x5C5A //TX_FDEQ_GAIN_7
|
||||||
575 0x5654 //TX_FDEQ_GAIN_8
|
575 0x565A //TX_FDEQ_GAIN_8
|
||||||
576 0x5050 //TX_FDEQ_GAIN_9
|
576 0x5650 //TX_FDEQ_GAIN_9
|
||||||
577 0x5454 //TX_FDEQ_GAIN_10
|
577 0x5454 //TX_FDEQ_GAIN_10
|
||||||
578 0x4C54 //TX_FDEQ_GAIN_11
|
578 0x4C54 //TX_FDEQ_GAIN_11
|
||||||
579 0x5458 //TX_FDEQ_GAIN_12
|
579 0x5458 //TX_FDEQ_GAIN_12
|
||||||
|
@ -79030,7 +79030,7 @@
|
||||||
863 0x199A //TX_TDDRC_HMNC_GAIN
|
863 0x199A //TX_TDDRC_HMNC_GAIN
|
||||||
864 0x0000 //TX_TDDRC_SMT_FLAG
|
864 0x0000 //TX_TDDRC_SMT_FLAG
|
||||||
865 0x0CCD //TX_TDDRC_SMT_W
|
865 0x0CCD //TX_TDDRC_SMT_W
|
||||||
866 0x1523 //TX_TDDRC_DRC_GAIN
|
866 0x13F4 //TX_TDDRC_DRC_GAIN
|
||||||
867 0x7FFF //TX_TDDRC_LMT_THRD
|
867 0x7FFF //TX_TDDRC_LMT_THRD
|
||||||
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
||||||
869 0x0000 //TX_TFMASKLTH
|
869 0x0000 //TX_TFMASKLTH
|
||||||
|
@ -79109,14 +79109,14 @@
|
||||||
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
|
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
|
||||||
943 0x0100 //TX_MIC_VOLUME_MIC1MUTE
|
943 0x0100 //TX_MIC_VOLUME_MIC1MUTE
|
||||||
944 0xE4A8 //TX_TFMASKM4_2_DT_THR
|
944 0xE4A8 //TX_TFMASKM4_2_DT_THR
|
||||||
945 0x6590 //TX_MEAN_GAIN500HZ_DT_THR
|
945 0x7436 //TX_MEAN_GAIN500HZ_DT_THR
|
||||||
946 0x000A //TX_MUTE_REF_POW_TH
|
946 0x000A //TX_MUTE_REF_POW_TH
|
||||||
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
||||||
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
||||||
949 0x4000 //TX_PRE_MASK_SUP
|
949 0x4000 //TX_PRE_MASK_SUP
|
||||||
950 0x00C0 //TX_SDPCRN_GAIN
|
950 0x00C0 //TX_SDPCRN_GAIN
|
||||||
951 0x7333 //TX_EASSA_CUT_GAINTH
|
951 0x7333 //TX_EASSA_CUT_GAINTH
|
||||||
952 0x0100 //TX_DT_HARME_ENDF
|
952 0x0002 //TX_DT_HARME_ENDF
|
||||||
953 0x7FFF //TX_NSSAMASK_MORENS
|
953 0x7FFF //TX_NSSAMASK_MORENS
|
||||||
954 0x1000 //TX_CGMMMASK_MORENS
|
954 0x1000 //TX_CGMMMASK_MORENS
|
||||||
955 0x0CCD //TX_DPCRN_MASK_MORENS_ECHO
|
955 0x0CCD //TX_DPCRN_MASK_MORENS_ECHO
|
||||||
|
|
|
@ -71,8 +71,6 @@
|
||||||
<ctl name="R ASPTX4 Slot Position" value="7" />
|
<ctl name="R ASPTX4 Slot Position" value="7" />
|
||||||
|
|
||||||
<!-- Cirrus Booster Amp DRE and VBST config-->
|
<!-- Cirrus Booster Amp DRE and VBST config-->
|
||||||
<ctl name="VBSTMON Output Switch" value="1" />
|
|
||||||
<ctl name="R VBSTMON Output Switch" value="1" />
|
|
||||||
<ctl name="DRE DRE Switch" value="1" />
|
<ctl name="DRE DRE Switch" value="1" />
|
||||||
<ctl name="R DRE DRE Switch" value="1" />
|
<ctl name="R DRE DRE Switch" value="1" />
|
||||||
|
|
||||||
|
@ -144,7 +142,6 @@
|
||||||
<ctl name="TDM_1_RX Mixer EP5" value="0" />
|
<ctl name="TDM_1_RX Mixer EP5" value="0" />
|
||||||
<ctl name="TDM_1_RX Mixer EP6" value="0" />
|
<ctl name="TDM_1_RX Mixer EP6" value="0" />
|
||||||
<ctl name="TDM_1_RX Mixer EP7" value="0" />
|
<ctl name="TDM_1_RX Mixer EP7" value="0" />
|
||||||
<ctl name="TDM_1_RX Mixer EP8" value="0" />
|
|
||||||
<ctl name="TDM_1_RX Mixer NoHost1" value="0" />
|
<ctl name="TDM_1_RX Mixer NoHost1" value="0" />
|
||||||
|
|
||||||
<ctl name="USB_RX Mixer EP1" value="0" />
|
<ctl name="USB_RX Mixer EP1" value="0" />
|
||||||
|
@ -1226,53 +1223,9 @@
|
||||||
<ctl name="NoHost1 TX Mixer TDM_0_TX" value="1" />
|
<ctl name="NoHost1 TX Mixer TDM_0_TX" value="1" />
|
||||||
</path>
|
</path>
|
||||||
|
|
||||||
<path name="telephony-rx (VOICE_DOWNLINK) -> in-call-capture-0">
|
<path name="in-call-capture-source-0 -> in-call-capture-0" />
|
||||||
<ctl name="Incall Capture Stream0" value="DL" />
|
<path name="in-call-capture-source-1 -> in-call-capture-1" />
|
||||||
</path>
|
<path name="in-call-capture-source-2 -> in-call-capture-2" />
|
||||||
|
|
||||||
<path name="telephony-rx (VOICE_UPLINK) -> in-call-capture-0">
|
|
||||||
<ctl name="Incall Capture Stream0" value="UL" />
|
|
||||||
</path>
|
|
||||||
|
|
||||||
<path name="telephony-rx (VOICE_CALL) -> in-call-capture-0">
|
|
||||||
<ctl name="Incall Capture Stream0" value="UL_DL" />
|
|
||||||
</path>
|
|
||||||
|
|
||||||
<path name="telephony-rx -> in-call-capture-0">
|
|
||||||
<ctl name="Incall Capture Stream0" value="DL" />
|
|
||||||
</path>
|
|
||||||
|
|
||||||
<path name="telephony-rx (VOICE_DOWNLINK) -> in-call-capture-1">
|
|
||||||
<ctl name="Incall Capture Stream1" value="DL" />
|
|
||||||
</path>
|
|
||||||
|
|
||||||
<path name="telephony-rx (VOICE_UPLINK) -> in-call-capture-1">
|
|
||||||
<ctl name="Incall Capture Stream1" value="UL" />
|
|
||||||
</path>
|
|
||||||
|
|
||||||
<path name="telephony-rx (VOICE_CALL) -> in-call-capture-1">
|
|
||||||
<ctl name="Incall Capture Stream1" value="UL_DL" />
|
|
||||||
</path>
|
|
||||||
|
|
||||||
<path name="telephony-rx -> in-call-capture-1">
|
|
||||||
<ctl name="Incall Capture Stream1" value="DL" />
|
|
||||||
</path>
|
|
||||||
|
|
||||||
<path name="telephony-rx (VOICE_DOWNLINK) -> in-call-capture-2">
|
|
||||||
<ctl name="Incall Capture Stream2" value="DL" />
|
|
||||||
</path>
|
|
||||||
|
|
||||||
<path name="telephony-rx (VOICE_UPLINK) -> in-call-capture-2">
|
|
||||||
<ctl name="Incall Capture Stream2" value="UL" />
|
|
||||||
</path>
|
|
||||||
|
|
||||||
<path name="telephony-rx (VOICE_CALL) -> in-call-capture-2">
|
|
||||||
<ctl name="Incall Capture Stream2" value="UL_DL" />
|
|
||||||
</path>
|
|
||||||
|
|
||||||
<path name="telephony-rx -> in-call-capture-2">
|
|
||||||
<ctl name="Incall Capture Stream2" value="DL" />
|
|
||||||
</path>
|
|
||||||
|
|
||||||
<!-- codec setting -->
|
<!-- codec setting -->
|
||||||
<!-- Rx device -->
|
<!-- Rx device -->
|
||||||
|
@ -1419,6 +1372,54 @@
|
||||||
<path name="usb-microphones" />
|
<path name="usb-microphones" />
|
||||||
</path>
|
</path>
|
||||||
|
|
||||||
|
<path name="in-call-capture-source-0 (VOICE_DOWNLINK)">
|
||||||
|
<ctl name="Incall Capture Stream0" value="DL" />
|
||||||
|
</path>
|
||||||
|
|
||||||
|
<path name="in-call-capture-source-0 (VOICE_UPLINK)">
|
||||||
|
<ctl name="Incall Capture Stream0" value="UL" />
|
||||||
|
</path>
|
||||||
|
|
||||||
|
<path name="in-call-capture-source-0 (VOICE_CALL)">
|
||||||
|
<ctl name="Incall Capture Stream0" value="UL_DL" />
|
||||||
|
</path>
|
||||||
|
|
||||||
|
<path name="in-call-capture-source-0">
|
||||||
|
<path name="in-call-capture-source-0 (VOICE_DOWNLINK)" />
|
||||||
|
</path>
|
||||||
|
|
||||||
|
<path name="in-call-capture-source-1 (VOICE_DOWNLINK)">
|
||||||
|
<ctl name="Incall Capture Stream1" value="DL" />
|
||||||
|
</path>
|
||||||
|
|
||||||
|
<path name="in-call-capture-source-1 (VOICE_UPLINK)">
|
||||||
|
<ctl name="Incall Capture Stream1" value="UL" />
|
||||||
|
</path>
|
||||||
|
|
||||||
|
<path name="in-call-capture-source-1 (VOICE_CALL)">
|
||||||
|
<ctl name="Incall Capture Stream1" value="UL_DL" />
|
||||||
|
</path>
|
||||||
|
|
||||||
|
<path name="in-call-capture-source-1">
|
||||||
|
<path name="in-call-capture-source-1 (VOICE_DOWNLINK)" />
|
||||||
|
</path>
|
||||||
|
|
||||||
|
<path name="in-call-capture-source-2 (VOICE_DOWNLINK)">
|
||||||
|
<ctl name="Incall Capture Stream2" value="DL" />
|
||||||
|
</path>
|
||||||
|
|
||||||
|
<path name="in-call-capture-source-2 (VOICE_UPLINK)">
|
||||||
|
<ctl name="Incall Capture Stream2" value="UL" />
|
||||||
|
</path>
|
||||||
|
|
||||||
|
<path name="in-call-capture-source-2 (VOICE_CALL)">
|
||||||
|
<ctl name="Incall Capture Stream2" value="UL_DL" />
|
||||||
|
</path>
|
||||||
|
|
||||||
|
<path name="in-call-capture-source-2">
|
||||||
|
<path name="in-call-capture-source-2 (VOICE_DOWNLINK)" />
|
||||||
|
</path>
|
||||||
|
|
||||||
<!-- cs35l41 specific path to load firmware in cs35l41.c -->
|
<!-- cs35l41 specific path to load firmware in cs35l41.c -->
|
||||||
<path name="cs35l41-load-protection-firmware-start">
|
<path name="cs35l41-load-protection-firmware-start">
|
||||||
<!-- Enable it after get the protection firmware -->
|
<!-- Enable it after get the protection firmware -->
|
||||||
|
|
Binary file not shown.
|
@ -3,7 +3,7 @@
|
||||||
#EXPORT_FLAG BLUETOOTH
|
#EXPORT_FLAG BLUETOOTH
|
||||||
#PARAM_MODE FULL
|
#PARAM_MODE FULL
|
||||||
#SAVE_MODE 3
|
#SAVE_MODE 3
|
||||||
#SAVE_TIME 2024-04-12 14:45:30
|
#SAVE_TIME 2024-04-19 13:46:50
|
||||||
|
|
||||||
#CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-NB
|
#CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-NB
|
||||||
#PARAM_TYPE TX+2RX
|
#PARAM_TYPE TX+2RX
|
||||||
|
@ -3603,8 +3603,8 @@
|
||||||
896 0xD999 //TX_FASTNS_SSA_THHFH
|
896 0xD999 //TX_FASTNS_SSA_THHFH
|
||||||
897 0x2339 //TX_SENDFUNC_REG_MICMUTE
|
897 0x2339 //TX_SENDFUNC_REG_MICMUTE
|
||||||
898 0x0020 //TX_SENDFUNC_REG_MICMUTE1
|
898 0x0020 //TX_SENDFUNC_REG_MICMUTE1
|
||||||
899 0x0280 //TX_MICMUTE_RATIO_THR
|
899 0x0320 //TX_MICMUTE_RATIO_THR
|
||||||
900 0x0280 //TX_MICMUTE_AMP_THR
|
900 0x02D0 //TX_MICMUTE_AMP_THR
|
||||||
901 0x0000 //TX_MICMUTE_HPF_IND
|
901 0x0000 //TX_MICMUTE_HPF_IND
|
||||||
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
||||||
903 0x0008 //TX_MICMUTE_CVG_TIME
|
903 0x0008 //TX_MICMUTE_CVG_TIME
|
||||||
|
@ -3612,36 +3612,36 @@
|
||||||
905 0x0C00 //TX_MIC_VOLUME_MIC0MUTE
|
905 0x0C00 //TX_MIC_VOLUME_MIC0MUTE
|
||||||
906 0x0000 //TX_MICMUTE_DIST2REF_1
|
906 0x0000 //TX_MICMUTE_DIST2REF_1
|
||||||
907 0x001E //TX_MICMUTE_FRQ_AEC_L
|
907 0x001E //TX_MICMUTE_FRQ_AEC_L
|
||||||
908 0x7999 //TX_MICMUTE_EAD_THR
|
908 0x7C00 //TX_MICMUTE_EAD_THR
|
||||||
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
||||||
910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
|
910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
|
||||||
911 0x7530 //TX_DTD_THR1_MICMUTE_0
|
911 0x7AA8 //TX_DTD_THR1_MICMUTE_0
|
||||||
912 0x7FBC //TX_DTD_THR1_MICMUTE_1
|
912 0x7EF4 //TX_DTD_THR1_MICMUTE_1
|
||||||
913 0x7F58 //TX_DTD_THR1_MICMUTE_2
|
913 0x7D00 //TX_DTD_THR1_MICMUTE_2
|
||||||
914 0x6D60 //TX_DTD_THR1_MICMUTE_3
|
914 0x6D60 //TX_DTD_THR1_MICMUTE_3
|
||||||
915 0x4000 //TX_DTD_THR2_MICMUTE_0
|
915 0x7FFF //TX_DTD_THR2_MICMUTE_0
|
||||||
916 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
916 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
||||||
917 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
917 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
||||||
918 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
918 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
||||||
919 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
919 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
||||||
920 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
920 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
||||||
921 0x4000 //TX_MICMUTE_C_POST_FLT
|
921 0x1000 //TX_MICMUTE_C_POST_FLT
|
||||||
922 0x1F40 //TX_MICMUTE_DT_CUT_K
|
922 0x1F40 //TX_MICMUTE_DT_CUT_K
|
||||||
923 0x0100 //TX_MICMUTE_DT_CUT_THR
|
923 0x0100 //TX_MICMUTE_DT_CUT_THR
|
||||||
924 0x1F40 //TX_MICMUTE_DT_CUT_K2
|
924 0x1F40 //TX_MICMUTE_DT_CUT_K2
|
||||||
925 0x0100 //TX_MICMUTE_DT_CUT_THR2
|
925 0x0100 //TX_MICMUTE_DT_CUT_THR2
|
||||||
926 0x0100 //TX_MICMUTE_DT2_HOLD_N
|
926 0x0080 //TX_MICMUTE_DT2_HOLD_N
|
||||||
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
||||||
928 0x3000 //TX_MICMUTE_B_POST_FLT_ECHOL
|
928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
|
||||||
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
||||||
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
||||||
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
||||||
932 0x0258 //TX_MICMUTE_DT_CUT_K1
|
932 0x0258 //TX_MICMUTE_DT_CUT_K1
|
||||||
933 0x0800 //TX_MICMUTE_POST_MASK_SUP
|
933 0x7200 //TX_MICMUTE_POST_MASK_SUP
|
||||||
934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP
|
934 0x4000 //TX_MICMUTE_PRE_MASK_SUP
|
||||||
935 0x001C //TX_MICMUTE_SDPCRN_GAIN
|
935 0x0100 //TX_MICMUTE_SDPCRN_GAIN
|
||||||
936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS
|
936 0x4000 //TX_MICMUTE_NSSAMASK_MORENS
|
||||||
937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS
|
937 0x0100 //TX_MICMUTE_CGMMMASK_MORENS
|
||||||
938 0x2710 //TX_MIC1RUB_AMP_THR
|
938 0x2710 //TX_MIC1RUB_AMP_THR
|
||||||
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
||||||
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
||||||
|
@ -5973,15 +5973,15 @@
|
||||||
571 0x4746 //TX_FDEQ_GAIN_4
|
571 0x4746 //TX_FDEQ_GAIN_4
|
||||||
572 0x4955 //TX_FDEQ_GAIN_5
|
572 0x4955 //TX_FDEQ_GAIN_5
|
||||||
573 0x5664 //TX_FDEQ_GAIN_6
|
573 0x5664 //TX_FDEQ_GAIN_6
|
||||||
574 0x5C5E //TX_FDEQ_GAIN_7
|
574 0x5C64 //TX_FDEQ_GAIN_7
|
||||||
575 0x5A54 //TX_FDEQ_GAIN_8
|
575 0x605A //TX_FDEQ_GAIN_8
|
||||||
576 0x5856 //TX_FDEQ_GAIN_9
|
576 0x5A53 //TX_FDEQ_GAIN_9
|
||||||
577 0x5552 //TX_FDEQ_GAIN_10
|
577 0x524F //TX_FDEQ_GAIN_10
|
||||||
578 0x635D //TX_FDEQ_GAIN_11
|
578 0x6761 //TX_FDEQ_GAIN_11
|
||||||
579 0x7663 //TX_FDEQ_GAIN_12
|
579 0x7863 //TX_FDEQ_GAIN_12
|
||||||
580 0x7A8C //TX_FDEQ_GAIN_13
|
580 0x7A92 //TX_FDEQ_GAIN_13
|
||||||
581 0x929C //TX_FDEQ_GAIN_14
|
581 0x9590 //TX_FDEQ_GAIN_14
|
||||||
582 0x9C9C //TX_FDEQ_GAIN_15
|
582 0x9090 //TX_FDEQ_GAIN_15
|
||||||
583 0x4848 //TX_FDEQ_GAIN_16
|
583 0x4848 //TX_FDEQ_GAIN_16
|
||||||
584 0x4848 //TX_FDEQ_GAIN_17
|
584 0x4848 //TX_FDEQ_GAIN_17
|
||||||
585 0x4848 //TX_FDEQ_GAIN_18
|
585 0x4848 //TX_FDEQ_GAIN_18
|
||||||
|
@ -6000,8 +6000,8 @@
|
||||||
598 0x090A //TX_FDEQ_BIN_7
|
598 0x090A //TX_FDEQ_BIN_7
|
||||||
599 0x0B0C //TX_FDEQ_BIN_8
|
599 0x0B0C //TX_FDEQ_BIN_8
|
||||||
600 0x0D0E //TX_FDEQ_BIN_9
|
600 0x0D0E //TX_FDEQ_BIN_9
|
||||||
601 0x1122 //TX_FDEQ_BIN_10
|
601 0x111E //TX_FDEQ_BIN_10
|
||||||
602 0x0719 //TX_FDEQ_BIN_11
|
602 0x0B19 //TX_FDEQ_BIN_11
|
||||||
603 0x1B1E //TX_FDEQ_BIN_12
|
603 0x1B1E //TX_FDEQ_BIN_12
|
||||||
604 0x1E1E //TX_FDEQ_BIN_13
|
604 0x1E1E //TX_FDEQ_BIN_13
|
||||||
605 0x1E28 //TX_FDEQ_BIN_14
|
605 0x1E28 //TX_FDEQ_BIN_14
|
||||||
|
@ -6265,7 +6265,7 @@
|
||||||
863 0x199A //TX_TDDRC_HMNC_GAIN
|
863 0x199A //TX_TDDRC_HMNC_GAIN
|
||||||
864 0x0000 //TX_TDDRC_SMT_FLAG
|
864 0x0000 //TX_TDDRC_SMT_FLAG
|
||||||
865 0x0CCD //TX_TDDRC_SMT_W
|
865 0x0CCD //TX_TDDRC_SMT_W
|
||||||
866 0x188C //TX_TDDRC_DRC_GAIN
|
866 0x17B7 //TX_TDDRC_DRC_GAIN
|
||||||
867 0x7FFF //TX_TDDRC_LMT_THRD
|
867 0x7FFF //TX_TDDRC_LMT_THRD
|
||||||
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
||||||
869 0x0000 //TX_TFMASKLTH
|
869 0x0000 //TX_TFMASKLTH
|
||||||
|
@ -6298,8 +6298,8 @@
|
||||||
896 0xD999 //TX_FASTNS_SSA_THHFH
|
896 0xD999 //TX_FASTNS_SSA_THHFH
|
||||||
897 0x2379 //TX_SENDFUNC_REG_MICMUTE
|
897 0x2379 //TX_SENDFUNC_REG_MICMUTE
|
||||||
898 0x0020 //TX_SENDFUNC_REG_MICMUTE1
|
898 0x0020 //TX_SENDFUNC_REG_MICMUTE1
|
||||||
899 0x028A //TX_MICMUTE_RATIO_THR
|
899 0x02E0 //TX_MICMUTE_RATIO_THR
|
||||||
900 0x0267 //TX_MICMUTE_AMP_THR
|
900 0x02D0 //TX_MICMUTE_AMP_THR
|
||||||
901 0x0000 //TX_MICMUTE_HPF_IND
|
901 0x0000 //TX_MICMUTE_HPF_IND
|
||||||
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
||||||
903 0x0008 //TX_MICMUTE_CVG_TIME
|
903 0x0008 //TX_MICMUTE_CVG_TIME
|
||||||
|
@ -6310,33 +6310,33 @@
|
||||||
908 0x7999 //TX_MICMUTE_EAD_THR
|
908 0x7999 //TX_MICMUTE_EAD_THR
|
||||||
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
||||||
910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
|
910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
|
||||||
911 0x7FE4 //TX_DTD_THR1_MICMUTE_0
|
911 0x7788 //TX_DTD_THR1_MICMUTE_0
|
||||||
912 0x7F44 //TX_DTD_THR1_MICMUTE_1
|
912 0x7FA8 //TX_DTD_THR1_MICMUTE_1
|
||||||
913 0x7FEE //TX_DTD_THR1_MICMUTE_2
|
913 0x7918 //TX_DTD_THR1_MICMUTE_2
|
||||||
914 0x7FFF //TX_DTD_THR1_MICMUTE_3
|
914 0x7C38 //TX_DTD_THR1_MICMUTE_3
|
||||||
915 0x7000 //TX_DTD_THR2_MICMUTE_0
|
915 0x7FFF //TX_DTD_THR2_MICMUTE_0
|
||||||
916 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
916 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
||||||
917 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
917 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
||||||
918 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
918 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
||||||
919 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
919 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
||||||
920 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
920 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
||||||
921 0x4000 //TX_MICMUTE_C_POST_FLT
|
921 0x1000 //TX_MICMUTE_C_POST_FLT
|
||||||
922 0x36B0 //TX_MICMUTE_DT_CUT_K
|
922 0x36B0 //TX_MICMUTE_DT_CUT_K
|
||||||
923 0x0100 //TX_MICMUTE_DT_CUT_THR
|
923 0x0100 //TX_MICMUTE_DT_CUT_THR
|
||||||
924 0x36B0 //TX_MICMUTE_DT_CUT_K2
|
924 0x36B0 //TX_MICMUTE_DT_CUT_K2
|
||||||
925 0x0100 //TX_MICMUTE_DT_CUT_THR2
|
925 0x0100 //TX_MICMUTE_DT_CUT_THR2
|
||||||
926 0x0260 //TX_MICMUTE_DT2_HOLD_N
|
926 0x00C0 //TX_MICMUTE_DT2_HOLD_N
|
||||||
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
||||||
928 0x4000 //TX_MICMUTE_B_POST_FLT_ECHOL
|
928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
|
||||||
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
||||||
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
||||||
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
||||||
932 0x0258 //TX_MICMUTE_DT_CUT_K1
|
932 0x0258 //TX_MICMUTE_DT_CUT_K1
|
||||||
933 0x0800 //TX_MICMUTE_POST_MASK_SUP
|
933 0x7200 //TX_MICMUTE_POST_MASK_SUP
|
||||||
934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP
|
934 0x4000 //TX_MICMUTE_PRE_MASK_SUP
|
||||||
935 0x001C //TX_MICMUTE_SDPCRN_GAIN
|
935 0x0100 //TX_MICMUTE_SDPCRN_GAIN
|
||||||
936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS
|
936 0x4000 //TX_MICMUTE_NSSAMASK_MORENS
|
||||||
937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS
|
937 0x0100 //TX_MICMUTE_CGMMMASK_MORENS
|
||||||
938 0x2710 //TX_MIC1RUB_AMP_THR
|
938 0x2710 //TX_MIC1RUB_AMP_THR
|
||||||
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
||||||
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
||||||
|
@ -11363,15 +11363,15 @@
|
||||||
571 0x4746 //TX_FDEQ_GAIN_4
|
571 0x4746 //TX_FDEQ_GAIN_4
|
||||||
572 0x4955 //TX_FDEQ_GAIN_5
|
572 0x4955 //TX_FDEQ_GAIN_5
|
||||||
573 0x5664 //TX_FDEQ_GAIN_6
|
573 0x5664 //TX_FDEQ_GAIN_6
|
||||||
574 0x5C5E //TX_FDEQ_GAIN_7
|
574 0x5C64 //TX_FDEQ_GAIN_7
|
||||||
575 0x5A54 //TX_FDEQ_GAIN_8
|
575 0x605A //TX_FDEQ_GAIN_8
|
||||||
576 0x5856 //TX_FDEQ_GAIN_9
|
576 0x5A53 //TX_FDEQ_GAIN_9
|
||||||
577 0x5552 //TX_FDEQ_GAIN_10
|
577 0x524F //TX_FDEQ_GAIN_10
|
||||||
578 0x635D //TX_FDEQ_GAIN_11
|
578 0x6761 //TX_FDEQ_GAIN_11
|
||||||
579 0x7663 //TX_FDEQ_GAIN_12
|
579 0x7863 //TX_FDEQ_GAIN_12
|
||||||
580 0x7A8C //TX_FDEQ_GAIN_13
|
580 0x7A92 //TX_FDEQ_GAIN_13
|
||||||
581 0x929C //TX_FDEQ_GAIN_14
|
581 0x9590 //TX_FDEQ_GAIN_14
|
||||||
582 0x9C9C //TX_FDEQ_GAIN_15
|
582 0x9090 //TX_FDEQ_GAIN_15
|
||||||
583 0x4848 //TX_FDEQ_GAIN_16
|
583 0x4848 //TX_FDEQ_GAIN_16
|
||||||
584 0x4848 //TX_FDEQ_GAIN_17
|
584 0x4848 //TX_FDEQ_GAIN_17
|
||||||
585 0x4848 //TX_FDEQ_GAIN_18
|
585 0x4848 //TX_FDEQ_GAIN_18
|
||||||
|
@ -11390,8 +11390,8 @@
|
||||||
598 0x090A //TX_FDEQ_BIN_7
|
598 0x090A //TX_FDEQ_BIN_7
|
||||||
599 0x0B0C //TX_FDEQ_BIN_8
|
599 0x0B0C //TX_FDEQ_BIN_8
|
||||||
600 0x0D0E //TX_FDEQ_BIN_9
|
600 0x0D0E //TX_FDEQ_BIN_9
|
||||||
601 0x1122 //TX_FDEQ_BIN_10
|
601 0x111E //TX_FDEQ_BIN_10
|
||||||
602 0x0719 //TX_FDEQ_BIN_11
|
602 0x0B19 //TX_FDEQ_BIN_11
|
||||||
603 0x1B1E //TX_FDEQ_BIN_12
|
603 0x1B1E //TX_FDEQ_BIN_12
|
||||||
604 0x1E1E //TX_FDEQ_BIN_13
|
604 0x1E1E //TX_FDEQ_BIN_13
|
||||||
605 0x1E28 //TX_FDEQ_BIN_14
|
605 0x1E28 //TX_FDEQ_BIN_14
|
||||||
|
@ -11655,7 +11655,7 @@
|
||||||
863 0x199A //TX_TDDRC_HMNC_GAIN
|
863 0x199A //TX_TDDRC_HMNC_GAIN
|
||||||
864 0x0000 //TX_TDDRC_SMT_FLAG
|
864 0x0000 //TX_TDDRC_SMT_FLAG
|
||||||
865 0x0CCD //TX_TDDRC_SMT_W
|
865 0x0CCD //TX_TDDRC_SMT_W
|
||||||
866 0x188C //TX_TDDRC_DRC_GAIN
|
866 0x17B7 //TX_TDDRC_DRC_GAIN
|
||||||
867 0x7FFF //TX_TDDRC_LMT_THRD
|
867 0x7FFF //TX_TDDRC_LMT_THRD
|
||||||
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
||||||
869 0x0000 //TX_TFMASKLTH
|
869 0x0000 //TX_TFMASKLTH
|
||||||
|
@ -11688,8 +11688,8 @@
|
||||||
896 0xD999 //TX_FASTNS_SSA_THHFH
|
896 0xD999 //TX_FASTNS_SSA_THHFH
|
||||||
897 0x2379 //TX_SENDFUNC_REG_MICMUTE
|
897 0x2379 //TX_SENDFUNC_REG_MICMUTE
|
||||||
898 0x0020 //TX_SENDFUNC_REG_MICMUTE1
|
898 0x0020 //TX_SENDFUNC_REG_MICMUTE1
|
||||||
899 0x028A //TX_MICMUTE_RATIO_THR
|
899 0x02E0 //TX_MICMUTE_RATIO_THR
|
||||||
900 0x0267 //TX_MICMUTE_AMP_THR
|
900 0x02D0 //TX_MICMUTE_AMP_THR
|
||||||
901 0x0000 //TX_MICMUTE_HPF_IND
|
901 0x0000 //TX_MICMUTE_HPF_IND
|
||||||
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
||||||
903 0x0008 //TX_MICMUTE_CVG_TIME
|
903 0x0008 //TX_MICMUTE_CVG_TIME
|
||||||
|
@ -11700,33 +11700,33 @@
|
||||||
908 0x7999 //TX_MICMUTE_EAD_THR
|
908 0x7999 //TX_MICMUTE_EAD_THR
|
||||||
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
||||||
910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
|
910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
|
||||||
911 0x7FE4 //TX_DTD_THR1_MICMUTE_0
|
911 0x7788 //TX_DTD_THR1_MICMUTE_0
|
||||||
912 0x7F44 //TX_DTD_THR1_MICMUTE_1
|
912 0x7FA8 //TX_DTD_THR1_MICMUTE_1
|
||||||
913 0x7FEE //TX_DTD_THR1_MICMUTE_2
|
913 0x7918 //TX_DTD_THR1_MICMUTE_2
|
||||||
914 0x7FFF //TX_DTD_THR1_MICMUTE_3
|
914 0x7C38 //TX_DTD_THR1_MICMUTE_3
|
||||||
915 0x7000 //TX_DTD_THR2_MICMUTE_0
|
915 0x7FFF //TX_DTD_THR2_MICMUTE_0
|
||||||
916 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
916 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
||||||
917 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
917 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
||||||
918 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
918 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
||||||
919 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
919 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
||||||
920 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
920 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
||||||
921 0x4000 //TX_MICMUTE_C_POST_FLT
|
921 0x1000 //TX_MICMUTE_C_POST_FLT
|
||||||
922 0x36B0 //TX_MICMUTE_DT_CUT_K
|
922 0x36B0 //TX_MICMUTE_DT_CUT_K
|
||||||
923 0x0100 //TX_MICMUTE_DT_CUT_THR
|
923 0x0100 //TX_MICMUTE_DT_CUT_THR
|
||||||
924 0x36B0 //TX_MICMUTE_DT_CUT_K2
|
924 0x36B0 //TX_MICMUTE_DT_CUT_K2
|
||||||
925 0x0100 //TX_MICMUTE_DT_CUT_THR2
|
925 0x0100 //TX_MICMUTE_DT_CUT_THR2
|
||||||
926 0x0260 //TX_MICMUTE_DT2_HOLD_N
|
926 0x00C0 //TX_MICMUTE_DT2_HOLD_N
|
||||||
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
||||||
928 0x4000 //TX_MICMUTE_B_POST_FLT_ECHOL
|
928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
|
||||||
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
||||||
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
||||||
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
||||||
932 0x0258 //TX_MICMUTE_DT_CUT_K1
|
932 0x0258 //TX_MICMUTE_DT_CUT_K1
|
||||||
933 0x0800 //TX_MICMUTE_POST_MASK_SUP
|
933 0x7200 //TX_MICMUTE_POST_MASK_SUP
|
||||||
934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP
|
934 0x4000 //TX_MICMUTE_PRE_MASK_SUP
|
||||||
935 0x001C //TX_MICMUTE_SDPCRN_GAIN
|
935 0x0100 //TX_MICMUTE_SDPCRN_GAIN
|
||||||
936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS
|
936 0x4000 //TX_MICMUTE_NSSAMASK_MORENS
|
||||||
937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS
|
937 0x0100 //TX_MICMUTE_CGMMMASK_MORENS
|
||||||
938 0x2710 //TX_MIC1RUB_AMP_THR
|
938 0x2710 //TX_MIC1RUB_AMP_THR
|
||||||
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
||||||
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
||||||
|
|
Binary file not shown.
|
@ -3,7 +3,7 @@
|
||||||
#EXPORT_FLAG HANDSET
|
#EXPORT_FLAG HANDSET
|
||||||
#PARAM_MODE FULL
|
#PARAM_MODE FULL
|
||||||
#SAVE_MODE 3
|
#SAVE_MODE 3
|
||||||
#SAVE_TIME 2024-04-12 14:45:29
|
#SAVE_TIME 2024-04-19 13:46:48
|
||||||
|
|
||||||
#CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-NB
|
#CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-NB
|
||||||
#PARAM_TYPE TX+2RX
|
#PARAM_TYPE TX+2RX
|
||||||
|
@ -3603,45 +3603,45 @@
|
||||||
896 0xD999 //TX_FASTNS_SSA_THHFH
|
896 0xD999 //TX_FASTNS_SSA_THHFH
|
||||||
897 0x2329 //TX_SENDFUNC_REG_MICMUTE
|
897 0x2329 //TX_SENDFUNC_REG_MICMUTE
|
||||||
898 0x0010 //TX_SENDFUNC_REG_MICMUTE1
|
898 0x0010 //TX_SENDFUNC_REG_MICMUTE1
|
||||||
899 0x0290 //TX_MICMUTE_RATIO_THR
|
899 0x02AC //TX_MICMUTE_RATIO_THR
|
||||||
900 0x0280 //TX_MICMUTE_AMP_THR
|
900 0x02E0 //TX_MICMUTE_AMP_THR
|
||||||
901 0x0000 //TX_MICMUTE_HPF_IND
|
901 0x0000 //TX_MICMUTE_HPF_IND
|
||||||
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
||||||
903 0x0009 //TX_MICMUTE_CVG_TIME
|
903 0x0008 //TX_MICMUTE_CVG_TIME
|
||||||
904 0x0008 //TX_MICMUTE_RELEASE_TIME
|
904 0x0008 //TX_MICMUTE_RELEASE_TIME
|
||||||
905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE
|
905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE
|
||||||
906 0x0000 //TX_MICMUTE_DIST2REF_1
|
906 0x0000 //TX_MICMUTE_DIST2REF_1
|
||||||
907 0x0028 //TX_MICMUTE_FRQ_AEC_L
|
907 0x0028 //TX_MICMUTE_FRQ_AEC_L
|
||||||
908 0x7F40 //TX_MICMUTE_EAD_THR
|
908 0x7F40 //TX_MICMUTE_EAD_THR
|
||||||
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
||||||
910 0x3000 //TX_MICMUTE_LAMBDA_RE_EST
|
910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
|
||||||
911 0x7D00 //TX_DTD_THR1_MICMUTE_0
|
911 0x78B4 //TX_DTD_THR1_MICMUTE_0
|
||||||
912 0x7FFF //TX_DTD_THR1_MICMUTE_1
|
912 0x7FFF //TX_DTD_THR1_MICMUTE_1
|
||||||
913 0x7FFF //TX_DTD_THR1_MICMUTE_2
|
913 0x7FFF //TX_DTD_THR1_MICMUTE_2
|
||||||
914 0x7FFF //TX_DTD_THR1_MICMUTE_3
|
914 0x7E00 //TX_DTD_THR1_MICMUTE_3
|
||||||
915 0x2000 //TX_DTD_THR2_MICMUTE_0
|
915 0x7FFF //TX_DTD_THR2_MICMUTE_0
|
||||||
916 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
916 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
||||||
917 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
917 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
||||||
918 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
918 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
||||||
919 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
919 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
||||||
920 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
920 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
||||||
921 0x7FFF //TX_MICMUTE_C_POST_FLT
|
921 0x1000 //TX_MICMUTE_C_POST_FLT
|
||||||
922 0x1F40 //TX_MICMUTE_DT_CUT_K
|
922 0x1F40 //TX_MICMUTE_DT_CUT_K
|
||||||
923 0x7FFF //TX_MICMUTE_DT_CUT_THR
|
923 0x0100 //TX_MICMUTE_DT_CUT_THR
|
||||||
924 0x1F40 //TX_MICMUTE_DT_CUT_K2
|
924 0x1F40 //TX_MICMUTE_DT_CUT_K2
|
||||||
925 0x7FFF //TX_MICMUTE_DT_CUT_THR2
|
925 0x0100 //TX_MICMUTE_DT_CUT_THR2
|
||||||
926 0x00C0 //TX_MICMUTE_DT2_HOLD_N
|
926 0x00C0 //TX_MICMUTE_DT2_HOLD_N
|
||||||
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
||||||
928 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOL
|
928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
|
||||||
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
||||||
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
||||||
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
||||||
932 0x3E80 //TX_MICMUTE_DT_CUT_K1
|
932 0x3E80 //TX_MICMUTE_DT_CUT_K1
|
||||||
933 0x0800 //TX_MICMUTE_POST_MASK_SUP
|
933 0x7200 //TX_MICMUTE_POST_MASK_SUP
|
||||||
934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP
|
934 0x4000 //TX_MICMUTE_PRE_MASK_SUP
|
||||||
935 0x001C //TX_MICMUTE_SDPCRN_GAIN
|
935 0x0100 //TX_MICMUTE_SDPCRN_GAIN
|
||||||
936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS
|
936 0x4000 //TX_MICMUTE_NSSAMASK_MORENS
|
||||||
937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS
|
937 0x0100 //TX_MICMUTE_CGMMMASK_MORENS
|
||||||
938 0x2710 //TX_MIC1RUB_AMP_THR
|
938 0x2710 //TX_MIC1RUB_AMP_THR
|
||||||
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
||||||
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
||||||
|
@ -3650,7 +3650,7 @@
|
||||||
943 0x05A0 //TX_MIC_VOLUME_MIC1MUTE
|
943 0x05A0 //TX_MIC_VOLUME_MIC1MUTE
|
||||||
944 0xFFFF //TX_TFMASKM4_2_DT_THR
|
944 0xFFFF //TX_TFMASKM4_2_DT_THR
|
||||||
945 0x57E4 //TX_MEAN_GAIN500HZ_DT_THR
|
945 0x57E4 //TX_MEAN_GAIN500HZ_DT_THR
|
||||||
946 0x000A //TX_MUTE_REF_POW_TH
|
946 0x0009 //TX_MUTE_REF_POW_TH
|
||||||
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
||||||
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
||||||
949 0x1FFF //TX_PRE_MASK_SUP
|
949 0x1FFF //TX_PRE_MASK_SUP
|
||||||
|
@ -6298,45 +6298,45 @@
|
||||||
896 0xD999 //TX_FASTNS_SSA_THHFH
|
896 0xD999 //TX_FASTNS_SSA_THHFH
|
||||||
897 0x2329 //TX_SENDFUNC_REG_MICMUTE
|
897 0x2329 //TX_SENDFUNC_REG_MICMUTE
|
||||||
898 0x0010 //TX_SENDFUNC_REG_MICMUTE1
|
898 0x0010 //TX_SENDFUNC_REG_MICMUTE1
|
||||||
899 0x02BC //TX_MICMUTE_RATIO_THR
|
899 0x02A0 //TX_MICMUTE_RATIO_THR
|
||||||
900 0x02E0 //TX_MICMUTE_AMP_THR
|
900 0x02E0 //TX_MICMUTE_AMP_THR
|
||||||
901 0x0000 //TX_MICMUTE_HPF_IND
|
901 0x0000 //TX_MICMUTE_HPF_IND
|
||||||
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
||||||
903 0x0009 //TX_MICMUTE_CVG_TIME
|
903 0x0008 //TX_MICMUTE_CVG_TIME
|
||||||
904 0x0008 //TX_MICMUTE_RELEASE_TIME
|
904 0x0008 //TX_MICMUTE_RELEASE_TIME
|
||||||
905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE
|
905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE
|
||||||
906 0x0000 //TX_MICMUTE_DIST2REF_1
|
906 0x0000 //TX_MICMUTE_DIST2REF_1
|
||||||
907 0x0028 //TX_MICMUTE_FRQ_AEC_L
|
907 0x0028 //TX_MICMUTE_FRQ_AEC_L
|
||||||
908 0x7C00 //TX_MICMUTE_EAD_THR
|
908 0x7C00 //TX_MICMUTE_EAD_THR
|
||||||
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
||||||
910 0x3000 //TX_MICMUTE_LAMBDA_RE_EST
|
910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
|
||||||
911 0x7FF4 //TX_DTD_THR1_MICMUTE_0
|
911 0x79E0 //TX_DTD_THR1_MICMUTE_0
|
||||||
912 0x7FFF //TX_DTD_THR1_MICMUTE_1
|
912 0x7FC0 //TX_DTD_THR1_MICMUTE_1
|
||||||
913 0x7FFF //TX_DTD_THR1_MICMUTE_2
|
913 0x7F94 //TX_DTD_THR1_MICMUTE_2
|
||||||
914 0x7F44 //TX_DTD_THR1_MICMUTE_3
|
914 0x7F44 //TX_DTD_THR1_MICMUTE_3
|
||||||
915 0x7800 //TX_DTD_THR2_MICMUTE_0
|
915 0x7FFF //TX_DTD_THR2_MICMUTE_0
|
||||||
916 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
916 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
||||||
917 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
917 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
||||||
918 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
918 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
||||||
919 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
919 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
||||||
920 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
920 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
||||||
921 0x7FFF //TX_MICMUTE_C_POST_FLT
|
921 0x1000 //TX_MICMUTE_C_POST_FLT
|
||||||
922 0x2710 //TX_MICMUTE_DT_CUT_K
|
922 0x3E80 //TX_MICMUTE_DT_CUT_K
|
||||||
923 0x0100 //TX_MICMUTE_DT_CUT_THR
|
923 0x0100 //TX_MICMUTE_DT_CUT_THR
|
||||||
924 0x2710 //TX_MICMUTE_DT_CUT_K2
|
924 0x3E80 //TX_MICMUTE_DT_CUT_K2
|
||||||
925 0x0100 //TX_MICMUTE_DT_CUT_THR2
|
925 0x0100 //TX_MICMUTE_DT_CUT_THR2
|
||||||
926 0x00E0 //TX_MICMUTE_DT2_HOLD_N
|
926 0x00E0 //TX_MICMUTE_DT2_HOLD_N
|
||||||
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
||||||
928 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOL
|
928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
|
||||||
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
||||||
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
||||||
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
||||||
932 0x3E80 //TX_MICMUTE_DT_CUT_K1
|
932 0x3E80 //TX_MICMUTE_DT_CUT_K1
|
||||||
933 0x0800 //TX_MICMUTE_POST_MASK_SUP
|
933 0x7200 //TX_MICMUTE_POST_MASK_SUP
|
||||||
934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP
|
934 0x4000 //TX_MICMUTE_PRE_MASK_SUP
|
||||||
935 0x001C //TX_MICMUTE_SDPCRN_GAIN
|
935 0x0100 //TX_MICMUTE_SDPCRN_GAIN
|
||||||
936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS
|
936 0x4000 //TX_MICMUTE_NSSAMASK_MORENS
|
||||||
937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS
|
937 0x0100 //TX_MICMUTE_CGMMMASK_MORENS
|
||||||
938 0x2710 //TX_MIC1RUB_AMP_THR
|
938 0x2710 //TX_MIC1RUB_AMP_THR
|
||||||
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
||||||
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
||||||
|
@ -6345,7 +6345,7 @@
|
||||||
943 0x05A0 //TX_MIC_VOLUME_MIC1MUTE
|
943 0x05A0 //TX_MIC_VOLUME_MIC1MUTE
|
||||||
944 0x3BD8 //TX_TFMASKM4_2_DT_THR
|
944 0x3BD8 //TX_TFMASKM4_2_DT_THR
|
||||||
945 0x2EE0 //TX_MEAN_GAIN500HZ_DT_THR
|
945 0x2EE0 //TX_MEAN_GAIN500HZ_DT_THR
|
||||||
946 0x000A //TX_MUTE_REF_POW_TH
|
946 0x0008 //TX_MUTE_REF_POW_TH
|
||||||
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
||||||
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
||||||
949 0x5FFB //TX_PRE_MASK_SUP
|
949 0x5FFB //TX_PRE_MASK_SUP
|
||||||
|
@ -14383,45 +14383,45 @@
|
||||||
896 0xD999 //TX_FASTNS_SSA_THHFH
|
896 0xD999 //TX_FASTNS_SSA_THHFH
|
||||||
897 0x2329 //TX_SENDFUNC_REG_MICMUTE
|
897 0x2329 //TX_SENDFUNC_REG_MICMUTE
|
||||||
898 0x0010 //TX_SENDFUNC_REG_MICMUTE1
|
898 0x0010 //TX_SENDFUNC_REG_MICMUTE1
|
||||||
899 0x0290 //TX_MICMUTE_RATIO_THR
|
899 0x02AC //TX_MICMUTE_RATIO_THR
|
||||||
900 0x0280 //TX_MICMUTE_AMP_THR
|
900 0x02E0 //TX_MICMUTE_AMP_THR
|
||||||
901 0x0000 //TX_MICMUTE_HPF_IND
|
901 0x0000 //TX_MICMUTE_HPF_IND
|
||||||
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
||||||
903 0x0009 //TX_MICMUTE_CVG_TIME
|
903 0x0008 //TX_MICMUTE_CVG_TIME
|
||||||
904 0x0008 //TX_MICMUTE_RELEASE_TIME
|
904 0x0008 //TX_MICMUTE_RELEASE_TIME
|
||||||
905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE
|
905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE
|
||||||
906 0x0000 //TX_MICMUTE_DIST2REF_1
|
906 0x0000 //TX_MICMUTE_DIST2REF_1
|
||||||
907 0x0028 //TX_MICMUTE_FRQ_AEC_L
|
907 0x0028 //TX_MICMUTE_FRQ_AEC_L
|
||||||
908 0x7F40 //TX_MICMUTE_EAD_THR
|
908 0x7F40 //TX_MICMUTE_EAD_THR
|
||||||
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
||||||
910 0x3000 //TX_MICMUTE_LAMBDA_RE_EST
|
910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
|
||||||
911 0x7D00 //TX_DTD_THR1_MICMUTE_0
|
911 0x78B4 //TX_DTD_THR1_MICMUTE_0
|
||||||
912 0x7FFF //TX_DTD_THR1_MICMUTE_1
|
912 0x7FFF //TX_DTD_THR1_MICMUTE_1
|
||||||
913 0x7FFF //TX_DTD_THR1_MICMUTE_2
|
913 0x7FFF //TX_DTD_THR1_MICMUTE_2
|
||||||
914 0x7FFF //TX_DTD_THR1_MICMUTE_3
|
914 0x7E00 //TX_DTD_THR1_MICMUTE_3
|
||||||
915 0x2000 //TX_DTD_THR2_MICMUTE_0
|
915 0x7FFF //TX_DTD_THR2_MICMUTE_0
|
||||||
916 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
916 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
||||||
917 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
917 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
||||||
918 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
918 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
||||||
919 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
919 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
||||||
920 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
920 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
||||||
921 0x7FFF //TX_MICMUTE_C_POST_FLT
|
921 0x1000 //TX_MICMUTE_C_POST_FLT
|
||||||
922 0x1F40 //TX_MICMUTE_DT_CUT_K
|
922 0x1F40 //TX_MICMUTE_DT_CUT_K
|
||||||
923 0x7FFF //TX_MICMUTE_DT_CUT_THR
|
923 0x0100 //TX_MICMUTE_DT_CUT_THR
|
||||||
924 0x1F40 //TX_MICMUTE_DT_CUT_K2
|
924 0x1F40 //TX_MICMUTE_DT_CUT_K2
|
||||||
925 0x7FFF //TX_MICMUTE_DT_CUT_THR2
|
925 0x0100 //TX_MICMUTE_DT_CUT_THR2
|
||||||
926 0x00C0 //TX_MICMUTE_DT2_HOLD_N
|
926 0x00C0 //TX_MICMUTE_DT2_HOLD_N
|
||||||
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
||||||
928 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOL
|
928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
|
||||||
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
||||||
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
||||||
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
||||||
932 0x3E80 //TX_MICMUTE_DT_CUT_K1
|
932 0x3E80 //TX_MICMUTE_DT_CUT_K1
|
||||||
933 0x0800 //TX_MICMUTE_POST_MASK_SUP
|
933 0x7200 //TX_MICMUTE_POST_MASK_SUP
|
||||||
934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP
|
934 0x4000 //TX_MICMUTE_PRE_MASK_SUP
|
||||||
935 0x001C //TX_MICMUTE_SDPCRN_GAIN
|
935 0x0100 //TX_MICMUTE_SDPCRN_GAIN
|
||||||
936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS
|
936 0x4000 //TX_MICMUTE_NSSAMASK_MORENS
|
||||||
937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS
|
937 0x0100 //TX_MICMUTE_CGMMMASK_MORENS
|
||||||
938 0x2710 //TX_MIC1RUB_AMP_THR
|
938 0x2710 //TX_MIC1RUB_AMP_THR
|
||||||
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
||||||
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
||||||
|
@ -14430,7 +14430,7 @@
|
||||||
943 0x05A0 //TX_MIC_VOLUME_MIC1MUTE
|
943 0x05A0 //TX_MIC_VOLUME_MIC1MUTE
|
||||||
944 0xFFFF //TX_TFMASKM4_2_DT_THR
|
944 0xFFFF //TX_TFMASKM4_2_DT_THR
|
||||||
945 0x57E4 //TX_MEAN_GAIN500HZ_DT_THR
|
945 0x57E4 //TX_MEAN_GAIN500HZ_DT_THR
|
||||||
946 0x000A //TX_MUTE_REF_POW_TH
|
946 0x0009 //TX_MUTE_REF_POW_TH
|
||||||
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
||||||
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
||||||
949 0x1FFF //TX_PRE_MASK_SUP
|
949 0x1FFF //TX_PRE_MASK_SUP
|
||||||
|
@ -17078,45 +17078,45 @@
|
||||||
896 0xD999 //TX_FASTNS_SSA_THHFH
|
896 0xD999 //TX_FASTNS_SSA_THHFH
|
||||||
897 0x2329 //TX_SENDFUNC_REG_MICMUTE
|
897 0x2329 //TX_SENDFUNC_REG_MICMUTE
|
||||||
898 0x0010 //TX_SENDFUNC_REG_MICMUTE1
|
898 0x0010 //TX_SENDFUNC_REG_MICMUTE1
|
||||||
899 0x02BC //TX_MICMUTE_RATIO_THR
|
899 0x02A0 //TX_MICMUTE_RATIO_THR
|
||||||
900 0x02E0 //TX_MICMUTE_AMP_THR
|
900 0x02E0 //TX_MICMUTE_AMP_THR
|
||||||
901 0x0000 //TX_MICMUTE_HPF_IND
|
901 0x0000 //TX_MICMUTE_HPF_IND
|
||||||
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
||||||
903 0x0009 //TX_MICMUTE_CVG_TIME
|
903 0x0008 //TX_MICMUTE_CVG_TIME
|
||||||
904 0x0008 //TX_MICMUTE_RELEASE_TIME
|
904 0x0008 //TX_MICMUTE_RELEASE_TIME
|
||||||
905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE
|
905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE
|
||||||
906 0x0000 //TX_MICMUTE_DIST2REF_1
|
906 0x0000 //TX_MICMUTE_DIST2REF_1
|
||||||
907 0x0028 //TX_MICMUTE_FRQ_AEC_L
|
907 0x0028 //TX_MICMUTE_FRQ_AEC_L
|
||||||
908 0x7C00 //TX_MICMUTE_EAD_THR
|
908 0x7C00 //TX_MICMUTE_EAD_THR
|
||||||
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
||||||
910 0x3000 //TX_MICMUTE_LAMBDA_RE_EST
|
910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
|
||||||
911 0x7FF4 //TX_DTD_THR1_MICMUTE_0
|
911 0x79E0 //TX_DTD_THR1_MICMUTE_0
|
||||||
912 0x7FFF //TX_DTD_THR1_MICMUTE_1
|
912 0x7FC0 //TX_DTD_THR1_MICMUTE_1
|
||||||
913 0x7FFF //TX_DTD_THR1_MICMUTE_2
|
913 0x7F94 //TX_DTD_THR1_MICMUTE_2
|
||||||
914 0x7F44 //TX_DTD_THR1_MICMUTE_3
|
914 0x7F44 //TX_DTD_THR1_MICMUTE_3
|
||||||
915 0x7800 //TX_DTD_THR2_MICMUTE_0
|
915 0x7FFF //TX_DTD_THR2_MICMUTE_0
|
||||||
916 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
916 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
||||||
917 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
917 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
||||||
918 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
918 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
||||||
919 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
919 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
||||||
920 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
920 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
||||||
921 0x7FFF //TX_MICMUTE_C_POST_FLT
|
921 0x1000 //TX_MICMUTE_C_POST_FLT
|
||||||
922 0x2710 //TX_MICMUTE_DT_CUT_K
|
922 0x3E80 //TX_MICMUTE_DT_CUT_K
|
||||||
923 0x0100 //TX_MICMUTE_DT_CUT_THR
|
923 0x0100 //TX_MICMUTE_DT_CUT_THR
|
||||||
924 0x2710 //TX_MICMUTE_DT_CUT_K2
|
924 0x3E80 //TX_MICMUTE_DT_CUT_K2
|
||||||
925 0x0100 //TX_MICMUTE_DT_CUT_THR2
|
925 0x0100 //TX_MICMUTE_DT_CUT_THR2
|
||||||
926 0x00E0 //TX_MICMUTE_DT2_HOLD_N
|
926 0x00E0 //TX_MICMUTE_DT2_HOLD_N
|
||||||
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
||||||
928 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOL
|
928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
|
||||||
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
||||||
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
||||||
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
||||||
932 0x3E80 //TX_MICMUTE_DT_CUT_K1
|
932 0x3E80 //TX_MICMUTE_DT_CUT_K1
|
||||||
933 0x0800 //TX_MICMUTE_POST_MASK_SUP
|
933 0x7200 //TX_MICMUTE_POST_MASK_SUP
|
||||||
934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP
|
934 0x4000 //TX_MICMUTE_PRE_MASK_SUP
|
||||||
935 0x001C //TX_MICMUTE_SDPCRN_GAIN
|
935 0x0100 //TX_MICMUTE_SDPCRN_GAIN
|
||||||
936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS
|
936 0x4000 //TX_MICMUTE_NSSAMASK_MORENS
|
||||||
937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS
|
937 0x0100 //TX_MICMUTE_CGMMMASK_MORENS
|
||||||
938 0x2710 //TX_MIC1RUB_AMP_THR
|
938 0x2710 //TX_MIC1RUB_AMP_THR
|
||||||
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
||||||
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
||||||
|
@ -17125,7 +17125,7 @@
|
||||||
943 0x05A0 //TX_MIC_VOLUME_MIC1MUTE
|
943 0x05A0 //TX_MIC_VOLUME_MIC1MUTE
|
||||||
944 0x3BD8 //TX_TFMASKM4_2_DT_THR
|
944 0x3BD8 //TX_TFMASKM4_2_DT_THR
|
||||||
945 0x2EE0 //TX_MEAN_GAIN500HZ_DT_THR
|
945 0x2EE0 //TX_MEAN_GAIN500HZ_DT_THR
|
||||||
946 0x000A //TX_MUTE_REF_POW_TH
|
946 0x0008 //TX_MUTE_REF_POW_TH
|
||||||
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
||||||
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
||||||
949 0x5FFB //TX_PRE_MASK_SUP
|
949 0x5FFB //TX_PRE_MASK_SUP
|
||||||
|
@ -22468,45 +22468,45 @@
|
||||||
896 0xD999 //TX_FASTNS_SSA_THHFH
|
896 0xD999 //TX_FASTNS_SSA_THHFH
|
||||||
897 0x2329 //TX_SENDFUNC_REG_MICMUTE
|
897 0x2329 //TX_SENDFUNC_REG_MICMUTE
|
||||||
898 0x0010 //TX_SENDFUNC_REG_MICMUTE1
|
898 0x0010 //TX_SENDFUNC_REG_MICMUTE1
|
||||||
899 0x02BC //TX_MICMUTE_RATIO_THR
|
899 0x02A0 //TX_MICMUTE_RATIO_THR
|
||||||
900 0x02E0 //TX_MICMUTE_AMP_THR
|
900 0x02E0 //TX_MICMUTE_AMP_THR
|
||||||
901 0x0000 //TX_MICMUTE_HPF_IND
|
901 0x0000 //TX_MICMUTE_HPF_IND
|
||||||
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
||||||
903 0x0009 //TX_MICMUTE_CVG_TIME
|
903 0x0008 //TX_MICMUTE_CVG_TIME
|
||||||
904 0x0008 //TX_MICMUTE_RELEASE_TIME
|
904 0x0008 //TX_MICMUTE_RELEASE_TIME
|
||||||
905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE
|
905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE
|
||||||
906 0x0000 //TX_MICMUTE_DIST2REF_1
|
906 0x0000 //TX_MICMUTE_DIST2REF_1
|
||||||
907 0x0028 //TX_MICMUTE_FRQ_AEC_L
|
907 0x0028 //TX_MICMUTE_FRQ_AEC_L
|
||||||
908 0x7C00 //TX_MICMUTE_EAD_THR
|
908 0x7C00 //TX_MICMUTE_EAD_THR
|
||||||
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
||||||
910 0x3000 //TX_MICMUTE_LAMBDA_RE_EST
|
910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
|
||||||
911 0x7FF4 //TX_DTD_THR1_MICMUTE_0
|
911 0x79E0 //TX_DTD_THR1_MICMUTE_0
|
||||||
912 0x7FFF //TX_DTD_THR1_MICMUTE_1
|
912 0x7FC0 //TX_DTD_THR1_MICMUTE_1
|
||||||
913 0x7FFF //TX_DTD_THR1_MICMUTE_2
|
913 0x7F94 //TX_DTD_THR1_MICMUTE_2
|
||||||
914 0x7F44 //TX_DTD_THR1_MICMUTE_3
|
914 0x7F44 //TX_DTD_THR1_MICMUTE_3
|
||||||
915 0x7800 //TX_DTD_THR2_MICMUTE_0
|
915 0x7FFF //TX_DTD_THR2_MICMUTE_0
|
||||||
916 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
916 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
||||||
917 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
917 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
||||||
918 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
918 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
||||||
919 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
919 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
||||||
920 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
920 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
||||||
921 0x7FFF //TX_MICMUTE_C_POST_FLT
|
921 0x1000 //TX_MICMUTE_C_POST_FLT
|
||||||
922 0x2710 //TX_MICMUTE_DT_CUT_K
|
922 0x3E80 //TX_MICMUTE_DT_CUT_K
|
||||||
923 0x0100 //TX_MICMUTE_DT_CUT_THR
|
923 0x0100 //TX_MICMUTE_DT_CUT_THR
|
||||||
924 0x2710 //TX_MICMUTE_DT_CUT_K2
|
924 0x3E80 //TX_MICMUTE_DT_CUT_K2
|
||||||
925 0x0100 //TX_MICMUTE_DT_CUT_THR2
|
925 0x0100 //TX_MICMUTE_DT_CUT_THR2
|
||||||
926 0x00E0 //TX_MICMUTE_DT2_HOLD_N
|
926 0x00E0 //TX_MICMUTE_DT2_HOLD_N
|
||||||
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
||||||
928 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOL
|
928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
|
||||||
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
||||||
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
||||||
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
||||||
932 0x3E80 //TX_MICMUTE_DT_CUT_K1
|
932 0x3E80 //TX_MICMUTE_DT_CUT_K1
|
||||||
933 0x0800 //TX_MICMUTE_POST_MASK_SUP
|
933 0x7200 //TX_MICMUTE_POST_MASK_SUP
|
||||||
934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP
|
934 0x4000 //TX_MICMUTE_PRE_MASK_SUP
|
||||||
935 0x001C //TX_MICMUTE_SDPCRN_GAIN
|
935 0x0100 //TX_MICMUTE_SDPCRN_GAIN
|
||||||
936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS
|
936 0x4000 //TX_MICMUTE_NSSAMASK_MORENS
|
||||||
937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS
|
937 0x0100 //TX_MICMUTE_CGMMMASK_MORENS
|
||||||
938 0x2710 //TX_MIC1RUB_AMP_THR
|
938 0x2710 //TX_MIC1RUB_AMP_THR
|
||||||
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
||||||
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
||||||
|
@ -22515,7 +22515,7 @@
|
||||||
943 0x05A0 //TX_MIC_VOLUME_MIC1MUTE
|
943 0x05A0 //TX_MIC_VOLUME_MIC1MUTE
|
||||||
944 0x3BD8 //TX_TFMASKM4_2_DT_THR
|
944 0x3BD8 //TX_TFMASKM4_2_DT_THR
|
||||||
945 0x2EE0 //TX_MEAN_GAIN500HZ_DT_THR
|
945 0x2EE0 //TX_MEAN_GAIN500HZ_DT_THR
|
||||||
946 0x000A //TX_MUTE_REF_POW_TH
|
946 0x0008 //TX_MUTE_REF_POW_TH
|
||||||
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
||||||
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
||||||
949 0x5FFB //TX_PRE_MASK_SUP
|
949 0x5FFB //TX_PRE_MASK_SUP
|
||||||
|
@ -27858,45 +27858,45 @@
|
||||||
896 0xD999 //TX_FASTNS_SSA_THHFH
|
896 0xD999 //TX_FASTNS_SSA_THHFH
|
||||||
897 0x2329 //TX_SENDFUNC_REG_MICMUTE
|
897 0x2329 //TX_SENDFUNC_REG_MICMUTE
|
||||||
898 0x0010 //TX_SENDFUNC_REG_MICMUTE1
|
898 0x0010 //TX_SENDFUNC_REG_MICMUTE1
|
||||||
899 0x02BC //TX_MICMUTE_RATIO_THR
|
899 0x02A0 //TX_MICMUTE_RATIO_THR
|
||||||
900 0x02E0 //TX_MICMUTE_AMP_THR
|
900 0x02E0 //TX_MICMUTE_AMP_THR
|
||||||
901 0x0000 //TX_MICMUTE_HPF_IND
|
901 0x0000 //TX_MICMUTE_HPF_IND
|
||||||
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
||||||
903 0x0009 //TX_MICMUTE_CVG_TIME
|
903 0x0008 //TX_MICMUTE_CVG_TIME
|
||||||
904 0x0008 //TX_MICMUTE_RELEASE_TIME
|
904 0x0008 //TX_MICMUTE_RELEASE_TIME
|
||||||
905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE
|
905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE
|
||||||
906 0x0000 //TX_MICMUTE_DIST2REF_1
|
906 0x0000 //TX_MICMUTE_DIST2REF_1
|
||||||
907 0x0028 //TX_MICMUTE_FRQ_AEC_L
|
907 0x0028 //TX_MICMUTE_FRQ_AEC_L
|
||||||
908 0x7C00 //TX_MICMUTE_EAD_THR
|
908 0x7C00 //TX_MICMUTE_EAD_THR
|
||||||
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
||||||
910 0x3000 //TX_MICMUTE_LAMBDA_RE_EST
|
910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
|
||||||
911 0x7FF4 //TX_DTD_THR1_MICMUTE_0
|
911 0x79E0 //TX_DTD_THR1_MICMUTE_0
|
||||||
912 0x7FFF //TX_DTD_THR1_MICMUTE_1
|
912 0x7FC0 //TX_DTD_THR1_MICMUTE_1
|
||||||
913 0x7FFF //TX_DTD_THR1_MICMUTE_2
|
913 0x7F94 //TX_DTD_THR1_MICMUTE_2
|
||||||
914 0x7F44 //TX_DTD_THR1_MICMUTE_3
|
914 0x7F44 //TX_DTD_THR1_MICMUTE_3
|
||||||
915 0x7800 //TX_DTD_THR2_MICMUTE_0
|
915 0x7FFF //TX_DTD_THR2_MICMUTE_0
|
||||||
916 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
916 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
||||||
917 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
917 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
||||||
918 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
918 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
||||||
919 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
919 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
||||||
920 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
920 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
||||||
921 0x7FFF //TX_MICMUTE_C_POST_FLT
|
921 0x1000 //TX_MICMUTE_C_POST_FLT
|
||||||
922 0x2710 //TX_MICMUTE_DT_CUT_K
|
922 0x3E80 //TX_MICMUTE_DT_CUT_K
|
||||||
923 0x0100 //TX_MICMUTE_DT_CUT_THR
|
923 0x0100 //TX_MICMUTE_DT_CUT_THR
|
||||||
924 0x2710 //TX_MICMUTE_DT_CUT_K2
|
924 0x3E80 //TX_MICMUTE_DT_CUT_K2
|
||||||
925 0x0100 //TX_MICMUTE_DT_CUT_THR2
|
925 0x0100 //TX_MICMUTE_DT_CUT_THR2
|
||||||
926 0x00E0 //TX_MICMUTE_DT2_HOLD_N
|
926 0x00E0 //TX_MICMUTE_DT2_HOLD_N
|
||||||
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
||||||
928 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOL
|
928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
|
||||||
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
||||||
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
||||||
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
||||||
932 0x3E80 //TX_MICMUTE_DT_CUT_K1
|
932 0x3E80 //TX_MICMUTE_DT_CUT_K1
|
||||||
933 0x0800 //TX_MICMUTE_POST_MASK_SUP
|
933 0x7200 //TX_MICMUTE_POST_MASK_SUP
|
||||||
934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP
|
934 0x4000 //TX_MICMUTE_PRE_MASK_SUP
|
||||||
935 0x001C //TX_MICMUTE_SDPCRN_GAIN
|
935 0x0100 //TX_MICMUTE_SDPCRN_GAIN
|
||||||
936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS
|
936 0x4000 //TX_MICMUTE_NSSAMASK_MORENS
|
||||||
937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS
|
937 0x0100 //TX_MICMUTE_CGMMMASK_MORENS
|
||||||
938 0x2710 //TX_MIC1RUB_AMP_THR
|
938 0x2710 //TX_MIC1RUB_AMP_THR
|
||||||
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
||||||
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
||||||
|
@ -27905,7 +27905,7 @@
|
||||||
943 0x05A0 //TX_MIC_VOLUME_MIC1MUTE
|
943 0x05A0 //TX_MIC_VOLUME_MIC1MUTE
|
||||||
944 0x3BD8 //TX_TFMASKM4_2_DT_THR
|
944 0x3BD8 //TX_TFMASKM4_2_DT_THR
|
||||||
945 0x2EE0 //TX_MEAN_GAIN500HZ_DT_THR
|
945 0x2EE0 //TX_MEAN_GAIN500HZ_DT_THR
|
||||||
946 0x000A //TX_MUTE_REF_POW_TH
|
946 0x0008 //TX_MUTE_REF_POW_TH
|
||||||
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
||||||
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
||||||
949 0x5FFB //TX_PRE_MASK_SUP
|
949 0x5FFB //TX_PRE_MASK_SUP
|
||||||
|
@ -33248,45 +33248,45 @@
|
||||||
896 0xD999 //TX_FASTNS_SSA_THHFH
|
896 0xD999 //TX_FASTNS_SSA_THHFH
|
||||||
897 0x2329 //TX_SENDFUNC_REG_MICMUTE
|
897 0x2329 //TX_SENDFUNC_REG_MICMUTE
|
||||||
898 0x0010 //TX_SENDFUNC_REG_MICMUTE1
|
898 0x0010 //TX_SENDFUNC_REG_MICMUTE1
|
||||||
899 0x02BC //TX_MICMUTE_RATIO_THR
|
899 0x02A0 //TX_MICMUTE_RATIO_THR
|
||||||
900 0x02E0 //TX_MICMUTE_AMP_THR
|
900 0x02E0 //TX_MICMUTE_AMP_THR
|
||||||
901 0x0000 //TX_MICMUTE_HPF_IND
|
901 0x0000 //TX_MICMUTE_HPF_IND
|
||||||
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
||||||
903 0x0009 //TX_MICMUTE_CVG_TIME
|
903 0x0008 //TX_MICMUTE_CVG_TIME
|
||||||
904 0x0008 //TX_MICMUTE_RELEASE_TIME
|
904 0x0008 //TX_MICMUTE_RELEASE_TIME
|
||||||
905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE
|
905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE
|
||||||
906 0x0000 //TX_MICMUTE_DIST2REF_1
|
906 0x0000 //TX_MICMUTE_DIST2REF_1
|
||||||
907 0x0028 //TX_MICMUTE_FRQ_AEC_L
|
907 0x0028 //TX_MICMUTE_FRQ_AEC_L
|
||||||
908 0x7C00 //TX_MICMUTE_EAD_THR
|
908 0x7C00 //TX_MICMUTE_EAD_THR
|
||||||
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
||||||
910 0x3000 //TX_MICMUTE_LAMBDA_RE_EST
|
910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
|
||||||
911 0x7FF4 //TX_DTD_THR1_MICMUTE_0
|
911 0x79E0 //TX_DTD_THR1_MICMUTE_0
|
||||||
912 0x7FFF //TX_DTD_THR1_MICMUTE_1
|
912 0x7FC0 //TX_DTD_THR1_MICMUTE_1
|
||||||
913 0x7FFF //TX_DTD_THR1_MICMUTE_2
|
913 0x7F94 //TX_DTD_THR1_MICMUTE_2
|
||||||
914 0x7F44 //TX_DTD_THR1_MICMUTE_3
|
914 0x7F44 //TX_DTD_THR1_MICMUTE_3
|
||||||
915 0x7800 //TX_DTD_THR2_MICMUTE_0
|
915 0x7FFF //TX_DTD_THR2_MICMUTE_0
|
||||||
916 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
916 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
||||||
917 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
917 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
||||||
918 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
918 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
||||||
919 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
919 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
||||||
920 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
920 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
||||||
921 0x7FFF //TX_MICMUTE_C_POST_FLT
|
921 0x1000 //TX_MICMUTE_C_POST_FLT
|
||||||
922 0x2710 //TX_MICMUTE_DT_CUT_K
|
922 0x3E80 //TX_MICMUTE_DT_CUT_K
|
||||||
923 0x0100 //TX_MICMUTE_DT_CUT_THR
|
923 0x0100 //TX_MICMUTE_DT_CUT_THR
|
||||||
924 0x2710 //TX_MICMUTE_DT_CUT_K2
|
924 0x3E80 //TX_MICMUTE_DT_CUT_K2
|
||||||
925 0x0100 //TX_MICMUTE_DT_CUT_THR2
|
925 0x0100 //TX_MICMUTE_DT_CUT_THR2
|
||||||
926 0x00E0 //TX_MICMUTE_DT2_HOLD_N
|
926 0x00E0 //TX_MICMUTE_DT2_HOLD_N
|
||||||
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
||||||
928 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOL
|
928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
|
||||||
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
||||||
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
||||||
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
||||||
932 0x3E80 //TX_MICMUTE_DT_CUT_K1
|
932 0x3E80 //TX_MICMUTE_DT_CUT_K1
|
||||||
933 0x0800 //TX_MICMUTE_POST_MASK_SUP
|
933 0x7200 //TX_MICMUTE_POST_MASK_SUP
|
||||||
934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP
|
934 0x4000 //TX_MICMUTE_PRE_MASK_SUP
|
||||||
935 0x001C //TX_MICMUTE_SDPCRN_GAIN
|
935 0x0100 //TX_MICMUTE_SDPCRN_GAIN
|
||||||
936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS
|
936 0x4000 //TX_MICMUTE_NSSAMASK_MORENS
|
||||||
937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS
|
937 0x0100 //TX_MICMUTE_CGMMMASK_MORENS
|
||||||
938 0x2710 //TX_MIC1RUB_AMP_THR
|
938 0x2710 //TX_MIC1RUB_AMP_THR
|
||||||
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
||||||
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
||||||
|
@ -33295,7 +33295,7 @@
|
||||||
943 0x05A0 //TX_MIC_VOLUME_MIC1MUTE
|
943 0x05A0 //TX_MIC_VOLUME_MIC1MUTE
|
||||||
944 0x3BD8 //TX_TFMASKM4_2_DT_THR
|
944 0x3BD8 //TX_TFMASKM4_2_DT_THR
|
||||||
945 0x2EE0 //TX_MEAN_GAIN500HZ_DT_THR
|
945 0x2EE0 //TX_MEAN_GAIN500HZ_DT_THR
|
||||||
946 0x000A //TX_MUTE_REF_POW_TH
|
946 0x0008 //TX_MUTE_REF_POW_TH
|
||||||
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
||||||
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
||||||
949 0x5FFB //TX_PRE_MASK_SUP
|
949 0x5FFB //TX_PRE_MASK_SUP
|
||||||
|
@ -38638,45 +38638,45 @@
|
||||||
896 0xD999 //TX_FASTNS_SSA_THHFH
|
896 0xD999 //TX_FASTNS_SSA_THHFH
|
||||||
897 0x2329 //TX_SENDFUNC_REG_MICMUTE
|
897 0x2329 //TX_SENDFUNC_REG_MICMUTE
|
||||||
898 0x0010 //TX_SENDFUNC_REG_MICMUTE1
|
898 0x0010 //TX_SENDFUNC_REG_MICMUTE1
|
||||||
899 0x02BC //TX_MICMUTE_RATIO_THR
|
899 0x02A0 //TX_MICMUTE_RATIO_THR
|
||||||
900 0x02E0 //TX_MICMUTE_AMP_THR
|
900 0x02E0 //TX_MICMUTE_AMP_THR
|
||||||
901 0x0000 //TX_MICMUTE_HPF_IND
|
901 0x0000 //TX_MICMUTE_HPF_IND
|
||||||
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
||||||
903 0x0009 //TX_MICMUTE_CVG_TIME
|
903 0x0008 //TX_MICMUTE_CVG_TIME
|
||||||
904 0x0008 //TX_MICMUTE_RELEASE_TIME
|
904 0x0008 //TX_MICMUTE_RELEASE_TIME
|
||||||
905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE
|
905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE
|
||||||
906 0x0000 //TX_MICMUTE_DIST2REF_1
|
906 0x0000 //TX_MICMUTE_DIST2REF_1
|
||||||
907 0x0028 //TX_MICMUTE_FRQ_AEC_L
|
907 0x0028 //TX_MICMUTE_FRQ_AEC_L
|
||||||
908 0x7C00 //TX_MICMUTE_EAD_THR
|
908 0x7C00 //TX_MICMUTE_EAD_THR
|
||||||
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
||||||
910 0x3000 //TX_MICMUTE_LAMBDA_RE_EST
|
910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
|
||||||
911 0x7FF4 //TX_DTD_THR1_MICMUTE_0
|
911 0x79E0 //TX_DTD_THR1_MICMUTE_0
|
||||||
912 0x7FFF //TX_DTD_THR1_MICMUTE_1
|
912 0x7FC0 //TX_DTD_THR1_MICMUTE_1
|
||||||
913 0x7FFF //TX_DTD_THR1_MICMUTE_2
|
913 0x7F94 //TX_DTD_THR1_MICMUTE_2
|
||||||
914 0x7F44 //TX_DTD_THR1_MICMUTE_3
|
914 0x7F44 //TX_DTD_THR1_MICMUTE_3
|
||||||
915 0x7800 //TX_DTD_THR2_MICMUTE_0
|
915 0x7FFF //TX_DTD_THR2_MICMUTE_0
|
||||||
916 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
916 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
||||||
917 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
917 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
||||||
918 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
918 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
||||||
919 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
919 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
||||||
920 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
920 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
||||||
921 0x7FFF //TX_MICMUTE_C_POST_FLT
|
921 0x1000 //TX_MICMUTE_C_POST_FLT
|
||||||
922 0x2710 //TX_MICMUTE_DT_CUT_K
|
922 0x3E80 //TX_MICMUTE_DT_CUT_K
|
||||||
923 0x0100 //TX_MICMUTE_DT_CUT_THR
|
923 0x0100 //TX_MICMUTE_DT_CUT_THR
|
||||||
924 0x2710 //TX_MICMUTE_DT_CUT_K2
|
924 0x3E80 //TX_MICMUTE_DT_CUT_K2
|
||||||
925 0x0100 //TX_MICMUTE_DT_CUT_THR2
|
925 0x0100 //TX_MICMUTE_DT_CUT_THR2
|
||||||
926 0x00E0 //TX_MICMUTE_DT2_HOLD_N
|
926 0x00E0 //TX_MICMUTE_DT2_HOLD_N
|
||||||
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
||||||
928 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOL
|
928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
|
||||||
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
||||||
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
||||||
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
||||||
932 0x3E80 //TX_MICMUTE_DT_CUT_K1
|
932 0x3E80 //TX_MICMUTE_DT_CUT_K1
|
||||||
933 0x0800 //TX_MICMUTE_POST_MASK_SUP
|
933 0x7200 //TX_MICMUTE_POST_MASK_SUP
|
||||||
934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP
|
934 0x4000 //TX_MICMUTE_PRE_MASK_SUP
|
||||||
935 0x001C //TX_MICMUTE_SDPCRN_GAIN
|
935 0x0100 //TX_MICMUTE_SDPCRN_GAIN
|
||||||
936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS
|
936 0x4000 //TX_MICMUTE_NSSAMASK_MORENS
|
||||||
937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS
|
937 0x0100 //TX_MICMUTE_CGMMMASK_MORENS
|
||||||
938 0x2710 //TX_MIC1RUB_AMP_THR
|
938 0x2710 //TX_MIC1RUB_AMP_THR
|
||||||
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
||||||
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
||||||
|
@ -38685,7 +38685,7 @@
|
||||||
943 0x05A0 //TX_MIC_VOLUME_MIC1MUTE
|
943 0x05A0 //TX_MIC_VOLUME_MIC1MUTE
|
||||||
944 0x3BD8 //TX_TFMASKM4_2_DT_THR
|
944 0x3BD8 //TX_TFMASKM4_2_DT_THR
|
||||||
945 0x2EE0 //TX_MEAN_GAIN500HZ_DT_THR
|
945 0x2EE0 //TX_MEAN_GAIN500HZ_DT_THR
|
||||||
946 0x000A //TX_MUTE_REF_POW_TH
|
946 0x0008 //TX_MUTE_REF_POW_TH
|
||||||
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
||||||
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
||||||
949 0x5FFB //TX_PRE_MASK_SUP
|
949 0x5FFB //TX_PRE_MASK_SUP
|
||||||
|
@ -44028,45 +44028,45 @@
|
||||||
896 0xD999 //TX_FASTNS_SSA_THHFH
|
896 0xD999 //TX_FASTNS_SSA_THHFH
|
||||||
897 0x2329 //TX_SENDFUNC_REG_MICMUTE
|
897 0x2329 //TX_SENDFUNC_REG_MICMUTE
|
||||||
898 0x0010 //TX_SENDFUNC_REG_MICMUTE1
|
898 0x0010 //TX_SENDFUNC_REG_MICMUTE1
|
||||||
899 0x0290 //TX_MICMUTE_RATIO_THR
|
899 0x02AC //TX_MICMUTE_RATIO_THR
|
||||||
900 0x0280 //TX_MICMUTE_AMP_THR
|
900 0x02E0 //TX_MICMUTE_AMP_THR
|
||||||
901 0x0000 //TX_MICMUTE_HPF_IND
|
901 0x0000 //TX_MICMUTE_HPF_IND
|
||||||
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
||||||
903 0x0009 //TX_MICMUTE_CVG_TIME
|
903 0x0008 //TX_MICMUTE_CVG_TIME
|
||||||
904 0x0008 //TX_MICMUTE_RELEASE_TIME
|
904 0x0008 //TX_MICMUTE_RELEASE_TIME
|
||||||
905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE
|
905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE
|
||||||
906 0x0000 //TX_MICMUTE_DIST2REF_1
|
906 0x0000 //TX_MICMUTE_DIST2REF_1
|
||||||
907 0x0028 //TX_MICMUTE_FRQ_AEC_L
|
907 0x0028 //TX_MICMUTE_FRQ_AEC_L
|
||||||
908 0x7F40 //TX_MICMUTE_EAD_THR
|
908 0x7F40 //TX_MICMUTE_EAD_THR
|
||||||
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
||||||
910 0x3000 //TX_MICMUTE_LAMBDA_RE_EST
|
910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
|
||||||
911 0x7D00 //TX_DTD_THR1_MICMUTE_0
|
911 0x78B4 //TX_DTD_THR1_MICMUTE_0
|
||||||
912 0x7FFF //TX_DTD_THR1_MICMUTE_1
|
912 0x7FFF //TX_DTD_THR1_MICMUTE_1
|
||||||
913 0x7FFF //TX_DTD_THR1_MICMUTE_2
|
913 0x7FFF //TX_DTD_THR1_MICMUTE_2
|
||||||
914 0x7FFF //TX_DTD_THR1_MICMUTE_3
|
914 0x7E00 //TX_DTD_THR1_MICMUTE_3
|
||||||
915 0x2000 //TX_DTD_THR2_MICMUTE_0
|
915 0x7FFF //TX_DTD_THR2_MICMUTE_0
|
||||||
916 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
916 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
||||||
917 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
917 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
||||||
918 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
918 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
||||||
919 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
919 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
||||||
920 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
920 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
||||||
921 0x7FFF //TX_MICMUTE_C_POST_FLT
|
921 0x1000 //TX_MICMUTE_C_POST_FLT
|
||||||
922 0x1F40 //TX_MICMUTE_DT_CUT_K
|
922 0x1F40 //TX_MICMUTE_DT_CUT_K
|
||||||
923 0x7FFF //TX_MICMUTE_DT_CUT_THR
|
923 0x0100 //TX_MICMUTE_DT_CUT_THR
|
||||||
924 0x1F40 //TX_MICMUTE_DT_CUT_K2
|
924 0x1F40 //TX_MICMUTE_DT_CUT_K2
|
||||||
925 0x7FFF //TX_MICMUTE_DT_CUT_THR2
|
925 0x0100 //TX_MICMUTE_DT_CUT_THR2
|
||||||
926 0x00C0 //TX_MICMUTE_DT2_HOLD_N
|
926 0x00C0 //TX_MICMUTE_DT2_HOLD_N
|
||||||
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
||||||
928 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOL
|
928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
|
||||||
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
||||||
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
||||||
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
||||||
932 0x3E80 //TX_MICMUTE_DT_CUT_K1
|
932 0x3E80 //TX_MICMUTE_DT_CUT_K1
|
||||||
933 0x0800 //TX_MICMUTE_POST_MASK_SUP
|
933 0x7200 //TX_MICMUTE_POST_MASK_SUP
|
||||||
934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP
|
934 0x4000 //TX_MICMUTE_PRE_MASK_SUP
|
||||||
935 0x001C //TX_MICMUTE_SDPCRN_GAIN
|
935 0x0100 //TX_MICMUTE_SDPCRN_GAIN
|
||||||
936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS
|
936 0x4000 //TX_MICMUTE_NSSAMASK_MORENS
|
||||||
937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS
|
937 0x0100 //TX_MICMUTE_CGMMMASK_MORENS
|
||||||
938 0x2710 //TX_MIC1RUB_AMP_THR
|
938 0x2710 //TX_MIC1RUB_AMP_THR
|
||||||
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
||||||
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
||||||
|
@ -44075,7 +44075,7 @@
|
||||||
943 0x05A0 //TX_MIC_VOLUME_MIC1MUTE
|
943 0x05A0 //TX_MIC_VOLUME_MIC1MUTE
|
||||||
944 0xFFFF //TX_TFMASKM4_2_DT_THR
|
944 0xFFFF //TX_TFMASKM4_2_DT_THR
|
||||||
945 0x57E4 //TX_MEAN_GAIN500HZ_DT_THR
|
945 0x57E4 //TX_MEAN_GAIN500HZ_DT_THR
|
||||||
946 0x000A //TX_MUTE_REF_POW_TH
|
946 0x0009 //TX_MUTE_REF_POW_TH
|
||||||
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
||||||
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
||||||
949 0x1FFF //TX_PRE_MASK_SUP
|
949 0x1FFF //TX_PRE_MASK_SUP
|
||||||
|
@ -46723,45 +46723,45 @@
|
||||||
896 0xD999 //TX_FASTNS_SSA_THHFH
|
896 0xD999 //TX_FASTNS_SSA_THHFH
|
||||||
897 0x2329 //TX_SENDFUNC_REG_MICMUTE
|
897 0x2329 //TX_SENDFUNC_REG_MICMUTE
|
||||||
898 0x0010 //TX_SENDFUNC_REG_MICMUTE1
|
898 0x0010 //TX_SENDFUNC_REG_MICMUTE1
|
||||||
899 0x02BC //TX_MICMUTE_RATIO_THR
|
899 0x02A0 //TX_MICMUTE_RATIO_THR
|
||||||
900 0x02E0 //TX_MICMUTE_AMP_THR
|
900 0x02E0 //TX_MICMUTE_AMP_THR
|
||||||
901 0x0000 //TX_MICMUTE_HPF_IND
|
901 0x0000 //TX_MICMUTE_HPF_IND
|
||||||
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
||||||
903 0x0009 //TX_MICMUTE_CVG_TIME
|
903 0x0008 //TX_MICMUTE_CVG_TIME
|
||||||
904 0x0008 //TX_MICMUTE_RELEASE_TIME
|
904 0x0008 //TX_MICMUTE_RELEASE_TIME
|
||||||
905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE
|
905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE
|
||||||
906 0x0000 //TX_MICMUTE_DIST2REF_1
|
906 0x0000 //TX_MICMUTE_DIST2REF_1
|
||||||
907 0x0028 //TX_MICMUTE_FRQ_AEC_L
|
907 0x0028 //TX_MICMUTE_FRQ_AEC_L
|
||||||
908 0x7C00 //TX_MICMUTE_EAD_THR
|
908 0x7C00 //TX_MICMUTE_EAD_THR
|
||||||
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
||||||
910 0x3000 //TX_MICMUTE_LAMBDA_RE_EST
|
910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
|
||||||
911 0x7FF4 //TX_DTD_THR1_MICMUTE_0
|
911 0x79E0 //TX_DTD_THR1_MICMUTE_0
|
||||||
912 0x7FFF //TX_DTD_THR1_MICMUTE_1
|
912 0x7FC0 //TX_DTD_THR1_MICMUTE_1
|
||||||
913 0x7FFF //TX_DTD_THR1_MICMUTE_2
|
913 0x7F94 //TX_DTD_THR1_MICMUTE_2
|
||||||
914 0x7F44 //TX_DTD_THR1_MICMUTE_3
|
914 0x7F44 //TX_DTD_THR1_MICMUTE_3
|
||||||
915 0x7800 //TX_DTD_THR2_MICMUTE_0
|
915 0x7FFF //TX_DTD_THR2_MICMUTE_0
|
||||||
916 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
916 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
||||||
917 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
917 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
||||||
918 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
918 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
||||||
919 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
919 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
||||||
920 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
920 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
||||||
921 0x7FFF //TX_MICMUTE_C_POST_FLT
|
921 0x1000 //TX_MICMUTE_C_POST_FLT
|
||||||
922 0x2710 //TX_MICMUTE_DT_CUT_K
|
922 0x3E80 //TX_MICMUTE_DT_CUT_K
|
||||||
923 0x0100 //TX_MICMUTE_DT_CUT_THR
|
923 0x0100 //TX_MICMUTE_DT_CUT_THR
|
||||||
924 0x2710 //TX_MICMUTE_DT_CUT_K2
|
924 0x3E80 //TX_MICMUTE_DT_CUT_K2
|
||||||
925 0x0100 //TX_MICMUTE_DT_CUT_THR2
|
925 0x0100 //TX_MICMUTE_DT_CUT_THR2
|
||||||
926 0x00E0 //TX_MICMUTE_DT2_HOLD_N
|
926 0x00E0 //TX_MICMUTE_DT2_HOLD_N
|
||||||
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
||||||
928 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOL
|
928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
|
||||||
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
||||||
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
||||||
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
||||||
932 0x3E80 //TX_MICMUTE_DT_CUT_K1
|
932 0x3E80 //TX_MICMUTE_DT_CUT_K1
|
||||||
933 0x0800 //TX_MICMUTE_POST_MASK_SUP
|
933 0x7200 //TX_MICMUTE_POST_MASK_SUP
|
||||||
934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP
|
934 0x4000 //TX_MICMUTE_PRE_MASK_SUP
|
||||||
935 0x001C //TX_MICMUTE_SDPCRN_GAIN
|
935 0x0100 //TX_MICMUTE_SDPCRN_GAIN
|
||||||
936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS
|
936 0x4000 //TX_MICMUTE_NSSAMASK_MORENS
|
||||||
937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS
|
937 0x0100 //TX_MICMUTE_CGMMMASK_MORENS
|
||||||
938 0x2710 //TX_MIC1RUB_AMP_THR
|
938 0x2710 //TX_MIC1RUB_AMP_THR
|
||||||
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
||||||
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
||||||
|
@ -46770,7 +46770,7 @@
|
||||||
943 0x05A0 //TX_MIC_VOLUME_MIC1MUTE
|
943 0x05A0 //TX_MIC_VOLUME_MIC1MUTE
|
||||||
944 0x3BD8 //TX_TFMASKM4_2_DT_THR
|
944 0x3BD8 //TX_TFMASKM4_2_DT_THR
|
||||||
945 0x2EE0 //TX_MEAN_GAIN500HZ_DT_THR
|
945 0x2EE0 //TX_MEAN_GAIN500HZ_DT_THR
|
||||||
946 0x000A //TX_MUTE_REF_POW_TH
|
946 0x0008 //TX_MUTE_REF_POW_TH
|
||||||
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
||||||
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
||||||
949 0x5FFB //TX_PRE_MASK_SUP
|
949 0x5FFB //TX_PRE_MASK_SUP
|
||||||
|
@ -54808,45 +54808,45 @@
|
||||||
896 0xD999 //TX_FASTNS_SSA_THHFH
|
896 0xD999 //TX_FASTNS_SSA_THHFH
|
||||||
897 0x2329 //TX_SENDFUNC_REG_MICMUTE
|
897 0x2329 //TX_SENDFUNC_REG_MICMUTE
|
||||||
898 0x0010 //TX_SENDFUNC_REG_MICMUTE1
|
898 0x0010 //TX_SENDFUNC_REG_MICMUTE1
|
||||||
899 0x0290 //TX_MICMUTE_RATIO_THR
|
899 0x02AC //TX_MICMUTE_RATIO_THR
|
||||||
900 0x0280 //TX_MICMUTE_AMP_THR
|
900 0x02E0 //TX_MICMUTE_AMP_THR
|
||||||
901 0x0000 //TX_MICMUTE_HPF_IND
|
901 0x0000 //TX_MICMUTE_HPF_IND
|
||||||
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
||||||
903 0x0009 //TX_MICMUTE_CVG_TIME
|
903 0x0008 //TX_MICMUTE_CVG_TIME
|
||||||
904 0x0008 //TX_MICMUTE_RELEASE_TIME
|
904 0x0008 //TX_MICMUTE_RELEASE_TIME
|
||||||
905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE
|
905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE
|
||||||
906 0x0000 //TX_MICMUTE_DIST2REF_1
|
906 0x0000 //TX_MICMUTE_DIST2REF_1
|
||||||
907 0x0028 //TX_MICMUTE_FRQ_AEC_L
|
907 0x0028 //TX_MICMUTE_FRQ_AEC_L
|
||||||
908 0x7F40 //TX_MICMUTE_EAD_THR
|
908 0x7F40 //TX_MICMUTE_EAD_THR
|
||||||
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
||||||
910 0x3000 //TX_MICMUTE_LAMBDA_RE_EST
|
910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
|
||||||
911 0x7D00 //TX_DTD_THR1_MICMUTE_0
|
911 0x78B4 //TX_DTD_THR1_MICMUTE_0
|
||||||
912 0x7FFF //TX_DTD_THR1_MICMUTE_1
|
912 0x7FFF //TX_DTD_THR1_MICMUTE_1
|
||||||
913 0x7FFF //TX_DTD_THR1_MICMUTE_2
|
913 0x7FFF //TX_DTD_THR1_MICMUTE_2
|
||||||
914 0x7FFF //TX_DTD_THR1_MICMUTE_3
|
914 0x7E00 //TX_DTD_THR1_MICMUTE_3
|
||||||
915 0x2000 //TX_DTD_THR2_MICMUTE_0
|
915 0x7FFF //TX_DTD_THR2_MICMUTE_0
|
||||||
916 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
916 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
||||||
917 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
917 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
||||||
918 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
918 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
||||||
919 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
919 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
||||||
920 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
920 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
||||||
921 0x7FFF //TX_MICMUTE_C_POST_FLT
|
921 0x1000 //TX_MICMUTE_C_POST_FLT
|
||||||
922 0x1F40 //TX_MICMUTE_DT_CUT_K
|
922 0x1F40 //TX_MICMUTE_DT_CUT_K
|
||||||
923 0x7FFF //TX_MICMUTE_DT_CUT_THR
|
923 0x0100 //TX_MICMUTE_DT_CUT_THR
|
||||||
924 0x1F40 //TX_MICMUTE_DT_CUT_K2
|
924 0x1F40 //TX_MICMUTE_DT_CUT_K2
|
||||||
925 0x7FFF //TX_MICMUTE_DT_CUT_THR2
|
925 0x0100 //TX_MICMUTE_DT_CUT_THR2
|
||||||
926 0x00C0 //TX_MICMUTE_DT2_HOLD_N
|
926 0x00C0 //TX_MICMUTE_DT2_HOLD_N
|
||||||
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
||||||
928 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOL
|
928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
|
||||||
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
||||||
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
||||||
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
||||||
932 0x3E80 //TX_MICMUTE_DT_CUT_K1
|
932 0x3E80 //TX_MICMUTE_DT_CUT_K1
|
||||||
933 0x0800 //TX_MICMUTE_POST_MASK_SUP
|
933 0x7200 //TX_MICMUTE_POST_MASK_SUP
|
||||||
934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP
|
934 0x4000 //TX_MICMUTE_PRE_MASK_SUP
|
||||||
935 0x001C //TX_MICMUTE_SDPCRN_GAIN
|
935 0x0100 //TX_MICMUTE_SDPCRN_GAIN
|
||||||
936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS
|
936 0x4000 //TX_MICMUTE_NSSAMASK_MORENS
|
||||||
937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS
|
937 0x0100 //TX_MICMUTE_CGMMMASK_MORENS
|
||||||
938 0x2710 //TX_MIC1RUB_AMP_THR
|
938 0x2710 //TX_MIC1RUB_AMP_THR
|
||||||
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
||||||
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
||||||
|
@ -54855,7 +54855,7 @@
|
||||||
943 0x05A0 //TX_MIC_VOLUME_MIC1MUTE
|
943 0x05A0 //TX_MIC_VOLUME_MIC1MUTE
|
||||||
944 0xFFFF //TX_TFMASKM4_2_DT_THR
|
944 0xFFFF //TX_TFMASKM4_2_DT_THR
|
||||||
945 0x57E4 //TX_MEAN_GAIN500HZ_DT_THR
|
945 0x57E4 //TX_MEAN_GAIN500HZ_DT_THR
|
||||||
946 0x000A //TX_MUTE_REF_POW_TH
|
946 0x0009 //TX_MUTE_REF_POW_TH
|
||||||
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
||||||
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
||||||
949 0x1FFF //TX_PRE_MASK_SUP
|
949 0x1FFF //TX_PRE_MASK_SUP
|
||||||
|
@ -57503,45 +57503,45 @@
|
||||||
896 0xD999 //TX_FASTNS_SSA_THHFH
|
896 0xD999 //TX_FASTNS_SSA_THHFH
|
||||||
897 0x2329 //TX_SENDFUNC_REG_MICMUTE
|
897 0x2329 //TX_SENDFUNC_REG_MICMUTE
|
||||||
898 0x0010 //TX_SENDFUNC_REG_MICMUTE1
|
898 0x0010 //TX_SENDFUNC_REG_MICMUTE1
|
||||||
899 0x02BC //TX_MICMUTE_RATIO_THR
|
899 0x02A0 //TX_MICMUTE_RATIO_THR
|
||||||
900 0x02E0 //TX_MICMUTE_AMP_THR
|
900 0x02E0 //TX_MICMUTE_AMP_THR
|
||||||
901 0x0000 //TX_MICMUTE_HPF_IND
|
901 0x0000 //TX_MICMUTE_HPF_IND
|
||||||
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
||||||
903 0x0009 //TX_MICMUTE_CVG_TIME
|
903 0x0008 //TX_MICMUTE_CVG_TIME
|
||||||
904 0x0008 //TX_MICMUTE_RELEASE_TIME
|
904 0x0008 //TX_MICMUTE_RELEASE_TIME
|
||||||
905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE
|
905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE
|
||||||
906 0x0000 //TX_MICMUTE_DIST2REF_1
|
906 0x0000 //TX_MICMUTE_DIST2REF_1
|
||||||
907 0x0028 //TX_MICMUTE_FRQ_AEC_L
|
907 0x0028 //TX_MICMUTE_FRQ_AEC_L
|
||||||
908 0x7C00 //TX_MICMUTE_EAD_THR
|
908 0x7C00 //TX_MICMUTE_EAD_THR
|
||||||
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
||||||
910 0x3000 //TX_MICMUTE_LAMBDA_RE_EST
|
910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
|
||||||
911 0x7FF4 //TX_DTD_THR1_MICMUTE_0
|
911 0x79E0 //TX_DTD_THR1_MICMUTE_0
|
||||||
912 0x7FFF //TX_DTD_THR1_MICMUTE_1
|
912 0x7FC0 //TX_DTD_THR1_MICMUTE_1
|
||||||
913 0x7FFF //TX_DTD_THR1_MICMUTE_2
|
913 0x7F94 //TX_DTD_THR1_MICMUTE_2
|
||||||
914 0x7F44 //TX_DTD_THR1_MICMUTE_3
|
914 0x7F44 //TX_DTD_THR1_MICMUTE_3
|
||||||
915 0x7800 //TX_DTD_THR2_MICMUTE_0
|
915 0x7FFF //TX_DTD_THR2_MICMUTE_0
|
||||||
916 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
916 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
||||||
917 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
917 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
||||||
918 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
918 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
||||||
919 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
919 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
||||||
920 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
920 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
||||||
921 0x7FFF //TX_MICMUTE_C_POST_FLT
|
921 0x1000 //TX_MICMUTE_C_POST_FLT
|
||||||
922 0x2710 //TX_MICMUTE_DT_CUT_K
|
922 0x3E80 //TX_MICMUTE_DT_CUT_K
|
||||||
923 0x0100 //TX_MICMUTE_DT_CUT_THR
|
923 0x0100 //TX_MICMUTE_DT_CUT_THR
|
||||||
924 0x2710 //TX_MICMUTE_DT_CUT_K2
|
924 0x3E80 //TX_MICMUTE_DT_CUT_K2
|
||||||
925 0x0100 //TX_MICMUTE_DT_CUT_THR2
|
925 0x0100 //TX_MICMUTE_DT_CUT_THR2
|
||||||
926 0x00E0 //TX_MICMUTE_DT2_HOLD_N
|
926 0x00E0 //TX_MICMUTE_DT2_HOLD_N
|
||||||
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
||||||
928 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOL
|
928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
|
||||||
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
||||||
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
||||||
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
||||||
932 0x3E80 //TX_MICMUTE_DT_CUT_K1
|
932 0x3E80 //TX_MICMUTE_DT_CUT_K1
|
||||||
933 0x0800 //TX_MICMUTE_POST_MASK_SUP
|
933 0x7200 //TX_MICMUTE_POST_MASK_SUP
|
||||||
934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP
|
934 0x4000 //TX_MICMUTE_PRE_MASK_SUP
|
||||||
935 0x001C //TX_MICMUTE_SDPCRN_GAIN
|
935 0x0100 //TX_MICMUTE_SDPCRN_GAIN
|
||||||
936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS
|
936 0x4000 //TX_MICMUTE_NSSAMASK_MORENS
|
||||||
937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS
|
937 0x0100 //TX_MICMUTE_CGMMMASK_MORENS
|
||||||
938 0x2710 //TX_MIC1RUB_AMP_THR
|
938 0x2710 //TX_MIC1RUB_AMP_THR
|
||||||
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
||||||
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
||||||
|
@ -57550,7 +57550,7 @@
|
||||||
943 0x05A0 //TX_MIC_VOLUME_MIC1MUTE
|
943 0x05A0 //TX_MIC_VOLUME_MIC1MUTE
|
||||||
944 0x3BD8 //TX_TFMASKM4_2_DT_THR
|
944 0x3BD8 //TX_TFMASKM4_2_DT_THR
|
||||||
945 0x2EE0 //TX_MEAN_GAIN500HZ_DT_THR
|
945 0x2EE0 //TX_MEAN_GAIN500HZ_DT_THR
|
||||||
946 0x000A //TX_MUTE_REF_POW_TH
|
946 0x0008 //TX_MUTE_REF_POW_TH
|
||||||
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
||||||
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
||||||
949 0x5FFB //TX_PRE_MASK_SUP
|
949 0x5FFB //TX_PRE_MASK_SUP
|
||||||
|
@ -62893,45 +62893,45 @@
|
||||||
896 0xD999 //TX_FASTNS_SSA_THHFH
|
896 0xD999 //TX_FASTNS_SSA_THHFH
|
||||||
897 0x2329 //TX_SENDFUNC_REG_MICMUTE
|
897 0x2329 //TX_SENDFUNC_REG_MICMUTE
|
||||||
898 0x0010 //TX_SENDFUNC_REG_MICMUTE1
|
898 0x0010 //TX_SENDFUNC_REG_MICMUTE1
|
||||||
899 0x02BC //TX_MICMUTE_RATIO_THR
|
899 0x02A0 //TX_MICMUTE_RATIO_THR
|
||||||
900 0x02E0 //TX_MICMUTE_AMP_THR
|
900 0x02E0 //TX_MICMUTE_AMP_THR
|
||||||
901 0x0000 //TX_MICMUTE_HPF_IND
|
901 0x0000 //TX_MICMUTE_HPF_IND
|
||||||
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
|
||||||
903 0x0009 //TX_MICMUTE_CVG_TIME
|
903 0x0008 //TX_MICMUTE_CVG_TIME
|
||||||
904 0x0008 //TX_MICMUTE_RELEASE_TIME
|
904 0x0008 //TX_MICMUTE_RELEASE_TIME
|
||||||
905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE
|
905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE
|
||||||
906 0x0000 //TX_MICMUTE_DIST2REF_1
|
906 0x0000 //TX_MICMUTE_DIST2REF_1
|
||||||
907 0x0028 //TX_MICMUTE_FRQ_AEC_L
|
907 0x0028 //TX_MICMUTE_FRQ_AEC_L
|
||||||
908 0x7C00 //TX_MICMUTE_EAD_THR
|
908 0x7C00 //TX_MICMUTE_EAD_THR
|
||||||
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE
|
||||||
910 0x3000 //TX_MICMUTE_LAMBDA_RE_EST
|
910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
|
||||||
911 0x7FF4 //TX_DTD_THR1_MICMUTE_0
|
911 0x79E0 //TX_DTD_THR1_MICMUTE_0
|
||||||
912 0x7FFF //TX_DTD_THR1_MICMUTE_1
|
912 0x7FC0 //TX_DTD_THR1_MICMUTE_1
|
||||||
913 0x7FFF //TX_DTD_THR1_MICMUTE_2
|
913 0x7F94 //TX_DTD_THR1_MICMUTE_2
|
||||||
914 0x7F44 //TX_DTD_THR1_MICMUTE_3
|
914 0x7F44 //TX_DTD_THR1_MICMUTE_3
|
||||||
915 0x7800 //TX_DTD_THR2_MICMUTE_0
|
915 0x7FFF //TX_DTD_THR2_MICMUTE_0
|
||||||
916 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
916 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_0
|
||||||
917 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
917 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_1
|
||||||
918 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
918 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_2
|
||||||
919 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
919 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_3
|
||||||
920 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
920 0x0100 //TX_MICMUTE_MIN_EQ_RE_EST_4
|
||||||
921 0x7FFF //TX_MICMUTE_C_POST_FLT
|
921 0x1000 //TX_MICMUTE_C_POST_FLT
|
||||||
922 0x2710 //TX_MICMUTE_DT_CUT_K
|
922 0x3E80 //TX_MICMUTE_DT_CUT_K
|
||||||
923 0x0100 //TX_MICMUTE_DT_CUT_THR
|
923 0x0100 //TX_MICMUTE_DT_CUT_THR
|
||||||
924 0x2710 //TX_MICMUTE_DT_CUT_K2
|
924 0x3E80 //TX_MICMUTE_DT_CUT_K2
|
||||||
925 0x0100 //TX_MICMUTE_DT_CUT_THR2
|
925 0x0100 //TX_MICMUTE_DT_CUT_THR2
|
||||||
926 0x00E0 //TX_MICMUTE_DT2_HOLD_N
|
926 0x00E0 //TX_MICMUTE_DT2_HOLD_N
|
||||||
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
|
||||||
928 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOL
|
928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
|
||||||
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
|
||||||
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
|
||||||
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
|
||||||
932 0x3E80 //TX_MICMUTE_DT_CUT_K1
|
932 0x3E80 //TX_MICMUTE_DT_CUT_K1
|
||||||
933 0x0800 //TX_MICMUTE_POST_MASK_SUP
|
933 0x7200 //TX_MICMUTE_POST_MASK_SUP
|
||||||
934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP
|
934 0x4000 //TX_MICMUTE_PRE_MASK_SUP
|
||||||
935 0x001C //TX_MICMUTE_SDPCRN_GAIN
|
935 0x0100 //TX_MICMUTE_SDPCRN_GAIN
|
||||||
936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS
|
936 0x4000 //TX_MICMUTE_NSSAMASK_MORENS
|
||||||
937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS
|
937 0x0100 //TX_MICMUTE_CGMMMASK_MORENS
|
||||||
938 0x2710 //TX_MIC1RUB_AMP_THR
|
938 0x2710 //TX_MIC1RUB_AMP_THR
|
||||||
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
939 0x7FFF //TX_MIC1MUTE_RATIO_THR
|
||||||
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
940 0x0001 //TX_MIC1MUTE_AMP_THR
|
||||||
|
@ -62940,7 +62940,7 @@
|
||||||
943 0x05A0 //TX_MIC_VOLUME_MIC1MUTE
|
943 0x05A0 //TX_MIC_VOLUME_MIC1MUTE
|
||||||
944 0x3BD8 //TX_TFMASKM4_2_DT_THR
|
944 0x3BD8 //TX_TFMASKM4_2_DT_THR
|
||||||
945 0x2EE0 //TX_MEAN_GAIN500HZ_DT_THR
|
945 0x2EE0 //TX_MEAN_GAIN500HZ_DT_THR
|
||||||
946 0x000A //TX_MUTE_REF_POW_TH
|
946 0x0008 //TX_MUTE_REF_POW_TH
|
||||||
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN
|
||||||
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN
|
||||||
949 0x5FFB //TX_PRE_MASK_SUP
|
949 0x5FFB //TX_PRE_MASK_SUP
|
||||||
|
|
Binary file not shown.
File diff suppressed because it is too large
Load diff
Binary file not shown.
File diff suppressed because it is too large
Load diff
|
@ -16,5 +16,6 @@
|
||||||
<config>
|
<config>
|
||||||
<component-override package="com.google.android.apps.pixel.support" >
|
<component-override package="com.google.android.apps.pixel.support" >
|
||||||
<component class="com.google.android.apps.pixel.support.navigationroot.TouchNavigationRootActivity" enabled="true" />
|
<component class="com.google.android.apps.pixel.support.navigationroot.TouchNavigationRootActivity" enabled="true" />
|
||||||
|
<component class="com.google.android.apps.pixel.support.navigationroot.TouchDiagnosticsSearchProvider" enabled="true" />
|
||||||
</component-override>
|
</component-override>
|
||||||
</config>
|
</config>
|
||||||
|
|
|
@ -179,7 +179,7 @@
|
||||||
</string>
|
</string>
|
||||||
|
|
||||||
<string translatable="false" name="config_mainBuiltInDisplayCutoutRectApproximation">
|
<string translatable="false" name="config_mainBuiltInDisplayCutoutRectApproximation">
|
||||||
m 586,43.5 h 115 v 115 H 586 Z
|
m 586,0 h 108.5 v 155.5 H 586 Z
|
||||||
@left
|
@left
|
||||||
</string>
|
</string>
|
||||||
<!-- A string config in svg path format for the main display shape.
|
<!-- A string config in svg path format for the main display shape.
|
||||||
|
|
|
@ -23,4 +23,14 @@
|
||||||
</string-array>
|
</string-array>
|
||||||
<bool name="tag_intent_app_pref_supported">true</bool>
|
<bool name="tag_intent_app_pref_supported">true</bool>
|
||||||
<bool name="nfc_observe_mode_supported">true</bool>
|
<bool name="nfc_observe_mode_supported">true</bool>
|
||||||
|
<!-- NFC Antenna Location API -->
|
||||||
|
<integer name="device_width">72</integer>
|
||||||
|
<integer name="device_height">152</integer>
|
||||||
|
<bool name="device_foldable">false</bool>
|
||||||
|
<integer-array name="antenna_x">
|
||||||
|
<item>36</item>
|
||||||
|
</integer-array>
|
||||||
|
<integer-array name="antenna_y">
|
||||||
|
<item>108</item>
|
||||||
|
</integer-array>
|
||||||
</resources>
|
</resources>
|
||||||
|
|
|
@ -300,7 +300,7 @@ PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.vendor.primarydisplay.preferred_mode=96
|
||||||
|
|
||||||
ifeq ($(filter factory_caiman, $(TARGET_PRODUCT)),)
|
ifeq ($(filter factory_caiman, $(TARGET_PRODUCT)),)
|
||||||
PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.vendor.primarydisplay.xrr.version=2.1
|
PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.vendor.primarydisplay.xrr.version=2.1
|
||||||
PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.vendor.primarydisplay.blocking_zone.min_refresh_rate_by_nits=5:120,15:10,:1
|
PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.vendor.primarydisplay.blocking_zone.min_refresh_rate_by_nits=5:120,:1
|
||||||
PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.vendor.primarydisplay.vrr.expected_present.headsup_ns=30000000
|
PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.vendor.primarydisplay.vrr.expected_present.headsup_ns=30000000
|
||||||
PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.vendor.primarydisplay.vrr.expected_present.timeout_ns=500000000
|
PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.vendor.primarydisplay.vrr.expected_present.timeout_ns=500000000
|
||||||
endif
|
endif
|
||||||
|
|
|
@ -65,7 +65,7 @@ PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.vendor.primarydisplay.preferred_mode=10
|
||||||
|
|
||||||
ifeq ($(filter factory_komodo, $(TARGET_PRODUCT)),)
|
ifeq ($(filter factory_komodo, $(TARGET_PRODUCT)),)
|
||||||
PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.vendor.primarydisplay.xrr.version=2.1
|
PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.vendor.primarydisplay.xrr.version=2.1
|
||||||
PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.vendor.primarydisplay.blocking_zone.min_refresh_rate_by_nits=5:120,15:10,:1
|
PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.vendor.primarydisplay.blocking_zone.min_refresh_rate_by_nits=5:120,:1
|
||||||
PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.vendor.primarydisplay.vrr.expected_present.headsup_ns=30000000
|
PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.vendor.primarydisplay.vrr.expected_present.headsup_ns=30000000
|
||||||
PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.vendor.primarydisplay.vrr.expected_present.timeout_ns=500000000
|
PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.vendor.primarydisplay.vrr.expected_present.timeout_ns=500000000
|
||||||
endif
|
endif
|
||||||
|
|
|
@ -16,5 +16,6 @@
|
||||||
<config>
|
<config>
|
||||||
<component-override package="com.google.android.apps.pixel.support" >
|
<component-override package="com.google.android.apps.pixel.support" >
|
||||||
<component class="com.google.android.apps.pixel.support.navigationroot.TouchNavigationRootActivity" enabled="true" />
|
<component class="com.google.android.apps.pixel.support.navigationroot.TouchNavigationRootActivity" enabled="true" />
|
||||||
|
<component class="com.google.android.apps.pixel.support.navigationroot.TouchDiagnosticsSearchProvider" enabled="true" />
|
||||||
</component-override>
|
</component-override>
|
||||||
</config>
|
</config>
|
||||||
|
|
|
@ -179,7 +179,7 @@
|
||||||
</string>
|
</string>
|
||||||
|
|
||||||
<string translatable="false" name="config_mainBuiltInDisplayCutoutRectApproximation">
|
<string translatable="false" name="config_mainBuiltInDisplayCutoutRectApproximation">
|
||||||
m 614.53715,43.5 h 115 v 115 h -115 z
|
m 614.53715,0 h 115 v 158.5 h -115 z
|
||||||
@left
|
@left
|
||||||
</string>
|
</string>
|
||||||
<!-- A string config in svg path format for the main display shape.
|
<!-- A string config in svg path format for the main display shape.
|
||||||
|
|
|
@ -23,4 +23,14 @@
|
||||||
</string-array>
|
</string-array>
|
||||||
<bool name="tag_intent_app_pref_supported">true</bool>
|
<bool name="tag_intent_app_pref_supported">true</bool>
|
||||||
<bool name="nfc_observe_mode_supported">true</bool>
|
<bool name="nfc_observe_mode_supported">true</bool>
|
||||||
|
<!-- NFC Antenna Location API -->
|
||||||
|
<integer name="device_width">76</integer>
|
||||||
|
<integer name="device_height">162</integer>
|
||||||
|
<bool name="device_foldable">false</bool>
|
||||||
|
<integer-array name="antenna_x">
|
||||||
|
<item>38</item>
|
||||||
|
</integer-array>
|
||||||
|
<integer-array name="antenna_y">
|
||||||
|
<item>112</item>
|
||||||
|
</integer-array>
|
||||||
</resources>
|
</resources>
|
||||||
|
|
|
@ -40,6 +40,7 @@ Sif_UseFwXtraInterface=1
|
||||||
Agnss_IsGloAidingEnable=0
|
Agnss_IsGloAidingEnable=0
|
||||||
SETCaps_IsOtdoa=1
|
SETCaps_IsOtdoa=1
|
||||||
SETCaps_IsLpp=1
|
SETCaps_IsLpp=1
|
||||||
|
SETCaps_SuplUT1=20
|
||||||
PosReq_Supl2Params_SuplNiUdpPort=7275
|
PosReq_Supl2Params_SuplNiUdpPort=7275
|
||||||
GlueLayer_LPPCpBitmask=0x17
|
GlueLayer_LPPCpBitmask=0x17
|
||||||
GlueLayer_IsCpLteNeighborCellEnable=1
|
GlueLayer_IsCpLteNeighborCellEnable=1
|
||||||
|
|
|
@ -164,6 +164,7 @@ Sif_UseFwXtraInterface=1
|
||||||
Agnss_IsGloAidingEnable=0
|
Agnss_IsGloAidingEnable=0
|
||||||
SETCaps_IsOtdoa=1
|
SETCaps_IsOtdoa=1
|
||||||
SETCaps_IsLpp=1
|
SETCaps_IsLpp=1
|
||||||
|
SETCaps_SuplUT1=20
|
||||||
PosReq_Supl2Params_SuplNiUdpPort=7275
|
PosReq_Supl2Params_SuplNiUdpPort=7275
|
||||||
GlueLayer_LPPCpBitmask=0x17
|
GlueLayer_LPPCpBitmask=0x17
|
||||||
GlueLayer_IsCpLteNeighborCellEnable=1
|
GlueLayer_IsCpLteNeighborCellEnable=1
|
||||||
|
|
|
@ -40,6 +40,7 @@ Sif_UseFwXtraInterface=1
|
||||||
Agnss_IsGloAidingEnable=0
|
Agnss_IsGloAidingEnable=0
|
||||||
SETCaps_IsOtdoa=1
|
SETCaps_IsOtdoa=1
|
||||||
SETCaps_IsLpp=1
|
SETCaps_IsLpp=1
|
||||||
|
SETCaps_SuplUT1=20
|
||||||
PosReq_Supl2Params_SuplNiUdpPort=7275
|
PosReq_Supl2Params_SuplNiUdpPort=7275
|
||||||
GlueLayer_LPPCpBitmask=0x17
|
GlueLayer_LPPCpBitmask=0x17
|
||||||
GlueLayer_IsCpLteNeighborCellEnable=1
|
GlueLayer_IsCpLteNeighborCellEnable=1
|
||||||
|
|
|
@ -164,6 +164,7 @@ Sif_UseFwXtraInterface=1
|
||||||
Agnss_IsGloAidingEnable=0
|
Agnss_IsGloAidingEnable=0
|
||||||
SETCaps_IsOtdoa=1
|
SETCaps_IsOtdoa=1
|
||||||
SETCaps_IsLpp=1
|
SETCaps_IsLpp=1
|
||||||
|
SETCaps_SuplUT1=20
|
||||||
PosReq_Supl2Params_SuplNiUdpPort=7275
|
PosReq_Supl2Params_SuplNiUdpPort=7275
|
||||||
GlueLayer_LPPCpBitmask=0x17
|
GlueLayer_LPPCpBitmask=0x17
|
||||||
GlueLayer_IsCpLteNeighborCellEnable=1
|
GlueLayer_IsCpLteNeighborCellEnable=1
|
||||||
|
|
|
@ -40,6 +40,7 @@ Sif_UseFwXtraInterface=1
|
||||||
Agnss_IsGloAidingEnable=0
|
Agnss_IsGloAidingEnable=0
|
||||||
SETCaps_IsOtdoa=1
|
SETCaps_IsOtdoa=1
|
||||||
SETCaps_IsLpp=1
|
SETCaps_IsLpp=1
|
||||||
|
SETCaps_SuplUT1=20
|
||||||
PosReq_Supl2Params_SuplNiUdpPort=7275
|
PosReq_Supl2Params_SuplNiUdpPort=7275
|
||||||
GlueLayer_LPPCpBitmask=0x17
|
GlueLayer_LPPCpBitmask=0x17
|
||||||
GlueLayer_IsCpLteNeighborCellEnable=1
|
GlueLayer_IsCpLteNeighborCellEnable=1
|
||||||
|
|
|
@ -164,6 +164,7 @@ Sif_UseFwXtraInterface=1
|
||||||
Agnss_IsGloAidingEnable=0
|
Agnss_IsGloAidingEnable=0
|
||||||
SETCaps_IsOtdoa=1
|
SETCaps_IsOtdoa=1
|
||||||
SETCaps_IsLpp=1
|
SETCaps_IsLpp=1
|
||||||
|
SETCaps_SuplUT1=20
|
||||||
PosReq_Supl2Params_SuplNiUdpPort=7275
|
PosReq_Supl2Params_SuplNiUdpPort=7275
|
||||||
GlueLayer_LPPCpBitmask=0x17
|
GlueLayer_LPPCpBitmask=0x17
|
||||||
GlueLayer_IsCpLteNeighborCellEnable=1
|
GlueLayer_IsCpLteNeighborCellEnable=1
|
||||||
|
|
|
@ -646,6 +646,7 @@
|
||||||
"Path": "/sys/devices/system/cpu/cpufreq/policy4/sched_pixel/spc_threshold",
|
"Path": "/sys/devices/system/cpu/cpufreq/policy4/sched_pixel/spc_threshold",
|
||||||
"Values": [
|
"Values": [
|
||||||
"50",
|
"50",
|
||||||
|
"32",
|
||||||
"30",
|
"30",
|
||||||
"20",
|
"20",
|
||||||
"18"
|
"18"
|
||||||
|
@ -1908,7 +1909,7 @@
|
||||||
"PowerHint": "CAMERA_STREAMING_HIGH",
|
"PowerHint": "CAMERA_STREAMING_HIGH",
|
||||||
"Node": "PMU_LIT_SPC_THRESHOLD",
|
"Node": "PMU_LIT_SPC_THRESHOLD",
|
||||||
"Duration": 0,
|
"Duration": 0,
|
||||||
"Value": "35"
|
"Value": "55"
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"PowerHint": "CAMERA_STREAMING_HIGH",
|
"PowerHint": "CAMERA_STREAMING_HIGH",
|
||||||
|
@ -1926,7 +1927,7 @@
|
||||||
"PowerHint": "CAMERA_STREAMING_HIGH",
|
"PowerHint": "CAMERA_STREAMING_HIGH",
|
||||||
"Node": "PMU_MID_SPC_THRESHOLD",
|
"Node": "PMU_MID_SPC_THRESHOLD",
|
||||||
"Duration": 0,
|
"Duration": 0,
|
||||||
"Value": "20"
|
"Value": "32"
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"PowerHint": "CAMERA_STREAMING_HIGH",
|
"PowerHint": "CAMERA_STREAMING_HIGH",
|
||||||
|
@ -2316,13 +2317,13 @@
|
||||||
"PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
|
"PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
|
||||||
"Node": "CDPreferHighCap",
|
"Node": "CDPreferHighCap",
|
||||||
"Duration": 0,
|
"Duration": 0,
|
||||||
"Value": "1"
|
"Value": "0"
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
|
"PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
|
||||||
"Node": "TAPreferHighCap",
|
"Node": "TAPreferHighCap",
|
||||||
"Duration": 0,
|
"Duration": 0,
|
||||||
"Value": "0"
|
"Value": "1"
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
|
"PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
|
||||||
|
|
|
@ -646,6 +646,7 @@
|
||||||
"Path": "/sys/devices/system/cpu/cpufreq/policy4/sched_pixel/spc_threshold",
|
"Path": "/sys/devices/system/cpu/cpufreq/policy4/sched_pixel/spc_threshold",
|
||||||
"Values": [
|
"Values": [
|
||||||
"50",
|
"50",
|
||||||
|
"32",
|
||||||
"30",
|
"30",
|
||||||
"20",
|
"20",
|
||||||
"18"
|
"18"
|
||||||
|
@ -1908,7 +1909,7 @@
|
||||||
"PowerHint": "CAMERA_STREAMING_HIGH",
|
"PowerHint": "CAMERA_STREAMING_HIGH",
|
||||||
"Node": "PMU_LIT_SPC_THRESHOLD",
|
"Node": "PMU_LIT_SPC_THRESHOLD",
|
||||||
"Duration": 0,
|
"Duration": 0,
|
||||||
"Value": "35"
|
"Value": "55"
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"PowerHint": "CAMERA_STREAMING_HIGH",
|
"PowerHint": "CAMERA_STREAMING_HIGH",
|
||||||
|
@ -1926,7 +1927,7 @@
|
||||||
"PowerHint": "CAMERA_STREAMING_HIGH",
|
"PowerHint": "CAMERA_STREAMING_HIGH",
|
||||||
"Node": "PMU_MID_SPC_THRESHOLD",
|
"Node": "PMU_MID_SPC_THRESHOLD",
|
||||||
"Duration": 0,
|
"Duration": 0,
|
||||||
"Value": "20"
|
"Value": "32"
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"PowerHint": "CAMERA_STREAMING_HIGH",
|
"PowerHint": "CAMERA_STREAMING_HIGH",
|
||||||
|
|
|
@ -729,6 +729,7 @@
|
||||||
"Path": "/sys/devices/system/cpu/cpufreq/policy4/sched_pixel/spc_threshold",
|
"Path": "/sys/devices/system/cpu/cpufreq/policy4/sched_pixel/spc_threshold",
|
||||||
"Values": [
|
"Values": [
|
||||||
"50",
|
"50",
|
||||||
|
"32",
|
||||||
"30",
|
"30",
|
||||||
"20",
|
"20",
|
||||||
"18"
|
"18"
|
||||||
|
@ -1897,7 +1898,7 @@
|
||||||
"PowerHint": "CAMERA_STREAMING_HIGH",
|
"PowerHint": "CAMERA_STREAMING_HIGH",
|
||||||
"Node": "PMU_LIT_SPC_THRESHOLD",
|
"Node": "PMU_LIT_SPC_THRESHOLD",
|
||||||
"Duration": 0,
|
"Duration": 0,
|
||||||
"Value": "35"
|
"Value": "55"
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"PowerHint": "CAMERA_STREAMING_HIGH",
|
"PowerHint": "CAMERA_STREAMING_HIGH",
|
||||||
|
@ -1915,7 +1916,7 @@
|
||||||
"PowerHint": "CAMERA_STREAMING_HIGH",
|
"PowerHint": "CAMERA_STREAMING_HIGH",
|
||||||
"Node": "PMU_MID_SPC_THRESHOLD",
|
"Node": "PMU_MID_SPC_THRESHOLD",
|
||||||
"Duration": 0,
|
"Duration": 0,
|
||||||
"Value": "20"
|
"Value": "32"
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"PowerHint": "CAMERA_STREAMING_HIGH",
|
"PowerHint": "CAMERA_STREAMING_HIGH",
|
||||||
|
@ -2305,13 +2306,13 @@
|
||||||
"PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
|
"PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
|
||||||
"Node": "CDPreferHighCap",
|
"Node": "CDPreferHighCap",
|
||||||
"Duration": 0,
|
"Duration": 0,
|
||||||
"Value": "1"
|
"Value": "0"
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
|
"PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
|
||||||
"Node": "TAPreferHighCap",
|
"Node": "TAPreferHighCap",
|
||||||
"Duration": 0,
|
"Duration": 0,
|
||||||
"Value": "0"
|
"Value": "1"
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
|
"PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
|
||||||
|
|
|
@ -646,6 +646,7 @@
|
||||||
"Path": "/sys/devices/system/cpu/cpufreq/policy4/sched_pixel/spc_threshold",
|
"Path": "/sys/devices/system/cpu/cpufreq/policy4/sched_pixel/spc_threshold",
|
||||||
"Values": [
|
"Values": [
|
||||||
"50",
|
"50",
|
||||||
|
"32",
|
||||||
"30",
|
"30",
|
||||||
"20",
|
"20",
|
||||||
"18"
|
"18"
|
||||||
|
@ -1908,7 +1909,7 @@
|
||||||
"PowerHint": "CAMERA_STREAMING_HIGH",
|
"PowerHint": "CAMERA_STREAMING_HIGH",
|
||||||
"Node": "PMU_LIT_SPC_THRESHOLD",
|
"Node": "PMU_LIT_SPC_THRESHOLD",
|
||||||
"Duration": 0,
|
"Duration": 0,
|
||||||
"Value": "35"
|
"Value": "55"
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"PowerHint": "CAMERA_STREAMING_HIGH",
|
"PowerHint": "CAMERA_STREAMING_HIGH",
|
||||||
|
@ -1926,7 +1927,7 @@
|
||||||
"PowerHint": "CAMERA_STREAMING_HIGH",
|
"PowerHint": "CAMERA_STREAMING_HIGH",
|
||||||
"Node": "PMU_MID_SPC_THRESHOLD",
|
"Node": "PMU_MID_SPC_THRESHOLD",
|
||||||
"Duration": 0,
|
"Duration": 0,
|
||||||
"Value": "20"
|
"Value": "32"
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"PowerHint": "CAMERA_STREAMING_HIGH",
|
"PowerHint": "CAMERA_STREAMING_HIGH",
|
||||||
|
@ -2316,13 +2317,13 @@
|
||||||
"PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
|
"PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
|
||||||
"Node": "CDPreferHighCap",
|
"Node": "CDPreferHighCap",
|
||||||
"Duration": 0,
|
"Duration": 0,
|
||||||
"Value": "1"
|
"Value": "0"
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
|
"PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
|
||||||
"Node": "TAPreferHighCap",
|
"Node": "TAPreferHighCap",
|
||||||
"Duration": 0,
|
"Duration": 0,
|
||||||
"Value": "0"
|
"Value": "1"
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
|
"PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
|
||||||
|
|
|
@ -179,7 +179,7 @@
|
||||||
</string>
|
</string>
|
||||||
|
|
||||||
<string translatable="false" name="config_mainBuiltInDisplayCutoutRectApproximation">
|
<string translatable="false" name="config_mainBuiltInDisplayCutoutRectApproximation">
|
||||||
m 484.5,20.5 h 110 v 121 h -110 z
|
m 484.5,0 h 110 v 141.5 h -110 z
|
||||||
@left
|
@left
|
||||||
</string>
|
</string>
|
||||||
<!-- A string config in svg path format for the main display shape.
|
<!-- A string config in svg path format for the main display shape.
|
||||||
|
|
|
@ -23,4 +23,14 @@
|
||||||
</string-array>
|
</string-array>
|
||||||
<bool name="tag_intent_app_pref_supported">true</bool>
|
<bool name="tag_intent_app_pref_supported">true</bool>
|
||||||
<bool name="nfc_observe_mode_supported">true</bool>
|
<bool name="nfc_observe_mode_supported">true</bool>
|
||||||
|
<!-- NFC Antenna Location API -->
|
||||||
|
<integer name="device_width">72</integer>
|
||||||
|
<integer name="device_height">152</integer>
|
||||||
|
<bool name="device_foldable">false</bool>
|
||||||
|
<integer-array name="antenna_x">
|
||||||
|
<item>31</item>
|
||||||
|
</integer-array>
|
||||||
|
<integer-array name="antenna_y">
|
||||||
|
<item>111</item>
|
||||||
|
</integer-array>
|
||||||
</resources>
|
</resources>
|
||||||
|
|
|
@ -16,5 +16,6 @@
|
||||||
<config>
|
<config>
|
||||||
<component-override package="com.google.android.apps.pixel.support" >
|
<component-override package="com.google.android.apps.pixel.support" >
|
||||||
<component class="com.google.android.apps.pixel.support.navigationroot.TouchNavigationRootActivity" enabled="true" />
|
<component class="com.google.android.apps.pixel.support.navigationroot.TouchNavigationRootActivity" enabled="true" />
|
||||||
|
<component class="com.google.android.apps.pixel.support.navigationroot.TouchDiagnosticsSearchProvider" enabled="true" />
|
||||||
</component-override>
|
</component-override>
|
||||||
</config>
|
</config>
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue