audio: 2024/02/29 Fortemedia table check in

<change list>
TK4
- Handset (Ricky)
1. HAWB Modify TdDRC expander as short term for BWE noise issue on (max to max-2)
- Handsfree (Ricky)
1. HHSWB fine tune (max-1 to min) for EVT1.1
2. HHWB fine tune for EVT1.1
     TX/RX: PreEQ, TdDRC, EQ

- Headset (Gene)
1. HE WB: Mitigate the NB call RX noise after speech due to noise from NW and boosted by BWE.
2. HE WB: Enable 120Hz HFP for both TX and RX
3. HE WB Rx FNS level from 0x0006 to 0x000F for CCA BWE

- BT (Gene)
1. BTWB and BTWB_NREC WB Rx FNS level from 0x0006 to 0x000F for CCA BWE



CM4
- Headset (Gene)
1. HE WB: Mitigate the NB call RX noise after speech due to noise from NW and boosted by BWE.
2. HE WB: Enable 120Hz HFP for both TX and RX
3. HE WB Rx FNS level from 0x0006 to 0x000F for CCA BWE

- BT (Gene)
1. BTWB and BTWB_NREC WB Rx FNS level from 0x0006 to 0x000F for CCA BWE


KM4
- Headset (Gene)
1. HE WB: Mitigate the NB call RX noise after speech due to noise from NW and boosted by BWE.
2. HE WB: Enable 120Hz HFP for both TX and RX
3. HE WB Rx FNS level from 0x0006 to 0x000F for CCA BWE

Bug: 327555914
Test: Verified by Acoustic team
Change-Id: I2939312348ac6d9a13ac4be86460d49839b545ca
Signed-off-by: Carter Hsu <carterhsu@google.com>
(cherry picked from commit 2678747eae)
This commit is contained in:
Carter Hsu 2024-02-29 17:49:23 +08:00
parent 2bda846652
commit 32eb2b8931
23 changed files with 761 additions and 761 deletions

View file

@ -3,7 +3,7 @@
#EXPORT_FLAG BLUETOOTH
#PARAM_MODE FULL
#SAVE_MODE 3
#SAVE_TIME 2024-02-02 11:42:47
#SAVE_TIME 2024-02-29 15:54:35
#CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-NB
#PARAM_TYPE TX+2RX
@ -44140,7 +44140,7 @@
19 0x0020 //RX_PP_RESRV_1
20 0x0600 //RX_N_SN_EST
21 0x000C //RX_N2_SN_EST
22 0x0006 //RX_NS_LVL_CTRL
22 0x000F //RX_NS_LVL_CTRL
23 0xF800 //RX_THR_SN_EST
24 0x7CCD //RX_LAMBDA_PFILT
25 0x000A //RX_MUTE_PERIOD
@ -57615,7 +57615,7 @@
19 0x0020 //RX_PP_RESRV_1
20 0x0600 //RX_N_SN_EST
21 0x000C //RX_N2_SN_EST
22 0x0006 //RX_NS_LVL_CTRL
22 0x000F //RX_NS_LVL_CTRL
23 0xF800 //RX_THR_SN_EST
24 0x7CCD //RX_LAMBDA_PFILT
25 0x000A //RX_MUTE_PERIOD

View file

@ -3,7 +3,7 @@
#EXPORT_FLAG HANDSET
#PARAM_MODE FULL
#SAVE_MODE 3
#SAVE_TIME 2024-02-02 11:42:46
#SAVE_TIME 2024-02-29 16:13:14
#CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-NB
#PARAM_TYPE TX+2RX
@ -3693,7 +3693,7 @@
986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
#RX
0 0x243C //RX_RECVFUNC_MODE_0
0 0x247C //RX_RECVFUNC_MODE_0
1 0x0002 //RX_RECVFUNC_MODE_1
2 0x0001 //RX_SAMPLINGFREQ_SIG
3 0x0001 //RX_SAMPLINGFREQ_PROC
@ -3855,20 +3855,20 @@
7 0x1000 //RX_TDDRC_ALPHA_UP_2
8 0x1000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
27 0x7000 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
33 0x5A9D //RX_TDDRC_LIMITER_THRD
34 0x0800 //RX_TDDRC_LIMITER_GAIN
112 0x0000 //RX_TDDRC_THRD_0
113 0x0001 //RX_TDDRC_THRD_1
113 0x0008 //RX_TDDRC_THRD_1
114 0x1800 //RX_TDDRC_THRD_2
115 0x1800 //RX_TDDRC_THRD_3
116 0x3000 //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
118 0x1000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
119 0x7000 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
@ -3954,20 +3954,20 @@
7 0x1000 //RX_TDDRC_ALPHA_UP_2
8 0x1000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
27 0x7000 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
33 0x5A9D //RX_TDDRC_LIMITER_THRD
34 0x0800 //RX_TDDRC_LIMITER_GAIN
112 0x0000 //RX_TDDRC_THRD_0
113 0x0001 //RX_TDDRC_THRD_1
113 0x0008 //RX_TDDRC_THRD_1
114 0x1800 //RX_TDDRC_THRD_2
115 0x1800 //RX_TDDRC_THRD_3
116 0x3000 //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
118 0x1000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
119 0x7000 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
@ -4053,20 +4053,20 @@
7 0x1000 //RX_TDDRC_ALPHA_UP_2
8 0x1000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
27 0x7000 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
33 0x5A9D //RX_TDDRC_LIMITER_THRD
34 0x0800 //RX_TDDRC_LIMITER_GAIN
112 0x0000 //RX_TDDRC_THRD_0
113 0x0001 //RX_TDDRC_THRD_1
113 0x0008 //RX_TDDRC_THRD_1
114 0x1800 //RX_TDDRC_THRD_2
115 0x1800 //RX_TDDRC_THRD_3
116 0x3000 //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
118 0x1000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
119 0x7000 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
@ -4152,20 +4152,20 @@
7 0x1000 //RX_TDDRC_ALPHA_UP_2
8 0x1000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
27 0x7000 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
33 0x5A9D //RX_TDDRC_LIMITER_THRD
34 0x0800 //RX_TDDRC_LIMITER_GAIN
112 0x0000 //RX_TDDRC_THRD_0
113 0x0001 //RX_TDDRC_THRD_1
113 0x0008 //RX_TDDRC_THRD_1
114 0x1800 //RX_TDDRC_THRD_2
115 0x1800 //RX_TDDRC_THRD_3
116 0x3000 //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
118 0x1000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
119 0x7000 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
@ -4251,20 +4251,20 @@
7 0x1000 //RX_TDDRC_ALPHA_UP_2
8 0x1000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
27 0x1000 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
33 0x5A9D //RX_TDDRC_LIMITER_THRD
34 0x0800 //RX_TDDRC_LIMITER_GAIN
112 0x0000 //RX_TDDRC_THRD_0
113 0x0001 //RX_TDDRC_THRD_1
112 0x0008 //RX_TDDRC_THRD_0
113 0x0800 //RX_TDDRC_THRD_1
114 0x1800 //RX_TDDRC_THRD_2
115 0x1800 //RX_TDDRC_THRD_3
116 0x3000 //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
118 0x1000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
119 0x7000 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
@ -4350,20 +4350,20 @@
7 0x1000 //RX_TDDRC_ALPHA_UP_2
8 0x1000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
27 0x1000 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
33 0x5A9D //RX_TDDRC_LIMITER_THRD
34 0x0800 //RX_TDDRC_LIMITER_GAIN
112 0x0000 //RX_TDDRC_THRD_0
113 0x0001 //RX_TDDRC_THRD_1
112 0x0008 //RX_TDDRC_THRD_0
113 0x0800 //RX_TDDRC_THRD_1
114 0x1800 //RX_TDDRC_THRD_2
115 0x1800 //RX_TDDRC_THRD_3
116 0x3000 //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
118 0x1000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
119 0x7000 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
@ -4449,20 +4449,20 @@
7 0x1000 //RX_TDDRC_ALPHA_UP_2
8 0x1000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
27 0x1000 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
33 0x5A9D //RX_TDDRC_LIMITER_THRD
34 0x0800 //RX_TDDRC_LIMITER_GAIN
112 0x0000 //RX_TDDRC_THRD_0
113 0x0001 //RX_TDDRC_THRD_1
112 0x0008 //RX_TDDRC_THRD_0
113 0x0800 //RX_TDDRC_THRD_1
114 0x1800 //RX_TDDRC_THRD_2
115 0x1800 //RX_TDDRC_THRD_3
116 0x3000 //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
118 0x1000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
119 0x7000 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
@ -4544,7 +4544,7 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#RX 2
157 0x243C //RX_RECVFUNC_MODE_0
157 0x247C //RX_RECVFUNC_MODE_0
158 0x0002 //RX_RECVFUNC_MODE_1
159 0x0001 //RX_SAMPLINGFREQ_SIG
160 0x0001 //RX_SAMPLINGFREQ_PROC
@ -4713,7 +4713,7 @@
190 0x5A9D //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0000 //RX_TDDRC_THRD_0
270 0x0001 //RX_TDDRC_THRD_1
270 0x0008 //RX_TDDRC_THRD_1
271 0x1800 //RX_TDDRC_THRD_2
272 0x1800 //RX_TDDRC_THRD_3
273 0x3000 //RX_TDDRC_SLANT_0
@ -4812,7 +4812,7 @@
190 0x5A9D //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0000 //RX_TDDRC_THRD_0
270 0x0001 //RX_TDDRC_THRD_1
270 0x0008 //RX_TDDRC_THRD_1
271 0x1800 //RX_TDDRC_THRD_2
272 0x1800 //RX_TDDRC_THRD_3
273 0x3000 //RX_TDDRC_SLANT_0
@ -4911,7 +4911,7 @@
190 0x5A9D //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0000 //RX_TDDRC_THRD_0
270 0x0001 //RX_TDDRC_THRD_1
270 0x0008 //RX_TDDRC_THRD_1
271 0x1800 //RX_TDDRC_THRD_2
272 0x1800 //RX_TDDRC_THRD_3
273 0x3000 //RX_TDDRC_SLANT_0
@ -5010,7 +5010,7 @@
190 0x5A9D //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0000 //RX_TDDRC_THRD_0
270 0x0001 //RX_TDDRC_THRD_1
270 0x0008 //RX_TDDRC_THRD_1
271 0x1800 //RX_TDDRC_THRD_2
272 0x1800 //RX_TDDRC_THRD_3
273 0x3000 //RX_TDDRC_SLANT_0
@ -5108,8 +5108,8 @@
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x5A9D //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0000 //RX_TDDRC_THRD_0
270 0x0001 //RX_TDDRC_THRD_1
269 0x0008 //RX_TDDRC_THRD_0
270 0x0800 //RX_TDDRC_THRD_1
271 0x1800 //RX_TDDRC_THRD_2
272 0x1800 //RX_TDDRC_THRD_3
273 0x3000 //RX_TDDRC_SLANT_0
@ -5207,8 +5207,8 @@
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x5A9D //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0000 //RX_TDDRC_THRD_0
270 0x0001 //RX_TDDRC_THRD_1
269 0x0008 //RX_TDDRC_THRD_0
270 0x0800 //RX_TDDRC_THRD_1
271 0x1800 //RX_TDDRC_THRD_2
272 0x1800 //RX_TDDRC_THRD_3
273 0x3000 //RX_TDDRC_SLANT_0
@ -5306,8 +5306,8 @@
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x5A9D //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0000 //RX_TDDRC_THRD_0
270 0x0001 //RX_TDDRC_THRD_1
269 0x0008 //RX_TDDRC_THRD_0
270 0x0800 //RX_TDDRC_THRD_1
271 0x1800 //RX_TDDRC_THRD_2
272 0x1800 //RX_TDDRC_THRD_3
273 0x3000 //RX_TDDRC_SLANT_0
@ -14473,7 +14473,7 @@
986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
#RX
0 0x243C //RX_RECVFUNC_MODE_0
0 0x247C //RX_RECVFUNC_MODE_0
1 0x0002 //RX_RECVFUNC_MODE_1
2 0x0001 //RX_SAMPLINGFREQ_SIG
3 0x0001 //RX_SAMPLINGFREQ_PROC
@ -14635,20 +14635,20 @@
7 0x1000 //RX_TDDRC_ALPHA_UP_2
8 0x1000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
27 0x7000 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
33 0x5A9D //RX_TDDRC_LIMITER_THRD
34 0x0800 //RX_TDDRC_LIMITER_GAIN
112 0x0000 //RX_TDDRC_THRD_0
113 0x0001 //RX_TDDRC_THRD_1
113 0x0008 //RX_TDDRC_THRD_1
114 0x1800 //RX_TDDRC_THRD_2
115 0x1800 //RX_TDDRC_THRD_3
116 0x3000 //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
118 0x1000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
119 0x7000 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
@ -14734,20 +14734,20 @@
7 0x1000 //RX_TDDRC_ALPHA_UP_2
8 0x1000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
27 0x7000 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
33 0x5A9D //RX_TDDRC_LIMITER_THRD
34 0x0800 //RX_TDDRC_LIMITER_GAIN
112 0x0000 //RX_TDDRC_THRD_0
113 0x0001 //RX_TDDRC_THRD_1
113 0x0008 //RX_TDDRC_THRD_1
114 0x1800 //RX_TDDRC_THRD_2
115 0x1800 //RX_TDDRC_THRD_3
116 0x3000 //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
118 0x1000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
119 0x7000 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
@ -14833,20 +14833,20 @@
7 0x1000 //RX_TDDRC_ALPHA_UP_2
8 0x1000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
27 0x7000 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
33 0x5A9D //RX_TDDRC_LIMITER_THRD
34 0x0800 //RX_TDDRC_LIMITER_GAIN
112 0x0000 //RX_TDDRC_THRD_0
113 0x0001 //RX_TDDRC_THRD_1
113 0x0008 //RX_TDDRC_THRD_1
114 0x1800 //RX_TDDRC_THRD_2
115 0x1800 //RX_TDDRC_THRD_3
116 0x3000 //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
118 0x1000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
119 0x7000 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
@ -14932,20 +14932,20 @@
7 0x1000 //RX_TDDRC_ALPHA_UP_2
8 0x1000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
27 0x7000 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
33 0x5A9D //RX_TDDRC_LIMITER_THRD
34 0x0800 //RX_TDDRC_LIMITER_GAIN
112 0x0000 //RX_TDDRC_THRD_0
113 0x0001 //RX_TDDRC_THRD_1
113 0x0008 //RX_TDDRC_THRD_1
114 0x1800 //RX_TDDRC_THRD_2
115 0x1800 //RX_TDDRC_THRD_3
116 0x3000 //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
118 0x1000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
119 0x7000 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
@ -15031,20 +15031,20 @@
7 0x1000 //RX_TDDRC_ALPHA_UP_2
8 0x1000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
27 0x1000 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
33 0x5A9D //RX_TDDRC_LIMITER_THRD
34 0x0800 //RX_TDDRC_LIMITER_GAIN
112 0x0000 //RX_TDDRC_THRD_0
113 0x0001 //RX_TDDRC_THRD_1
112 0x0008 //RX_TDDRC_THRD_0
113 0x0800 //RX_TDDRC_THRD_1
114 0x1800 //RX_TDDRC_THRD_2
115 0x1800 //RX_TDDRC_THRD_3
116 0x3000 //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
118 0x1000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
119 0x7000 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
@ -15130,20 +15130,20 @@
7 0x1000 //RX_TDDRC_ALPHA_UP_2
8 0x1000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
27 0x1000 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
33 0x5A9D //RX_TDDRC_LIMITER_THRD
34 0x0800 //RX_TDDRC_LIMITER_GAIN
112 0x0000 //RX_TDDRC_THRD_0
113 0x0001 //RX_TDDRC_THRD_1
112 0x0008 //RX_TDDRC_THRD_0
113 0x0800 //RX_TDDRC_THRD_1
114 0x1800 //RX_TDDRC_THRD_2
115 0x1800 //RX_TDDRC_THRD_3
116 0x3000 //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
118 0x1000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
119 0x7000 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
@ -15229,20 +15229,20 @@
7 0x1000 //RX_TDDRC_ALPHA_UP_2
8 0x1000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
27 0x1000 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
33 0x5A9D //RX_TDDRC_LIMITER_THRD
34 0x0800 //RX_TDDRC_LIMITER_GAIN
112 0x0000 //RX_TDDRC_THRD_0
113 0x0001 //RX_TDDRC_THRD_1
112 0x0008 //RX_TDDRC_THRD_0
113 0x0800 //RX_TDDRC_THRD_1
114 0x1800 //RX_TDDRC_THRD_2
115 0x1800 //RX_TDDRC_THRD_3
116 0x3000 //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
118 0x1000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
119 0x7000 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
@ -15324,7 +15324,7 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#RX 2
157 0x243C //RX_RECVFUNC_MODE_0
157 0x247C //RX_RECVFUNC_MODE_0
158 0x0002 //RX_RECVFUNC_MODE_1
159 0x0001 //RX_SAMPLINGFREQ_SIG
160 0x0001 //RX_SAMPLINGFREQ_PROC
@ -15493,7 +15493,7 @@
190 0x5A9D //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0000 //RX_TDDRC_THRD_0
270 0x0001 //RX_TDDRC_THRD_1
270 0x0008 //RX_TDDRC_THRD_1
271 0x1800 //RX_TDDRC_THRD_2
272 0x1800 //RX_TDDRC_THRD_3
273 0x3000 //RX_TDDRC_SLANT_0
@ -15592,7 +15592,7 @@
190 0x5A9D //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0000 //RX_TDDRC_THRD_0
270 0x0001 //RX_TDDRC_THRD_1
270 0x0008 //RX_TDDRC_THRD_1
271 0x1800 //RX_TDDRC_THRD_2
272 0x1800 //RX_TDDRC_THRD_3
273 0x3000 //RX_TDDRC_SLANT_0
@ -15691,7 +15691,7 @@
190 0x5A9D //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0000 //RX_TDDRC_THRD_0
270 0x0001 //RX_TDDRC_THRD_1
270 0x0008 //RX_TDDRC_THRD_1
271 0x1800 //RX_TDDRC_THRD_2
272 0x1800 //RX_TDDRC_THRD_3
273 0x3000 //RX_TDDRC_SLANT_0
@ -15790,7 +15790,7 @@
190 0x5A9D //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0000 //RX_TDDRC_THRD_0
270 0x0001 //RX_TDDRC_THRD_1
270 0x0008 //RX_TDDRC_THRD_1
271 0x1800 //RX_TDDRC_THRD_2
272 0x1800 //RX_TDDRC_THRD_3
273 0x3000 //RX_TDDRC_SLANT_0
@ -15888,8 +15888,8 @@
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x5A9D //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0000 //RX_TDDRC_THRD_0
270 0x0001 //RX_TDDRC_THRD_1
269 0x0008 //RX_TDDRC_THRD_0
270 0x0800 //RX_TDDRC_THRD_1
271 0x1800 //RX_TDDRC_THRD_2
272 0x1800 //RX_TDDRC_THRD_3
273 0x3000 //RX_TDDRC_SLANT_0
@ -15987,8 +15987,8 @@
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x5A9D //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0000 //RX_TDDRC_THRD_0
270 0x0001 //RX_TDDRC_THRD_1
269 0x0008 //RX_TDDRC_THRD_0
270 0x0800 //RX_TDDRC_THRD_1
271 0x1800 //RX_TDDRC_THRD_2
272 0x1800 //RX_TDDRC_THRD_3
273 0x3000 //RX_TDDRC_SLANT_0
@ -16086,8 +16086,8 @@
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x5A9D //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0000 //RX_TDDRC_THRD_0
270 0x0001 //RX_TDDRC_THRD_1
269 0x0008 //RX_TDDRC_THRD_0
270 0x0800 //RX_TDDRC_THRD_1
271 0x1800 //RX_TDDRC_THRD_2
272 0x1800 //RX_TDDRC_THRD_3
273 0x3000 //RX_TDDRC_SLANT_0

View file

@ -3,7 +3,7 @@
#EXPORT_FLAG HANDSFREE
#PARAM_MODE FULL
#SAVE_MODE 3
#SAVE_TIME 2024-02-02 11:42:45
#SAVE_TIME 2024-02-29 16:12:53
#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-NB
#PARAM_TYPE TX+2RX

View file

@ -3,7 +3,7 @@
#EXPORT_FLAG HEADSET
#PARAM_MODE FULL
#SAVE_MODE 3
#SAVE_TIME 2024-02-23 16:34:33
#SAVE_TIME 2024-02-29 15:49:04
#CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-NB
#PARAM_TYPE TX+2RX
@ -3557,7 +3557,7 @@
850 0x0000 //TX_FFP_RESRV_4
851 0x0000 //TX_FFP_RESRV_5
852 0x0000 //TX_FFP_RESRV_6
853 0x0001 //TX_FILTINDX
853 0x0002 //TX_FILTINDX
854 0x0000 //TX_TDDRC_THRD_0
855 0x0000 //TX_TDDRC_THRD_1
856 0x2000 //TX_TDDRC_THRD_2
@ -3693,7 +3693,7 @@
986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
#RX
0 0xA43C //RX_RECVFUNC_MODE_0
0 0xA47C //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0001 //RX_SAMPLINGFREQ_SIG
3 0x0001 //RX_SAMPLINGFREQ_PROC
@ -3715,7 +3715,7 @@
19 0x0020 //RX_PP_RESRV_1
20 0x0600 //RX_N_SN_EST
21 0x000C //RX_N2_SN_EST
22 0x0006 //RX_NS_LVL_CTRL
22 0x000F //RX_NS_LVL_CTRL
23 0xF800 //RX_THR_SN_EST
24 0x7CCD //RX_LAMBDA_PFILT
25 0x000A //RX_MUTE_PERIOD
@ -4251,14 +4251,14 @@
7 0x1000 //RX_TDDRC_ALPHA_UP_2
8 0x1000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
27 0x1000 //RX_TDDRC_ALPHA_DWN_1
28 0x32B0 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
33 0x7220 //RX_TDDRC_LIMITER_THRD
34 0x0800 //RX_TDDRC_LIMITER_GAIN
112 0x0000 //RX_TDDRC_THRD_0
113 0x0000 //RX_TDDRC_THRD_1
112 0x0008 //RX_TDDRC_THRD_0
113 0x0800 //RX_TDDRC_THRD_1
114 0x1800 //RX_TDDRC_THRD_2
115 0x1800 //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
@ -4350,14 +4350,14 @@
7 0x1000 //RX_TDDRC_ALPHA_UP_2
8 0x1000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
27 0x1000 //RX_TDDRC_ALPHA_DWN_1
28 0x32B0 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
33 0x7220 //RX_TDDRC_LIMITER_THRD
34 0x0800 //RX_TDDRC_LIMITER_GAIN
112 0x0000 //RX_TDDRC_THRD_0
113 0x0000 //RX_TDDRC_THRD_1
112 0x0008 //RX_TDDRC_THRD_0
113 0x0800 //RX_TDDRC_THRD_1
114 0x1800 //RX_TDDRC_THRD_2
115 0x1800 //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
@ -4449,14 +4449,14 @@
7 0x1000 //RX_TDDRC_ALPHA_UP_2
8 0x1000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
27 0x1000 //RX_TDDRC_ALPHA_DWN_1
28 0x32B0 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
33 0x7220 //RX_TDDRC_LIMITER_THRD
34 0x0800 //RX_TDDRC_LIMITER_GAIN
112 0x0000 //RX_TDDRC_THRD_0
113 0x0000 //RX_TDDRC_THRD_1
112 0x0008 //RX_TDDRC_THRD_0
113 0x0800 //RX_TDDRC_THRD_1
114 0x1800 //RX_TDDRC_THRD_2
115 0x1800 //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
@ -5102,14 +5102,14 @@
164 0x1000 //RX_TDDRC_ALPHA_UP_2
165 0x1000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
184 0x1000 //RX_TDDRC_ALPHA_DWN_1
185 0x32B0 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x7220 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0000 //RX_TDDRC_THRD_0
270 0x0000 //RX_TDDRC_THRD_1
269 0x0008 //RX_TDDRC_THRD_0
270 0x0800 //RX_TDDRC_THRD_1
271 0x1800 //RX_TDDRC_THRD_2
272 0x1800 //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
@ -5201,14 +5201,14 @@
164 0x1000 //RX_TDDRC_ALPHA_UP_2
165 0x1000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
184 0x1000 //RX_TDDRC_ALPHA_DWN_1
185 0x32B0 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x7220 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0000 //RX_TDDRC_THRD_0
270 0x0000 //RX_TDDRC_THRD_1
269 0x0008 //RX_TDDRC_THRD_0
270 0x0800 //RX_TDDRC_THRD_1
271 0x1800 //RX_TDDRC_THRD_2
272 0x1800 //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
@ -5300,14 +5300,14 @@
164 0x1000 //RX_TDDRC_ALPHA_UP_2
165 0x1000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
184 0x1000 //RX_TDDRC_ALPHA_DWN_1
185 0x32B0 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x7220 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0000 //RX_TDDRC_THRD_0
270 0x0000 //RX_TDDRC_THRD_1
269 0x0008 //RX_TDDRC_THRD_0
270 0x0800 //RX_TDDRC_THRD_1
271 0x1800 //RX_TDDRC_THRD_2
272 0x1800 //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
@ -17190,7 +17190,7 @@
19 0x0020 //RX_PP_RESRV_1
20 0x0600 //RX_N_SN_EST
21 0x000C //RX_N2_SN_EST
22 0x0006 //RX_NS_LVL_CTRL
22 0x000F //RX_NS_LVL_CTRL
23 0xF800 //RX_THR_SN_EST
24 0x7CCD //RX_LAMBDA_PFILT
25 0x000A //RX_MUTE_PERIOD
@ -30665,7 +30665,7 @@
19 0x0020 //RX_PP_RESRV_1
20 0x0600 //RX_N_SN_EST
21 0x000C //RX_N2_SN_EST
22 0x0006 //RX_NS_LVL_CTRL
22 0x000F //RX_NS_LVL_CTRL
23 0xF800 //RX_THR_SN_EST
24 0x7CCD //RX_LAMBDA_PFILT
25 0x000A //RX_MUTE_PERIOD
@ -98040,7 +98040,7 @@
19 0x0020 //RX_PP_RESRV_1
20 0x0600 //RX_N_SN_EST
21 0x000C //RX_N2_SN_EST
22 0x0006 //RX_NS_LVL_CTRL
22 0x000F //RX_NS_LVL_CTRL
23 0xF800 //RX_THR_SN_EST
24 0x7CCD //RX_LAMBDA_PFILT
25 0x000A //RX_MUTE_PERIOD