thermal: Update cdev ceiling to match latest EM table

Bug: 318313844
Test: Tested on EVT1.0(A0) TK4 and Tskin controlled to 45C with MH offscreen, all 3 devices booted home

Change-Id: I3e10a1cd9c4493c9bb5f6a08a64e68b04713c41a
Signed-off-by: Ramya Subramanian <rsubr@google.com>
This commit is contained in:
Ramya Subramanian 2024-01-05 00:32:09 +00:00
parent 2f87ee127e
commit 520b88f848
3 changed files with 51 additions and 51 deletions

View file

@ -319,7 +319,7 @@
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 1, "MaxThrottleStep": 1,
"BindedPowerRail": "S4M_VDD_CPUCL0", "BindedPowerRail": "S4M_VDD_CPUCL0",
"CdevCeiling": [0, 2, 2, 2, 2, 2, 2] "CdevCeiling": [0, 4, 4, 4, 4, 4, 4]
}, },
{ {
"CdevRequest": "thermal-cpufreq-1", "CdevRequest": "thermal-cpufreq-1",
@ -327,7 +327,7 @@
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"BindedPowerRail": "S2M_VDD_CPUCL1", "BindedPowerRail": "S2M_VDD_CPUCL1",
"CdevCeiling": [0, 6, 6, 6, 6, 6, 6] "CdevCeiling": [0, 8, 8, 8, 8, 8, 8]
}, },
{ {
"CdevRequest": "thermal-cpufreq-2", "CdevRequest": "thermal-cpufreq-2",
@ -335,7 +335,7 @@
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"BindedPowerRail": "S3M_VDD_CPUCL2", "BindedPowerRail": "S3M_VDD_CPUCL2",
"CdevCeiling": [0, 8, 8, 8, 8, 8, 8] "CdevCeiling": [0, 12, 12, 12, 12, 12, 12]
} }
] ]
}, },
@ -370,21 +370,21 @@
"CdevWeightForPID": [0.292, 0.292, 0.292, 0.292, 0.292, 0.292, 0.292], "CdevWeightForPID": [0.292, 0.292, 0.292, 0.292, 0.292, 0.292, 0.292],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 1, "MaxThrottleStep": 1,
"CdevCeiling": [0, 6, 6, 6, 6, 6, 6] "CdevCeiling": [0, 8, 8, 8, 8, 8, 8]
}, },
{ {
"CdevRequest": "thermal-cpufreq-1", "CdevRequest": "thermal-cpufreq-1",
"CdevWeightForPID": [0.804, 0.804, 0.804, 0.804, 0.804, 0.804, 0.804], "CdevWeightForPID": [0.804, 0.804, 0.804, 0.804, 0.804, 0.804, 0.804],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"CdevCeiling": [0, 9, 9, 9, 9, 9, 9] "CdevCeiling": [0, 11, 11, 11, 11, 11, 11]
}, },
{ {
"CdevRequest": "thermal-cpufreq-2", "CdevRequest": "thermal-cpufreq-2",
"CdevWeightForPID": [0.342, 0.342, 0.342, 0.342, 0.342, 0.342, 0.342], "CdevWeightForPID": [0.342, 0.342, 0.342, 0.342, 0.342, 0.342, 0.342],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"CdevCeiling": [0, 12, 12, 12, 12, 12, 12] "CdevCeiling": [0, 16, 16, 16, 16, 16, 16]
} }
], ],
"Profile": [ "Profile": [
@ -461,21 +461,21 @@
"CdevWeightForPID": [0.156, 0.156, 0.156, 0.156, 0.156, 0.156, 0.156], "CdevWeightForPID": [0.156, 0.156, 0.156, 0.156, 0.156, 0.156, 0.156],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 1, "MaxThrottleStep": 1,
"CdevCeiling": [0, 8, 8, 8, 8, 8, 8] "CdevCeiling": [0, 10, 10, 10, 10, 10, 10]
}, },
{ {
"CdevRequest": "thermal-cpufreq-1", "CdevRequest": "thermal-cpufreq-1",
"CdevWeightForPID": [0.428, 0.428, 0.428, 0.428, 0.428, 0.428, 0.428], "CdevWeightForPID": [0.428, 0.428, 0.428, 0.428, 0.428, 0.428, 0.428],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"CdevCeiling": [0, 11, 11, 11, 11, 11, 11] "CdevCeiling": [0, 14, 14, 14, 14, 14, 14]
}, },
{ {
"CdevRequest": "thermal-cpufreq-2", "CdevRequest": "thermal-cpufreq-2",
"CdevWeightForPID": [0.225, 0.225, 0.225, 0.225, 0.225, 0.225, 0.225], "CdevWeightForPID": [0.225, 0.225, 0.225, 0.225, 0.225, 0.225, 0.225],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"CdevCeiling": [0, 13, 13, 13, 13, 13, 13] "CdevCeiling": [0, 17, 17, 17, 17, 17, 17]
} }
], ],
"Profile": [ "Profile": [
@ -507,14 +507,14 @@
"CdevWeightForPID": [0.156, 0.156, 0.156, 0.156, 0.156, 0.156, 0.156], "CdevWeightForPID": [0.156, 0.156, 0.156, 0.156, 0.156, 0.156, 0.156],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 1, "MaxThrottleStep": 1,
"CdevCeiling": [0, 6, 6, 6, 6, 6, 6] "CdevCeiling": [0, 4, 4, 4, 4, 4, 4]
}, },
{ {
"CdevRequest": "thermal-cpufreq-1", "CdevRequest": "thermal-cpufreq-1",
"CdevWeightForPID": [0.428, 0.428, 0.428, 0.428, 0.428, 0.428, 0.428], "CdevWeightForPID": [0.428, 0.428, 0.428, 0.428, 0.428, 0.428, 0.428],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"CdevCeiling": [0, 9, 9, 9, 9, 9, 9] "CdevCeiling": [0, 8, 8, 8, 8, 8, 8]
}, },
{ {
"CdevRequest": "thermal-cpufreq-2", "CdevRequest": "thermal-cpufreq-2",
@ -559,8 +559,8 @@
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 1, "MaxThrottleStep": 1,
"BindedPowerRail": "S4M_VDD_CPUCL0", "BindedPowerRail": "S4M_VDD_CPUCL0",
"CdevCeiling": [0, 8, 8, 8, 8, 9, 9], "CdevCeiling": [0, 10, 10, 10, 10, 11, 11],
"LimitInfo": [0, 0, 0, 0, 0, 9, 9] "LimitInfo": [0, 0, 0, 0, 0, 11, 11]
}, },
{ {
"CdevRequest": "thermal-cpufreq-1", "CdevRequest": "thermal-cpufreq-1",
@ -568,8 +568,8 @@
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"BindedPowerRail": "S2M_VDD_CPUCL1", "BindedPowerRail": "S2M_VDD_CPUCL1",
"CdevCeiling": [0, 11, 11, 11, 11, 14, 14], "CdevCeiling": [0, 14, 14, 14, 14, 16, 16],
"LimitInfo": [0, 0, 0, 0, 0, 14, 14] "LimitInfo": [0, 0, 0, 0, 0, 16, 16]
}, },
{ {
"CdevRequest": "thermal-cpufreq-2", "CdevRequest": "thermal-cpufreq-2",
@ -577,8 +577,8 @@
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"BindedPowerRail": "S3M_VDD_CPUCL2", "BindedPowerRail": "S3M_VDD_CPUCL2",
"CdevCeiling": [0, 13, 13, 13, 13, 14, 14], "CdevCeiling": [0, 17, 17, 17, 17, 17, 17],
"LimitInfo": [0, 0, 0, 0, 0, 14, 14] "LimitInfo": [0, 0, 0, 0, 0, 17, 17]
}, },
{ {
"CdevRequest": "thermal-gpufreq-0", "CdevRequest": "thermal-gpufreq-0",

View file

@ -352,7 +352,7 @@
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 1, "MaxThrottleStep": 1,
"BindedPowerRail": "S4M_VDD_CPUCL0", "BindedPowerRail": "S4M_VDD_CPUCL0",
"CdevCeiling": [0, 2, 2, 2, 2, 2, 2] "CdevCeiling": [0, 4, 4, 4, 4, 4, 4]
}, },
{ {
"CdevRequest": "thermal-cpufreq-1", "CdevRequest": "thermal-cpufreq-1",
@ -360,7 +360,7 @@
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"BindedPowerRail": "S2M_VDD_CPUCL1", "BindedPowerRail": "S2M_VDD_CPUCL1",
"CdevCeiling": [0, 6, 6, 6, 6, 6, 6] "CdevCeiling": [0, 8, 8, 8, 8, 8, 8]
}, },
{ {
"CdevRequest": "thermal-cpufreq-2", "CdevRequest": "thermal-cpufreq-2",
@ -368,7 +368,7 @@
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"BindedPowerRail": "S3M_VDD_CPUCL2", "BindedPowerRail": "S3M_VDD_CPUCL2",
"CdevCeiling": [0, 8, 8, 8, 8, 8, 8] "CdevCeiling": [0, 12, 12, 12, 12, 12, 12]
} }
] ]
}, },
@ -403,21 +403,21 @@
"CdevWeightForPID": [0.292, 0.292, 0.292, 0.292, 0.292, 0.292, 0.292], "CdevWeightForPID": [0.292, 0.292, 0.292, 0.292, 0.292, 0.292, 0.292],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 1, "MaxThrottleStep": 1,
"CdevCeiling": [0, 6, 6, 6, 6, 6, 6] "CdevCeiling": [0, 8, 8, 8, 8, 8, 8]
}, },
{ {
"CdevRequest": "thermal-cpufreq-1", "CdevRequest": "thermal-cpufreq-1",
"CdevWeightForPID": [0.804, 0.804, 0.804, 0.804, 0.804, 0.804, 0.804], "CdevWeightForPID": [0.804, 0.804, 0.804, 0.804, 0.804, 0.804, 0.804],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"CdevCeiling": [0, 9, 9, 9, 9, 9, 9] "CdevCeiling": [0, 11, 11, 11, 11, 11, 11]
}, },
{ {
"CdevRequest": "thermal-cpufreq-2", "CdevRequest": "thermal-cpufreq-2",
"CdevWeightForPID": [0.342, 0.342, 0.342, 0.342, 0.342, 0.342, 0.342], "CdevWeightForPID": [0.342, 0.342, 0.342, 0.342, 0.342, 0.342, 0.342],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"CdevCeiling": [0, 12, 12, 12, 12, 12, 12] "CdevCeiling": [0, 16, 16, 16, 16, 16, 16]
} }
], ],
"Profile": [ "Profile": [
@ -494,21 +494,21 @@
"CdevWeightForPID": [0.156, 0.156, 0.156, 0.156, 0.156, 0.156, 0.156], "CdevWeightForPID": [0.156, 0.156, 0.156, 0.156, 0.156, 0.156, 0.156],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 1, "MaxThrottleStep": 1,
"CdevCeiling": [0, 8, 8, 8, 8, 8, 8] "CdevCeiling": [0, 10, 10, 10, 10, 10, 10]
}, },
{ {
"CdevRequest": "thermal-cpufreq-1", "CdevRequest": "thermal-cpufreq-1",
"CdevWeightForPID": [0.428, 0.428, 0.428, 0.428, 0.428, 0.428, 0.428], "CdevWeightForPID": [0.428, 0.428, 0.428, 0.428, 0.428, 0.428, 0.428],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"CdevCeiling": [0, 11, 11, 11, 11, 11, 11] "CdevCeiling": [0, 14, 14, 14, 14, 14, 14]
}, },
{ {
"CdevRequest": "thermal-cpufreq-2", "CdevRequest": "thermal-cpufreq-2",
"CdevWeightForPID": [0.225, 0.225, 0.225, 0.225, 0.225, 0.225, 0.225], "CdevWeightForPID": [0.225, 0.225, 0.225, 0.225, 0.225, 0.225, 0.225],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"CdevCeiling": [0, 13, 13, 13, 13, 13, 13] "CdevCeiling": [0, 17, 17, 17, 17, 17, 17]
} }
], ],
"Profile": [ "Profile": [
@ -540,14 +540,14 @@
"CdevWeightForPID": [0.156, 0.156, 0.156, 0.156, 0.156, 0.156, 0.156], "CdevWeightForPID": [0.156, 0.156, 0.156, 0.156, 0.156, 0.156, 0.156],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 1, "MaxThrottleStep": 1,
"CdevCeiling": [0, 6, 6, 6, 6, 6, 6] "CdevCeiling": [0, 4, 4, 4, 4, 4, 4]
}, },
{ {
"CdevRequest": "thermal-cpufreq-1", "CdevRequest": "thermal-cpufreq-1",
"CdevWeightForPID": [0.428, 0.428, 0.428, 0.428, 0.428, 0.428, 0.428], "CdevWeightForPID": [0.428, 0.428, 0.428, 0.428, 0.428, 0.428, 0.428],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"CdevCeiling": [0, 9, 9, 9, 9, 9, 9] "CdevCeiling": [0, 8, 8, 8, 8, 8, 8]
}, },
{ {
"CdevRequest": "thermal-cpufreq-2", "CdevRequest": "thermal-cpufreq-2",
@ -592,8 +592,8 @@
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 1, "MaxThrottleStep": 1,
"BindedPowerRail": "S4M_VDD_CPUCL0", "BindedPowerRail": "S4M_VDD_CPUCL0",
"CdevCeiling": [0, 8, 8, 8, 8, 9, 9], "CdevCeiling": [0, 10, 10, 10, 10, 11, 11],
"LimitInfo": [0, 0, 0, 0, 0, 9, 9] "LimitInfo": [0, 0, 0, 0, 0, 11, 11]
}, },
{ {
"CdevRequest": "thermal-cpufreq-1", "CdevRequest": "thermal-cpufreq-1",
@ -601,8 +601,8 @@
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"BindedPowerRail": "S2M_VDD_CPUCL1", "BindedPowerRail": "S2M_VDD_CPUCL1",
"CdevCeiling": [0, 11, 11, 11, 11, 14, 14], "CdevCeiling": [0, 14, 14, 14, 14, 16, 16],
"LimitInfo": [0, 0, 0, 0, 0, 14, 14] "LimitInfo": [0, 0, 0, 0, 0, 16, 16]
}, },
{ {
"CdevRequest": "thermal-cpufreq-2", "CdevRequest": "thermal-cpufreq-2",
@ -610,8 +610,8 @@
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"BindedPowerRail": "S3M_VDD_CPUCL2", "BindedPowerRail": "S3M_VDD_CPUCL2",
"CdevCeiling": [0, 13, 13, 13, 13, 14, 14], "CdevCeiling": [0, 17, 17, 17, 17, 17, 17],
"LimitInfo": [0, 0, 0, 0, 0, 14, 14] "LimitInfo": [0, 0, 0, 0, 0, 17, 17]
}, },
{ {
"CdevRequest": "thermal-gpufreq-0", "CdevRequest": "thermal-gpufreq-0",

View file

@ -297,7 +297,7 @@
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 1, "MaxThrottleStep": 1,
"BindedPowerRail": "S4M_VDD_CPUCL0", "BindedPowerRail": "S4M_VDD_CPUCL0",
"CdevCeiling": [0, 2, 2, 2, 2, 2, 2] "CdevCeiling": [0, 4, 4, 4, 4, 4, 4]
}, },
{ {
"CdevRequest": "thermal-cpufreq-1", "CdevRequest": "thermal-cpufreq-1",
@ -305,7 +305,7 @@
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"BindedPowerRail": "S2M_VDD_CPUCL1", "BindedPowerRail": "S2M_VDD_CPUCL1",
"CdevCeiling": [0, 6, 6, 6, 6, 6, 6] "CdevCeiling": [0, 8, 8, 8, 8, 8, 8]
}, },
{ {
"CdevRequest": "thermal-cpufreq-2", "CdevRequest": "thermal-cpufreq-2",
@ -313,7 +313,7 @@
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"BindedPowerRail": "S3M_VDD_CPUCL2", "BindedPowerRail": "S3M_VDD_CPUCL2",
"CdevCeiling": [0, 8, 8, 8, 8, 8, 8] "CdevCeiling": [0, 12, 12, 12, 12, 12, 12]
} }
] ]
}, },
@ -348,21 +348,21 @@
"CdevWeightForPID": [0.292, 0.292, 0.292, 0.292, 0.292, 0.292, 0.292], "CdevWeightForPID": [0.292, 0.292, 0.292, 0.292, 0.292, 0.292, 0.292],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 1, "MaxThrottleStep": 1,
"CdevCeiling": [0, 6, 6, 6, 6, 6, 6] "CdevCeiling": [0, 8, 8, 8, 8, 8, 8]
}, },
{ {
"CdevRequest": "thermal-cpufreq-1", "CdevRequest": "thermal-cpufreq-1",
"CdevWeightForPID": [0.804, 0.804, 0.804, 0.804, 0.804, 0.804, 0.804], "CdevWeightForPID": [0.804, 0.804, 0.804, 0.804, 0.804, 0.804, 0.804],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"CdevCeiling": [0, 9, 9, 9, 9, 9, 9] "CdevCeiling": [0, 11, 11, 11, 11, 11, 11]
}, },
{ {
"CdevRequest": "thermal-cpufreq-2", "CdevRequest": "thermal-cpufreq-2",
"CdevWeightForPID": [0.342, 0.342, 0.342, 0.342, 0.342, 0.342, 0.342], "CdevWeightForPID": [0.342, 0.342, 0.342, 0.342, 0.342, 0.342, 0.342],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"CdevCeiling": [0, 12, 12, 12, 12, 12, 12] "CdevCeiling": [0, 16, 16, 16, 16, 16, 16]
} }
], ],
"Profile": [ "Profile": [
@ -439,21 +439,21 @@
"CdevWeightForPID": [0.156, 0.156, 0.156, 0.156, 0.156, 0.156, 0.156], "CdevWeightForPID": [0.156, 0.156, 0.156, 0.156, 0.156, 0.156, 0.156],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 1, "MaxThrottleStep": 1,
"CdevCeiling": [0, 8, 8, 8, 8, 8, 8] "CdevCeiling": [0, 10, 10, 10, 10, 10, 10]
}, },
{ {
"CdevRequest": "thermal-cpufreq-1", "CdevRequest": "thermal-cpufreq-1",
"CdevWeightForPID": [0.428, 0.428, 0.428, 0.428, 0.428, 0.428, 0.428], "CdevWeightForPID": [0.428, 0.428, 0.428, 0.428, 0.428, 0.428, 0.428],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"CdevCeiling": [0, 11, 11, 11, 11, 11, 11] "CdevCeiling": [0, 14, 14, 14, 14, 14, 14]
}, },
{ {
"CdevRequest": "thermal-cpufreq-2", "CdevRequest": "thermal-cpufreq-2",
"CdevWeightForPID": [0.225, 0.225, 0.225, 0.225, 0.225, 0.225, 0.225], "CdevWeightForPID": [0.225, 0.225, 0.225, 0.225, 0.225, 0.225, 0.225],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"CdevCeiling": [0, 13, 13, 13, 13, 13, 13] "CdevCeiling": [0, 17, 17, 17, 17, 17, 17]
} }
], ],
"Profile": [ "Profile": [
@ -485,14 +485,14 @@
"CdevWeightForPID": [0.156, 0.156, 0.156, 0.156, 0.156, 0.156, 0.156], "CdevWeightForPID": [0.156, 0.156, 0.156, 0.156, 0.156, 0.156, 0.156],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 1, "MaxThrottleStep": 1,
"CdevCeiling": [0, 6, 6, 6, 6, 6, 6] "CdevCeiling": [0, 4, 4, 4, 4, 4, 4]
}, },
{ {
"CdevRequest": "thermal-cpufreq-1", "CdevRequest": "thermal-cpufreq-1",
"CdevWeightForPID": [0.428, 0.428, 0.428, 0.428, 0.428, 0.428, 0.428], "CdevWeightForPID": [0.428, 0.428, 0.428, 0.428, 0.428, 0.428, 0.428],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"CdevCeiling": [0, 9, 9, 9, 9, 9, 9] "CdevCeiling": [0, 8, 8, 8, 8, 8, 8]
}, },
{ {
"CdevRequest": "thermal-cpufreq-2", "CdevRequest": "thermal-cpufreq-2",
@ -537,8 +537,8 @@
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 1, "MaxThrottleStep": 1,
"BindedPowerRail": "S4M_VDD_CPUCL0", "BindedPowerRail": "S4M_VDD_CPUCL0",
"CdevCeiling": [0, 8, 8, 8, 8, 9, 9], "CdevCeiling": [0, 10, 10, 10, 10, 11, 11],
"LimitInfo": [0, 0, 0, 0, 0, 9, 9] "LimitInfo": [0, 0, 0, 0, 0, 11, 11]
}, },
{ {
"CdevRequest": "thermal-cpufreq-1", "CdevRequest": "thermal-cpufreq-1",
@ -546,8 +546,8 @@
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"BindedPowerRail": "S2M_VDD_CPUCL1", "BindedPowerRail": "S2M_VDD_CPUCL1",
"CdevCeiling": [0, 11, 11, 11, 11, 14, 14], "CdevCeiling": [0, 14, 14, 14, 14, 16, 16],
"LimitInfo": [0, 0, 0, 0, 0, 14, 14] "LimitInfo": [0, 0, 0, 0, 0, 16, 16]
}, },
{ {
"CdevRequest": "thermal-cpufreq-2", "CdevRequest": "thermal-cpufreq-2",
@ -555,8 +555,8 @@
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"BindedPowerRail": "S3M_VDD_CPUCL2", "BindedPowerRail": "S3M_VDD_CPUCL2",
"CdevCeiling": [0, 13, 13, 13, 13, 14, 14], "CdevCeiling": [0, 17, 17, 17, 17, 17, 17],
"LimitInfo": [0, 0, 0, 0, 0, 14, 14] "LimitInfo": [0, 0, 0, 0, 0, 17, 17]
}, },
{ {
"CdevRequest": "thermal-gpufreq-0", "CdevRequest": "thermal-gpufreq-0",