Merge "audio: 2024/04/02 Fortemedia tuning settings for DVT DF v2" into 24D1-dev
This commit is contained in:
commit
9afccfe3b6
24 changed files with 7333 additions and 7333 deletions
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@ -3,7 +3,7 @@
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#EXPORT_FLAG HANDSET
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#EXPORT_FLAG HANDSET
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#PARAM_MODE FULL
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#PARAM_MODE FULL
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#SAVE_MODE 3
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#SAVE_MODE 3
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#SAVE_TIME 2024-03-22 15:17:32
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#SAVE_TIME 2024-04-02 17:20:27
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#CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-NB
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#CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-NB
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#PARAM_TYPE TX+2RX
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#PARAM_TYPE TX+2RX
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@ -3570,7 +3570,7 @@
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||||||
863 0x199A //TX_TDDRC_HMNC_GAIN
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863 0x199A //TX_TDDRC_HMNC_GAIN
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||||||
864 0x0000 //TX_TDDRC_SMT_FLAG
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864 0x0000 //TX_TDDRC_SMT_FLAG
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||||||
865 0x0CCD //TX_TDDRC_SMT_W
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865 0x0CCD //TX_TDDRC_SMT_W
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||||||
866 0x0BE3 //TX_TDDRC_DRC_GAIN
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866 0x0B38 //TX_TDDRC_DRC_GAIN
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||||||
867 0x7FFF //TX_TDDRC_LMT_THRD
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867 0x7FFF //TX_TDDRC_LMT_THRD
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||||||
868 0x0000 //TX_TDDRC_LMT_ALPHA
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868 0x0000 //TX_TDDRC_LMT_ALPHA
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||||||
869 0x0000 //TX_TFMASKLTH
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869 0x0000 //TX_TFMASKLTH
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@ -3713,10 +3713,10 @@
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17 0x0003 //RX_SBD_PITCH_DET
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17 0x0003 //RX_SBD_PITCH_DET
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||||||
18 0x0100 //RX_PP_RESRV_0
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18 0x0100 //RX_PP_RESRV_0
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||||||
19 0x0020 //RX_PP_RESRV_1
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19 0x0020 //RX_PP_RESRV_1
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||||||
20 0x0400 //RX_N_SN_EST
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20 0x0600 //RX_N_SN_EST
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21 0x000C //RX_N2_SN_EST
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21 0x000C //RX_N2_SN_EST
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||||||
22 0x000F //RX_NS_LVL_CTRL
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22 0x0009 //RX_NS_LVL_CTRL
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||||||
23 0xF800 //RX_THR_SN_EST
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23 0x0100 //RX_THR_SN_EST
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||||||
24 0x7CCD //RX_LAMBDA_PFILT
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24 0x7CCD //RX_LAMBDA_PFILT
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||||||
25 0x000A //RX_MUTE_PERIOD
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25 0x000A //RX_MUTE_PERIOD
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||||||
26 0x0190 //RX_FADE_IN_PERIOD
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26 0x0190 //RX_FADE_IN_PERIOD
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@ -4564,10 +4564,10 @@
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174 0x0003 //RX_SBD_PITCH_DET
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174 0x0003 //RX_SBD_PITCH_DET
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175 0x0100 //RX_PP_RESRV_0
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175 0x0100 //RX_PP_RESRV_0
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||||||
176 0x0020 //RX_PP_RESRV_1
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176 0x0020 //RX_PP_RESRV_1
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||||||
177 0x0400 //RX_N_SN_EST
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177 0x0600 //RX_N_SN_EST
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||||||
178 0x000C //RX_N2_SN_EST
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178 0x000C //RX_N2_SN_EST
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179 0x000F //RX_NS_LVL_CTRL
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179 0x0009 //RX_NS_LVL_CTRL
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||||||
180 0xF800 //RX_THR_SN_EST
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180 0x0100 //RX_THR_SN_EST
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||||||
181 0x7CCD //RX_LAMBDA_PFILT
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181 0x7CCD //RX_LAMBDA_PFILT
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||||||
182 0x000A //RX_MUTE_PERIOD
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182 0x000A //RX_MUTE_PERIOD
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183 0x0190 //RX_FADE_IN_PERIOD
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183 0x0190 //RX_FADE_IN_PERIOD
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@ -5102,14 +5102,14 @@
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164 0x1000 //RX_TDDRC_ALPHA_UP_2
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164 0x1000 //RX_TDDRC_ALPHA_UP_2
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||||||
165 0x1000 //RX_TDDRC_ALPHA_UP_3
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165 0x1000 //RX_TDDRC_ALPHA_UP_3
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||||||
166 0x1000 //RX_TDDRC_ALPHA_UP_4
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166 0x1000 //RX_TDDRC_ALPHA_UP_4
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||||||
184 0x1000 //RX_TDDRC_ALPHA_DWN_1
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184 0x4000 //RX_TDDRC_ALPHA_DWN_1
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||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
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185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
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||||||
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
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186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
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||||||
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
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189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
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190 0x7000 //RX_TDDRC_LIMITER_THRD
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190 0x7000 //RX_TDDRC_LIMITER_THRD
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191 0x0800 //RX_TDDRC_LIMITER_GAIN
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191 0x0800 //RX_TDDRC_LIMITER_GAIN
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269 0x0008 //RX_TDDRC_THRD_0
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269 0x000F //RX_TDDRC_THRD_0
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270 0x0800 //RX_TDDRC_THRD_1
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270 0x0050 //RX_TDDRC_THRD_1
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271 0x1800 //RX_TDDRC_THRD_2
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271 0x1800 //RX_TDDRC_THRD_2
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272 0x1800 //RX_TDDRC_THRD_3
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272 0x1800 //RX_TDDRC_THRD_3
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273 0x3000 //RX_TDDRC_SLANT_0
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273 0x3000 //RX_TDDRC_SLANT_0
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@ -5201,14 +5201,14 @@
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164 0x1000 //RX_TDDRC_ALPHA_UP_2
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164 0x1000 //RX_TDDRC_ALPHA_UP_2
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165 0x1000 //RX_TDDRC_ALPHA_UP_3
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165 0x1000 //RX_TDDRC_ALPHA_UP_3
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||||||
166 0x1000 //RX_TDDRC_ALPHA_UP_4
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166 0x1000 //RX_TDDRC_ALPHA_UP_4
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184 0x1000 //RX_TDDRC_ALPHA_DWN_1
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184 0x4000 //RX_TDDRC_ALPHA_DWN_1
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185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
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185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
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186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
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186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
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189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
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189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
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190 0x7000 //RX_TDDRC_LIMITER_THRD
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190 0x7000 //RX_TDDRC_LIMITER_THRD
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191 0x0800 //RX_TDDRC_LIMITER_GAIN
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191 0x0800 //RX_TDDRC_LIMITER_GAIN
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269 0x0008 //RX_TDDRC_THRD_0
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269 0x000F //RX_TDDRC_THRD_0
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270 0x0800 //RX_TDDRC_THRD_1
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270 0x0050 //RX_TDDRC_THRD_1
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271 0x1800 //RX_TDDRC_THRD_2
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271 0x1800 //RX_TDDRC_THRD_2
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272 0x1800 //RX_TDDRC_THRD_3
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272 0x1800 //RX_TDDRC_THRD_3
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273 0x3000 //RX_TDDRC_SLANT_0
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273 0x3000 //RX_TDDRC_SLANT_0
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@ -5219,14 +5219,14 @@
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278 0x199A //RX_TDDRC_HMNC_GAIN
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278 0x199A //RX_TDDRC_HMNC_GAIN
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279 0x0001 //RX_TDDRC_SMT_FLAG
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279 0x0001 //RX_TDDRC_SMT_FLAG
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280 0x0CCD //RX_TDDRC_SMT_W
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280 0x0CCD //RX_TDDRC_SMT_W
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281 0x0283 //RX_TDDRC_DRC_GAIN
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281 0x025F //RX_TDDRC_DRC_GAIN
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195 0x001C //RX_FDEQ_SUBNUM
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195 0x001C //RX_FDEQ_SUBNUM
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196 0x5C54 //RX_FDEQ_GAIN_0
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196 0x5C54 //RX_FDEQ_GAIN_0
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197 0x5454 //RX_FDEQ_GAIN_1
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197 0x5454 //RX_FDEQ_GAIN_1
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198 0x606A //RX_FDEQ_GAIN_2
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198 0x606A //RX_FDEQ_GAIN_2
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199 0x787F //RX_FDEQ_GAIN_3
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199 0x787F //RX_FDEQ_GAIN_3
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200 0x7C78 //RX_FDEQ_GAIN_4
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200 0x7C7A //RX_FDEQ_GAIN_4
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201 0x7676 //RX_FDEQ_GAIN_5
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201 0x7A79 //RX_FDEQ_GAIN_5
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202 0x7B82 //RX_FDEQ_GAIN_6
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202 0x7B82 //RX_FDEQ_GAIN_6
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203 0x8D9C //RX_FDEQ_GAIN_7
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203 0x8D9C //RX_FDEQ_GAIN_7
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204 0x9581 //RX_FDEQ_GAIN_8
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204 0x9581 //RX_FDEQ_GAIN_8
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@ -5300,14 +5300,14 @@
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164 0x1000 //RX_TDDRC_ALPHA_UP_2
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164 0x1000 //RX_TDDRC_ALPHA_UP_2
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165 0x1000 //RX_TDDRC_ALPHA_UP_3
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165 0x1000 //RX_TDDRC_ALPHA_UP_3
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166 0x1000 //RX_TDDRC_ALPHA_UP_4
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166 0x1000 //RX_TDDRC_ALPHA_UP_4
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184 0x1000 //RX_TDDRC_ALPHA_DWN_1
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184 0x4000 //RX_TDDRC_ALPHA_DWN_1
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185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
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185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
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186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
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186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
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189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
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189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
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190 0x5A90 //RX_TDDRC_LIMITER_THRD
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190 0x5A90 //RX_TDDRC_LIMITER_THRD
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191 0x0800 //RX_TDDRC_LIMITER_GAIN
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191 0x0800 //RX_TDDRC_LIMITER_GAIN
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269 0x0008 //RX_TDDRC_THRD_0
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269 0x000F //RX_TDDRC_THRD_0
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270 0x0800 //RX_TDDRC_THRD_1
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270 0x0050 //RX_TDDRC_THRD_1
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271 0x1800 //RX_TDDRC_THRD_2
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271 0x1800 //RX_TDDRC_THRD_2
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272 0x1800 //RX_TDDRC_THRD_3
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272 0x1800 //RX_TDDRC_THRD_3
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273 0x3000 //RX_TDDRC_SLANT_0
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273 0x3000 //RX_TDDRC_SLANT_0
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@ -5318,15 +5318,15 @@
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278 0x199A //RX_TDDRC_HMNC_GAIN
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278 0x199A //RX_TDDRC_HMNC_GAIN
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279 0x0001 //RX_TDDRC_SMT_FLAG
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279 0x0001 //RX_TDDRC_SMT_FLAG
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280 0x0CCD //RX_TDDRC_SMT_W
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280 0x0CCD //RX_TDDRC_SMT_W
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281 0x0283 //RX_TDDRC_DRC_GAIN
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281 0x029A //RX_TDDRC_DRC_GAIN
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195 0x001C //RX_FDEQ_SUBNUM
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195 0x001C //RX_FDEQ_SUBNUM
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196 0x5C54 //RX_FDEQ_GAIN_0
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196 0x5C54 //RX_FDEQ_GAIN_0
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197 0x5454 //RX_FDEQ_GAIN_1
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197 0x5454 //RX_FDEQ_GAIN_1
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198 0x606E //RX_FDEQ_GAIN_2
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198 0x606E //RX_FDEQ_GAIN_2
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199 0x787F //RX_FDEQ_GAIN_3
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199 0x787F //RX_FDEQ_GAIN_3
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200 0x7C78 //RX_FDEQ_GAIN_4
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200 0x7C83 //RX_FDEQ_GAIN_4
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201 0x7676 //RX_FDEQ_GAIN_5
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201 0x8685 //RX_FDEQ_GAIN_5
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202 0x7B82 //RX_FDEQ_GAIN_6
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202 0x8489 //RX_FDEQ_GAIN_6
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203 0x8D9E //RX_FDEQ_GAIN_7
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203 0x8D9E //RX_FDEQ_GAIN_7
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204 0x9C81 //RX_FDEQ_GAIN_8
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204 0x9C81 //RX_FDEQ_GAIN_8
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205 0x6E66 //RX_FDEQ_GAIN_9
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205 0x6E66 //RX_FDEQ_GAIN_9
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@ -5979,11 +5979,11 @@
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577 0x615B //TX_FDEQ_GAIN_10
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577 0x615B //TX_FDEQ_GAIN_10
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578 0x5959 //TX_FDEQ_GAIN_11
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578 0x5959 //TX_FDEQ_GAIN_11
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579 0x5351 //TX_FDEQ_GAIN_12
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579 0x5351 //TX_FDEQ_GAIN_12
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580 0x423B //TX_FDEQ_GAIN_13
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580 0x4B4B //TX_FDEQ_GAIN_13
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581 0x4246 //TX_FDEQ_GAIN_14
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581 0x4D4D //TX_FDEQ_GAIN_14
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582 0x4545 //TX_FDEQ_GAIN_15
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582 0x684E //TX_FDEQ_GAIN_15
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583 0x4B4B //TX_FDEQ_GAIN_16
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583 0x5350 //TX_FDEQ_GAIN_16
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584 0x4848 //TX_FDEQ_GAIN_17
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584 0x5050 //TX_FDEQ_GAIN_17
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||||||
585 0x4848 //TX_FDEQ_GAIN_18
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585 0x4848 //TX_FDEQ_GAIN_18
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586 0x4848 //TX_FDEQ_GAIN_19
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586 0x4848 //TX_FDEQ_GAIN_19
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587 0x4848 //TX_FDEQ_GAIN_20
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587 0x4848 //TX_FDEQ_GAIN_20
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@ -6004,8 +6004,8 @@
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602 0x0F28 //TX_FDEQ_BIN_11
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602 0x0F28 //TX_FDEQ_BIN_11
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603 0x111B //TX_FDEQ_BIN_12
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603 0x111B //TX_FDEQ_BIN_12
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604 0x291E //TX_FDEQ_BIN_13
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604 0x291E //TX_FDEQ_BIN_13
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605 0x1E10 //TX_FDEQ_BIN_14
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605 0x1E14 //TX_FDEQ_BIN_14
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606 0x1810 //TX_FDEQ_BIN_15
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606 0x190B //TX_FDEQ_BIN_15
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607 0x1021 //TX_FDEQ_BIN_16
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607 0x1021 //TX_FDEQ_BIN_16
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||||||
608 0x1000 //TX_FDEQ_BIN_17
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608 0x1000 //TX_FDEQ_BIN_17
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||||||
609 0x0000 //TX_FDEQ_BIN_18
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609 0x0000 //TX_FDEQ_BIN_18
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@ -6265,7 +6265,7 @@
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863 0x199A //TX_TDDRC_HMNC_GAIN
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863 0x199A //TX_TDDRC_HMNC_GAIN
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864 0x0000 //TX_TDDRC_SMT_FLAG
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864 0x0000 //TX_TDDRC_SMT_FLAG
|
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865 0x0CCD //TX_TDDRC_SMT_W
|
865 0x0CCD //TX_TDDRC_SMT_W
|
||||||
866 0x0A5A //TX_TDDRC_DRC_GAIN
|
866 0x09C6 //TX_TDDRC_DRC_GAIN
|
||||||
867 0x7FFF //TX_TDDRC_LMT_THRD
|
867 0x7FFF //TX_TDDRC_LMT_THRD
|
||||||
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
||||||
869 0x0000 //TX_TFMASKLTH
|
869 0x0000 //TX_TFMASKLTH
|
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|
@ -7914,7 +7914,7 @@
|
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278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x03D9 //RX_TDDRC_DRC_GAIN
|
281 0x038C //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0025 //RX_FDEQ_SUBNUM
|
195 0x0025 //RX_FDEQ_SUBNUM
|
||||||
196 0x584E //RX_FDEQ_GAIN_0
|
196 0x584E //RX_FDEQ_GAIN_0
|
||||||
197 0x4D50 //RX_FDEQ_GAIN_1
|
197 0x4D50 //RX_FDEQ_GAIN_1
|
||||||
|
@ -7926,14 +7926,14 @@
|
||||||
203 0x97A5 //RX_FDEQ_GAIN_7
|
203 0x97A5 //RX_FDEQ_GAIN_7
|
||||||
204 0xA996 //RX_FDEQ_GAIN_8
|
204 0xA996 //RX_FDEQ_GAIN_8
|
||||||
205 0x8175 //RX_FDEQ_GAIN_9
|
205 0x8175 //RX_FDEQ_GAIN_9
|
||||||
206 0x6859 //RX_FDEQ_GAIN_10
|
206 0x6862 //RX_FDEQ_GAIN_10
|
||||||
207 0x4D4A //RX_FDEQ_GAIN_11
|
207 0x6156 //RX_FDEQ_GAIN_11
|
||||||
208 0x504F //RX_FDEQ_GAIN_12
|
208 0x595F //RX_FDEQ_GAIN_12
|
||||||
209 0x4847 //RX_FDEQ_GAIN_13
|
209 0x5859 //RX_FDEQ_GAIN_13
|
||||||
210 0x433C //RX_FDEQ_GAIN_14
|
210 0x5B56 //RX_FDEQ_GAIN_14
|
||||||
211 0x4147 //RX_FDEQ_GAIN_15
|
211 0x5457 //RX_FDEQ_GAIN_15
|
||||||
212 0x4D46 //RX_FDEQ_GAIN_16
|
212 0x4B49 //RX_FDEQ_GAIN_16
|
||||||
213 0x4460 //RX_FDEQ_GAIN_17
|
213 0x4960 //RX_FDEQ_GAIN_17
|
||||||
214 0x6E48 //RX_FDEQ_GAIN_18
|
214 0x6E48 //RX_FDEQ_GAIN_18
|
||||||
215 0x4848 //RX_FDEQ_GAIN_19
|
215 0x4848 //RX_FDEQ_GAIN_19
|
||||||
216 0x4848 //RX_FDEQ_GAIN_20
|
216 0x4848 //RX_FDEQ_GAIN_20
|
||||||
|
@ -8013,7 +8013,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x03D9 //RX_TDDRC_DRC_GAIN
|
281 0x035A //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0025 //RX_FDEQ_SUBNUM
|
195 0x0025 //RX_FDEQ_SUBNUM
|
||||||
196 0x584E //RX_FDEQ_GAIN_0
|
196 0x584E //RX_FDEQ_GAIN_0
|
||||||
197 0x4D50 //RX_FDEQ_GAIN_1
|
197 0x4D50 //RX_FDEQ_GAIN_1
|
||||||
|
@ -8025,14 +8025,14 @@
|
||||||
203 0x97A5 //RX_FDEQ_GAIN_7
|
203 0x97A5 //RX_FDEQ_GAIN_7
|
||||||
204 0xA996 //RX_FDEQ_GAIN_8
|
204 0xA996 //RX_FDEQ_GAIN_8
|
||||||
205 0x8175 //RX_FDEQ_GAIN_9
|
205 0x8175 //RX_FDEQ_GAIN_9
|
||||||
206 0x6859 //RX_FDEQ_GAIN_10
|
206 0x6862 //RX_FDEQ_GAIN_10
|
||||||
207 0x4D4A //RX_FDEQ_GAIN_11
|
207 0x6156 //RX_FDEQ_GAIN_11
|
||||||
208 0x504F //RX_FDEQ_GAIN_12
|
208 0x595F //RX_FDEQ_GAIN_12
|
||||||
209 0x4847 //RX_FDEQ_GAIN_13
|
209 0x5859 //RX_FDEQ_GAIN_13
|
||||||
210 0x433C //RX_FDEQ_GAIN_14
|
210 0x5B56 //RX_FDEQ_GAIN_14
|
||||||
211 0x4147 //RX_FDEQ_GAIN_15
|
211 0x5457 //RX_FDEQ_GAIN_15
|
||||||
212 0x4D46 //RX_FDEQ_GAIN_16
|
212 0x4B49 //RX_FDEQ_GAIN_16
|
||||||
213 0x4460 //RX_FDEQ_GAIN_17
|
213 0x4960 //RX_FDEQ_GAIN_17
|
||||||
214 0x6E48 //RX_FDEQ_GAIN_18
|
214 0x6E48 //RX_FDEQ_GAIN_18
|
||||||
215 0x4848 //RX_FDEQ_GAIN_19
|
215 0x4848 //RX_FDEQ_GAIN_19
|
||||||
216 0x4848 //RX_FDEQ_GAIN_20
|
216 0x4848 //RX_FDEQ_GAIN_20
|
||||||
|
@ -14350,7 +14350,7 @@
|
||||||
863 0x199A //TX_TDDRC_HMNC_GAIN
|
863 0x199A //TX_TDDRC_HMNC_GAIN
|
||||||
864 0x0000 //TX_TDDRC_SMT_FLAG
|
864 0x0000 //TX_TDDRC_SMT_FLAG
|
||||||
865 0x0CCD //TX_TDDRC_SMT_W
|
865 0x0CCD //TX_TDDRC_SMT_W
|
||||||
866 0x0BE3 //TX_TDDRC_DRC_GAIN
|
866 0x0B38 //TX_TDDRC_DRC_GAIN
|
||||||
867 0x7FFF //TX_TDDRC_LMT_THRD
|
867 0x7FFF //TX_TDDRC_LMT_THRD
|
||||||
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
||||||
869 0x0000 //TX_TFMASKLTH
|
869 0x0000 //TX_TFMASKLTH
|
||||||
|
@ -14493,10 +14493,10 @@
|
||||||
17 0x0003 //RX_SBD_PITCH_DET
|
17 0x0003 //RX_SBD_PITCH_DET
|
||||||
18 0x0100 //RX_PP_RESRV_0
|
18 0x0100 //RX_PP_RESRV_0
|
||||||
19 0x0020 //RX_PP_RESRV_1
|
19 0x0020 //RX_PP_RESRV_1
|
||||||
20 0x0400 //RX_N_SN_EST
|
20 0x0600 //RX_N_SN_EST
|
||||||
21 0x000C //RX_N2_SN_EST
|
21 0x000C //RX_N2_SN_EST
|
||||||
22 0x000F //RX_NS_LVL_CTRL
|
22 0x0009 //RX_NS_LVL_CTRL
|
||||||
23 0xF800 //RX_THR_SN_EST
|
23 0x0100 //RX_THR_SN_EST
|
||||||
24 0x7CCD //RX_LAMBDA_PFILT
|
24 0x7CCD //RX_LAMBDA_PFILT
|
||||||
25 0x000A //RX_MUTE_PERIOD
|
25 0x000A //RX_MUTE_PERIOD
|
||||||
26 0x0190 //RX_FADE_IN_PERIOD
|
26 0x0190 //RX_FADE_IN_PERIOD
|
||||||
|
@ -15344,10 +15344,10 @@
|
||||||
174 0x0003 //RX_SBD_PITCH_DET
|
174 0x0003 //RX_SBD_PITCH_DET
|
||||||
175 0x0100 //RX_PP_RESRV_0
|
175 0x0100 //RX_PP_RESRV_0
|
||||||
176 0x0020 //RX_PP_RESRV_1
|
176 0x0020 //RX_PP_RESRV_1
|
||||||
177 0x0400 //RX_N_SN_EST
|
177 0x0600 //RX_N_SN_EST
|
||||||
178 0x000C //RX_N2_SN_EST
|
178 0x000C //RX_N2_SN_EST
|
||||||
179 0x000F //RX_NS_LVL_CTRL
|
179 0x0009 //RX_NS_LVL_CTRL
|
||||||
180 0xF800 //RX_THR_SN_EST
|
180 0x0100 //RX_THR_SN_EST
|
||||||
181 0x7CCD //RX_LAMBDA_PFILT
|
181 0x7CCD //RX_LAMBDA_PFILT
|
||||||
182 0x000A //RX_MUTE_PERIOD
|
182 0x000A //RX_MUTE_PERIOD
|
||||||
183 0x0190 //RX_FADE_IN_PERIOD
|
183 0x0190 //RX_FADE_IN_PERIOD
|
||||||
|
@ -15882,14 +15882,14 @@
|
||||||
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
184 0x1000 //RX_TDDRC_ALPHA_DWN_1
|
184 0x4000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x7000 //RX_TDDRC_LIMITER_THRD
|
190 0x7000 //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0008 //RX_TDDRC_THRD_0
|
269 0x000F //RX_TDDRC_THRD_0
|
||||||
270 0x0800 //RX_TDDRC_THRD_1
|
270 0x0050 //RX_TDDRC_THRD_1
|
||||||
271 0x1800 //RX_TDDRC_THRD_2
|
271 0x1800 //RX_TDDRC_THRD_2
|
||||||
272 0x1800 //RX_TDDRC_THRD_3
|
272 0x1800 //RX_TDDRC_THRD_3
|
||||||
273 0x3000 //RX_TDDRC_SLANT_0
|
273 0x3000 //RX_TDDRC_SLANT_0
|
||||||
|
@ -15981,14 +15981,14 @@
|
||||||
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
184 0x1000 //RX_TDDRC_ALPHA_DWN_1
|
184 0x4000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x7000 //RX_TDDRC_LIMITER_THRD
|
190 0x7000 //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0008 //RX_TDDRC_THRD_0
|
269 0x000F //RX_TDDRC_THRD_0
|
||||||
270 0x0800 //RX_TDDRC_THRD_1
|
270 0x0050 //RX_TDDRC_THRD_1
|
||||||
271 0x1800 //RX_TDDRC_THRD_2
|
271 0x1800 //RX_TDDRC_THRD_2
|
||||||
272 0x1800 //RX_TDDRC_THRD_3
|
272 0x1800 //RX_TDDRC_THRD_3
|
||||||
273 0x3000 //RX_TDDRC_SLANT_0
|
273 0x3000 //RX_TDDRC_SLANT_0
|
||||||
|
@ -15999,14 +15999,14 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x0283 //RX_TDDRC_DRC_GAIN
|
281 0x025F //RX_TDDRC_DRC_GAIN
|
||||||
195 0x001C //RX_FDEQ_SUBNUM
|
195 0x001C //RX_FDEQ_SUBNUM
|
||||||
196 0x5C54 //RX_FDEQ_GAIN_0
|
196 0x5C54 //RX_FDEQ_GAIN_0
|
||||||
197 0x5454 //RX_FDEQ_GAIN_1
|
197 0x5454 //RX_FDEQ_GAIN_1
|
||||||
198 0x606A //RX_FDEQ_GAIN_2
|
198 0x606A //RX_FDEQ_GAIN_2
|
||||||
199 0x787F //RX_FDEQ_GAIN_3
|
199 0x787F //RX_FDEQ_GAIN_3
|
||||||
200 0x7C78 //RX_FDEQ_GAIN_4
|
200 0x7C7A //RX_FDEQ_GAIN_4
|
||||||
201 0x7676 //RX_FDEQ_GAIN_5
|
201 0x7A79 //RX_FDEQ_GAIN_5
|
||||||
202 0x7B82 //RX_FDEQ_GAIN_6
|
202 0x7B82 //RX_FDEQ_GAIN_6
|
||||||
203 0x8D9C //RX_FDEQ_GAIN_7
|
203 0x8D9C //RX_FDEQ_GAIN_7
|
||||||
204 0x9581 //RX_FDEQ_GAIN_8
|
204 0x9581 //RX_FDEQ_GAIN_8
|
||||||
|
@ -16080,14 +16080,14 @@
|
||||||
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
184 0x1000 //RX_TDDRC_ALPHA_DWN_1
|
184 0x4000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x5A90 //RX_TDDRC_LIMITER_THRD
|
190 0x5A90 //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0008 //RX_TDDRC_THRD_0
|
269 0x000F //RX_TDDRC_THRD_0
|
||||||
270 0x0800 //RX_TDDRC_THRD_1
|
270 0x0050 //RX_TDDRC_THRD_1
|
||||||
271 0x1800 //RX_TDDRC_THRD_2
|
271 0x1800 //RX_TDDRC_THRD_2
|
||||||
272 0x1800 //RX_TDDRC_THRD_3
|
272 0x1800 //RX_TDDRC_THRD_3
|
||||||
273 0x3000 //RX_TDDRC_SLANT_0
|
273 0x3000 //RX_TDDRC_SLANT_0
|
||||||
|
@ -16098,15 +16098,15 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x0283 //RX_TDDRC_DRC_GAIN
|
281 0x029A //RX_TDDRC_DRC_GAIN
|
||||||
195 0x001C //RX_FDEQ_SUBNUM
|
195 0x001C //RX_FDEQ_SUBNUM
|
||||||
196 0x5C54 //RX_FDEQ_GAIN_0
|
196 0x5C54 //RX_FDEQ_GAIN_0
|
||||||
197 0x5454 //RX_FDEQ_GAIN_1
|
197 0x5454 //RX_FDEQ_GAIN_1
|
||||||
198 0x606E //RX_FDEQ_GAIN_2
|
198 0x606E //RX_FDEQ_GAIN_2
|
||||||
199 0x787F //RX_FDEQ_GAIN_3
|
199 0x787F //RX_FDEQ_GAIN_3
|
||||||
200 0x7C78 //RX_FDEQ_GAIN_4
|
200 0x7C83 //RX_FDEQ_GAIN_4
|
||||||
201 0x7676 //RX_FDEQ_GAIN_5
|
201 0x8685 //RX_FDEQ_GAIN_5
|
||||||
202 0x7B82 //RX_FDEQ_GAIN_6
|
202 0x8489 //RX_FDEQ_GAIN_6
|
||||||
203 0x8D9E //RX_FDEQ_GAIN_7
|
203 0x8D9E //RX_FDEQ_GAIN_7
|
||||||
204 0x9C81 //RX_FDEQ_GAIN_8
|
204 0x9C81 //RX_FDEQ_GAIN_8
|
||||||
205 0x6E66 //RX_FDEQ_GAIN_9
|
205 0x6E66 //RX_FDEQ_GAIN_9
|
||||||
|
@ -16759,11 +16759,11 @@
|
||||||
577 0x615B //TX_FDEQ_GAIN_10
|
577 0x615B //TX_FDEQ_GAIN_10
|
||||||
578 0x5959 //TX_FDEQ_GAIN_11
|
578 0x5959 //TX_FDEQ_GAIN_11
|
||||||
579 0x5351 //TX_FDEQ_GAIN_12
|
579 0x5351 //TX_FDEQ_GAIN_12
|
||||||
580 0x423B //TX_FDEQ_GAIN_13
|
580 0x4B4B //TX_FDEQ_GAIN_13
|
||||||
581 0x4246 //TX_FDEQ_GAIN_14
|
581 0x4D4D //TX_FDEQ_GAIN_14
|
||||||
582 0x4545 //TX_FDEQ_GAIN_15
|
582 0x684E //TX_FDEQ_GAIN_15
|
||||||
583 0x4B4B //TX_FDEQ_GAIN_16
|
583 0x5350 //TX_FDEQ_GAIN_16
|
||||||
584 0x4848 //TX_FDEQ_GAIN_17
|
584 0x5050 //TX_FDEQ_GAIN_17
|
||||||
585 0x4848 //TX_FDEQ_GAIN_18
|
585 0x4848 //TX_FDEQ_GAIN_18
|
||||||
586 0x4848 //TX_FDEQ_GAIN_19
|
586 0x4848 //TX_FDEQ_GAIN_19
|
||||||
587 0x4848 //TX_FDEQ_GAIN_20
|
587 0x4848 //TX_FDEQ_GAIN_20
|
||||||
|
@ -16784,8 +16784,8 @@
|
||||||
602 0x0F28 //TX_FDEQ_BIN_11
|
602 0x0F28 //TX_FDEQ_BIN_11
|
||||||
603 0x111B //TX_FDEQ_BIN_12
|
603 0x111B //TX_FDEQ_BIN_12
|
||||||
604 0x291E //TX_FDEQ_BIN_13
|
604 0x291E //TX_FDEQ_BIN_13
|
||||||
605 0x1E10 //TX_FDEQ_BIN_14
|
605 0x1E14 //TX_FDEQ_BIN_14
|
||||||
606 0x1810 //TX_FDEQ_BIN_15
|
606 0x190B //TX_FDEQ_BIN_15
|
||||||
607 0x1021 //TX_FDEQ_BIN_16
|
607 0x1021 //TX_FDEQ_BIN_16
|
||||||
608 0x1000 //TX_FDEQ_BIN_17
|
608 0x1000 //TX_FDEQ_BIN_17
|
||||||
609 0x0000 //TX_FDEQ_BIN_18
|
609 0x0000 //TX_FDEQ_BIN_18
|
||||||
|
@ -17045,7 +17045,7 @@
|
||||||
863 0x199A //TX_TDDRC_HMNC_GAIN
|
863 0x199A //TX_TDDRC_HMNC_GAIN
|
||||||
864 0x0000 //TX_TDDRC_SMT_FLAG
|
864 0x0000 //TX_TDDRC_SMT_FLAG
|
||||||
865 0x0CCD //TX_TDDRC_SMT_W
|
865 0x0CCD //TX_TDDRC_SMT_W
|
||||||
866 0x0A5A //TX_TDDRC_DRC_GAIN
|
866 0x09C6 //TX_TDDRC_DRC_GAIN
|
||||||
867 0x7FFF //TX_TDDRC_LMT_THRD
|
867 0x7FFF //TX_TDDRC_LMT_THRD
|
||||||
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
||||||
869 0x0000 //TX_TFMASKLTH
|
869 0x0000 //TX_TFMASKLTH
|
||||||
|
@ -18694,7 +18694,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x03D9 //RX_TDDRC_DRC_GAIN
|
281 0x038C //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0025 //RX_FDEQ_SUBNUM
|
195 0x0025 //RX_FDEQ_SUBNUM
|
||||||
196 0x584E //RX_FDEQ_GAIN_0
|
196 0x584E //RX_FDEQ_GAIN_0
|
||||||
197 0x4D50 //RX_FDEQ_GAIN_1
|
197 0x4D50 //RX_FDEQ_GAIN_1
|
||||||
|
@ -18706,14 +18706,14 @@
|
||||||
203 0x97A5 //RX_FDEQ_GAIN_7
|
203 0x97A5 //RX_FDEQ_GAIN_7
|
||||||
204 0xA996 //RX_FDEQ_GAIN_8
|
204 0xA996 //RX_FDEQ_GAIN_8
|
||||||
205 0x8175 //RX_FDEQ_GAIN_9
|
205 0x8175 //RX_FDEQ_GAIN_9
|
||||||
206 0x6859 //RX_FDEQ_GAIN_10
|
206 0x6862 //RX_FDEQ_GAIN_10
|
||||||
207 0x4D4A //RX_FDEQ_GAIN_11
|
207 0x6156 //RX_FDEQ_GAIN_11
|
||||||
208 0x504F //RX_FDEQ_GAIN_12
|
208 0x595F //RX_FDEQ_GAIN_12
|
||||||
209 0x4847 //RX_FDEQ_GAIN_13
|
209 0x5859 //RX_FDEQ_GAIN_13
|
||||||
210 0x433C //RX_FDEQ_GAIN_14
|
210 0x5B56 //RX_FDEQ_GAIN_14
|
||||||
211 0x4147 //RX_FDEQ_GAIN_15
|
211 0x5457 //RX_FDEQ_GAIN_15
|
||||||
212 0x4D46 //RX_FDEQ_GAIN_16
|
212 0x4B49 //RX_FDEQ_GAIN_16
|
||||||
213 0x4460 //RX_FDEQ_GAIN_17
|
213 0x4960 //RX_FDEQ_GAIN_17
|
||||||
214 0x6E48 //RX_FDEQ_GAIN_18
|
214 0x6E48 //RX_FDEQ_GAIN_18
|
||||||
215 0x4848 //RX_FDEQ_GAIN_19
|
215 0x4848 //RX_FDEQ_GAIN_19
|
||||||
216 0x4848 //RX_FDEQ_GAIN_20
|
216 0x4848 //RX_FDEQ_GAIN_20
|
||||||
|
@ -18793,7 +18793,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x03D9 //RX_TDDRC_DRC_GAIN
|
281 0x035A //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0025 //RX_FDEQ_SUBNUM
|
195 0x0025 //RX_FDEQ_SUBNUM
|
||||||
196 0x584E //RX_FDEQ_GAIN_0
|
196 0x584E //RX_FDEQ_GAIN_0
|
||||||
197 0x4D50 //RX_FDEQ_GAIN_1
|
197 0x4D50 //RX_FDEQ_GAIN_1
|
||||||
|
@ -18805,14 +18805,14 @@
|
||||||
203 0x97A5 //RX_FDEQ_GAIN_7
|
203 0x97A5 //RX_FDEQ_GAIN_7
|
||||||
204 0xA996 //RX_FDEQ_GAIN_8
|
204 0xA996 //RX_FDEQ_GAIN_8
|
||||||
205 0x8175 //RX_FDEQ_GAIN_9
|
205 0x8175 //RX_FDEQ_GAIN_9
|
||||||
206 0x6859 //RX_FDEQ_GAIN_10
|
206 0x6862 //RX_FDEQ_GAIN_10
|
||||||
207 0x4D4A //RX_FDEQ_GAIN_11
|
207 0x6156 //RX_FDEQ_GAIN_11
|
||||||
208 0x504F //RX_FDEQ_GAIN_12
|
208 0x595F //RX_FDEQ_GAIN_12
|
||||||
209 0x4847 //RX_FDEQ_GAIN_13
|
209 0x5859 //RX_FDEQ_GAIN_13
|
||||||
210 0x433C //RX_FDEQ_GAIN_14
|
210 0x5B56 //RX_FDEQ_GAIN_14
|
||||||
211 0x4147 //RX_FDEQ_GAIN_15
|
211 0x5457 //RX_FDEQ_GAIN_15
|
||||||
212 0x4D46 //RX_FDEQ_GAIN_16
|
212 0x4B49 //RX_FDEQ_GAIN_16
|
||||||
213 0x4460 //RX_FDEQ_GAIN_17
|
213 0x4960 //RX_FDEQ_GAIN_17
|
||||||
214 0x6E48 //RX_FDEQ_GAIN_18
|
214 0x6E48 //RX_FDEQ_GAIN_18
|
||||||
215 0x4848 //RX_FDEQ_GAIN_19
|
215 0x4848 //RX_FDEQ_GAIN_19
|
||||||
216 0x4848 //RX_FDEQ_GAIN_20
|
216 0x4848 //RX_FDEQ_GAIN_20
|
||||||
|
@ -22149,11 +22149,11 @@
|
||||||
577 0x615B //TX_FDEQ_GAIN_10
|
577 0x615B //TX_FDEQ_GAIN_10
|
||||||
578 0x5959 //TX_FDEQ_GAIN_11
|
578 0x5959 //TX_FDEQ_GAIN_11
|
||||||
579 0x5351 //TX_FDEQ_GAIN_12
|
579 0x5351 //TX_FDEQ_GAIN_12
|
||||||
580 0x423B //TX_FDEQ_GAIN_13
|
580 0x4B4B //TX_FDEQ_GAIN_13
|
||||||
581 0x4246 //TX_FDEQ_GAIN_14
|
581 0x4D4D //TX_FDEQ_GAIN_14
|
||||||
582 0x4545 //TX_FDEQ_GAIN_15
|
582 0x684E //TX_FDEQ_GAIN_15
|
||||||
583 0x4B4B //TX_FDEQ_GAIN_16
|
583 0x5350 //TX_FDEQ_GAIN_16
|
||||||
584 0x4848 //TX_FDEQ_GAIN_17
|
584 0x5050 //TX_FDEQ_GAIN_17
|
||||||
585 0x4848 //TX_FDEQ_GAIN_18
|
585 0x4848 //TX_FDEQ_GAIN_18
|
||||||
586 0x4848 //TX_FDEQ_GAIN_19
|
586 0x4848 //TX_FDEQ_GAIN_19
|
||||||
587 0x4848 //TX_FDEQ_GAIN_20
|
587 0x4848 //TX_FDEQ_GAIN_20
|
||||||
|
@ -22174,8 +22174,8 @@
|
||||||
602 0x0F28 //TX_FDEQ_BIN_11
|
602 0x0F28 //TX_FDEQ_BIN_11
|
||||||
603 0x111B //TX_FDEQ_BIN_12
|
603 0x111B //TX_FDEQ_BIN_12
|
||||||
604 0x291E //TX_FDEQ_BIN_13
|
604 0x291E //TX_FDEQ_BIN_13
|
||||||
605 0x1E10 //TX_FDEQ_BIN_14
|
605 0x1E14 //TX_FDEQ_BIN_14
|
||||||
606 0x1810 //TX_FDEQ_BIN_15
|
606 0x190B //TX_FDEQ_BIN_15
|
||||||
607 0x1021 //TX_FDEQ_BIN_16
|
607 0x1021 //TX_FDEQ_BIN_16
|
||||||
608 0x1000 //TX_FDEQ_BIN_17
|
608 0x1000 //TX_FDEQ_BIN_17
|
||||||
609 0x0000 //TX_FDEQ_BIN_18
|
609 0x0000 //TX_FDEQ_BIN_18
|
||||||
|
@ -22435,7 +22435,7 @@
|
||||||
863 0x199A //TX_TDDRC_HMNC_GAIN
|
863 0x199A //TX_TDDRC_HMNC_GAIN
|
||||||
864 0x0000 //TX_TDDRC_SMT_FLAG
|
864 0x0000 //TX_TDDRC_SMT_FLAG
|
||||||
865 0x0CCD //TX_TDDRC_SMT_W
|
865 0x0CCD //TX_TDDRC_SMT_W
|
||||||
866 0x0A5A //TX_TDDRC_DRC_GAIN
|
866 0x09C6 //TX_TDDRC_DRC_GAIN
|
||||||
867 0x7FFF //TX_TDDRC_LMT_THRD
|
867 0x7FFF //TX_TDDRC_LMT_THRD
|
||||||
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
||||||
869 0x0000 //TX_TFMASKLTH
|
869 0x0000 //TX_TFMASKLTH
|
||||||
|
@ -24084,7 +24084,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x03D9 //RX_TDDRC_DRC_GAIN
|
281 0x038C //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0025 //RX_FDEQ_SUBNUM
|
195 0x0025 //RX_FDEQ_SUBNUM
|
||||||
196 0x584E //RX_FDEQ_GAIN_0
|
196 0x584E //RX_FDEQ_GAIN_0
|
||||||
197 0x4D50 //RX_FDEQ_GAIN_1
|
197 0x4D50 //RX_FDEQ_GAIN_1
|
||||||
|
@ -24096,14 +24096,14 @@
|
||||||
203 0x97A5 //RX_FDEQ_GAIN_7
|
203 0x97A5 //RX_FDEQ_GAIN_7
|
||||||
204 0xA996 //RX_FDEQ_GAIN_8
|
204 0xA996 //RX_FDEQ_GAIN_8
|
||||||
205 0x8175 //RX_FDEQ_GAIN_9
|
205 0x8175 //RX_FDEQ_GAIN_9
|
||||||
206 0x6859 //RX_FDEQ_GAIN_10
|
206 0x6862 //RX_FDEQ_GAIN_10
|
||||||
207 0x4D4A //RX_FDEQ_GAIN_11
|
207 0x6156 //RX_FDEQ_GAIN_11
|
||||||
208 0x504F //RX_FDEQ_GAIN_12
|
208 0x595F //RX_FDEQ_GAIN_12
|
||||||
209 0x4847 //RX_FDEQ_GAIN_13
|
209 0x5859 //RX_FDEQ_GAIN_13
|
||||||
210 0x433C //RX_FDEQ_GAIN_14
|
210 0x5B56 //RX_FDEQ_GAIN_14
|
||||||
211 0x4147 //RX_FDEQ_GAIN_15
|
211 0x5457 //RX_FDEQ_GAIN_15
|
||||||
212 0x4D46 //RX_FDEQ_GAIN_16
|
212 0x4B49 //RX_FDEQ_GAIN_16
|
||||||
213 0x4460 //RX_FDEQ_GAIN_17
|
213 0x4960 //RX_FDEQ_GAIN_17
|
||||||
214 0x6E48 //RX_FDEQ_GAIN_18
|
214 0x6E48 //RX_FDEQ_GAIN_18
|
||||||
215 0x4848 //RX_FDEQ_GAIN_19
|
215 0x4848 //RX_FDEQ_GAIN_19
|
||||||
216 0x4848 //RX_FDEQ_GAIN_20
|
216 0x4848 //RX_FDEQ_GAIN_20
|
||||||
|
@ -24183,7 +24183,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x03D9 //RX_TDDRC_DRC_GAIN
|
281 0x035A //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0025 //RX_FDEQ_SUBNUM
|
195 0x0025 //RX_FDEQ_SUBNUM
|
||||||
196 0x584E //RX_FDEQ_GAIN_0
|
196 0x584E //RX_FDEQ_GAIN_0
|
||||||
197 0x4D50 //RX_FDEQ_GAIN_1
|
197 0x4D50 //RX_FDEQ_GAIN_1
|
||||||
|
@ -24195,14 +24195,14 @@
|
||||||
203 0x97A5 //RX_FDEQ_GAIN_7
|
203 0x97A5 //RX_FDEQ_GAIN_7
|
||||||
204 0xA996 //RX_FDEQ_GAIN_8
|
204 0xA996 //RX_FDEQ_GAIN_8
|
||||||
205 0x8175 //RX_FDEQ_GAIN_9
|
205 0x8175 //RX_FDEQ_GAIN_9
|
||||||
206 0x6859 //RX_FDEQ_GAIN_10
|
206 0x6862 //RX_FDEQ_GAIN_10
|
||||||
207 0x4D4A //RX_FDEQ_GAIN_11
|
207 0x6156 //RX_FDEQ_GAIN_11
|
||||||
208 0x504F //RX_FDEQ_GAIN_12
|
208 0x595F //RX_FDEQ_GAIN_12
|
||||||
209 0x4847 //RX_FDEQ_GAIN_13
|
209 0x5859 //RX_FDEQ_GAIN_13
|
||||||
210 0x433C //RX_FDEQ_GAIN_14
|
210 0x5B56 //RX_FDEQ_GAIN_14
|
||||||
211 0x4147 //RX_FDEQ_GAIN_15
|
211 0x5457 //RX_FDEQ_GAIN_15
|
||||||
212 0x4D46 //RX_FDEQ_GAIN_16
|
212 0x4B49 //RX_FDEQ_GAIN_16
|
||||||
213 0x4460 //RX_FDEQ_GAIN_17
|
213 0x4960 //RX_FDEQ_GAIN_17
|
||||||
214 0x6E48 //RX_FDEQ_GAIN_18
|
214 0x6E48 //RX_FDEQ_GAIN_18
|
||||||
215 0x4848 //RX_FDEQ_GAIN_19
|
215 0x4848 //RX_FDEQ_GAIN_19
|
||||||
216 0x4848 //RX_FDEQ_GAIN_20
|
216 0x4848 //RX_FDEQ_GAIN_20
|
||||||
|
@ -27539,11 +27539,11 @@
|
||||||
577 0x615B //TX_FDEQ_GAIN_10
|
577 0x615B //TX_FDEQ_GAIN_10
|
||||||
578 0x5959 //TX_FDEQ_GAIN_11
|
578 0x5959 //TX_FDEQ_GAIN_11
|
||||||
579 0x5351 //TX_FDEQ_GAIN_12
|
579 0x5351 //TX_FDEQ_GAIN_12
|
||||||
580 0x423B //TX_FDEQ_GAIN_13
|
580 0x4B4B //TX_FDEQ_GAIN_13
|
||||||
581 0x4246 //TX_FDEQ_GAIN_14
|
581 0x4D4D //TX_FDEQ_GAIN_14
|
||||||
582 0x4545 //TX_FDEQ_GAIN_15
|
582 0x684E //TX_FDEQ_GAIN_15
|
||||||
583 0x4B4B //TX_FDEQ_GAIN_16
|
583 0x5350 //TX_FDEQ_GAIN_16
|
||||||
584 0x4848 //TX_FDEQ_GAIN_17
|
584 0x5050 //TX_FDEQ_GAIN_17
|
||||||
585 0x4848 //TX_FDEQ_GAIN_18
|
585 0x4848 //TX_FDEQ_GAIN_18
|
||||||
586 0x4848 //TX_FDEQ_GAIN_19
|
586 0x4848 //TX_FDEQ_GAIN_19
|
||||||
587 0x4848 //TX_FDEQ_GAIN_20
|
587 0x4848 //TX_FDEQ_GAIN_20
|
||||||
|
@ -27564,8 +27564,8 @@
|
||||||
602 0x0F28 //TX_FDEQ_BIN_11
|
602 0x0F28 //TX_FDEQ_BIN_11
|
||||||
603 0x111B //TX_FDEQ_BIN_12
|
603 0x111B //TX_FDEQ_BIN_12
|
||||||
604 0x291E //TX_FDEQ_BIN_13
|
604 0x291E //TX_FDEQ_BIN_13
|
||||||
605 0x1E10 //TX_FDEQ_BIN_14
|
605 0x1E14 //TX_FDEQ_BIN_14
|
||||||
606 0x1810 //TX_FDEQ_BIN_15
|
606 0x190B //TX_FDEQ_BIN_15
|
||||||
607 0x1021 //TX_FDEQ_BIN_16
|
607 0x1021 //TX_FDEQ_BIN_16
|
||||||
608 0x1000 //TX_FDEQ_BIN_17
|
608 0x1000 //TX_FDEQ_BIN_17
|
||||||
609 0x0000 //TX_FDEQ_BIN_18
|
609 0x0000 //TX_FDEQ_BIN_18
|
||||||
|
@ -27825,7 +27825,7 @@
|
||||||
863 0x199A //TX_TDDRC_HMNC_GAIN
|
863 0x199A //TX_TDDRC_HMNC_GAIN
|
||||||
864 0x0000 //TX_TDDRC_SMT_FLAG
|
864 0x0000 //TX_TDDRC_SMT_FLAG
|
||||||
865 0x0CCD //TX_TDDRC_SMT_W
|
865 0x0CCD //TX_TDDRC_SMT_W
|
||||||
866 0x0A5A //TX_TDDRC_DRC_GAIN
|
866 0x09C6 //TX_TDDRC_DRC_GAIN
|
||||||
867 0x7FFF //TX_TDDRC_LMT_THRD
|
867 0x7FFF //TX_TDDRC_LMT_THRD
|
||||||
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
||||||
869 0x0000 //TX_TFMASKLTH
|
869 0x0000 //TX_TFMASKLTH
|
||||||
|
@ -29474,7 +29474,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x03D9 //RX_TDDRC_DRC_GAIN
|
281 0x038C //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0025 //RX_FDEQ_SUBNUM
|
195 0x0025 //RX_FDEQ_SUBNUM
|
||||||
196 0x584E //RX_FDEQ_GAIN_0
|
196 0x584E //RX_FDEQ_GAIN_0
|
||||||
197 0x4D50 //RX_FDEQ_GAIN_1
|
197 0x4D50 //RX_FDEQ_GAIN_1
|
||||||
|
@ -29486,14 +29486,14 @@
|
||||||
203 0x97A5 //RX_FDEQ_GAIN_7
|
203 0x97A5 //RX_FDEQ_GAIN_7
|
||||||
204 0xA996 //RX_FDEQ_GAIN_8
|
204 0xA996 //RX_FDEQ_GAIN_8
|
||||||
205 0x8175 //RX_FDEQ_GAIN_9
|
205 0x8175 //RX_FDEQ_GAIN_9
|
||||||
206 0x6859 //RX_FDEQ_GAIN_10
|
206 0x6862 //RX_FDEQ_GAIN_10
|
||||||
207 0x4D4A //RX_FDEQ_GAIN_11
|
207 0x6156 //RX_FDEQ_GAIN_11
|
||||||
208 0x504F //RX_FDEQ_GAIN_12
|
208 0x595F //RX_FDEQ_GAIN_12
|
||||||
209 0x4847 //RX_FDEQ_GAIN_13
|
209 0x5859 //RX_FDEQ_GAIN_13
|
||||||
210 0x433C //RX_FDEQ_GAIN_14
|
210 0x5B56 //RX_FDEQ_GAIN_14
|
||||||
211 0x4147 //RX_FDEQ_GAIN_15
|
211 0x5457 //RX_FDEQ_GAIN_15
|
||||||
212 0x4D46 //RX_FDEQ_GAIN_16
|
212 0x4B49 //RX_FDEQ_GAIN_16
|
||||||
213 0x4460 //RX_FDEQ_GAIN_17
|
213 0x4960 //RX_FDEQ_GAIN_17
|
||||||
214 0x6E48 //RX_FDEQ_GAIN_18
|
214 0x6E48 //RX_FDEQ_GAIN_18
|
||||||
215 0x4848 //RX_FDEQ_GAIN_19
|
215 0x4848 //RX_FDEQ_GAIN_19
|
||||||
216 0x4848 //RX_FDEQ_GAIN_20
|
216 0x4848 //RX_FDEQ_GAIN_20
|
||||||
|
@ -29573,7 +29573,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x03D9 //RX_TDDRC_DRC_GAIN
|
281 0x035A //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0025 //RX_FDEQ_SUBNUM
|
195 0x0025 //RX_FDEQ_SUBNUM
|
||||||
196 0x584E //RX_FDEQ_GAIN_0
|
196 0x584E //RX_FDEQ_GAIN_0
|
||||||
197 0x4D50 //RX_FDEQ_GAIN_1
|
197 0x4D50 //RX_FDEQ_GAIN_1
|
||||||
|
@ -29585,14 +29585,14 @@
|
||||||
203 0x97A5 //RX_FDEQ_GAIN_7
|
203 0x97A5 //RX_FDEQ_GAIN_7
|
||||||
204 0xA996 //RX_FDEQ_GAIN_8
|
204 0xA996 //RX_FDEQ_GAIN_8
|
||||||
205 0x8175 //RX_FDEQ_GAIN_9
|
205 0x8175 //RX_FDEQ_GAIN_9
|
||||||
206 0x6859 //RX_FDEQ_GAIN_10
|
206 0x6862 //RX_FDEQ_GAIN_10
|
||||||
207 0x4D4A //RX_FDEQ_GAIN_11
|
207 0x6156 //RX_FDEQ_GAIN_11
|
||||||
208 0x504F //RX_FDEQ_GAIN_12
|
208 0x595F //RX_FDEQ_GAIN_12
|
||||||
209 0x4847 //RX_FDEQ_GAIN_13
|
209 0x5859 //RX_FDEQ_GAIN_13
|
||||||
210 0x433C //RX_FDEQ_GAIN_14
|
210 0x5B56 //RX_FDEQ_GAIN_14
|
||||||
211 0x4147 //RX_FDEQ_GAIN_15
|
211 0x5457 //RX_FDEQ_GAIN_15
|
||||||
212 0x4D46 //RX_FDEQ_GAIN_16
|
212 0x4B49 //RX_FDEQ_GAIN_16
|
||||||
213 0x4460 //RX_FDEQ_GAIN_17
|
213 0x4960 //RX_FDEQ_GAIN_17
|
||||||
214 0x6E48 //RX_FDEQ_GAIN_18
|
214 0x6E48 //RX_FDEQ_GAIN_18
|
||||||
215 0x4848 //RX_FDEQ_GAIN_19
|
215 0x4848 //RX_FDEQ_GAIN_19
|
||||||
216 0x4848 //RX_FDEQ_GAIN_20
|
216 0x4848 //RX_FDEQ_GAIN_20
|
||||||
|
@ -32929,11 +32929,11 @@
|
||||||
577 0x615B //TX_FDEQ_GAIN_10
|
577 0x615B //TX_FDEQ_GAIN_10
|
||||||
578 0x5959 //TX_FDEQ_GAIN_11
|
578 0x5959 //TX_FDEQ_GAIN_11
|
||||||
579 0x5351 //TX_FDEQ_GAIN_12
|
579 0x5351 //TX_FDEQ_GAIN_12
|
||||||
580 0x423B //TX_FDEQ_GAIN_13
|
580 0x4B4B //TX_FDEQ_GAIN_13
|
||||||
581 0x4246 //TX_FDEQ_GAIN_14
|
581 0x4D4D //TX_FDEQ_GAIN_14
|
||||||
582 0x4545 //TX_FDEQ_GAIN_15
|
582 0x684E //TX_FDEQ_GAIN_15
|
||||||
583 0x4B4B //TX_FDEQ_GAIN_16
|
583 0x5350 //TX_FDEQ_GAIN_16
|
||||||
584 0x4848 //TX_FDEQ_GAIN_17
|
584 0x5050 //TX_FDEQ_GAIN_17
|
||||||
585 0x4848 //TX_FDEQ_GAIN_18
|
585 0x4848 //TX_FDEQ_GAIN_18
|
||||||
586 0x4848 //TX_FDEQ_GAIN_19
|
586 0x4848 //TX_FDEQ_GAIN_19
|
||||||
587 0x4848 //TX_FDEQ_GAIN_20
|
587 0x4848 //TX_FDEQ_GAIN_20
|
||||||
|
@ -32954,8 +32954,8 @@
|
||||||
602 0x0F28 //TX_FDEQ_BIN_11
|
602 0x0F28 //TX_FDEQ_BIN_11
|
||||||
603 0x111B //TX_FDEQ_BIN_12
|
603 0x111B //TX_FDEQ_BIN_12
|
||||||
604 0x291E //TX_FDEQ_BIN_13
|
604 0x291E //TX_FDEQ_BIN_13
|
||||||
605 0x1E10 //TX_FDEQ_BIN_14
|
605 0x1E14 //TX_FDEQ_BIN_14
|
||||||
606 0x1810 //TX_FDEQ_BIN_15
|
606 0x190B //TX_FDEQ_BIN_15
|
||||||
607 0x1021 //TX_FDEQ_BIN_16
|
607 0x1021 //TX_FDEQ_BIN_16
|
||||||
608 0x1000 //TX_FDEQ_BIN_17
|
608 0x1000 //TX_FDEQ_BIN_17
|
||||||
609 0x0000 //TX_FDEQ_BIN_18
|
609 0x0000 //TX_FDEQ_BIN_18
|
||||||
|
@ -33215,7 +33215,7 @@
|
||||||
863 0x199A //TX_TDDRC_HMNC_GAIN
|
863 0x199A //TX_TDDRC_HMNC_GAIN
|
||||||
864 0x0000 //TX_TDDRC_SMT_FLAG
|
864 0x0000 //TX_TDDRC_SMT_FLAG
|
||||||
865 0x0CCD //TX_TDDRC_SMT_W
|
865 0x0CCD //TX_TDDRC_SMT_W
|
||||||
866 0x0A5A //TX_TDDRC_DRC_GAIN
|
866 0x09C6 //TX_TDDRC_DRC_GAIN
|
||||||
867 0x7FFF //TX_TDDRC_LMT_THRD
|
867 0x7FFF //TX_TDDRC_LMT_THRD
|
||||||
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
||||||
869 0x0000 //TX_TFMASKLTH
|
869 0x0000 //TX_TFMASKLTH
|
||||||
|
@ -34864,7 +34864,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x03D9 //RX_TDDRC_DRC_GAIN
|
281 0x038C //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0025 //RX_FDEQ_SUBNUM
|
195 0x0025 //RX_FDEQ_SUBNUM
|
||||||
196 0x584E //RX_FDEQ_GAIN_0
|
196 0x584E //RX_FDEQ_GAIN_0
|
||||||
197 0x4D50 //RX_FDEQ_GAIN_1
|
197 0x4D50 //RX_FDEQ_GAIN_1
|
||||||
|
@ -34876,14 +34876,14 @@
|
||||||
203 0x97A5 //RX_FDEQ_GAIN_7
|
203 0x97A5 //RX_FDEQ_GAIN_7
|
||||||
204 0xA996 //RX_FDEQ_GAIN_8
|
204 0xA996 //RX_FDEQ_GAIN_8
|
||||||
205 0x8175 //RX_FDEQ_GAIN_9
|
205 0x8175 //RX_FDEQ_GAIN_9
|
||||||
206 0x6859 //RX_FDEQ_GAIN_10
|
206 0x6862 //RX_FDEQ_GAIN_10
|
||||||
207 0x4D4A //RX_FDEQ_GAIN_11
|
207 0x6156 //RX_FDEQ_GAIN_11
|
||||||
208 0x504F //RX_FDEQ_GAIN_12
|
208 0x595F //RX_FDEQ_GAIN_12
|
||||||
209 0x4847 //RX_FDEQ_GAIN_13
|
209 0x5859 //RX_FDEQ_GAIN_13
|
||||||
210 0x433C //RX_FDEQ_GAIN_14
|
210 0x5B56 //RX_FDEQ_GAIN_14
|
||||||
211 0x4147 //RX_FDEQ_GAIN_15
|
211 0x5457 //RX_FDEQ_GAIN_15
|
||||||
212 0x4D46 //RX_FDEQ_GAIN_16
|
212 0x4B49 //RX_FDEQ_GAIN_16
|
||||||
213 0x4460 //RX_FDEQ_GAIN_17
|
213 0x4960 //RX_FDEQ_GAIN_17
|
||||||
214 0x6E48 //RX_FDEQ_GAIN_18
|
214 0x6E48 //RX_FDEQ_GAIN_18
|
||||||
215 0x4848 //RX_FDEQ_GAIN_19
|
215 0x4848 //RX_FDEQ_GAIN_19
|
||||||
216 0x4848 //RX_FDEQ_GAIN_20
|
216 0x4848 //RX_FDEQ_GAIN_20
|
||||||
|
@ -34963,7 +34963,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x03D9 //RX_TDDRC_DRC_GAIN
|
281 0x035A //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0025 //RX_FDEQ_SUBNUM
|
195 0x0025 //RX_FDEQ_SUBNUM
|
||||||
196 0x584E //RX_FDEQ_GAIN_0
|
196 0x584E //RX_FDEQ_GAIN_0
|
||||||
197 0x4D50 //RX_FDEQ_GAIN_1
|
197 0x4D50 //RX_FDEQ_GAIN_1
|
||||||
|
@ -34975,14 +34975,14 @@
|
||||||
203 0x97A5 //RX_FDEQ_GAIN_7
|
203 0x97A5 //RX_FDEQ_GAIN_7
|
||||||
204 0xA996 //RX_FDEQ_GAIN_8
|
204 0xA996 //RX_FDEQ_GAIN_8
|
||||||
205 0x8175 //RX_FDEQ_GAIN_9
|
205 0x8175 //RX_FDEQ_GAIN_9
|
||||||
206 0x6859 //RX_FDEQ_GAIN_10
|
206 0x6862 //RX_FDEQ_GAIN_10
|
||||||
207 0x4D4A //RX_FDEQ_GAIN_11
|
207 0x6156 //RX_FDEQ_GAIN_11
|
||||||
208 0x504F //RX_FDEQ_GAIN_12
|
208 0x595F //RX_FDEQ_GAIN_12
|
||||||
209 0x4847 //RX_FDEQ_GAIN_13
|
209 0x5859 //RX_FDEQ_GAIN_13
|
||||||
210 0x433C //RX_FDEQ_GAIN_14
|
210 0x5B56 //RX_FDEQ_GAIN_14
|
||||||
211 0x4147 //RX_FDEQ_GAIN_15
|
211 0x5457 //RX_FDEQ_GAIN_15
|
||||||
212 0x4D46 //RX_FDEQ_GAIN_16
|
212 0x4B49 //RX_FDEQ_GAIN_16
|
||||||
213 0x4460 //RX_FDEQ_GAIN_17
|
213 0x4960 //RX_FDEQ_GAIN_17
|
||||||
214 0x6E48 //RX_FDEQ_GAIN_18
|
214 0x6E48 //RX_FDEQ_GAIN_18
|
||||||
215 0x4848 //RX_FDEQ_GAIN_19
|
215 0x4848 //RX_FDEQ_GAIN_19
|
||||||
216 0x4848 //RX_FDEQ_GAIN_20
|
216 0x4848 //RX_FDEQ_GAIN_20
|
||||||
|
@ -38319,11 +38319,11 @@
|
||||||
577 0x615B //TX_FDEQ_GAIN_10
|
577 0x615B //TX_FDEQ_GAIN_10
|
||||||
578 0x5959 //TX_FDEQ_GAIN_11
|
578 0x5959 //TX_FDEQ_GAIN_11
|
||||||
579 0x5351 //TX_FDEQ_GAIN_12
|
579 0x5351 //TX_FDEQ_GAIN_12
|
||||||
580 0x423B //TX_FDEQ_GAIN_13
|
580 0x4B4B //TX_FDEQ_GAIN_13
|
||||||
581 0x4246 //TX_FDEQ_GAIN_14
|
581 0x4D4D //TX_FDEQ_GAIN_14
|
||||||
582 0x4545 //TX_FDEQ_GAIN_15
|
582 0x684E //TX_FDEQ_GAIN_15
|
||||||
583 0x4B4B //TX_FDEQ_GAIN_16
|
583 0x5350 //TX_FDEQ_GAIN_16
|
||||||
584 0x4848 //TX_FDEQ_GAIN_17
|
584 0x5050 //TX_FDEQ_GAIN_17
|
||||||
585 0x4848 //TX_FDEQ_GAIN_18
|
585 0x4848 //TX_FDEQ_GAIN_18
|
||||||
586 0x4848 //TX_FDEQ_GAIN_19
|
586 0x4848 //TX_FDEQ_GAIN_19
|
||||||
587 0x4848 //TX_FDEQ_GAIN_20
|
587 0x4848 //TX_FDEQ_GAIN_20
|
||||||
|
@ -38344,8 +38344,8 @@
|
||||||
602 0x0F28 //TX_FDEQ_BIN_11
|
602 0x0F28 //TX_FDEQ_BIN_11
|
||||||
603 0x111B //TX_FDEQ_BIN_12
|
603 0x111B //TX_FDEQ_BIN_12
|
||||||
604 0x291E //TX_FDEQ_BIN_13
|
604 0x291E //TX_FDEQ_BIN_13
|
||||||
605 0x1E10 //TX_FDEQ_BIN_14
|
605 0x1E14 //TX_FDEQ_BIN_14
|
||||||
606 0x1810 //TX_FDEQ_BIN_15
|
606 0x190B //TX_FDEQ_BIN_15
|
||||||
607 0x1021 //TX_FDEQ_BIN_16
|
607 0x1021 //TX_FDEQ_BIN_16
|
||||||
608 0x1000 //TX_FDEQ_BIN_17
|
608 0x1000 //TX_FDEQ_BIN_17
|
||||||
609 0x0000 //TX_FDEQ_BIN_18
|
609 0x0000 //TX_FDEQ_BIN_18
|
||||||
|
@ -38605,7 +38605,7 @@
|
||||||
863 0x199A //TX_TDDRC_HMNC_GAIN
|
863 0x199A //TX_TDDRC_HMNC_GAIN
|
||||||
864 0x0000 //TX_TDDRC_SMT_FLAG
|
864 0x0000 //TX_TDDRC_SMT_FLAG
|
||||||
865 0x0CCD //TX_TDDRC_SMT_W
|
865 0x0CCD //TX_TDDRC_SMT_W
|
||||||
866 0x0A5A //TX_TDDRC_DRC_GAIN
|
866 0x09C6 //TX_TDDRC_DRC_GAIN
|
||||||
867 0x7FFF //TX_TDDRC_LMT_THRD
|
867 0x7FFF //TX_TDDRC_LMT_THRD
|
||||||
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
||||||
869 0x0000 //TX_TFMASKLTH
|
869 0x0000 //TX_TFMASKLTH
|
||||||
|
@ -40254,7 +40254,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x03D9 //RX_TDDRC_DRC_GAIN
|
281 0x038C //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0025 //RX_FDEQ_SUBNUM
|
195 0x0025 //RX_FDEQ_SUBNUM
|
||||||
196 0x584E //RX_FDEQ_GAIN_0
|
196 0x584E //RX_FDEQ_GAIN_0
|
||||||
197 0x4D50 //RX_FDEQ_GAIN_1
|
197 0x4D50 //RX_FDEQ_GAIN_1
|
||||||
|
@ -40266,14 +40266,14 @@
|
||||||
203 0x97A5 //RX_FDEQ_GAIN_7
|
203 0x97A5 //RX_FDEQ_GAIN_7
|
||||||
204 0xA996 //RX_FDEQ_GAIN_8
|
204 0xA996 //RX_FDEQ_GAIN_8
|
||||||
205 0x8175 //RX_FDEQ_GAIN_9
|
205 0x8175 //RX_FDEQ_GAIN_9
|
||||||
206 0x6859 //RX_FDEQ_GAIN_10
|
206 0x6862 //RX_FDEQ_GAIN_10
|
||||||
207 0x4D4A //RX_FDEQ_GAIN_11
|
207 0x6156 //RX_FDEQ_GAIN_11
|
||||||
208 0x504F //RX_FDEQ_GAIN_12
|
208 0x595F //RX_FDEQ_GAIN_12
|
||||||
209 0x4847 //RX_FDEQ_GAIN_13
|
209 0x5859 //RX_FDEQ_GAIN_13
|
||||||
210 0x433C //RX_FDEQ_GAIN_14
|
210 0x5B56 //RX_FDEQ_GAIN_14
|
||||||
211 0x4147 //RX_FDEQ_GAIN_15
|
211 0x5457 //RX_FDEQ_GAIN_15
|
||||||
212 0x4D46 //RX_FDEQ_GAIN_16
|
212 0x4B49 //RX_FDEQ_GAIN_16
|
||||||
213 0x4460 //RX_FDEQ_GAIN_17
|
213 0x4960 //RX_FDEQ_GAIN_17
|
||||||
214 0x6E48 //RX_FDEQ_GAIN_18
|
214 0x6E48 //RX_FDEQ_GAIN_18
|
||||||
215 0x4848 //RX_FDEQ_GAIN_19
|
215 0x4848 //RX_FDEQ_GAIN_19
|
||||||
216 0x4848 //RX_FDEQ_GAIN_20
|
216 0x4848 //RX_FDEQ_GAIN_20
|
||||||
|
@ -40353,7 +40353,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x03D9 //RX_TDDRC_DRC_GAIN
|
281 0x035A //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0025 //RX_FDEQ_SUBNUM
|
195 0x0025 //RX_FDEQ_SUBNUM
|
||||||
196 0x584E //RX_FDEQ_GAIN_0
|
196 0x584E //RX_FDEQ_GAIN_0
|
||||||
197 0x4D50 //RX_FDEQ_GAIN_1
|
197 0x4D50 //RX_FDEQ_GAIN_1
|
||||||
|
@ -40365,14 +40365,14 @@
|
||||||
203 0x97A5 //RX_FDEQ_GAIN_7
|
203 0x97A5 //RX_FDEQ_GAIN_7
|
||||||
204 0xA996 //RX_FDEQ_GAIN_8
|
204 0xA996 //RX_FDEQ_GAIN_8
|
||||||
205 0x8175 //RX_FDEQ_GAIN_9
|
205 0x8175 //RX_FDEQ_GAIN_9
|
||||||
206 0x6859 //RX_FDEQ_GAIN_10
|
206 0x6862 //RX_FDEQ_GAIN_10
|
||||||
207 0x4D4A //RX_FDEQ_GAIN_11
|
207 0x6156 //RX_FDEQ_GAIN_11
|
||||||
208 0x504F //RX_FDEQ_GAIN_12
|
208 0x595F //RX_FDEQ_GAIN_12
|
||||||
209 0x4847 //RX_FDEQ_GAIN_13
|
209 0x5859 //RX_FDEQ_GAIN_13
|
||||||
210 0x433C //RX_FDEQ_GAIN_14
|
210 0x5B56 //RX_FDEQ_GAIN_14
|
||||||
211 0x4147 //RX_FDEQ_GAIN_15
|
211 0x5457 //RX_FDEQ_GAIN_15
|
||||||
212 0x4D46 //RX_FDEQ_GAIN_16
|
212 0x4B49 //RX_FDEQ_GAIN_16
|
||||||
213 0x4460 //RX_FDEQ_GAIN_17
|
213 0x4960 //RX_FDEQ_GAIN_17
|
||||||
214 0x6E48 //RX_FDEQ_GAIN_18
|
214 0x6E48 //RX_FDEQ_GAIN_18
|
||||||
215 0x4848 //RX_FDEQ_GAIN_19
|
215 0x4848 //RX_FDEQ_GAIN_19
|
||||||
216 0x4848 //RX_FDEQ_GAIN_20
|
216 0x4848 //RX_FDEQ_GAIN_20
|
||||||
|
@ -43995,7 +43995,7 @@
|
||||||
863 0x199A //TX_TDDRC_HMNC_GAIN
|
863 0x199A //TX_TDDRC_HMNC_GAIN
|
||||||
864 0x0000 //TX_TDDRC_SMT_FLAG
|
864 0x0000 //TX_TDDRC_SMT_FLAG
|
||||||
865 0x0CCD //TX_TDDRC_SMT_W
|
865 0x0CCD //TX_TDDRC_SMT_W
|
||||||
866 0x0BE3 //TX_TDDRC_DRC_GAIN
|
866 0x0B38 //TX_TDDRC_DRC_GAIN
|
||||||
867 0x7FFF //TX_TDDRC_LMT_THRD
|
867 0x7FFF //TX_TDDRC_LMT_THRD
|
||||||
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
||||||
869 0x0000 //TX_TFMASKLTH
|
869 0x0000 //TX_TFMASKLTH
|
||||||
|
@ -46404,11 +46404,11 @@
|
||||||
577 0x615B //TX_FDEQ_GAIN_10
|
577 0x615B //TX_FDEQ_GAIN_10
|
||||||
578 0x5959 //TX_FDEQ_GAIN_11
|
578 0x5959 //TX_FDEQ_GAIN_11
|
||||||
579 0x5351 //TX_FDEQ_GAIN_12
|
579 0x5351 //TX_FDEQ_GAIN_12
|
||||||
580 0x423B //TX_FDEQ_GAIN_13
|
580 0x4B4B //TX_FDEQ_GAIN_13
|
||||||
581 0x4246 //TX_FDEQ_GAIN_14
|
581 0x4D4D //TX_FDEQ_GAIN_14
|
||||||
582 0x4545 //TX_FDEQ_GAIN_15
|
582 0x684E //TX_FDEQ_GAIN_15
|
||||||
583 0x4B4B //TX_FDEQ_GAIN_16
|
583 0x5350 //TX_FDEQ_GAIN_16
|
||||||
584 0x4848 //TX_FDEQ_GAIN_17
|
584 0x5050 //TX_FDEQ_GAIN_17
|
||||||
585 0x4848 //TX_FDEQ_GAIN_18
|
585 0x4848 //TX_FDEQ_GAIN_18
|
||||||
586 0x4848 //TX_FDEQ_GAIN_19
|
586 0x4848 //TX_FDEQ_GAIN_19
|
||||||
587 0x4848 //TX_FDEQ_GAIN_20
|
587 0x4848 //TX_FDEQ_GAIN_20
|
||||||
|
@ -46429,8 +46429,8 @@
|
||||||
602 0x0F28 //TX_FDEQ_BIN_11
|
602 0x0F28 //TX_FDEQ_BIN_11
|
||||||
603 0x111B //TX_FDEQ_BIN_12
|
603 0x111B //TX_FDEQ_BIN_12
|
||||||
604 0x291E //TX_FDEQ_BIN_13
|
604 0x291E //TX_FDEQ_BIN_13
|
||||||
605 0x1E10 //TX_FDEQ_BIN_14
|
605 0x1E14 //TX_FDEQ_BIN_14
|
||||||
606 0x1810 //TX_FDEQ_BIN_15
|
606 0x190B //TX_FDEQ_BIN_15
|
||||||
607 0x1021 //TX_FDEQ_BIN_16
|
607 0x1021 //TX_FDEQ_BIN_16
|
||||||
608 0x1000 //TX_FDEQ_BIN_17
|
608 0x1000 //TX_FDEQ_BIN_17
|
||||||
609 0x0000 //TX_FDEQ_BIN_18
|
609 0x0000 //TX_FDEQ_BIN_18
|
||||||
|
@ -46690,7 +46690,7 @@
|
||||||
863 0x199A //TX_TDDRC_HMNC_GAIN
|
863 0x199A //TX_TDDRC_HMNC_GAIN
|
||||||
864 0x0000 //TX_TDDRC_SMT_FLAG
|
864 0x0000 //TX_TDDRC_SMT_FLAG
|
||||||
865 0x0CCD //TX_TDDRC_SMT_W
|
865 0x0CCD //TX_TDDRC_SMT_W
|
||||||
866 0x0A5A //TX_TDDRC_DRC_GAIN
|
866 0x09C6 //TX_TDDRC_DRC_GAIN
|
||||||
867 0x7FFF //TX_TDDRC_LMT_THRD
|
867 0x7FFF //TX_TDDRC_LMT_THRD
|
||||||
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
||||||
869 0x0000 //TX_TFMASKLTH
|
869 0x0000 //TX_TFMASKLTH
|
||||||
|
@ -54775,7 +54775,7 @@
|
||||||
863 0x199A //TX_TDDRC_HMNC_GAIN
|
863 0x199A //TX_TDDRC_HMNC_GAIN
|
||||||
864 0x0000 //TX_TDDRC_SMT_FLAG
|
864 0x0000 //TX_TDDRC_SMT_FLAG
|
||||||
865 0x0CCD //TX_TDDRC_SMT_W
|
865 0x0CCD //TX_TDDRC_SMT_W
|
||||||
866 0x0BE3 //TX_TDDRC_DRC_GAIN
|
866 0x0B38 //TX_TDDRC_DRC_GAIN
|
||||||
867 0x7FFF //TX_TDDRC_LMT_THRD
|
867 0x7FFF //TX_TDDRC_LMT_THRD
|
||||||
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
||||||
869 0x0000 //TX_TFMASKLTH
|
869 0x0000 //TX_TFMASKLTH
|
||||||
|
@ -57184,11 +57184,11 @@
|
||||||
577 0x615B //TX_FDEQ_GAIN_10
|
577 0x615B //TX_FDEQ_GAIN_10
|
||||||
578 0x5959 //TX_FDEQ_GAIN_11
|
578 0x5959 //TX_FDEQ_GAIN_11
|
||||||
579 0x5351 //TX_FDEQ_GAIN_12
|
579 0x5351 //TX_FDEQ_GAIN_12
|
||||||
580 0x423B //TX_FDEQ_GAIN_13
|
580 0x4B4B //TX_FDEQ_GAIN_13
|
||||||
581 0x4246 //TX_FDEQ_GAIN_14
|
581 0x4D4D //TX_FDEQ_GAIN_14
|
||||||
582 0x4545 //TX_FDEQ_GAIN_15
|
582 0x684E //TX_FDEQ_GAIN_15
|
||||||
583 0x4B4B //TX_FDEQ_GAIN_16
|
583 0x5350 //TX_FDEQ_GAIN_16
|
||||||
584 0x4848 //TX_FDEQ_GAIN_17
|
584 0x5050 //TX_FDEQ_GAIN_17
|
||||||
585 0x4848 //TX_FDEQ_GAIN_18
|
585 0x4848 //TX_FDEQ_GAIN_18
|
||||||
586 0x4848 //TX_FDEQ_GAIN_19
|
586 0x4848 //TX_FDEQ_GAIN_19
|
||||||
587 0x4848 //TX_FDEQ_GAIN_20
|
587 0x4848 //TX_FDEQ_GAIN_20
|
||||||
|
@ -57209,8 +57209,8 @@
|
||||||
602 0x0F28 //TX_FDEQ_BIN_11
|
602 0x0F28 //TX_FDEQ_BIN_11
|
||||||
603 0x111B //TX_FDEQ_BIN_12
|
603 0x111B //TX_FDEQ_BIN_12
|
||||||
604 0x291E //TX_FDEQ_BIN_13
|
604 0x291E //TX_FDEQ_BIN_13
|
||||||
605 0x1E10 //TX_FDEQ_BIN_14
|
605 0x1E14 //TX_FDEQ_BIN_14
|
||||||
606 0x1810 //TX_FDEQ_BIN_15
|
606 0x190B //TX_FDEQ_BIN_15
|
||||||
607 0x1021 //TX_FDEQ_BIN_16
|
607 0x1021 //TX_FDEQ_BIN_16
|
||||||
608 0x1000 //TX_FDEQ_BIN_17
|
608 0x1000 //TX_FDEQ_BIN_17
|
||||||
609 0x0000 //TX_FDEQ_BIN_18
|
609 0x0000 //TX_FDEQ_BIN_18
|
||||||
|
@ -57470,7 +57470,7 @@
|
||||||
863 0x199A //TX_TDDRC_HMNC_GAIN
|
863 0x199A //TX_TDDRC_HMNC_GAIN
|
||||||
864 0x0000 //TX_TDDRC_SMT_FLAG
|
864 0x0000 //TX_TDDRC_SMT_FLAG
|
||||||
865 0x0CCD //TX_TDDRC_SMT_W
|
865 0x0CCD //TX_TDDRC_SMT_W
|
||||||
866 0x0A5A //TX_TDDRC_DRC_GAIN
|
866 0x09C6 //TX_TDDRC_DRC_GAIN
|
||||||
867 0x7FFF //TX_TDDRC_LMT_THRD
|
867 0x7FFF //TX_TDDRC_LMT_THRD
|
||||||
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
||||||
869 0x0000 //TX_TFMASKLTH
|
869 0x0000 //TX_TFMASKLTH
|
||||||
|
@ -62574,11 +62574,11 @@
|
||||||
577 0x615B //TX_FDEQ_GAIN_10
|
577 0x615B //TX_FDEQ_GAIN_10
|
||||||
578 0x5959 //TX_FDEQ_GAIN_11
|
578 0x5959 //TX_FDEQ_GAIN_11
|
||||||
579 0x5351 //TX_FDEQ_GAIN_12
|
579 0x5351 //TX_FDEQ_GAIN_12
|
||||||
580 0x423B //TX_FDEQ_GAIN_13
|
580 0x4B4B //TX_FDEQ_GAIN_13
|
||||||
581 0x4246 //TX_FDEQ_GAIN_14
|
581 0x4D4D //TX_FDEQ_GAIN_14
|
||||||
582 0x4545 //TX_FDEQ_GAIN_15
|
582 0x684E //TX_FDEQ_GAIN_15
|
||||||
583 0x4B4B //TX_FDEQ_GAIN_16
|
583 0x5350 //TX_FDEQ_GAIN_16
|
||||||
584 0x4848 //TX_FDEQ_GAIN_17
|
584 0x5050 //TX_FDEQ_GAIN_17
|
||||||
585 0x4848 //TX_FDEQ_GAIN_18
|
585 0x4848 //TX_FDEQ_GAIN_18
|
||||||
586 0x4848 //TX_FDEQ_GAIN_19
|
586 0x4848 //TX_FDEQ_GAIN_19
|
||||||
587 0x4848 //TX_FDEQ_GAIN_20
|
587 0x4848 //TX_FDEQ_GAIN_20
|
||||||
|
@ -62599,8 +62599,8 @@
|
||||||
602 0x0F28 //TX_FDEQ_BIN_11
|
602 0x0F28 //TX_FDEQ_BIN_11
|
||||||
603 0x111B //TX_FDEQ_BIN_12
|
603 0x111B //TX_FDEQ_BIN_12
|
||||||
604 0x291E //TX_FDEQ_BIN_13
|
604 0x291E //TX_FDEQ_BIN_13
|
||||||
605 0x1E10 //TX_FDEQ_BIN_14
|
605 0x1E14 //TX_FDEQ_BIN_14
|
||||||
606 0x1810 //TX_FDEQ_BIN_15
|
606 0x190B //TX_FDEQ_BIN_15
|
||||||
607 0x1021 //TX_FDEQ_BIN_16
|
607 0x1021 //TX_FDEQ_BIN_16
|
||||||
608 0x1000 //TX_FDEQ_BIN_17
|
608 0x1000 //TX_FDEQ_BIN_17
|
||||||
609 0x0000 //TX_FDEQ_BIN_18
|
609 0x0000 //TX_FDEQ_BIN_18
|
||||||
|
@ -62860,7 +62860,7 @@
|
||||||
863 0x199A //TX_TDDRC_HMNC_GAIN
|
863 0x199A //TX_TDDRC_HMNC_GAIN
|
||||||
864 0x0000 //TX_TDDRC_SMT_FLAG
|
864 0x0000 //TX_TDDRC_SMT_FLAG
|
||||||
865 0x0CCD //TX_TDDRC_SMT_W
|
865 0x0CCD //TX_TDDRC_SMT_W
|
||||||
866 0x0A5A //TX_TDDRC_DRC_GAIN
|
866 0x09C6 //TX_TDDRC_DRC_GAIN
|
||||||
867 0x7FFF //TX_TDDRC_LMT_THRD
|
867 0x7FFF //TX_TDDRC_LMT_THRD
|
||||||
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
868 0x0000 //TX_TDDRC_LMT_ALPHA
|
||||||
869 0x0000 //TX_TFMASKLTH
|
869 0x0000 //TX_TFMASKLTH
|
||||||
|
|
Binary file not shown.
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Binary file not shown.
|
@ -3,7 +3,7 @@
|
||||||
#EXPORT_FLAG HANDSET
|
#EXPORT_FLAG HANDSET
|
||||||
#PARAM_MODE FULL
|
#PARAM_MODE FULL
|
||||||
#SAVE_MODE 3
|
#SAVE_MODE 3
|
||||||
#SAVE_TIME 2024-03-22 15:49:26
|
#SAVE_TIME 2024-04-02 17:05:18
|
||||||
|
|
||||||
#CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-NB
|
#CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-NB
|
||||||
#PARAM_TYPE TX+2RX
|
#PARAM_TYPE TX+2RX
|
||||||
|
@ -3713,10 +3713,10 @@
|
||||||
17 0x0003 //RX_SBD_PITCH_DET
|
17 0x0003 //RX_SBD_PITCH_DET
|
||||||
18 0x0100 //RX_PP_RESRV_0
|
18 0x0100 //RX_PP_RESRV_0
|
||||||
19 0x0020 //RX_PP_RESRV_1
|
19 0x0020 //RX_PP_RESRV_1
|
||||||
20 0x0400 //RX_N_SN_EST
|
20 0x0600 //RX_N_SN_EST
|
||||||
21 0x000C //RX_N2_SN_EST
|
21 0x000C //RX_N2_SN_EST
|
||||||
22 0x000F //RX_NS_LVL_CTRL
|
22 0x0009 //RX_NS_LVL_CTRL
|
||||||
23 0xF800 //RX_THR_SN_EST
|
23 0x0100 //RX_THR_SN_EST
|
||||||
24 0x7CCD //RX_LAMBDA_PFILT
|
24 0x7CCD //RX_LAMBDA_PFILT
|
||||||
25 0x000A //RX_MUTE_PERIOD
|
25 0x000A //RX_MUTE_PERIOD
|
||||||
26 0x0190 //RX_FADE_IN_PERIOD
|
26 0x0190 //RX_FADE_IN_PERIOD
|
||||||
|
@ -14493,10 +14493,10 @@
|
||||||
17 0x0003 //RX_SBD_PITCH_DET
|
17 0x0003 //RX_SBD_PITCH_DET
|
||||||
18 0x0100 //RX_PP_RESRV_0
|
18 0x0100 //RX_PP_RESRV_0
|
||||||
19 0x0020 //RX_PP_RESRV_1
|
19 0x0020 //RX_PP_RESRV_1
|
||||||
20 0x0400 //RX_N_SN_EST
|
20 0x0600 //RX_N_SN_EST
|
||||||
21 0x000C //RX_N2_SN_EST
|
21 0x000C //RX_N2_SN_EST
|
||||||
22 0x000F //RX_NS_LVL_CTRL
|
22 0x0009 //RX_NS_LVL_CTRL
|
||||||
23 0xF800 //RX_THR_SN_EST
|
23 0x0100 //RX_THR_SN_EST
|
||||||
24 0x7CCD //RX_LAMBDA_PFILT
|
24 0x7CCD //RX_LAMBDA_PFILT
|
||||||
25 0x000A //RX_MUTE_PERIOD
|
25 0x000A //RX_MUTE_PERIOD
|
||||||
26 0x0190 //RX_FADE_IN_PERIOD
|
26 0x0190 //RX_FADE_IN_PERIOD
|
||||||
|
|
Binary file not shown.
File diff suppressed because it is too large
Load diff
Binary file not shown.
File diff suppressed because it is too large
Load diff
Binary file not shown.
|
@ -3,7 +3,7 @@
|
||||||
#EXPORT_FLAG BLUETOOTH
|
#EXPORT_FLAG BLUETOOTH
|
||||||
#PARAM_MODE FULL
|
#PARAM_MODE FULL
|
||||||
#SAVE_MODE 3
|
#SAVE_MODE 3
|
||||||
#SAVE_TIME 2024-03-22 17:40:29
|
#SAVE_TIME 2024-04-02 17:22:49
|
||||||
|
|
||||||
#CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-NB
|
#CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-NB
|
||||||
#PARAM_TYPE TX+2RX
|
#PARAM_TYPE TX+2RX
|
||||||
|
@ -2708,7 +2708,7 @@
|
||||||
1 0x0001 //TX_OPERATION_MODE_1
|
1 0x0001 //TX_OPERATION_MODE_1
|
||||||
2 0x00BB //TX_PATCH_REG
|
2 0x00BB //TX_PATCH_REG
|
||||||
3 0x6F7C //TX_SENDFUNC_MODE_0
|
3 0x6F7C //TX_SENDFUNC_MODE_0
|
||||||
4 0x0000 //TX_SENDFUNC_MODE_1
|
4 0x0080 //TX_SENDFUNC_MODE_1
|
||||||
5 0x0003 //TX_NUM_MIC
|
5 0x0003 //TX_NUM_MIC
|
||||||
6 0x0001 //TX_SAMPLINGFREQ_SIG
|
6 0x0001 //TX_SAMPLINGFREQ_SIG
|
||||||
7 0x0001 //TX_SAMPLINGFREQ_PROC
|
7 0x0001 //TX_SAMPLINGFREQ_PROC
|
||||||
|
@ -2949,18 +2949,18 @@
|
||||||
242 0xF800 //TX_THR_SN_EST_0
|
242 0xF800 //TX_THR_SN_EST_0
|
||||||
243 0x1200 //TX_THR_SN_EST_1
|
243 0x1200 //TX_THR_SN_EST_1
|
||||||
244 0x1000 //TX_THR_SN_EST_2
|
244 0x1000 //TX_THR_SN_EST_2
|
||||||
245 0x1000 //TX_THR_SN_EST_3
|
245 0xF600 //TX_THR_SN_EST_3
|
||||||
246 0xFA00 //TX_THR_SN_EST_4
|
246 0xFA00 //TX_THR_SN_EST_4
|
||||||
247 0xFA00 //TX_THR_SN_EST_5
|
247 0xFA00 //TX_THR_SN_EST_5
|
||||||
248 0xF000 //TX_THR_SN_EST_6
|
248 0xF600 //TX_THR_SN_EST_6
|
||||||
249 0xF800 //TX_THR_SN_EST_7
|
249 0xF800 //TX_THR_SN_EST_7
|
||||||
250 0x0100 //TX_DELTA_THR_SN_EST_0
|
250 0x0100 //TX_DELTA_THR_SN_EST_0
|
||||||
251 0xFB00 //TX_DELTA_THR_SN_EST_1
|
251 0xFB00 //TX_DELTA_THR_SN_EST_1
|
||||||
252 0xFD00 //TX_DELTA_THR_SN_EST_2
|
252 0xFD00 //TX_DELTA_THR_SN_EST_2
|
||||||
253 0xFD00 //TX_DELTA_THR_SN_EST_3
|
253 0xFB00 //TX_DELTA_THR_SN_EST_3
|
||||||
254 0x0100 //TX_DELTA_THR_SN_EST_4
|
254 0x0100 //TX_DELTA_THR_SN_EST_4
|
||||||
255 0x0200 //TX_DELTA_THR_SN_EST_5
|
255 0x0200 //TX_DELTA_THR_SN_EST_5
|
||||||
256 0x0700 //TX_DELTA_THR_SN_EST_6
|
256 0x0300 //TX_DELTA_THR_SN_EST_6
|
||||||
257 0x0200 //TX_DELTA_THR_SN_EST_7
|
257 0x0200 //TX_DELTA_THR_SN_EST_7
|
||||||
258 0x4000 //TX_LAMBDA_NN_EST_0
|
258 0x4000 //TX_LAMBDA_NN_EST_0
|
||||||
259 0x3FFF //TX_LAMBDA_NN_EST_1
|
259 0x3FFF //TX_LAMBDA_NN_EST_1
|
||||||
|
@ -2968,7 +2968,7 @@
|
||||||
261 0x3FFF //TX_LAMBDA_NN_EST_3
|
261 0x3FFF //TX_LAMBDA_NN_EST_3
|
||||||
262 0x4000 //TX_LAMBDA_NN_EST_4
|
262 0x4000 //TX_LAMBDA_NN_EST_4
|
||||||
263 0x4000 //TX_LAMBDA_NN_EST_5
|
263 0x4000 //TX_LAMBDA_NN_EST_5
|
||||||
264 0x4FFE //TX_LAMBDA_NN_EST_6
|
264 0x3FFF //TX_LAMBDA_NN_EST_6
|
||||||
265 0x4000 //TX_LAMBDA_NN_EST_7
|
265 0x4000 //TX_LAMBDA_NN_EST_7
|
||||||
266 0x0400 //TX_N_SN_EST
|
266 0x0400 //TX_N_SN_EST
|
||||||
267 0x001C //TX_INBEAM_T
|
267 0x001C //TX_INBEAM_T
|
||||||
|
@ -2988,18 +2988,18 @@
|
||||||
281 0x0010 //TX_NS_LVL_CTRL_0
|
281 0x0010 //TX_NS_LVL_CTRL_0
|
||||||
282 0x0008 //TX_NS_LVL_CTRL_1
|
282 0x0008 //TX_NS_LVL_CTRL_1
|
||||||
283 0x0020 //TX_NS_LVL_CTRL_2
|
283 0x0020 //TX_NS_LVL_CTRL_2
|
||||||
284 0x000C //TX_NS_LVL_CTRL_3
|
284 0x0010 //TX_NS_LVL_CTRL_3
|
||||||
285 0x0014 //TX_NS_LVL_CTRL_4
|
285 0x0014 //TX_NS_LVL_CTRL_4
|
||||||
286 0x0011 //TX_NS_LVL_CTRL_5
|
286 0x0011 //TX_NS_LVL_CTRL_5
|
||||||
287 0x0008 //TX_NS_LVL_CTRL_6
|
287 0x0024 //TX_NS_LVL_CTRL_6
|
||||||
288 0x0011 //TX_NS_LVL_CTRL_7
|
288 0x0011 //TX_NS_LVL_CTRL_7
|
||||||
289 0x001C //TX_MIN_GAIN_S_0
|
289 0x001C //TX_MIN_GAIN_S_0
|
||||||
290 0x0018 //TX_MIN_GAIN_S_1
|
290 0x0018 //TX_MIN_GAIN_S_1
|
||||||
291 0x0008 //TX_MIN_GAIN_S_2
|
291 0x0008 //TX_MIN_GAIN_S_2
|
||||||
292 0x0024 //TX_MIN_GAIN_S_3
|
292 0x0008 //TX_MIN_GAIN_S_3
|
||||||
293 0x0010 //TX_MIN_GAIN_S_4
|
293 0x0010 //TX_MIN_GAIN_S_4
|
||||||
294 0x0010 //TX_MIN_GAIN_S_5
|
294 0x0010 //TX_MIN_GAIN_S_5
|
||||||
295 0x0028 //TX_MIN_GAIN_S_6
|
295 0x001C //TX_MIN_GAIN_S_6
|
||||||
296 0x000F //TX_MIN_GAIN_S_7
|
296 0x000F //TX_MIN_GAIN_S_7
|
||||||
297 0x4FFD //TX_NMOS_SUP
|
297 0x4FFD //TX_NMOS_SUP
|
||||||
298 0x0000 //TX_NS_MAX_PRI_SNR_TH
|
298 0x0000 //TX_NS_MAX_PRI_SNR_TH
|
||||||
|
@ -3007,10 +3007,10 @@
|
||||||
300 0x7FFF //TX_SNRI_SUP_0
|
300 0x7FFF //TX_SNRI_SUP_0
|
||||||
301 0x2FFC //TX_SNRI_SUP_1
|
301 0x2FFC //TX_SNRI_SUP_1
|
||||||
302 0x4FF8 //TX_SNRI_SUP_2
|
302 0x4FF8 //TX_SNRI_SUP_2
|
||||||
303 0x1000 //TX_SNRI_SUP_3
|
303 0x47FF //TX_SNRI_SUP_3
|
||||||
304 0x4000 //TX_SNRI_SUP_4
|
304 0x4000 //TX_SNRI_SUP_4
|
||||||
305 0x50C0 //TX_SNRI_SUP_5
|
305 0x50C0 //TX_SNRI_SUP_5
|
||||||
306 0x77F3 //TX_SNRI_SUP_6
|
306 0x7FF8 //TX_SNRI_SUP_6
|
||||||
307 0x7FFF //TX_SNRI_SUP_7
|
307 0x7FFF //TX_SNRI_SUP_7
|
||||||
308 0x7FFF //TX_THR_LFNS
|
308 0x7FFF //TX_THR_LFNS
|
||||||
309 0x001C //TX_G_LFNS
|
309 0x001C //TX_G_LFNS
|
||||||
|
@ -3021,32 +3021,32 @@
|
||||||
314 0x5000 //TX_A_POST_FILT_S_0
|
314 0x5000 //TX_A_POST_FILT_S_0
|
||||||
315 0x47F9 //TX_A_POST_FILT_S_1
|
315 0x47F9 //TX_A_POST_FILT_S_1
|
||||||
316 0x37FB //TX_A_POST_FILT_S_2
|
316 0x37FB //TX_A_POST_FILT_S_2
|
||||||
317 0x2FFC //TX_A_POST_FILT_S_3
|
317 0x67F5 //TX_A_POST_FILT_S_3
|
||||||
318 0x4000 //TX_A_POST_FILT_S_4
|
318 0x4000 //TX_A_POST_FILT_S_4
|
||||||
319 0x5000 //TX_A_POST_FILT_S_5
|
319 0x5000 //TX_A_POST_FILT_S_5
|
||||||
320 0x27FD //TX_A_POST_FILT_S_6
|
320 0x7FF2 //TX_A_POST_FILT_S_6
|
||||||
321 0x7000 //TX_A_POST_FILT_S_7
|
321 0x7000 //TX_A_POST_FILT_S_7
|
||||||
322 0x2000 //TX_B_POST_FILT_0
|
322 0x2000 //TX_B_POST_FILT_0
|
||||||
323 0x2FFB //TX_B_POST_FILT_1
|
323 0x2FFB //TX_B_POST_FILT_1
|
||||||
324 0x27FC //TX_B_POST_FILT_2
|
324 0x27FC //TX_B_POST_FILT_2
|
||||||
325 0x2FFB //TX_B_POST_FILT_3
|
325 0x47F8 //TX_B_POST_FILT_3
|
||||||
326 0x4000 //TX_B_POST_FILT_4
|
326 0x4000 //TX_B_POST_FILT_4
|
||||||
327 0x1000 //TX_B_POST_FILT_5
|
327 0x1000 //TX_B_POST_FILT_5
|
||||||
328 0x0800 //TX_B_POST_FILT_6
|
328 0x5FF5 //TX_B_POST_FILT_6
|
||||||
329 0x2000 //TX_B_POST_FILT_7
|
329 0x2000 //TX_B_POST_FILT_7
|
||||||
330 0x4000 //TX_B_LESSCUT_RTO_S_0
|
330 0x4000 //TX_B_LESSCUT_RTO_S_0
|
||||||
331 0x5FFC //TX_B_LESSCUT_RTO_S_1
|
331 0x5FFC //TX_B_LESSCUT_RTO_S_1
|
||||||
332 0x4000 //TX_B_LESSCUT_RTO_S_2
|
332 0x4000 //TX_B_LESSCUT_RTO_S_2
|
||||||
333 0x4000 //TX_B_LESSCUT_RTO_S_3
|
333 0x4FFE //TX_B_LESSCUT_RTO_S_3
|
||||||
334 0x7FFF //TX_B_LESSCUT_RTO_S_4
|
334 0x7FFF //TX_B_LESSCUT_RTO_S_4
|
||||||
335 0x6000 //TX_B_LESSCUT_RTO_S_5
|
335 0x6000 //TX_B_LESSCUT_RTO_S_5
|
||||||
336 0x4FFE //TX_B_LESSCUT_RTO_S_6
|
336 0x77F9 //TX_B_LESSCUT_RTO_S_6
|
||||||
337 0x7FFF //TX_B_LESSCUT_RTO_S_7
|
337 0x7FFF //TX_B_LESSCUT_RTO_S_7
|
||||||
338 0x7C00 //TX_LAMBDA_PFILT
|
338 0x7C00 //TX_LAMBDA_PFILT
|
||||||
339 0x7C00 //TX_LAMBDA_PFILT_S_0
|
339 0x7C00 //TX_LAMBDA_PFILT_S_0
|
||||||
340 0x7FF0 //TX_LAMBDA_PFILT_S_1
|
340 0x7FF0 //TX_LAMBDA_PFILT_S_1
|
||||||
341 0x72FD //TX_LAMBDA_PFILT_S_2
|
341 0x72FD //TX_LAMBDA_PFILT_S_2
|
||||||
342 0x78F7 //TX_LAMBDA_PFILT_S_3
|
342 0x7EF1 //TX_LAMBDA_PFILT_S_3
|
||||||
343 0x7C00 //TX_LAMBDA_PFILT_S_4
|
343 0x7C00 //TX_LAMBDA_PFILT_S_4
|
||||||
344 0x7C00 //TX_LAMBDA_PFILT_S_5
|
344 0x7C00 //TX_LAMBDA_PFILT_S_5
|
||||||
345 0x7BF4 //TX_LAMBDA_PFILT_S_6
|
345 0x7BF4 //TX_LAMBDA_PFILT_S_6
|
||||||
|
@ -3094,14 +3094,14 @@
|
||||||
387 0x019A //TX_OUT_ENER_TH_NOISE
|
387 0x019A //TX_OUT_ENER_TH_NOISE
|
||||||
388 0x0333 //TX_OUT_ENER_TH_SPEECH
|
388 0x0333 //TX_OUT_ENER_TH_SPEECH
|
||||||
389 0x2000 //TX_SN_NPB_GAIN
|
389 0x2000 //TX_SN_NPB_GAIN
|
||||||
390 0x0000 //TX_NN_NPB_GAIN
|
390 0x1200 //TX_NN_NPB_GAIN
|
||||||
391 0x7FFF //TX_POST_MASK_SUP_HSNE
|
391 0x7FFF //TX_POST_MASK_SUP_HSNE
|
||||||
392 0x7FFF //TX_TAIL_DET_TH
|
392 0x7FFF //TX_TAIL_DET_TH
|
||||||
393 0x4000 //TX_B_LESSCUT_RTO_WTA
|
393 0x4000 //TX_B_LESSCUT_RTO_WTA
|
||||||
394 0x0000 //TX_MEL_G_R
|
394 0x0000 //TX_MEL_G_R
|
||||||
395 0x0080 //TX_SUPHIGH_TH
|
395 0x0080 //TX_SUPHIGH_TH
|
||||||
396 0x3000 //TX_MASK_G_R
|
396 0x3000 //TX_MASK_G_R
|
||||||
397 0x8001 //TX_LOGSNR_THR
|
397 0x0082 //TX_LOGSNR_THR
|
||||||
398 0x0000 //TX_C_POST_FLT_MASK
|
398 0x0000 //TX_C_POST_FLT_MASK
|
||||||
399 0x4000 //TX_A_POST_FLT_WNS
|
399 0x4000 //TX_A_POST_FLT_WNS
|
||||||
400 0x0148 //TX_MIN_G_LOW300HZ
|
400 0x0148 //TX_MIN_G_LOW300HZ
|
||||||
|
@ -3253,9 +3253,9 @@
|
||||||
546 0x59D8 //TX_WNS_SAT_TH
|
546 0x59D8 //TX_WNS_SAT_TH
|
||||||
547 0x0000 //TX_ABSM_WNS_TH
|
547 0x0000 //TX_ABSM_WNS_TH
|
||||||
548 0x0000 //TX_WNS_RESRV_3
|
548 0x0000 //TX_WNS_RESRV_3
|
||||||
549 0x0000 //TX_WNS_RESRV_4
|
549 0x4000 //TX_WNS_RESRV_4
|
||||||
550 0x0000 //TX_WNS_RESRV_5
|
550 0x7FFF //TX_WNS_RESRV_5
|
||||||
551 0x0000 //TX_WNS_RESRV_6
|
551 0x0100 //TX_WNS_RESRV_6
|
||||||
552 0x0000 //TX_BVE_NOISE_FLOOR_0
|
552 0x0000 //TX_BVE_NOISE_FLOOR_0
|
||||||
553 0x0070 //TX_BVE_NOISE_FLOOR_1
|
553 0x0070 //TX_BVE_NOISE_FLOOR_1
|
||||||
554 0x0070 //TX_BVE_NOISE_FLOOR_2
|
554 0x0070 //TX_BVE_NOISE_FLOOR_2
|
||||||
|
@ -3657,8 +3657,8 @@
|
||||||
950 0x0120 //TX_SDPCRN_GAIN
|
950 0x0120 //TX_SDPCRN_GAIN
|
||||||
951 0x7333 //TX_EASSA_CUT_GAINTH
|
951 0x7333 //TX_EASSA_CUT_GAINTH
|
||||||
952 0x0002 //TX_DT_HARME_ENDF
|
952 0x0002 //TX_DT_HARME_ENDF
|
||||||
953 0x77E3 //TX_NSSAMASK_MORENS
|
953 0x0BFE //TX_NSSAMASK_MORENS
|
||||||
954 0x0300 //TX_CGMMMASK_MORENS
|
954 0x5D00 //TX_CGMMMASK_MORENS
|
||||||
955 0x0CCD //TX_DPCRN_MASK_MORENS_ECHO
|
955 0x0CCD //TX_DPCRN_MASK_MORENS_ECHO
|
||||||
956 0x0028 //TX_PRE_EASSAMASK_SUP
|
956 0x0028 //TX_PRE_EASSAMASK_SUP
|
||||||
957 0x6FE5 //TX_NSSAMASK_MORENS_TYPE1
|
957 0x6FE5 //TX_NSSAMASK_MORENS_TYPE1
|
||||||
|
@ -3715,8 +3715,8 @@
|
||||||
19 0x0020 //RX_PP_RESRV_1
|
19 0x0020 //RX_PP_RESRV_1
|
||||||
20 0x0600 //RX_N_SN_EST
|
20 0x0600 //RX_N_SN_EST
|
||||||
21 0x000C //RX_N2_SN_EST
|
21 0x000C //RX_N2_SN_EST
|
||||||
22 0x0010 //RX_NS_LVL_CTRL
|
22 0x0009 //RX_NS_LVL_CTRL
|
||||||
23 0xF800 //RX_THR_SN_EST
|
23 0x0100 //RX_THR_SN_EST
|
||||||
24 0x7CCD //RX_LAMBDA_PFILT
|
24 0x7CCD //RX_LAMBDA_PFILT
|
||||||
25 0x000A //RX_MUTE_PERIOD
|
25 0x000A //RX_MUTE_PERIOD
|
||||||
26 0x0190 //RX_FADE_IN_PERIOD
|
26 0x0190 //RX_FADE_IN_PERIOD
|
||||||
|
@ -3855,14 +3855,14 @@
|
||||||
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
27 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
112 0x0000 //RX_TDDRC_THRD_0
|
112 0x000F //RX_TDDRC_THRD_0
|
||||||
113 0x0000 //RX_TDDRC_THRD_1
|
113 0x0040 //RX_TDDRC_THRD_1
|
||||||
114 0x7FFF //RX_TDDRC_THRD_2
|
114 0x7FFF //RX_TDDRC_THRD_2
|
||||||
115 0x7FFF //RX_TDDRC_THRD_3
|
115 0x7FFF //RX_TDDRC_THRD_3
|
||||||
116 0x7E70 //RX_TDDRC_SLANT_0
|
116 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -3954,14 +3954,14 @@
|
||||||
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
27 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
112 0x0000 //RX_TDDRC_THRD_0
|
112 0x000F //RX_TDDRC_THRD_0
|
||||||
113 0x0000 //RX_TDDRC_THRD_1
|
113 0x0040 //RX_TDDRC_THRD_1
|
||||||
114 0x7FFF //RX_TDDRC_THRD_2
|
114 0x7FFF //RX_TDDRC_THRD_2
|
||||||
115 0x7FFF //RX_TDDRC_THRD_3
|
115 0x7FFF //RX_TDDRC_THRD_3
|
||||||
116 0x7E70 //RX_TDDRC_SLANT_0
|
116 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -4053,14 +4053,14 @@
|
||||||
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
27 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
112 0x0000 //RX_TDDRC_THRD_0
|
112 0x000F //RX_TDDRC_THRD_0
|
||||||
113 0x0000 //RX_TDDRC_THRD_1
|
113 0x0040 //RX_TDDRC_THRD_1
|
||||||
114 0x7FFF //RX_TDDRC_THRD_2
|
114 0x7FFF //RX_TDDRC_THRD_2
|
||||||
115 0x7FFF //RX_TDDRC_THRD_3
|
115 0x7FFF //RX_TDDRC_THRD_3
|
||||||
116 0x7E70 //RX_TDDRC_SLANT_0
|
116 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -4152,14 +4152,14 @@
|
||||||
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
27 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
112 0x0000 //RX_TDDRC_THRD_0
|
112 0x000F //RX_TDDRC_THRD_0
|
||||||
113 0x0000 //RX_TDDRC_THRD_1
|
113 0x0040 //RX_TDDRC_THRD_1
|
||||||
114 0x7FFF //RX_TDDRC_THRD_2
|
114 0x7FFF //RX_TDDRC_THRD_2
|
||||||
115 0x7FFF //RX_TDDRC_THRD_3
|
115 0x7FFF //RX_TDDRC_THRD_3
|
||||||
116 0x7E70 //RX_TDDRC_SLANT_0
|
116 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -4251,14 +4251,14 @@
|
||||||
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
27 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
112 0x0000 //RX_TDDRC_THRD_0
|
112 0x000F //RX_TDDRC_THRD_0
|
||||||
113 0x0000 //RX_TDDRC_THRD_1
|
113 0x0040 //RX_TDDRC_THRD_1
|
||||||
114 0x7FFF //RX_TDDRC_THRD_2
|
114 0x7FFF //RX_TDDRC_THRD_2
|
||||||
115 0x7FFF //RX_TDDRC_THRD_3
|
115 0x7FFF //RX_TDDRC_THRD_3
|
||||||
116 0x7E70 //RX_TDDRC_SLANT_0
|
116 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -4350,14 +4350,14 @@
|
||||||
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
27 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
112 0x0000 //RX_TDDRC_THRD_0
|
112 0x000F //RX_TDDRC_THRD_0
|
||||||
113 0x0000 //RX_TDDRC_THRD_1
|
113 0x0040 //RX_TDDRC_THRD_1
|
||||||
114 0x7FFF //RX_TDDRC_THRD_2
|
114 0x7FFF //RX_TDDRC_THRD_2
|
||||||
115 0x7FFF //RX_TDDRC_THRD_3
|
115 0x7FFF //RX_TDDRC_THRD_3
|
||||||
116 0x7E70 //RX_TDDRC_SLANT_0
|
116 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -4449,14 +4449,14 @@
|
||||||
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
27 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
112 0x0000 //RX_TDDRC_THRD_0
|
112 0x000F //RX_TDDRC_THRD_0
|
||||||
113 0x0000 //RX_TDDRC_THRD_1
|
113 0x0040 //RX_TDDRC_THRD_1
|
||||||
114 0x7FFF //RX_TDDRC_THRD_2
|
114 0x7FFF //RX_TDDRC_THRD_2
|
||||||
115 0x7FFF //RX_TDDRC_THRD_3
|
115 0x7FFF //RX_TDDRC_THRD_3
|
||||||
116 0x7E70 //RX_TDDRC_SLANT_0
|
116 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -4566,8 +4566,8 @@
|
||||||
176 0x0020 //RX_PP_RESRV_1
|
176 0x0020 //RX_PP_RESRV_1
|
||||||
177 0x0600 //RX_N_SN_EST
|
177 0x0600 //RX_N_SN_EST
|
||||||
178 0x000C //RX_N2_SN_EST
|
178 0x000C //RX_N2_SN_EST
|
||||||
179 0x0010 //RX_NS_LVL_CTRL
|
179 0x0009 //RX_NS_LVL_CTRL
|
||||||
180 0xF800 //RX_THR_SN_EST
|
180 0x0100 //RX_THR_SN_EST
|
||||||
181 0x7CCD //RX_LAMBDA_PFILT
|
181 0x7CCD //RX_LAMBDA_PFILT
|
||||||
182 0x000A //RX_MUTE_PERIOD
|
182 0x000A //RX_MUTE_PERIOD
|
||||||
183 0x0190 //RX_FADE_IN_PERIOD
|
183 0x0190 //RX_FADE_IN_PERIOD
|
||||||
|
@ -4706,14 +4706,14 @@
|
||||||
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
184 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0000 //RX_TDDRC_THRD_0
|
269 0x000F //RX_TDDRC_THRD_0
|
||||||
270 0x0000 //RX_TDDRC_THRD_1
|
270 0x0040 //RX_TDDRC_THRD_1
|
||||||
271 0x7FFF //RX_TDDRC_THRD_2
|
271 0x7FFF //RX_TDDRC_THRD_2
|
||||||
272 0x7FFF //RX_TDDRC_THRD_3
|
272 0x7FFF //RX_TDDRC_THRD_3
|
||||||
273 0x7E70 //RX_TDDRC_SLANT_0
|
273 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -4805,14 +4805,14 @@
|
||||||
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
184 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0000 //RX_TDDRC_THRD_0
|
269 0x000F //RX_TDDRC_THRD_0
|
||||||
270 0x0000 //RX_TDDRC_THRD_1
|
270 0x0040 //RX_TDDRC_THRD_1
|
||||||
271 0x7FFF //RX_TDDRC_THRD_2
|
271 0x7FFF //RX_TDDRC_THRD_2
|
||||||
272 0x7FFF //RX_TDDRC_THRD_3
|
272 0x7FFF //RX_TDDRC_THRD_3
|
||||||
273 0x7E70 //RX_TDDRC_SLANT_0
|
273 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -4904,14 +4904,14 @@
|
||||||
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
184 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0000 //RX_TDDRC_THRD_0
|
269 0x000F //RX_TDDRC_THRD_0
|
||||||
270 0x0000 //RX_TDDRC_THRD_1
|
270 0x0040 //RX_TDDRC_THRD_1
|
||||||
271 0x7FFF //RX_TDDRC_THRD_2
|
271 0x7FFF //RX_TDDRC_THRD_2
|
||||||
272 0x7FFF //RX_TDDRC_THRD_3
|
272 0x7FFF //RX_TDDRC_THRD_3
|
||||||
273 0x7E70 //RX_TDDRC_SLANT_0
|
273 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -5003,14 +5003,14 @@
|
||||||
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
184 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0000 //RX_TDDRC_THRD_0
|
269 0x000F //RX_TDDRC_THRD_0
|
||||||
270 0x0000 //RX_TDDRC_THRD_1
|
270 0x0040 //RX_TDDRC_THRD_1
|
||||||
271 0x7FFF //RX_TDDRC_THRD_2
|
271 0x7FFF //RX_TDDRC_THRD_2
|
||||||
272 0x7FFF //RX_TDDRC_THRD_3
|
272 0x7FFF //RX_TDDRC_THRD_3
|
||||||
273 0x7E70 //RX_TDDRC_SLANT_0
|
273 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -5102,14 +5102,14 @@
|
||||||
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
184 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0000 //RX_TDDRC_THRD_0
|
269 0x000F //RX_TDDRC_THRD_0
|
||||||
270 0x0000 //RX_TDDRC_THRD_1
|
270 0x0040 //RX_TDDRC_THRD_1
|
||||||
271 0x7FFF //RX_TDDRC_THRD_2
|
271 0x7FFF //RX_TDDRC_THRD_2
|
||||||
272 0x7FFF //RX_TDDRC_THRD_3
|
272 0x7FFF //RX_TDDRC_THRD_3
|
||||||
273 0x7E70 //RX_TDDRC_SLANT_0
|
273 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -5201,14 +5201,14 @@
|
||||||
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
184 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0000 //RX_TDDRC_THRD_0
|
269 0x000F //RX_TDDRC_THRD_0
|
||||||
270 0x0000 //RX_TDDRC_THRD_1
|
270 0x0040 //RX_TDDRC_THRD_1
|
||||||
271 0x7FFF //RX_TDDRC_THRD_2
|
271 0x7FFF //RX_TDDRC_THRD_2
|
||||||
272 0x7FFF //RX_TDDRC_THRD_3
|
272 0x7FFF //RX_TDDRC_THRD_3
|
||||||
273 0x7E70 //RX_TDDRC_SLANT_0
|
273 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -5300,14 +5300,14 @@
|
||||||
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
184 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0000 //RX_TDDRC_THRD_0
|
269 0x000F //RX_TDDRC_THRD_0
|
||||||
270 0x0000 //RX_TDDRC_THRD_1
|
270 0x0040 //RX_TDDRC_THRD_1
|
||||||
271 0x7FFF //RX_TDDRC_THRD_2
|
271 0x7FFF //RX_TDDRC_THRD_2
|
||||||
272 0x7FFF //RX_TDDRC_THRD_3
|
272 0x7FFF //RX_TDDRC_THRD_3
|
||||||
273 0x7E70 //RX_TDDRC_SLANT_0
|
273 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -44140,8 +44140,8 @@
|
||||||
19 0x0020 //RX_PP_RESRV_1
|
19 0x0020 //RX_PP_RESRV_1
|
||||||
20 0x0600 //RX_N_SN_EST
|
20 0x0600 //RX_N_SN_EST
|
||||||
21 0x000C //RX_N2_SN_EST
|
21 0x000C //RX_N2_SN_EST
|
||||||
22 0x000F //RX_NS_LVL_CTRL
|
22 0x0009 //RX_NS_LVL_CTRL
|
||||||
23 0xF800 //RX_THR_SN_EST
|
23 0x0100 //RX_THR_SN_EST
|
||||||
24 0x7CCD //RX_LAMBDA_PFILT
|
24 0x7CCD //RX_LAMBDA_PFILT
|
||||||
25 0x000A //RX_MUTE_PERIOD
|
25 0x000A //RX_MUTE_PERIOD
|
||||||
26 0x0190 //RX_FADE_IN_PERIOD
|
26 0x0190 //RX_FADE_IN_PERIOD
|
||||||
|
@ -44280,14 +44280,14 @@
|
||||||
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
27 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
112 0x0001 //RX_TDDRC_THRD_0
|
112 0x000F //RX_TDDRC_THRD_0
|
||||||
113 0x0001 //RX_TDDRC_THRD_1
|
113 0x0040 //RX_TDDRC_THRD_1
|
||||||
114 0x7FFF //RX_TDDRC_THRD_2
|
114 0x7FFF //RX_TDDRC_THRD_2
|
||||||
115 0x7FFF //RX_TDDRC_THRD_3
|
115 0x7FFF //RX_TDDRC_THRD_3
|
||||||
116 0x7E70 //RX_TDDRC_SLANT_0
|
116 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -44379,14 +44379,14 @@
|
||||||
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
27 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
112 0x0001 //RX_TDDRC_THRD_0
|
112 0x000F //RX_TDDRC_THRD_0
|
||||||
113 0x0001 //RX_TDDRC_THRD_1
|
113 0x0040 //RX_TDDRC_THRD_1
|
||||||
114 0x7FFF //RX_TDDRC_THRD_2
|
114 0x7FFF //RX_TDDRC_THRD_2
|
||||||
115 0x7FFF //RX_TDDRC_THRD_3
|
115 0x7FFF //RX_TDDRC_THRD_3
|
||||||
116 0x7E70 //RX_TDDRC_SLANT_0
|
116 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -44478,14 +44478,14 @@
|
||||||
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
27 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
112 0x0001 //RX_TDDRC_THRD_0
|
112 0x000F //RX_TDDRC_THRD_0
|
||||||
113 0x0001 //RX_TDDRC_THRD_1
|
113 0x0040 //RX_TDDRC_THRD_1
|
||||||
114 0x7FFF //RX_TDDRC_THRD_2
|
114 0x7FFF //RX_TDDRC_THRD_2
|
||||||
115 0x7FFF //RX_TDDRC_THRD_3
|
115 0x7FFF //RX_TDDRC_THRD_3
|
||||||
116 0x7E70 //RX_TDDRC_SLANT_0
|
116 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -44577,14 +44577,14 @@
|
||||||
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
27 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
112 0x0001 //RX_TDDRC_THRD_0
|
112 0x000F //RX_TDDRC_THRD_0
|
||||||
113 0x0001 //RX_TDDRC_THRD_1
|
113 0x0040 //RX_TDDRC_THRD_1
|
||||||
114 0x7FFF //RX_TDDRC_THRD_2
|
114 0x7FFF //RX_TDDRC_THRD_2
|
||||||
115 0x7FFF //RX_TDDRC_THRD_3
|
115 0x7FFF //RX_TDDRC_THRD_3
|
||||||
116 0x7E70 //RX_TDDRC_SLANT_0
|
116 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -44676,14 +44676,14 @@
|
||||||
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
27 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
112 0x0001 //RX_TDDRC_THRD_0
|
112 0x000F //RX_TDDRC_THRD_0
|
||||||
113 0x0001 //RX_TDDRC_THRD_1
|
113 0x0040 //RX_TDDRC_THRD_1
|
||||||
114 0x7FFF //RX_TDDRC_THRD_2
|
114 0x7FFF //RX_TDDRC_THRD_2
|
||||||
115 0x7FFF //RX_TDDRC_THRD_3
|
115 0x7FFF //RX_TDDRC_THRD_3
|
||||||
116 0x7E70 //RX_TDDRC_SLANT_0
|
116 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -44775,14 +44775,14 @@
|
||||||
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
27 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
112 0x0001 //RX_TDDRC_THRD_0
|
112 0x000F //RX_TDDRC_THRD_0
|
||||||
113 0x0001 //RX_TDDRC_THRD_1
|
113 0x0040 //RX_TDDRC_THRD_1
|
||||||
114 0x7FFF //RX_TDDRC_THRD_2
|
114 0x7FFF //RX_TDDRC_THRD_2
|
||||||
115 0x7FFF //RX_TDDRC_THRD_3
|
115 0x7FFF //RX_TDDRC_THRD_3
|
||||||
116 0x7E70 //RX_TDDRC_SLANT_0
|
116 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -44874,14 +44874,14 @@
|
||||||
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
27 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
112 0x0001 //RX_TDDRC_THRD_0
|
112 0x000F //RX_TDDRC_THRD_0
|
||||||
113 0x0001 //RX_TDDRC_THRD_1
|
113 0x0040 //RX_TDDRC_THRD_1
|
||||||
114 0x7FFF //RX_TDDRC_THRD_2
|
114 0x7FFF //RX_TDDRC_THRD_2
|
||||||
115 0x7FFF //RX_TDDRC_THRD_3
|
115 0x7FFF //RX_TDDRC_THRD_3
|
||||||
116 0x7E70 //RX_TDDRC_SLANT_0
|
116 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -44991,8 +44991,8 @@
|
||||||
176 0x0020 //RX_PP_RESRV_1
|
176 0x0020 //RX_PP_RESRV_1
|
||||||
177 0x0600 //RX_N_SN_EST
|
177 0x0600 //RX_N_SN_EST
|
||||||
178 0x000C //RX_N2_SN_EST
|
178 0x000C //RX_N2_SN_EST
|
||||||
179 0x0006 //RX_NS_LVL_CTRL
|
179 0x0009 //RX_NS_LVL_CTRL
|
||||||
180 0xF800 //RX_THR_SN_EST
|
180 0x0100 //RX_THR_SN_EST
|
||||||
181 0x7CCD //RX_LAMBDA_PFILT
|
181 0x7CCD //RX_LAMBDA_PFILT
|
||||||
182 0x000A //RX_MUTE_PERIOD
|
182 0x000A //RX_MUTE_PERIOD
|
||||||
183 0x0190 //RX_FADE_IN_PERIOD
|
183 0x0190 //RX_FADE_IN_PERIOD
|
||||||
|
@ -45131,14 +45131,14 @@
|
||||||
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
184 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0001 //RX_TDDRC_THRD_0
|
269 0x000F //RX_TDDRC_THRD_0
|
||||||
270 0x0001 //RX_TDDRC_THRD_1
|
270 0x0040 //RX_TDDRC_THRD_1
|
||||||
271 0x7FFF //RX_TDDRC_THRD_2
|
271 0x7FFF //RX_TDDRC_THRD_2
|
||||||
272 0x7FFF //RX_TDDRC_THRD_3
|
272 0x7FFF //RX_TDDRC_THRD_3
|
||||||
273 0x7E70 //RX_TDDRC_SLANT_0
|
273 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -45230,14 +45230,14 @@
|
||||||
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
184 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0001 //RX_TDDRC_THRD_0
|
269 0x000F //RX_TDDRC_THRD_0
|
||||||
270 0x0001 //RX_TDDRC_THRD_1
|
270 0x0040 //RX_TDDRC_THRD_1
|
||||||
271 0x7FFF //RX_TDDRC_THRD_2
|
271 0x7FFF //RX_TDDRC_THRD_2
|
||||||
272 0x7FFF //RX_TDDRC_THRD_3
|
272 0x7FFF //RX_TDDRC_THRD_3
|
||||||
273 0x7E70 //RX_TDDRC_SLANT_0
|
273 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -45329,14 +45329,14 @@
|
||||||
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
184 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0001 //RX_TDDRC_THRD_0
|
269 0x000F //RX_TDDRC_THRD_0
|
||||||
270 0x0001 //RX_TDDRC_THRD_1
|
270 0x0040 //RX_TDDRC_THRD_1
|
||||||
271 0x7FFF //RX_TDDRC_THRD_2
|
271 0x7FFF //RX_TDDRC_THRD_2
|
||||||
272 0x7FFF //RX_TDDRC_THRD_3
|
272 0x7FFF //RX_TDDRC_THRD_3
|
||||||
273 0x7E70 //RX_TDDRC_SLANT_0
|
273 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -45428,14 +45428,14 @@
|
||||||
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
184 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0001 //RX_TDDRC_THRD_0
|
269 0x000F //RX_TDDRC_THRD_0
|
||||||
270 0x0001 //RX_TDDRC_THRD_1
|
270 0x0040 //RX_TDDRC_THRD_1
|
||||||
271 0x7FFF //RX_TDDRC_THRD_2
|
271 0x7FFF //RX_TDDRC_THRD_2
|
||||||
272 0x7FFF //RX_TDDRC_THRD_3
|
272 0x7FFF //RX_TDDRC_THRD_3
|
||||||
273 0x7E70 //RX_TDDRC_SLANT_0
|
273 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -45527,14 +45527,14 @@
|
||||||
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
184 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0001 //RX_TDDRC_THRD_0
|
269 0x000F //RX_TDDRC_THRD_0
|
||||||
270 0x0001 //RX_TDDRC_THRD_1
|
270 0x0040 //RX_TDDRC_THRD_1
|
||||||
271 0x7FFF //RX_TDDRC_THRD_2
|
271 0x7FFF //RX_TDDRC_THRD_2
|
||||||
272 0x7FFF //RX_TDDRC_THRD_3
|
272 0x7FFF //RX_TDDRC_THRD_3
|
||||||
273 0x7E70 //RX_TDDRC_SLANT_0
|
273 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -45626,14 +45626,14 @@
|
||||||
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
184 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0001 //RX_TDDRC_THRD_0
|
269 0x000F //RX_TDDRC_THRD_0
|
||||||
270 0x0001 //RX_TDDRC_THRD_1
|
270 0x0040 //RX_TDDRC_THRD_1
|
||||||
271 0x7FFF //RX_TDDRC_THRD_2
|
271 0x7FFF //RX_TDDRC_THRD_2
|
||||||
272 0x7FFF //RX_TDDRC_THRD_3
|
272 0x7FFF //RX_TDDRC_THRD_3
|
||||||
273 0x7E70 //RX_TDDRC_SLANT_0
|
273 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -45725,14 +45725,14 @@
|
||||||
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
184 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0001 //RX_TDDRC_THRD_0
|
269 0x000F //RX_TDDRC_THRD_0
|
||||||
270 0x0001 //RX_TDDRC_THRD_1
|
270 0x0040 //RX_TDDRC_THRD_1
|
||||||
271 0x7FFF //RX_TDDRC_THRD_2
|
271 0x7FFF //RX_TDDRC_THRD_2
|
||||||
272 0x7FFF //RX_TDDRC_THRD_3
|
272 0x7FFF //RX_TDDRC_THRD_3
|
||||||
273 0x7E70 //RX_TDDRC_SLANT_0
|
273 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -57615,8 +57615,8 @@
|
||||||
19 0x0020 //RX_PP_RESRV_1
|
19 0x0020 //RX_PP_RESRV_1
|
||||||
20 0x0600 //RX_N_SN_EST
|
20 0x0600 //RX_N_SN_EST
|
||||||
21 0x000C //RX_N2_SN_EST
|
21 0x000C //RX_N2_SN_EST
|
||||||
22 0x000F //RX_NS_LVL_CTRL
|
22 0x0009 //RX_NS_LVL_CTRL
|
||||||
23 0xF800 //RX_THR_SN_EST
|
23 0x0100 //RX_THR_SN_EST
|
||||||
24 0x7CCD //RX_LAMBDA_PFILT
|
24 0x7CCD //RX_LAMBDA_PFILT
|
||||||
25 0x000A //RX_MUTE_PERIOD
|
25 0x000A //RX_MUTE_PERIOD
|
||||||
26 0x0190 //RX_FADE_IN_PERIOD
|
26 0x0190 //RX_FADE_IN_PERIOD
|
||||||
|
@ -57755,14 +57755,14 @@
|
||||||
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
27 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
112 0x0001 //RX_TDDRC_THRD_0
|
112 0x000F //RX_TDDRC_THRD_0
|
||||||
113 0x0001 //RX_TDDRC_THRD_1
|
113 0x0040 //RX_TDDRC_THRD_1
|
||||||
114 0x7FFF //RX_TDDRC_THRD_2
|
114 0x7FFF //RX_TDDRC_THRD_2
|
||||||
115 0x7FFF //RX_TDDRC_THRD_3
|
115 0x7FFF //RX_TDDRC_THRD_3
|
||||||
116 0x7E70 //RX_TDDRC_SLANT_0
|
116 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -57854,14 +57854,14 @@
|
||||||
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
27 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
112 0x0001 //RX_TDDRC_THRD_0
|
112 0x000F //RX_TDDRC_THRD_0
|
||||||
113 0x0001 //RX_TDDRC_THRD_1
|
113 0x0040 //RX_TDDRC_THRD_1
|
||||||
114 0x7FFF //RX_TDDRC_THRD_2
|
114 0x7FFF //RX_TDDRC_THRD_2
|
||||||
115 0x7FFF //RX_TDDRC_THRD_3
|
115 0x7FFF //RX_TDDRC_THRD_3
|
||||||
116 0x7E70 //RX_TDDRC_SLANT_0
|
116 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -57953,14 +57953,14 @@
|
||||||
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
27 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
112 0x0001 //RX_TDDRC_THRD_0
|
112 0x000F //RX_TDDRC_THRD_0
|
||||||
113 0x0001 //RX_TDDRC_THRD_1
|
113 0x0040 //RX_TDDRC_THRD_1
|
||||||
114 0x7FFF //RX_TDDRC_THRD_2
|
114 0x7FFF //RX_TDDRC_THRD_2
|
||||||
115 0x7FFF //RX_TDDRC_THRD_3
|
115 0x7FFF //RX_TDDRC_THRD_3
|
||||||
116 0x7E70 //RX_TDDRC_SLANT_0
|
116 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -58052,14 +58052,14 @@
|
||||||
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
27 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
112 0x0001 //RX_TDDRC_THRD_0
|
112 0x000F //RX_TDDRC_THRD_0
|
||||||
113 0x0001 //RX_TDDRC_THRD_1
|
113 0x0040 //RX_TDDRC_THRD_1
|
||||||
114 0x7FFF //RX_TDDRC_THRD_2
|
114 0x7FFF //RX_TDDRC_THRD_2
|
||||||
115 0x7FFF //RX_TDDRC_THRD_3
|
115 0x7FFF //RX_TDDRC_THRD_3
|
||||||
116 0x7E70 //RX_TDDRC_SLANT_0
|
116 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -58151,14 +58151,14 @@
|
||||||
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
27 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
112 0x0001 //RX_TDDRC_THRD_0
|
112 0x000F //RX_TDDRC_THRD_0
|
||||||
113 0x0001 //RX_TDDRC_THRD_1
|
113 0x0040 //RX_TDDRC_THRD_1
|
||||||
114 0x7FFF //RX_TDDRC_THRD_2
|
114 0x7FFF //RX_TDDRC_THRD_2
|
||||||
115 0x7FFF //RX_TDDRC_THRD_3
|
115 0x7FFF //RX_TDDRC_THRD_3
|
||||||
116 0x7E70 //RX_TDDRC_SLANT_0
|
116 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -58250,14 +58250,14 @@
|
||||||
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
27 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
112 0x0001 //RX_TDDRC_THRD_0
|
112 0x000F //RX_TDDRC_THRD_0
|
||||||
113 0x0001 //RX_TDDRC_THRD_1
|
113 0x0040 //RX_TDDRC_THRD_1
|
||||||
114 0x7FFF //RX_TDDRC_THRD_2
|
114 0x7FFF //RX_TDDRC_THRD_2
|
||||||
115 0x7FFF //RX_TDDRC_THRD_3
|
115 0x7FFF //RX_TDDRC_THRD_3
|
||||||
116 0x7E70 //RX_TDDRC_SLANT_0
|
116 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -58349,14 +58349,14 @@
|
||||||
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
7 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
8 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
9 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
27 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
33 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
112 0x0001 //RX_TDDRC_THRD_0
|
112 0x000F //RX_TDDRC_THRD_0
|
||||||
113 0x0001 //RX_TDDRC_THRD_1
|
113 0x0040 //RX_TDDRC_THRD_1
|
||||||
114 0x7FFF //RX_TDDRC_THRD_2
|
114 0x7FFF //RX_TDDRC_THRD_2
|
||||||
115 0x7FFF //RX_TDDRC_THRD_3
|
115 0x7FFF //RX_TDDRC_THRD_3
|
||||||
116 0x7E70 //RX_TDDRC_SLANT_0
|
116 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -58466,8 +58466,8 @@
|
||||||
176 0x0020 //RX_PP_RESRV_1
|
176 0x0020 //RX_PP_RESRV_1
|
||||||
177 0x0600 //RX_N_SN_EST
|
177 0x0600 //RX_N_SN_EST
|
||||||
178 0x000C //RX_N2_SN_EST
|
178 0x000C //RX_N2_SN_EST
|
||||||
179 0x0006 //RX_NS_LVL_CTRL
|
179 0x0009 //RX_NS_LVL_CTRL
|
||||||
180 0xF800 //RX_THR_SN_EST
|
180 0x0100 //RX_THR_SN_EST
|
||||||
181 0x7CCD //RX_LAMBDA_PFILT
|
181 0x7CCD //RX_LAMBDA_PFILT
|
||||||
182 0x000A //RX_MUTE_PERIOD
|
182 0x000A //RX_MUTE_PERIOD
|
||||||
183 0x0190 //RX_FADE_IN_PERIOD
|
183 0x0190 //RX_FADE_IN_PERIOD
|
||||||
|
@ -58606,14 +58606,14 @@
|
||||||
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
184 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0001 //RX_TDDRC_THRD_0
|
269 0x000F //RX_TDDRC_THRD_0
|
||||||
270 0x0001 //RX_TDDRC_THRD_1
|
270 0x0040 //RX_TDDRC_THRD_1
|
||||||
271 0x7FFF //RX_TDDRC_THRD_2
|
271 0x7FFF //RX_TDDRC_THRD_2
|
||||||
272 0x7FFF //RX_TDDRC_THRD_3
|
272 0x7FFF //RX_TDDRC_THRD_3
|
||||||
273 0x7E70 //RX_TDDRC_SLANT_0
|
273 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -58705,14 +58705,14 @@
|
||||||
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
184 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0001 //RX_TDDRC_THRD_0
|
269 0x000F //RX_TDDRC_THRD_0
|
||||||
270 0x0001 //RX_TDDRC_THRD_1
|
270 0x0040 //RX_TDDRC_THRD_1
|
||||||
271 0x7FFF //RX_TDDRC_THRD_2
|
271 0x7FFF //RX_TDDRC_THRD_2
|
||||||
272 0x7FFF //RX_TDDRC_THRD_3
|
272 0x7FFF //RX_TDDRC_THRD_3
|
||||||
273 0x7E70 //RX_TDDRC_SLANT_0
|
273 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -58804,14 +58804,14 @@
|
||||||
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
184 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0001 //RX_TDDRC_THRD_0
|
269 0x000F //RX_TDDRC_THRD_0
|
||||||
270 0x0001 //RX_TDDRC_THRD_1
|
270 0x0040 //RX_TDDRC_THRD_1
|
||||||
271 0x7FFF //RX_TDDRC_THRD_2
|
271 0x7FFF //RX_TDDRC_THRD_2
|
||||||
272 0x7FFF //RX_TDDRC_THRD_3
|
272 0x7FFF //RX_TDDRC_THRD_3
|
||||||
273 0x7E70 //RX_TDDRC_SLANT_0
|
273 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -58903,14 +58903,14 @@
|
||||||
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
184 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0001 //RX_TDDRC_THRD_0
|
269 0x000F //RX_TDDRC_THRD_0
|
||||||
270 0x0001 //RX_TDDRC_THRD_1
|
270 0x0040 //RX_TDDRC_THRD_1
|
||||||
271 0x7FFF //RX_TDDRC_THRD_2
|
271 0x7FFF //RX_TDDRC_THRD_2
|
||||||
272 0x7FFF //RX_TDDRC_THRD_3
|
272 0x7FFF //RX_TDDRC_THRD_3
|
||||||
273 0x7E70 //RX_TDDRC_SLANT_0
|
273 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -59002,14 +59002,14 @@
|
||||||
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
184 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0001 //RX_TDDRC_THRD_0
|
269 0x000F //RX_TDDRC_THRD_0
|
||||||
270 0x0001 //RX_TDDRC_THRD_1
|
270 0x0040 //RX_TDDRC_THRD_1
|
||||||
271 0x7FFF //RX_TDDRC_THRD_2
|
271 0x7FFF //RX_TDDRC_THRD_2
|
||||||
272 0x7FFF //RX_TDDRC_THRD_3
|
272 0x7FFF //RX_TDDRC_THRD_3
|
||||||
273 0x7E70 //RX_TDDRC_SLANT_0
|
273 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -59101,14 +59101,14 @@
|
||||||
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
184 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0001 //RX_TDDRC_THRD_0
|
269 0x000F //RX_TDDRC_THRD_0
|
||||||
270 0x0001 //RX_TDDRC_THRD_1
|
270 0x0040 //RX_TDDRC_THRD_1
|
||||||
271 0x7FFF //RX_TDDRC_THRD_2
|
271 0x7FFF //RX_TDDRC_THRD_2
|
||||||
272 0x7FFF //RX_TDDRC_THRD_3
|
272 0x7FFF //RX_TDDRC_THRD_3
|
||||||
273 0x7E70 //RX_TDDRC_SLANT_0
|
273 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
@ -59200,14 +59200,14 @@
|
||||||
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
164 0x1000 //RX_TDDRC_ALPHA_UP_2
|
||||||
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
165 0x1000 //RX_TDDRC_ALPHA_UP_3
|
||||||
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
166 0x1000 //RX_TDDRC_ALPHA_UP_4
|
||||||
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
|
184 0x7000 //RX_TDDRC_ALPHA_DWN_1
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
190 0x7FFF //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0001 //RX_TDDRC_THRD_0
|
269 0x000F //RX_TDDRC_THRD_0
|
||||||
270 0x0001 //RX_TDDRC_THRD_1
|
270 0x0040 //RX_TDDRC_THRD_1
|
||||||
271 0x7FFF //RX_TDDRC_THRD_2
|
271 0x7FFF //RX_TDDRC_THRD_2
|
||||||
272 0x7FFF //RX_TDDRC_THRD_3
|
272 0x7FFF //RX_TDDRC_THRD_3
|
||||||
273 0x7E70 //RX_TDDRC_SLANT_0
|
273 0x7E70 //RX_TDDRC_SLANT_0
|
||||||
|
|
Binary file not shown.
File diff suppressed because it is too large
Load diff
Binary file not shown.
|
@ -3,7 +3,7 @@
|
||||||
#EXPORT_FLAG HANDSFREE
|
#EXPORT_FLAG HANDSFREE
|
||||||
#PARAM_MODE FULL
|
#PARAM_MODE FULL
|
||||||
#SAVE_MODE 3
|
#SAVE_MODE 3
|
||||||
#SAVE_TIME 2024-03-22 17:40:27
|
#SAVE_TIME 2024-04-02 17:22:47
|
||||||
|
|
||||||
#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-NB
|
#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-NB
|
||||||
#PARAM_TYPE TX+2RX
|
#PARAM_TYPE TX+2RX
|
||||||
|
@ -2708,7 +2708,7 @@
|
||||||
1 0x0001 //TX_OPERATION_MODE_1
|
1 0x0001 //TX_OPERATION_MODE_1
|
||||||
2 0x00BB //TX_PATCH_REG
|
2 0x00BB //TX_PATCH_REG
|
||||||
3 0x6F7C //TX_SENDFUNC_MODE_0
|
3 0x6F7C //TX_SENDFUNC_MODE_0
|
||||||
4 0x0000 //TX_SENDFUNC_MODE_1
|
4 0x0080 //TX_SENDFUNC_MODE_1
|
||||||
5 0x0003 //TX_NUM_MIC
|
5 0x0003 //TX_NUM_MIC
|
||||||
6 0x0001 //TX_SAMPLINGFREQ_SIG
|
6 0x0001 //TX_SAMPLINGFREQ_SIG
|
||||||
7 0x0001 //TX_SAMPLINGFREQ_PROC
|
7 0x0001 //TX_SAMPLINGFREQ_PROC
|
||||||
|
@ -2949,18 +2949,18 @@
|
||||||
242 0xF800 //TX_THR_SN_EST_0
|
242 0xF800 //TX_THR_SN_EST_0
|
||||||
243 0x1200 //TX_THR_SN_EST_1
|
243 0x1200 //TX_THR_SN_EST_1
|
||||||
244 0x1000 //TX_THR_SN_EST_2
|
244 0x1000 //TX_THR_SN_EST_2
|
||||||
245 0x1000 //TX_THR_SN_EST_3
|
245 0xF600 //TX_THR_SN_EST_3
|
||||||
246 0xFA00 //TX_THR_SN_EST_4
|
246 0xFA00 //TX_THR_SN_EST_4
|
||||||
247 0xFA00 //TX_THR_SN_EST_5
|
247 0xFA00 //TX_THR_SN_EST_5
|
||||||
248 0xF000 //TX_THR_SN_EST_6
|
248 0xF600 //TX_THR_SN_EST_6
|
||||||
249 0xF800 //TX_THR_SN_EST_7
|
249 0xF800 //TX_THR_SN_EST_7
|
||||||
250 0x0100 //TX_DELTA_THR_SN_EST_0
|
250 0x0100 //TX_DELTA_THR_SN_EST_0
|
||||||
251 0xFB00 //TX_DELTA_THR_SN_EST_1
|
251 0xFB00 //TX_DELTA_THR_SN_EST_1
|
||||||
252 0xFD00 //TX_DELTA_THR_SN_EST_2
|
252 0xFD00 //TX_DELTA_THR_SN_EST_2
|
||||||
253 0xFD00 //TX_DELTA_THR_SN_EST_3
|
253 0xFB00 //TX_DELTA_THR_SN_EST_3
|
||||||
254 0x0100 //TX_DELTA_THR_SN_EST_4
|
254 0x0100 //TX_DELTA_THR_SN_EST_4
|
||||||
255 0x0200 //TX_DELTA_THR_SN_EST_5
|
255 0x0200 //TX_DELTA_THR_SN_EST_5
|
||||||
256 0x0700 //TX_DELTA_THR_SN_EST_6
|
256 0x0300 //TX_DELTA_THR_SN_EST_6
|
||||||
257 0x0200 //TX_DELTA_THR_SN_EST_7
|
257 0x0200 //TX_DELTA_THR_SN_EST_7
|
||||||
258 0x4000 //TX_LAMBDA_NN_EST_0
|
258 0x4000 //TX_LAMBDA_NN_EST_0
|
||||||
259 0x3FFF //TX_LAMBDA_NN_EST_1
|
259 0x3FFF //TX_LAMBDA_NN_EST_1
|
||||||
|
@ -2968,7 +2968,7 @@
|
||||||
261 0x3FFF //TX_LAMBDA_NN_EST_3
|
261 0x3FFF //TX_LAMBDA_NN_EST_3
|
||||||
262 0x4000 //TX_LAMBDA_NN_EST_4
|
262 0x4000 //TX_LAMBDA_NN_EST_4
|
||||||
263 0x4000 //TX_LAMBDA_NN_EST_5
|
263 0x4000 //TX_LAMBDA_NN_EST_5
|
||||||
264 0x4FFE //TX_LAMBDA_NN_EST_6
|
264 0x3FFF //TX_LAMBDA_NN_EST_6
|
||||||
265 0x4000 //TX_LAMBDA_NN_EST_7
|
265 0x4000 //TX_LAMBDA_NN_EST_7
|
||||||
266 0x0400 //TX_N_SN_EST
|
266 0x0400 //TX_N_SN_EST
|
||||||
267 0x001C //TX_INBEAM_T
|
267 0x001C //TX_INBEAM_T
|
||||||
|
@ -2988,18 +2988,18 @@
|
||||||
281 0x0010 //TX_NS_LVL_CTRL_0
|
281 0x0010 //TX_NS_LVL_CTRL_0
|
||||||
282 0x0008 //TX_NS_LVL_CTRL_1
|
282 0x0008 //TX_NS_LVL_CTRL_1
|
||||||
283 0x0020 //TX_NS_LVL_CTRL_2
|
283 0x0020 //TX_NS_LVL_CTRL_2
|
||||||
284 0x000C //TX_NS_LVL_CTRL_3
|
284 0x0010 //TX_NS_LVL_CTRL_3
|
||||||
285 0x0014 //TX_NS_LVL_CTRL_4
|
285 0x0014 //TX_NS_LVL_CTRL_4
|
||||||
286 0x0011 //TX_NS_LVL_CTRL_5
|
286 0x0011 //TX_NS_LVL_CTRL_5
|
||||||
287 0x0008 //TX_NS_LVL_CTRL_6
|
287 0x0024 //TX_NS_LVL_CTRL_6
|
||||||
288 0x0011 //TX_NS_LVL_CTRL_7
|
288 0x0011 //TX_NS_LVL_CTRL_7
|
||||||
289 0x001C //TX_MIN_GAIN_S_0
|
289 0x001C //TX_MIN_GAIN_S_0
|
||||||
290 0x0018 //TX_MIN_GAIN_S_1
|
290 0x0018 //TX_MIN_GAIN_S_1
|
||||||
291 0x0008 //TX_MIN_GAIN_S_2
|
291 0x0008 //TX_MIN_GAIN_S_2
|
||||||
292 0x0024 //TX_MIN_GAIN_S_3
|
292 0x0008 //TX_MIN_GAIN_S_3
|
||||||
293 0x0010 //TX_MIN_GAIN_S_4
|
293 0x0010 //TX_MIN_GAIN_S_4
|
||||||
294 0x0010 //TX_MIN_GAIN_S_5
|
294 0x0010 //TX_MIN_GAIN_S_5
|
||||||
295 0x0028 //TX_MIN_GAIN_S_6
|
295 0x001C //TX_MIN_GAIN_S_6
|
||||||
296 0x000F //TX_MIN_GAIN_S_7
|
296 0x000F //TX_MIN_GAIN_S_7
|
||||||
297 0x4FFD //TX_NMOS_SUP
|
297 0x4FFD //TX_NMOS_SUP
|
||||||
298 0x0000 //TX_NS_MAX_PRI_SNR_TH
|
298 0x0000 //TX_NS_MAX_PRI_SNR_TH
|
||||||
|
@ -3007,10 +3007,10 @@
|
||||||
300 0x7FFF //TX_SNRI_SUP_0
|
300 0x7FFF //TX_SNRI_SUP_0
|
||||||
301 0x2FFC //TX_SNRI_SUP_1
|
301 0x2FFC //TX_SNRI_SUP_1
|
||||||
302 0x4FF8 //TX_SNRI_SUP_2
|
302 0x4FF8 //TX_SNRI_SUP_2
|
||||||
303 0x1000 //TX_SNRI_SUP_3
|
303 0x47FF //TX_SNRI_SUP_3
|
||||||
304 0x4000 //TX_SNRI_SUP_4
|
304 0x4000 //TX_SNRI_SUP_4
|
||||||
305 0x50C0 //TX_SNRI_SUP_5
|
305 0x50C0 //TX_SNRI_SUP_5
|
||||||
306 0x77F3 //TX_SNRI_SUP_6
|
306 0x7FF8 //TX_SNRI_SUP_6
|
||||||
307 0x7FFF //TX_SNRI_SUP_7
|
307 0x7FFF //TX_SNRI_SUP_7
|
||||||
308 0x7FFF //TX_THR_LFNS
|
308 0x7FFF //TX_THR_LFNS
|
||||||
309 0x001C //TX_G_LFNS
|
309 0x001C //TX_G_LFNS
|
||||||
|
@ -3021,32 +3021,32 @@
|
||||||
314 0x5000 //TX_A_POST_FILT_S_0
|
314 0x5000 //TX_A_POST_FILT_S_0
|
||||||
315 0x47F9 //TX_A_POST_FILT_S_1
|
315 0x47F9 //TX_A_POST_FILT_S_1
|
||||||
316 0x37FB //TX_A_POST_FILT_S_2
|
316 0x37FB //TX_A_POST_FILT_S_2
|
||||||
317 0x2FFC //TX_A_POST_FILT_S_3
|
317 0x67F5 //TX_A_POST_FILT_S_3
|
||||||
318 0x4000 //TX_A_POST_FILT_S_4
|
318 0x4000 //TX_A_POST_FILT_S_4
|
||||||
319 0x5000 //TX_A_POST_FILT_S_5
|
319 0x5000 //TX_A_POST_FILT_S_5
|
||||||
320 0x27FD //TX_A_POST_FILT_S_6
|
320 0x7FF2 //TX_A_POST_FILT_S_6
|
||||||
321 0x7000 //TX_A_POST_FILT_S_7
|
321 0x7000 //TX_A_POST_FILT_S_7
|
||||||
322 0x2000 //TX_B_POST_FILT_0
|
322 0x2000 //TX_B_POST_FILT_0
|
||||||
323 0x2FFB //TX_B_POST_FILT_1
|
323 0x2FFB //TX_B_POST_FILT_1
|
||||||
324 0x27FC //TX_B_POST_FILT_2
|
324 0x27FC //TX_B_POST_FILT_2
|
||||||
325 0x2FFB //TX_B_POST_FILT_3
|
325 0x47F8 //TX_B_POST_FILT_3
|
||||||
326 0x4000 //TX_B_POST_FILT_4
|
326 0x4000 //TX_B_POST_FILT_4
|
||||||
327 0x1000 //TX_B_POST_FILT_5
|
327 0x1000 //TX_B_POST_FILT_5
|
||||||
328 0x0800 //TX_B_POST_FILT_6
|
328 0x5FF5 //TX_B_POST_FILT_6
|
||||||
329 0x2000 //TX_B_POST_FILT_7
|
329 0x2000 //TX_B_POST_FILT_7
|
||||||
330 0x4000 //TX_B_LESSCUT_RTO_S_0
|
330 0x4000 //TX_B_LESSCUT_RTO_S_0
|
||||||
331 0x5FFC //TX_B_LESSCUT_RTO_S_1
|
331 0x5FFC //TX_B_LESSCUT_RTO_S_1
|
||||||
332 0x4000 //TX_B_LESSCUT_RTO_S_2
|
332 0x4000 //TX_B_LESSCUT_RTO_S_2
|
||||||
333 0x4000 //TX_B_LESSCUT_RTO_S_3
|
333 0x4FFE //TX_B_LESSCUT_RTO_S_3
|
||||||
334 0x7FFF //TX_B_LESSCUT_RTO_S_4
|
334 0x7FFF //TX_B_LESSCUT_RTO_S_4
|
||||||
335 0x6000 //TX_B_LESSCUT_RTO_S_5
|
335 0x6000 //TX_B_LESSCUT_RTO_S_5
|
||||||
336 0x4FFE //TX_B_LESSCUT_RTO_S_6
|
336 0x77F9 //TX_B_LESSCUT_RTO_S_6
|
||||||
337 0x7FFF //TX_B_LESSCUT_RTO_S_7
|
337 0x7FFF //TX_B_LESSCUT_RTO_S_7
|
||||||
338 0x7C00 //TX_LAMBDA_PFILT
|
338 0x7C00 //TX_LAMBDA_PFILT
|
||||||
339 0x7C00 //TX_LAMBDA_PFILT_S_0
|
339 0x7C00 //TX_LAMBDA_PFILT_S_0
|
||||||
340 0x7FF0 //TX_LAMBDA_PFILT_S_1
|
340 0x7FF0 //TX_LAMBDA_PFILT_S_1
|
||||||
341 0x72FD //TX_LAMBDA_PFILT_S_2
|
341 0x72FD //TX_LAMBDA_PFILT_S_2
|
||||||
342 0x78F7 //TX_LAMBDA_PFILT_S_3
|
342 0x7EF1 //TX_LAMBDA_PFILT_S_3
|
||||||
343 0x7C00 //TX_LAMBDA_PFILT_S_4
|
343 0x7C00 //TX_LAMBDA_PFILT_S_4
|
||||||
344 0x7C00 //TX_LAMBDA_PFILT_S_5
|
344 0x7C00 //TX_LAMBDA_PFILT_S_5
|
||||||
345 0x7BF4 //TX_LAMBDA_PFILT_S_6
|
345 0x7BF4 //TX_LAMBDA_PFILT_S_6
|
||||||
|
@ -3094,14 +3094,14 @@
|
||||||
387 0x019A //TX_OUT_ENER_TH_NOISE
|
387 0x019A //TX_OUT_ENER_TH_NOISE
|
||||||
388 0x0333 //TX_OUT_ENER_TH_SPEECH
|
388 0x0333 //TX_OUT_ENER_TH_SPEECH
|
||||||
389 0x2000 //TX_SN_NPB_GAIN
|
389 0x2000 //TX_SN_NPB_GAIN
|
||||||
390 0x0000 //TX_NN_NPB_GAIN
|
390 0x1200 //TX_NN_NPB_GAIN
|
||||||
391 0x7FFF //TX_POST_MASK_SUP_HSNE
|
391 0x7FFF //TX_POST_MASK_SUP_HSNE
|
||||||
392 0x7FFF //TX_TAIL_DET_TH
|
392 0x7FFF //TX_TAIL_DET_TH
|
||||||
393 0x4000 //TX_B_LESSCUT_RTO_WTA
|
393 0x4000 //TX_B_LESSCUT_RTO_WTA
|
||||||
394 0x0000 //TX_MEL_G_R
|
394 0x0000 //TX_MEL_G_R
|
||||||
395 0x0080 //TX_SUPHIGH_TH
|
395 0x0080 //TX_SUPHIGH_TH
|
||||||
396 0x3000 //TX_MASK_G_R
|
396 0x3000 //TX_MASK_G_R
|
||||||
397 0x8001 //TX_LOGSNR_THR
|
397 0x0082 //TX_LOGSNR_THR
|
||||||
398 0x0000 //TX_C_POST_FLT_MASK
|
398 0x0000 //TX_C_POST_FLT_MASK
|
||||||
399 0x4000 //TX_A_POST_FLT_WNS
|
399 0x4000 //TX_A_POST_FLT_WNS
|
||||||
400 0x0148 //TX_MIN_G_LOW300HZ
|
400 0x0148 //TX_MIN_G_LOW300HZ
|
||||||
|
@ -3253,9 +3253,9 @@
|
||||||
546 0x59D8 //TX_WNS_SAT_TH
|
546 0x59D8 //TX_WNS_SAT_TH
|
||||||
547 0x0000 //TX_ABSM_WNS_TH
|
547 0x0000 //TX_ABSM_WNS_TH
|
||||||
548 0x0000 //TX_WNS_RESRV_3
|
548 0x0000 //TX_WNS_RESRV_3
|
||||||
549 0x0000 //TX_WNS_RESRV_4
|
549 0x4000 //TX_WNS_RESRV_4
|
||||||
550 0x0000 //TX_WNS_RESRV_5
|
550 0x7FFF //TX_WNS_RESRV_5
|
||||||
551 0x0000 //TX_WNS_RESRV_6
|
551 0x0100 //TX_WNS_RESRV_6
|
||||||
552 0x0000 //TX_BVE_NOISE_FLOOR_0
|
552 0x0000 //TX_BVE_NOISE_FLOOR_0
|
||||||
553 0x0070 //TX_BVE_NOISE_FLOOR_1
|
553 0x0070 //TX_BVE_NOISE_FLOOR_1
|
||||||
554 0x0070 //TX_BVE_NOISE_FLOOR_2
|
554 0x0070 //TX_BVE_NOISE_FLOOR_2
|
||||||
|
@ -3657,8 +3657,8 @@
|
||||||
950 0x0120 //TX_SDPCRN_GAIN
|
950 0x0120 //TX_SDPCRN_GAIN
|
||||||
951 0x7333 //TX_EASSA_CUT_GAINTH
|
951 0x7333 //TX_EASSA_CUT_GAINTH
|
||||||
952 0x0002 //TX_DT_HARME_ENDF
|
952 0x0002 //TX_DT_HARME_ENDF
|
||||||
953 0x77E3 //TX_NSSAMASK_MORENS
|
953 0x0BFE //TX_NSSAMASK_MORENS
|
||||||
954 0x0300 //TX_CGMMMASK_MORENS
|
954 0x5D00 //TX_CGMMMASK_MORENS
|
||||||
955 0x0CCD //TX_DPCRN_MASK_MORENS_ECHO
|
955 0x0CCD //TX_DPCRN_MASK_MORENS_ECHO
|
||||||
956 0x0028 //TX_PRE_EASSAMASK_SUP
|
956 0x0028 //TX_PRE_EASSAMASK_SUP
|
||||||
957 0x6FE5 //TX_NSSAMASK_MORENS_TYPE1
|
957 0x6FE5 //TX_NSSAMASK_MORENS_TYPE1
|
||||||
|
@ -3713,10 +3713,10 @@
|
||||||
17 0x0003 //RX_SBD_PITCH_DET
|
17 0x0003 //RX_SBD_PITCH_DET
|
||||||
18 0x0100 //RX_PP_RESRV_0
|
18 0x0100 //RX_PP_RESRV_0
|
||||||
19 0x0020 //RX_PP_RESRV_1
|
19 0x0020 //RX_PP_RESRV_1
|
||||||
20 0x0400 //RX_N_SN_EST
|
20 0x0600 //RX_N_SN_EST
|
||||||
21 0x000C //RX_N2_SN_EST
|
21 0x000C //RX_N2_SN_EST
|
||||||
22 0x000F //RX_NS_LVL_CTRL
|
22 0x0009 //RX_NS_LVL_CTRL
|
||||||
23 0xF800 //RX_THR_SN_EST
|
23 0x0100 //RX_THR_SN_EST
|
||||||
24 0x7CCD //RX_LAMBDA_PFILT
|
24 0x7CCD //RX_LAMBDA_PFILT
|
||||||
25 0x000A //RX_MUTE_PERIOD
|
25 0x000A //RX_MUTE_PERIOD
|
||||||
26 0x0190 //RX_FADE_IN_PERIOD
|
26 0x0190 //RX_FADE_IN_PERIOD
|
||||||
|
@ -4453,7 +4453,7 @@
|
||||||
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
29 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
29 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
||||||
32 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
32 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
||||||
33 0x5A9D //RX_TDDRC_LIMITER_THRD
|
33 0x7214 //RX_TDDRC_LIMITER_THRD
|
||||||
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
112 0x0002 //RX_TDDRC_THRD_0
|
112 0x0002 //RX_TDDRC_THRD_0
|
||||||
113 0x0006 //RX_TDDRC_THRD_1
|
113 0x0006 //RX_TDDRC_THRD_1
|
||||||
|
@ -4564,10 +4564,10 @@
|
||||||
174 0x0003 //RX_SBD_PITCH_DET
|
174 0x0003 //RX_SBD_PITCH_DET
|
||||||
175 0x0100 //RX_PP_RESRV_0
|
175 0x0100 //RX_PP_RESRV_0
|
||||||
176 0x0020 //RX_PP_RESRV_1
|
176 0x0020 //RX_PP_RESRV_1
|
||||||
177 0x0400 //RX_N_SN_EST
|
177 0x0600 //RX_N_SN_EST
|
||||||
178 0x000C //RX_N2_SN_EST
|
178 0x000C //RX_N2_SN_EST
|
||||||
179 0x000F //RX_NS_LVL_CTRL
|
179 0x0009 //RX_NS_LVL_CTRL
|
||||||
180 0xF800 //RX_THR_SN_EST
|
180 0x0100 //RX_THR_SN_EST
|
||||||
181 0x7CCD //RX_LAMBDA_PFILT
|
181 0x7CCD //RX_LAMBDA_PFILT
|
||||||
182 0x000A //RX_MUTE_PERIOD
|
182 0x000A //RX_MUTE_PERIOD
|
||||||
183 0x0190 //RX_FADE_IN_PERIOD
|
183 0x0190 //RX_FADE_IN_PERIOD
|
||||||
|
@ -5304,7 +5304,7 @@
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
186 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
189 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x5A9D //RX_TDDRC_LIMITER_THRD
|
190 0x7214 //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0002 //RX_TDDRC_THRD_0
|
269 0x0002 //RX_TDDRC_THRD_0
|
||||||
270 0x0006 //RX_TDDRC_THRD_1
|
270 0x0006 //RX_TDDRC_THRD_1
|
||||||
|
@ -7063,7 +7063,7 @@
|
||||||
121 0x199A //RX_TDDRC_HMNC_GAIN
|
121 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
122 0x0001 //RX_TDDRC_SMT_FLAG
|
122 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
123 0x0CCD //RX_TDDRC_SMT_W
|
123 0x0CCD //RX_TDDRC_SMT_W
|
||||||
124 0x0278 //RX_TDDRC_DRC_GAIN
|
124 0x0271 //RX_TDDRC_DRC_GAIN
|
||||||
38 0x0020 //RX_FDEQ_SUBNUM
|
38 0x0020 //RX_FDEQ_SUBNUM
|
||||||
39 0x8064 //RX_FDEQ_GAIN_0
|
39 0x8064 //RX_FDEQ_GAIN_0
|
||||||
40 0x505B //RX_FDEQ_GAIN_1
|
40 0x505B //RX_FDEQ_GAIN_1
|
||||||
|
@ -7075,11 +7075,11 @@
|
||||||
46 0x5854 //RX_FDEQ_GAIN_7
|
46 0x5854 //RX_FDEQ_GAIN_7
|
||||||
47 0x5452 //RX_FDEQ_GAIN_8
|
47 0x5452 //RX_FDEQ_GAIN_8
|
||||||
48 0x545A //RX_FDEQ_GAIN_9
|
48 0x545A //RX_FDEQ_GAIN_9
|
||||||
49 0x5648 //RX_FDEQ_GAIN_10
|
49 0x6A5C //RX_FDEQ_GAIN_10
|
||||||
50 0x4861 //RX_FDEQ_GAIN_11
|
50 0x5C71 //RX_FDEQ_GAIN_11
|
||||||
51 0x6555 //RX_FDEQ_GAIN_12
|
51 0x6555 //RX_FDEQ_GAIN_12
|
||||||
52 0x6969 //RX_FDEQ_GAIN_13
|
52 0x7183 //RX_FDEQ_GAIN_13
|
||||||
53 0x5F62 //RX_FDEQ_GAIN_14
|
53 0x7570 //RX_FDEQ_GAIN_14
|
||||||
54 0x9494 //RX_FDEQ_GAIN_15
|
54 0x9494 //RX_FDEQ_GAIN_15
|
||||||
55 0x4848 //RX_FDEQ_GAIN_16
|
55 0x4848 //RX_FDEQ_GAIN_16
|
||||||
56 0x4848 //RX_FDEQ_GAIN_17
|
56 0x4848 //RX_FDEQ_GAIN_17
|
||||||
|
@ -7101,8 +7101,8 @@
|
||||||
72 0x0D12 //RX_FDEQ_BIN_9
|
72 0x0D12 //RX_FDEQ_BIN_9
|
||||||
73 0x0C0E //RX_FDEQ_BIN_10
|
73 0x0C0E //RX_FDEQ_BIN_10
|
||||||
74 0x0E32 //RX_FDEQ_BIN_11
|
74 0x0E32 //RX_FDEQ_BIN_11
|
||||||
75 0x1423 //RX_FDEQ_BIN_12
|
75 0x140F //RX_FDEQ_BIN_12
|
||||||
76 0x151E //RX_FDEQ_BIN_13
|
76 0x291E //RX_FDEQ_BIN_13
|
||||||
77 0x1E2D //RX_FDEQ_BIN_14
|
77 0x1E2D //RX_FDEQ_BIN_14
|
||||||
78 0x2D40 //RX_FDEQ_BIN_15
|
78 0x2D40 //RX_FDEQ_BIN_15
|
||||||
79 0x0000 //RX_FDEQ_BIN_16
|
79 0x0000 //RX_FDEQ_BIN_16
|
||||||
|
@ -7148,7 +7148,7 @@
|
||||||
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
29 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
29 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
||||||
32 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
32 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
||||||
33 0x50C3 //RX_TDDRC_LIMITER_THRD
|
33 0x7214 //RX_TDDRC_LIMITER_THRD
|
||||||
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
112 0x0002 //RX_TDDRC_THRD_0
|
112 0x0002 //RX_TDDRC_THRD_0
|
||||||
113 0x0006 //RX_TDDRC_THRD_1
|
113 0x0006 //RX_TDDRC_THRD_1
|
||||||
|
@ -7162,7 +7162,7 @@
|
||||||
121 0x199A //RX_TDDRC_HMNC_GAIN
|
121 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
122 0x0001 //RX_TDDRC_SMT_FLAG
|
122 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
123 0x0CCD //RX_TDDRC_SMT_W
|
123 0x0CCD //RX_TDDRC_SMT_W
|
||||||
124 0x04A0 //RX_TDDRC_DRC_GAIN
|
124 0x0492 //RX_TDDRC_DRC_GAIN
|
||||||
38 0x0020 //RX_FDEQ_SUBNUM
|
38 0x0020 //RX_FDEQ_SUBNUM
|
||||||
39 0x8064 //RX_FDEQ_GAIN_0
|
39 0x8064 //RX_FDEQ_GAIN_0
|
||||||
40 0x505B //RX_FDEQ_GAIN_1
|
40 0x505B //RX_FDEQ_GAIN_1
|
||||||
|
@ -7174,11 +7174,11 @@
|
||||||
46 0x5854 //RX_FDEQ_GAIN_7
|
46 0x5854 //RX_FDEQ_GAIN_7
|
||||||
47 0x5452 //RX_FDEQ_GAIN_8
|
47 0x5452 //RX_FDEQ_GAIN_8
|
||||||
48 0x545A //RX_FDEQ_GAIN_9
|
48 0x545A //RX_FDEQ_GAIN_9
|
||||||
49 0x5648 //RX_FDEQ_GAIN_10
|
49 0x6A5C //RX_FDEQ_GAIN_10
|
||||||
50 0x4861 //RX_FDEQ_GAIN_11
|
50 0x5C71 //RX_FDEQ_GAIN_11
|
||||||
51 0x6555 //RX_FDEQ_GAIN_12
|
51 0x6555 //RX_FDEQ_GAIN_12
|
||||||
52 0x6969 //RX_FDEQ_GAIN_13
|
52 0x7183 //RX_FDEQ_GAIN_13
|
||||||
53 0x5F62 //RX_FDEQ_GAIN_14
|
53 0x7570 //RX_FDEQ_GAIN_14
|
||||||
54 0x9494 //RX_FDEQ_GAIN_15
|
54 0x9494 //RX_FDEQ_GAIN_15
|
||||||
55 0x4848 //RX_FDEQ_GAIN_16
|
55 0x4848 //RX_FDEQ_GAIN_16
|
||||||
56 0x4848 //RX_FDEQ_GAIN_17
|
56 0x4848 //RX_FDEQ_GAIN_17
|
||||||
|
@ -7200,8 +7200,8 @@
|
||||||
72 0x0D12 //RX_FDEQ_BIN_9
|
72 0x0D12 //RX_FDEQ_BIN_9
|
||||||
73 0x0C0E //RX_FDEQ_BIN_10
|
73 0x0C0E //RX_FDEQ_BIN_10
|
||||||
74 0x0E32 //RX_FDEQ_BIN_11
|
74 0x0E32 //RX_FDEQ_BIN_11
|
||||||
75 0x1423 //RX_FDEQ_BIN_12
|
75 0x140F //RX_FDEQ_BIN_12
|
||||||
76 0x151E //RX_FDEQ_BIN_13
|
76 0x291E //RX_FDEQ_BIN_13
|
||||||
77 0x1E2D //RX_FDEQ_BIN_14
|
77 0x1E2D //RX_FDEQ_BIN_14
|
||||||
78 0x2D40 //RX_FDEQ_BIN_15
|
78 0x2D40 //RX_FDEQ_BIN_15
|
||||||
79 0x0000 //RX_FDEQ_BIN_16
|
79 0x0000 //RX_FDEQ_BIN_16
|
||||||
|
@ -7914,7 +7914,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x0278 //RX_TDDRC_DRC_GAIN
|
281 0x0271 //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0020 //RX_FDEQ_SUBNUM
|
195 0x0020 //RX_FDEQ_SUBNUM
|
||||||
196 0x8064 //RX_FDEQ_GAIN_0
|
196 0x8064 //RX_FDEQ_GAIN_0
|
||||||
197 0x505B //RX_FDEQ_GAIN_1
|
197 0x505B //RX_FDEQ_GAIN_1
|
||||||
|
@ -7926,11 +7926,11 @@
|
||||||
203 0x5854 //RX_FDEQ_GAIN_7
|
203 0x5854 //RX_FDEQ_GAIN_7
|
||||||
204 0x5452 //RX_FDEQ_GAIN_8
|
204 0x5452 //RX_FDEQ_GAIN_8
|
||||||
205 0x545A //RX_FDEQ_GAIN_9
|
205 0x545A //RX_FDEQ_GAIN_9
|
||||||
206 0x5648 //RX_FDEQ_GAIN_10
|
206 0x6A5C //RX_FDEQ_GAIN_10
|
||||||
207 0x4861 //RX_FDEQ_GAIN_11
|
207 0x5C71 //RX_FDEQ_GAIN_11
|
||||||
208 0x6555 //RX_FDEQ_GAIN_12
|
208 0x6555 //RX_FDEQ_GAIN_12
|
||||||
209 0x6969 //RX_FDEQ_GAIN_13
|
209 0x7183 //RX_FDEQ_GAIN_13
|
||||||
210 0x5F62 //RX_FDEQ_GAIN_14
|
210 0x7570 //RX_FDEQ_GAIN_14
|
||||||
211 0x9494 //RX_FDEQ_GAIN_15
|
211 0x9494 //RX_FDEQ_GAIN_15
|
||||||
212 0x4848 //RX_FDEQ_GAIN_16
|
212 0x4848 //RX_FDEQ_GAIN_16
|
||||||
213 0x4848 //RX_FDEQ_GAIN_17
|
213 0x4848 //RX_FDEQ_GAIN_17
|
||||||
|
@ -7952,8 +7952,8 @@
|
||||||
229 0x0D12 //RX_FDEQ_BIN_9
|
229 0x0D12 //RX_FDEQ_BIN_9
|
||||||
230 0x0C0E //RX_FDEQ_BIN_10
|
230 0x0C0E //RX_FDEQ_BIN_10
|
||||||
231 0x0E32 //RX_FDEQ_BIN_11
|
231 0x0E32 //RX_FDEQ_BIN_11
|
||||||
232 0x1423 //RX_FDEQ_BIN_12
|
232 0x140F //RX_FDEQ_BIN_12
|
||||||
233 0x151E //RX_FDEQ_BIN_13
|
233 0x291E //RX_FDEQ_BIN_13
|
||||||
234 0x1E2D //RX_FDEQ_BIN_14
|
234 0x1E2D //RX_FDEQ_BIN_14
|
||||||
235 0x2D40 //RX_FDEQ_BIN_15
|
235 0x2D40 //RX_FDEQ_BIN_15
|
||||||
236 0x0000 //RX_FDEQ_BIN_16
|
236 0x0000 //RX_FDEQ_BIN_16
|
||||||
|
@ -7999,7 +7999,7 @@
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
186 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
189 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x50C3 //RX_TDDRC_LIMITER_THRD
|
190 0x7214 //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0002 //RX_TDDRC_THRD_0
|
269 0x0002 //RX_TDDRC_THRD_0
|
||||||
270 0x0006 //RX_TDDRC_THRD_1
|
270 0x0006 //RX_TDDRC_THRD_1
|
||||||
|
@ -8013,7 +8013,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x04A0 //RX_TDDRC_DRC_GAIN
|
281 0x0492 //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0020 //RX_FDEQ_SUBNUM
|
195 0x0020 //RX_FDEQ_SUBNUM
|
||||||
196 0x8064 //RX_FDEQ_GAIN_0
|
196 0x8064 //RX_FDEQ_GAIN_0
|
||||||
197 0x505B //RX_FDEQ_GAIN_1
|
197 0x505B //RX_FDEQ_GAIN_1
|
||||||
|
@ -8025,11 +8025,11 @@
|
||||||
203 0x5854 //RX_FDEQ_GAIN_7
|
203 0x5854 //RX_FDEQ_GAIN_7
|
||||||
204 0x5452 //RX_FDEQ_GAIN_8
|
204 0x5452 //RX_FDEQ_GAIN_8
|
||||||
205 0x545A //RX_FDEQ_GAIN_9
|
205 0x545A //RX_FDEQ_GAIN_9
|
||||||
206 0x5648 //RX_FDEQ_GAIN_10
|
206 0x6A5C //RX_FDEQ_GAIN_10
|
||||||
207 0x4861 //RX_FDEQ_GAIN_11
|
207 0x5C71 //RX_FDEQ_GAIN_11
|
||||||
208 0x6555 //RX_FDEQ_GAIN_12
|
208 0x6555 //RX_FDEQ_GAIN_12
|
||||||
209 0x6969 //RX_FDEQ_GAIN_13
|
209 0x7183 //RX_FDEQ_GAIN_13
|
||||||
210 0x5F62 //RX_FDEQ_GAIN_14
|
210 0x7570 //RX_FDEQ_GAIN_14
|
||||||
211 0x9494 //RX_FDEQ_GAIN_15
|
211 0x9494 //RX_FDEQ_GAIN_15
|
||||||
212 0x4848 //RX_FDEQ_GAIN_16
|
212 0x4848 //RX_FDEQ_GAIN_16
|
||||||
213 0x4848 //RX_FDEQ_GAIN_17
|
213 0x4848 //RX_FDEQ_GAIN_17
|
||||||
|
@ -8051,8 +8051,8 @@
|
||||||
229 0x0D12 //RX_FDEQ_BIN_9
|
229 0x0D12 //RX_FDEQ_BIN_9
|
||||||
230 0x0C0E //RX_FDEQ_BIN_10
|
230 0x0C0E //RX_FDEQ_BIN_10
|
||||||
231 0x0E32 //RX_FDEQ_BIN_11
|
231 0x0E32 //RX_FDEQ_BIN_11
|
||||||
232 0x1423 //RX_FDEQ_BIN_12
|
232 0x140F //RX_FDEQ_BIN_12
|
||||||
233 0x151E //RX_FDEQ_BIN_13
|
233 0x291E //RX_FDEQ_BIN_13
|
||||||
234 0x1E2D //RX_FDEQ_BIN_14
|
234 0x1E2D //RX_FDEQ_BIN_14
|
||||||
235 0x2D40 //RX_FDEQ_BIN_15
|
235 0x2D40 //RX_FDEQ_BIN_15
|
||||||
236 0x0000 //RX_FDEQ_BIN_16
|
236 0x0000 //RX_FDEQ_BIN_16
|
||||||
|
@ -12453,7 +12453,7 @@
|
||||||
121 0x199A //RX_TDDRC_HMNC_GAIN
|
121 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
122 0x0001 //RX_TDDRC_SMT_FLAG
|
122 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
123 0x0CCD //RX_TDDRC_SMT_W
|
123 0x0CCD //RX_TDDRC_SMT_W
|
||||||
124 0x0278 //RX_TDDRC_DRC_GAIN
|
124 0x0271 //RX_TDDRC_DRC_GAIN
|
||||||
38 0x0020 //RX_FDEQ_SUBNUM
|
38 0x0020 //RX_FDEQ_SUBNUM
|
||||||
39 0x8064 //RX_FDEQ_GAIN_0
|
39 0x8064 //RX_FDEQ_GAIN_0
|
||||||
40 0x505B //RX_FDEQ_GAIN_1
|
40 0x505B //RX_FDEQ_GAIN_1
|
||||||
|
@ -12465,11 +12465,11 @@
|
||||||
46 0x5854 //RX_FDEQ_GAIN_7
|
46 0x5854 //RX_FDEQ_GAIN_7
|
||||||
47 0x5452 //RX_FDEQ_GAIN_8
|
47 0x5452 //RX_FDEQ_GAIN_8
|
||||||
48 0x545A //RX_FDEQ_GAIN_9
|
48 0x545A //RX_FDEQ_GAIN_9
|
||||||
49 0x5648 //RX_FDEQ_GAIN_10
|
49 0x6A5C //RX_FDEQ_GAIN_10
|
||||||
50 0x4861 //RX_FDEQ_GAIN_11
|
50 0x5C71 //RX_FDEQ_GAIN_11
|
||||||
51 0x6555 //RX_FDEQ_GAIN_12
|
51 0x6555 //RX_FDEQ_GAIN_12
|
||||||
52 0x6969 //RX_FDEQ_GAIN_13
|
52 0x7183 //RX_FDEQ_GAIN_13
|
||||||
53 0x5F62 //RX_FDEQ_GAIN_14
|
53 0x7570 //RX_FDEQ_GAIN_14
|
||||||
54 0x9494 //RX_FDEQ_GAIN_15
|
54 0x9494 //RX_FDEQ_GAIN_15
|
||||||
55 0x4848 //RX_FDEQ_GAIN_16
|
55 0x4848 //RX_FDEQ_GAIN_16
|
||||||
56 0x4848 //RX_FDEQ_GAIN_17
|
56 0x4848 //RX_FDEQ_GAIN_17
|
||||||
|
@ -12491,8 +12491,8 @@
|
||||||
72 0x0D12 //RX_FDEQ_BIN_9
|
72 0x0D12 //RX_FDEQ_BIN_9
|
||||||
73 0x0C0E //RX_FDEQ_BIN_10
|
73 0x0C0E //RX_FDEQ_BIN_10
|
||||||
74 0x0E32 //RX_FDEQ_BIN_11
|
74 0x0E32 //RX_FDEQ_BIN_11
|
||||||
75 0x1423 //RX_FDEQ_BIN_12
|
75 0x140F //RX_FDEQ_BIN_12
|
||||||
76 0x151E //RX_FDEQ_BIN_13
|
76 0x291E //RX_FDEQ_BIN_13
|
||||||
77 0x1E2D //RX_FDEQ_BIN_14
|
77 0x1E2D //RX_FDEQ_BIN_14
|
||||||
78 0x2D40 //RX_FDEQ_BIN_15
|
78 0x2D40 //RX_FDEQ_BIN_15
|
||||||
79 0x0000 //RX_FDEQ_BIN_16
|
79 0x0000 //RX_FDEQ_BIN_16
|
||||||
|
@ -12538,7 +12538,7 @@
|
||||||
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
29 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
29 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
||||||
32 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
32 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
||||||
33 0x50C3 //RX_TDDRC_LIMITER_THRD
|
33 0x7214 //RX_TDDRC_LIMITER_THRD
|
||||||
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
112 0x0002 //RX_TDDRC_THRD_0
|
112 0x0002 //RX_TDDRC_THRD_0
|
||||||
113 0x0006 //RX_TDDRC_THRD_1
|
113 0x0006 //RX_TDDRC_THRD_1
|
||||||
|
@ -12552,7 +12552,7 @@
|
||||||
121 0x199A //RX_TDDRC_HMNC_GAIN
|
121 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
122 0x0001 //RX_TDDRC_SMT_FLAG
|
122 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
123 0x0CCD //RX_TDDRC_SMT_W
|
123 0x0CCD //RX_TDDRC_SMT_W
|
||||||
124 0x04A0 //RX_TDDRC_DRC_GAIN
|
124 0x0492 //RX_TDDRC_DRC_GAIN
|
||||||
38 0x0020 //RX_FDEQ_SUBNUM
|
38 0x0020 //RX_FDEQ_SUBNUM
|
||||||
39 0x8064 //RX_FDEQ_GAIN_0
|
39 0x8064 //RX_FDEQ_GAIN_0
|
||||||
40 0x505B //RX_FDEQ_GAIN_1
|
40 0x505B //RX_FDEQ_GAIN_1
|
||||||
|
@ -12564,11 +12564,11 @@
|
||||||
46 0x5854 //RX_FDEQ_GAIN_7
|
46 0x5854 //RX_FDEQ_GAIN_7
|
||||||
47 0x5452 //RX_FDEQ_GAIN_8
|
47 0x5452 //RX_FDEQ_GAIN_8
|
||||||
48 0x545A //RX_FDEQ_GAIN_9
|
48 0x545A //RX_FDEQ_GAIN_9
|
||||||
49 0x5648 //RX_FDEQ_GAIN_10
|
49 0x6A5C //RX_FDEQ_GAIN_10
|
||||||
50 0x4861 //RX_FDEQ_GAIN_11
|
50 0x5C71 //RX_FDEQ_GAIN_11
|
||||||
51 0x6555 //RX_FDEQ_GAIN_12
|
51 0x6555 //RX_FDEQ_GAIN_12
|
||||||
52 0x6969 //RX_FDEQ_GAIN_13
|
52 0x7183 //RX_FDEQ_GAIN_13
|
||||||
53 0x5F62 //RX_FDEQ_GAIN_14
|
53 0x7570 //RX_FDEQ_GAIN_14
|
||||||
54 0x9494 //RX_FDEQ_GAIN_15
|
54 0x9494 //RX_FDEQ_GAIN_15
|
||||||
55 0x4848 //RX_FDEQ_GAIN_16
|
55 0x4848 //RX_FDEQ_GAIN_16
|
||||||
56 0x4848 //RX_FDEQ_GAIN_17
|
56 0x4848 //RX_FDEQ_GAIN_17
|
||||||
|
@ -12590,8 +12590,8 @@
|
||||||
72 0x0D12 //RX_FDEQ_BIN_9
|
72 0x0D12 //RX_FDEQ_BIN_9
|
||||||
73 0x0C0E //RX_FDEQ_BIN_10
|
73 0x0C0E //RX_FDEQ_BIN_10
|
||||||
74 0x0E32 //RX_FDEQ_BIN_11
|
74 0x0E32 //RX_FDEQ_BIN_11
|
||||||
75 0x1423 //RX_FDEQ_BIN_12
|
75 0x140F //RX_FDEQ_BIN_12
|
||||||
76 0x151E //RX_FDEQ_BIN_13
|
76 0x291E //RX_FDEQ_BIN_13
|
||||||
77 0x1E2D //RX_FDEQ_BIN_14
|
77 0x1E2D //RX_FDEQ_BIN_14
|
||||||
78 0x2D40 //RX_FDEQ_BIN_15
|
78 0x2D40 //RX_FDEQ_BIN_15
|
||||||
79 0x0000 //RX_FDEQ_BIN_16
|
79 0x0000 //RX_FDEQ_BIN_16
|
||||||
|
@ -13304,7 +13304,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x0278 //RX_TDDRC_DRC_GAIN
|
281 0x0271 //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0020 //RX_FDEQ_SUBNUM
|
195 0x0020 //RX_FDEQ_SUBNUM
|
||||||
196 0x8064 //RX_FDEQ_GAIN_0
|
196 0x8064 //RX_FDEQ_GAIN_0
|
||||||
197 0x505B //RX_FDEQ_GAIN_1
|
197 0x505B //RX_FDEQ_GAIN_1
|
||||||
|
@ -13316,11 +13316,11 @@
|
||||||
203 0x5854 //RX_FDEQ_GAIN_7
|
203 0x5854 //RX_FDEQ_GAIN_7
|
||||||
204 0x5452 //RX_FDEQ_GAIN_8
|
204 0x5452 //RX_FDEQ_GAIN_8
|
||||||
205 0x545A //RX_FDEQ_GAIN_9
|
205 0x545A //RX_FDEQ_GAIN_9
|
||||||
206 0x5648 //RX_FDEQ_GAIN_10
|
206 0x6A5C //RX_FDEQ_GAIN_10
|
||||||
207 0x4861 //RX_FDEQ_GAIN_11
|
207 0x5C71 //RX_FDEQ_GAIN_11
|
||||||
208 0x6555 //RX_FDEQ_GAIN_12
|
208 0x6555 //RX_FDEQ_GAIN_12
|
||||||
209 0x6969 //RX_FDEQ_GAIN_13
|
209 0x7183 //RX_FDEQ_GAIN_13
|
||||||
210 0x5F62 //RX_FDEQ_GAIN_14
|
210 0x7570 //RX_FDEQ_GAIN_14
|
||||||
211 0x9494 //RX_FDEQ_GAIN_15
|
211 0x9494 //RX_FDEQ_GAIN_15
|
||||||
212 0x4848 //RX_FDEQ_GAIN_16
|
212 0x4848 //RX_FDEQ_GAIN_16
|
||||||
213 0x4848 //RX_FDEQ_GAIN_17
|
213 0x4848 //RX_FDEQ_GAIN_17
|
||||||
|
@ -13342,8 +13342,8 @@
|
||||||
229 0x0D12 //RX_FDEQ_BIN_9
|
229 0x0D12 //RX_FDEQ_BIN_9
|
||||||
230 0x0C0E //RX_FDEQ_BIN_10
|
230 0x0C0E //RX_FDEQ_BIN_10
|
||||||
231 0x0E32 //RX_FDEQ_BIN_11
|
231 0x0E32 //RX_FDEQ_BIN_11
|
||||||
232 0x1423 //RX_FDEQ_BIN_12
|
232 0x140F //RX_FDEQ_BIN_12
|
||||||
233 0x151E //RX_FDEQ_BIN_13
|
233 0x291E //RX_FDEQ_BIN_13
|
||||||
234 0x1E2D //RX_FDEQ_BIN_14
|
234 0x1E2D //RX_FDEQ_BIN_14
|
||||||
235 0x2D40 //RX_FDEQ_BIN_15
|
235 0x2D40 //RX_FDEQ_BIN_15
|
||||||
236 0x0000 //RX_FDEQ_BIN_16
|
236 0x0000 //RX_FDEQ_BIN_16
|
||||||
|
@ -13389,7 +13389,7 @@
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
186 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
189 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x50C3 //RX_TDDRC_LIMITER_THRD
|
190 0x7214 //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0002 //RX_TDDRC_THRD_0
|
269 0x0002 //RX_TDDRC_THRD_0
|
||||||
270 0x0006 //RX_TDDRC_THRD_1
|
270 0x0006 //RX_TDDRC_THRD_1
|
||||||
|
@ -13403,7 +13403,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x04A0 //RX_TDDRC_DRC_GAIN
|
281 0x0492 //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0020 //RX_FDEQ_SUBNUM
|
195 0x0020 //RX_FDEQ_SUBNUM
|
||||||
196 0x8064 //RX_FDEQ_GAIN_0
|
196 0x8064 //RX_FDEQ_GAIN_0
|
||||||
197 0x505B //RX_FDEQ_GAIN_1
|
197 0x505B //RX_FDEQ_GAIN_1
|
||||||
|
@ -13415,11 +13415,11 @@
|
||||||
203 0x5854 //RX_FDEQ_GAIN_7
|
203 0x5854 //RX_FDEQ_GAIN_7
|
||||||
204 0x5452 //RX_FDEQ_GAIN_8
|
204 0x5452 //RX_FDEQ_GAIN_8
|
||||||
205 0x545A //RX_FDEQ_GAIN_9
|
205 0x545A //RX_FDEQ_GAIN_9
|
||||||
206 0x5648 //RX_FDEQ_GAIN_10
|
206 0x6A5C //RX_FDEQ_GAIN_10
|
||||||
207 0x4861 //RX_FDEQ_GAIN_11
|
207 0x5C71 //RX_FDEQ_GAIN_11
|
||||||
208 0x6555 //RX_FDEQ_GAIN_12
|
208 0x6555 //RX_FDEQ_GAIN_12
|
||||||
209 0x6969 //RX_FDEQ_GAIN_13
|
209 0x7183 //RX_FDEQ_GAIN_13
|
||||||
210 0x5F62 //RX_FDEQ_GAIN_14
|
210 0x7570 //RX_FDEQ_GAIN_14
|
||||||
211 0x9494 //RX_FDEQ_GAIN_15
|
211 0x9494 //RX_FDEQ_GAIN_15
|
||||||
212 0x4848 //RX_FDEQ_GAIN_16
|
212 0x4848 //RX_FDEQ_GAIN_16
|
||||||
213 0x4848 //RX_FDEQ_GAIN_17
|
213 0x4848 //RX_FDEQ_GAIN_17
|
||||||
|
@ -13441,8 +13441,8 @@
|
||||||
229 0x0D12 //RX_FDEQ_BIN_9
|
229 0x0D12 //RX_FDEQ_BIN_9
|
||||||
230 0x0C0E //RX_FDEQ_BIN_10
|
230 0x0C0E //RX_FDEQ_BIN_10
|
||||||
231 0x0E32 //RX_FDEQ_BIN_11
|
231 0x0E32 //RX_FDEQ_BIN_11
|
||||||
232 0x1423 //RX_FDEQ_BIN_12
|
232 0x140F //RX_FDEQ_BIN_12
|
||||||
233 0x151E //RX_FDEQ_BIN_13
|
233 0x291E //RX_FDEQ_BIN_13
|
||||||
234 0x1E2D //RX_FDEQ_BIN_14
|
234 0x1E2D //RX_FDEQ_BIN_14
|
||||||
235 0x2D40 //RX_FDEQ_BIN_15
|
235 0x2D40 //RX_FDEQ_BIN_15
|
||||||
236 0x0000 //RX_FDEQ_BIN_16
|
236 0x0000 //RX_FDEQ_BIN_16
|
||||||
|
@ -17843,7 +17843,7 @@
|
||||||
121 0x199A //RX_TDDRC_HMNC_GAIN
|
121 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
122 0x0001 //RX_TDDRC_SMT_FLAG
|
122 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
123 0x0CCD //RX_TDDRC_SMT_W
|
123 0x0CCD //RX_TDDRC_SMT_W
|
||||||
124 0x0278 //RX_TDDRC_DRC_GAIN
|
124 0x0271 //RX_TDDRC_DRC_GAIN
|
||||||
38 0x0020 //RX_FDEQ_SUBNUM
|
38 0x0020 //RX_FDEQ_SUBNUM
|
||||||
39 0x8064 //RX_FDEQ_GAIN_0
|
39 0x8064 //RX_FDEQ_GAIN_0
|
||||||
40 0x505B //RX_FDEQ_GAIN_1
|
40 0x505B //RX_FDEQ_GAIN_1
|
||||||
|
@ -17855,11 +17855,11 @@
|
||||||
46 0x5854 //RX_FDEQ_GAIN_7
|
46 0x5854 //RX_FDEQ_GAIN_7
|
||||||
47 0x5452 //RX_FDEQ_GAIN_8
|
47 0x5452 //RX_FDEQ_GAIN_8
|
||||||
48 0x545A //RX_FDEQ_GAIN_9
|
48 0x545A //RX_FDEQ_GAIN_9
|
||||||
49 0x5648 //RX_FDEQ_GAIN_10
|
49 0x6A5C //RX_FDEQ_GAIN_10
|
||||||
50 0x4861 //RX_FDEQ_GAIN_11
|
50 0x5C71 //RX_FDEQ_GAIN_11
|
||||||
51 0x6555 //RX_FDEQ_GAIN_12
|
51 0x6555 //RX_FDEQ_GAIN_12
|
||||||
52 0x6969 //RX_FDEQ_GAIN_13
|
52 0x7183 //RX_FDEQ_GAIN_13
|
||||||
53 0x5F62 //RX_FDEQ_GAIN_14
|
53 0x7570 //RX_FDEQ_GAIN_14
|
||||||
54 0x9494 //RX_FDEQ_GAIN_15
|
54 0x9494 //RX_FDEQ_GAIN_15
|
||||||
55 0x4848 //RX_FDEQ_GAIN_16
|
55 0x4848 //RX_FDEQ_GAIN_16
|
||||||
56 0x4848 //RX_FDEQ_GAIN_17
|
56 0x4848 //RX_FDEQ_GAIN_17
|
||||||
|
@ -17881,8 +17881,8 @@
|
||||||
72 0x0D12 //RX_FDEQ_BIN_9
|
72 0x0D12 //RX_FDEQ_BIN_9
|
||||||
73 0x0C0E //RX_FDEQ_BIN_10
|
73 0x0C0E //RX_FDEQ_BIN_10
|
||||||
74 0x0E32 //RX_FDEQ_BIN_11
|
74 0x0E32 //RX_FDEQ_BIN_11
|
||||||
75 0x1423 //RX_FDEQ_BIN_12
|
75 0x140F //RX_FDEQ_BIN_12
|
||||||
76 0x151E //RX_FDEQ_BIN_13
|
76 0x291E //RX_FDEQ_BIN_13
|
||||||
77 0x1E2D //RX_FDEQ_BIN_14
|
77 0x1E2D //RX_FDEQ_BIN_14
|
||||||
78 0x2D40 //RX_FDEQ_BIN_15
|
78 0x2D40 //RX_FDEQ_BIN_15
|
||||||
79 0x0000 //RX_FDEQ_BIN_16
|
79 0x0000 //RX_FDEQ_BIN_16
|
||||||
|
@ -17928,7 +17928,7 @@
|
||||||
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
29 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
29 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
||||||
32 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
32 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
||||||
33 0x50C3 //RX_TDDRC_LIMITER_THRD
|
33 0x7214 //RX_TDDRC_LIMITER_THRD
|
||||||
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
112 0x0002 //RX_TDDRC_THRD_0
|
112 0x0002 //RX_TDDRC_THRD_0
|
||||||
113 0x0006 //RX_TDDRC_THRD_1
|
113 0x0006 //RX_TDDRC_THRD_1
|
||||||
|
@ -17942,7 +17942,7 @@
|
||||||
121 0x199A //RX_TDDRC_HMNC_GAIN
|
121 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
122 0x0001 //RX_TDDRC_SMT_FLAG
|
122 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
123 0x0CCD //RX_TDDRC_SMT_W
|
123 0x0CCD //RX_TDDRC_SMT_W
|
||||||
124 0x04A0 //RX_TDDRC_DRC_GAIN
|
124 0x0492 //RX_TDDRC_DRC_GAIN
|
||||||
38 0x0020 //RX_FDEQ_SUBNUM
|
38 0x0020 //RX_FDEQ_SUBNUM
|
||||||
39 0x8064 //RX_FDEQ_GAIN_0
|
39 0x8064 //RX_FDEQ_GAIN_0
|
||||||
40 0x505B //RX_FDEQ_GAIN_1
|
40 0x505B //RX_FDEQ_GAIN_1
|
||||||
|
@ -17954,11 +17954,11 @@
|
||||||
46 0x5854 //RX_FDEQ_GAIN_7
|
46 0x5854 //RX_FDEQ_GAIN_7
|
||||||
47 0x5452 //RX_FDEQ_GAIN_8
|
47 0x5452 //RX_FDEQ_GAIN_8
|
||||||
48 0x545A //RX_FDEQ_GAIN_9
|
48 0x545A //RX_FDEQ_GAIN_9
|
||||||
49 0x5648 //RX_FDEQ_GAIN_10
|
49 0x6A5C //RX_FDEQ_GAIN_10
|
||||||
50 0x4861 //RX_FDEQ_GAIN_11
|
50 0x5C71 //RX_FDEQ_GAIN_11
|
||||||
51 0x6555 //RX_FDEQ_GAIN_12
|
51 0x6555 //RX_FDEQ_GAIN_12
|
||||||
52 0x6969 //RX_FDEQ_GAIN_13
|
52 0x7183 //RX_FDEQ_GAIN_13
|
||||||
53 0x5F62 //RX_FDEQ_GAIN_14
|
53 0x7570 //RX_FDEQ_GAIN_14
|
||||||
54 0x9494 //RX_FDEQ_GAIN_15
|
54 0x9494 //RX_FDEQ_GAIN_15
|
||||||
55 0x4848 //RX_FDEQ_GAIN_16
|
55 0x4848 //RX_FDEQ_GAIN_16
|
||||||
56 0x4848 //RX_FDEQ_GAIN_17
|
56 0x4848 //RX_FDEQ_GAIN_17
|
||||||
|
@ -17980,8 +17980,8 @@
|
||||||
72 0x0D12 //RX_FDEQ_BIN_9
|
72 0x0D12 //RX_FDEQ_BIN_9
|
||||||
73 0x0C0E //RX_FDEQ_BIN_10
|
73 0x0C0E //RX_FDEQ_BIN_10
|
||||||
74 0x0E32 //RX_FDEQ_BIN_11
|
74 0x0E32 //RX_FDEQ_BIN_11
|
||||||
75 0x1423 //RX_FDEQ_BIN_12
|
75 0x140F //RX_FDEQ_BIN_12
|
||||||
76 0x151E //RX_FDEQ_BIN_13
|
76 0x291E //RX_FDEQ_BIN_13
|
||||||
77 0x1E2D //RX_FDEQ_BIN_14
|
77 0x1E2D //RX_FDEQ_BIN_14
|
||||||
78 0x2D40 //RX_FDEQ_BIN_15
|
78 0x2D40 //RX_FDEQ_BIN_15
|
||||||
79 0x0000 //RX_FDEQ_BIN_16
|
79 0x0000 //RX_FDEQ_BIN_16
|
||||||
|
@ -18694,7 +18694,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x0278 //RX_TDDRC_DRC_GAIN
|
281 0x0271 //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0020 //RX_FDEQ_SUBNUM
|
195 0x0020 //RX_FDEQ_SUBNUM
|
||||||
196 0x8064 //RX_FDEQ_GAIN_0
|
196 0x8064 //RX_FDEQ_GAIN_0
|
||||||
197 0x505B //RX_FDEQ_GAIN_1
|
197 0x505B //RX_FDEQ_GAIN_1
|
||||||
|
@ -18706,11 +18706,11 @@
|
||||||
203 0x5854 //RX_FDEQ_GAIN_7
|
203 0x5854 //RX_FDEQ_GAIN_7
|
||||||
204 0x5452 //RX_FDEQ_GAIN_8
|
204 0x5452 //RX_FDEQ_GAIN_8
|
||||||
205 0x545A //RX_FDEQ_GAIN_9
|
205 0x545A //RX_FDEQ_GAIN_9
|
||||||
206 0x5648 //RX_FDEQ_GAIN_10
|
206 0x6A5C //RX_FDEQ_GAIN_10
|
||||||
207 0x4861 //RX_FDEQ_GAIN_11
|
207 0x5C71 //RX_FDEQ_GAIN_11
|
||||||
208 0x6555 //RX_FDEQ_GAIN_12
|
208 0x6555 //RX_FDEQ_GAIN_12
|
||||||
209 0x6969 //RX_FDEQ_GAIN_13
|
209 0x7183 //RX_FDEQ_GAIN_13
|
||||||
210 0x5F62 //RX_FDEQ_GAIN_14
|
210 0x7570 //RX_FDEQ_GAIN_14
|
||||||
211 0x9494 //RX_FDEQ_GAIN_15
|
211 0x9494 //RX_FDEQ_GAIN_15
|
||||||
212 0x4848 //RX_FDEQ_GAIN_16
|
212 0x4848 //RX_FDEQ_GAIN_16
|
||||||
213 0x4848 //RX_FDEQ_GAIN_17
|
213 0x4848 //RX_FDEQ_GAIN_17
|
||||||
|
@ -18732,8 +18732,8 @@
|
||||||
229 0x0D12 //RX_FDEQ_BIN_9
|
229 0x0D12 //RX_FDEQ_BIN_9
|
||||||
230 0x0C0E //RX_FDEQ_BIN_10
|
230 0x0C0E //RX_FDEQ_BIN_10
|
||||||
231 0x0E32 //RX_FDEQ_BIN_11
|
231 0x0E32 //RX_FDEQ_BIN_11
|
||||||
232 0x1423 //RX_FDEQ_BIN_12
|
232 0x140F //RX_FDEQ_BIN_12
|
||||||
233 0x151E //RX_FDEQ_BIN_13
|
233 0x291E //RX_FDEQ_BIN_13
|
||||||
234 0x1E2D //RX_FDEQ_BIN_14
|
234 0x1E2D //RX_FDEQ_BIN_14
|
||||||
235 0x2D40 //RX_FDEQ_BIN_15
|
235 0x2D40 //RX_FDEQ_BIN_15
|
||||||
236 0x0000 //RX_FDEQ_BIN_16
|
236 0x0000 //RX_FDEQ_BIN_16
|
||||||
|
@ -18779,7 +18779,7 @@
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
186 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
189 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x50C3 //RX_TDDRC_LIMITER_THRD
|
190 0x7214 //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0002 //RX_TDDRC_THRD_0
|
269 0x0002 //RX_TDDRC_THRD_0
|
||||||
270 0x0006 //RX_TDDRC_THRD_1
|
270 0x0006 //RX_TDDRC_THRD_1
|
||||||
|
@ -18793,7 +18793,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x04A0 //RX_TDDRC_DRC_GAIN
|
281 0x0492 //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0020 //RX_FDEQ_SUBNUM
|
195 0x0020 //RX_FDEQ_SUBNUM
|
||||||
196 0x8064 //RX_FDEQ_GAIN_0
|
196 0x8064 //RX_FDEQ_GAIN_0
|
||||||
197 0x505B //RX_FDEQ_GAIN_1
|
197 0x505B //RX_FDEQ_GAIN_1
|
||||||
|
@ -18805,11 +18805,11 @@
|
||||||
203 0x5854 //RX_FDEQ_GAIN_7
|
203 0x5854 //RX_FDEQ_GAIN_7
|
||||||
204 0x5452 //RX_FDEQ_GAIN_8
|
204 0x5452 //RX_FDEQ_GAIN_8
|
||||||
205 0x545A //RX_FDEQ_GAIN_9
|
205 0x545A //RX_FDEQ_GAIN_9
|
||||||
206 0x5648 //RX_FDEQ_GAIN_10
|
206 0x6A5C //RX_FDEQ_GAIN_10
|
||||||
207 0x4861 //RX_FDEQ_GAIN_11
|
207 0x5C71 //RX_FDEQ_GAIN_11
|
||||||
208 0x6555 //RX_FDEQ_GAIN_12
|
208 0x6555 //RX_FDEQ_GAIN_12
|
||||||
209 0x6969 //RX_FDEQ_GAIN_13
|
209 0x7183 //RX_FDEQ_GAIN_13
|
||||||
210 0x5F62 //RX_FDEQ_GAIN_14
|
210 0x7570 //RX_FDEQ_GAIN_14
|
||||||
211 0x9494 //RX_FDEQ_GAIN_15
|
211 0x9494 //RX_FDEQ_GAIN_15
|
||||||
212 0x4848 //RX_FDEQ_GAIN_16
|
212 0x4848 //RX_FDEQ_GAIN_16
|
||||||
213 0x4848 //RX_FDEQ_GAIN_17
|
213 0x4848 //RX_FDEQ_GAIN_17
|
||||||
|
@ -18831,8 +18831,8 @@
|
||||||
229 0x0D12 //RX_FDEQ_BIN_9
|
229 0x0D12 //RX_FDEQ_BIN_9
|
||||||
230 0x0C0E //RX_FDEQ_BIN_10
|
230 0x0C0E //RX_FDEQ_BIN_10
|
||||||
231 0x0E32 //RX_FDEQ_BIN_11
|
231 0x0E32 //RX_FDEQ_BIN_11
|
||||||
232 0x1423 //RX_FDEQ_BIN_12
|
232 0x140F //RX_FDEQ_BIN_12
|
||||||
233 0x151E //RX_FDEQ_BIN_13
|
233 0x291E //RX_FDEQ_BIN_13
|
||||||
234 0x1E2D //RX_FDEQ_BIN_14
|
234 0x1E2D //RX_FDEQ_BIN_14
|
||||||
235 0x2D40 //RX_FDEQ_BIN_15
|
235 0x2D40 //RX_FDEQ_BIN_15
|
||||||
236 0x0000 //RX_FDEQ_BIN_16
|
236 0x0000 //RX_FDEQ_BIN_16
|
||||||
|
@ -23233,7 +23233,7 @@
|
||||||
121 0x199A //RX_TDDRC_HMNC_GAIN
|
121 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
122 0x0001 //RX_TDDRC_SMT_FLAG
|
122 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
123 0x0CCD //RX_TDDRC_SMT_W
|
123 0x0CCD //RX_TDDRC_SMT_W
|
||||||
124 0x0278 //RX_TDDRC_DRC_GAIN
|
124 0x0271 //RX_TDDRC_DRC_GAIN
|
||||||
38 0x0020 //RX_FDEQ_SUBNUM
|
38 0x0020 //RX_FDEQ_SUBNUM
|
||||||
39 0x8064 //RX_FDEQ_GAIN_0
|
39 0x8064 //RX_FDEQ_GAIN_0
|
||||||
40 0x505B //RX_FDEQ_GAIN_1
|
40 0x505B //RX_FDEQ_GAIN_1
|
||||||
|
@ -23245,11 +23245,11 @@
|
||||||
46 0x5854 //RX_FDEQ_GAIN_7
|
46 0x5854 //RX_FDEQ_GAIN_7
|
||||||
47 0x5452 //RX_FDEQ_GAIN_8
|
47 0x5452 //RX_FDEQ_GAIN_8
|
||||||
48 0x545A //RX_FDEQ_GAIN_9
|
48 0x545A //RX_FDEQ_GAIN_9
|
||||||
49 0x5648 //RX_FDEQ_GAIN_10
|
49 0x6A5C //RX_FDEQ_GAIN_10
|
||||||
50 0x4861 //RX_FDEQ_GAIN_11
|
50 0x5C71 //RX_FDEQ_GAIN_11
|
||||||
51 0x6555 //RX_FDEQ_GAIN_12
|
51 0x6555 //RX_FDEQ_GAIN_12
|
||||||
52 0x6969 //RX_FDEQ_GAIN_13
|
52 0x7183 //RX_FDEQ_GAIN_13
|
||||||
53 0x5F62 //RX_FDEQ_GAIN_14
|
53 0x7570 //RX_FDEQ_GAIN_14
|
||||||
54 0x9494 //RX_FDEQ_GAIN_15
|
54 0x9494 //RX_FDEQ_GAIN_15
|
||||||
55 0x4848 //RX_FDEQ_GAIN_16
|
55 0x4848 //RX_FDEQ_GAIN_16
|
||||||
56 0x4848 //RX_FDEQ_GAIN_17
|
56 0x4848 //RX_FDEQ_GAIN_17
|
||||||
|
@ -23271,8 +23271,8 @@
|
||||||
72 0x0D12 //RX_FDEQ_BIN_9
|
72 0x0D12 //RX_FDEQ_BIN_9
|
||||||
73 0x0C0E //RX_FDEQ_BIN_10
|
73 0x0C0E //RX_FDEQ_BIN_10
|
||||||
74 0x0E32 //RX_FDEQ_BIN_11
|
74 0x0E32 //RX_FDEQ_BIN_11
|
||||||
75 0x1423 //RX_FDEQ_BIN_12
|
75 0x140F //RX_FDEQ_BIN_12
|
||||||
76 0x151E //RX_FDEQ_BIN_13
|
76 0x291E //RX_FDEQ_BIN_13
|
||||||
77 0x1E2D //RX_FDEQ_BIN_14
|
77 0x1E2D //RX_FDEQ_BIN_14
|
||||||
78 0x2D40 //RX_FDEQ_BIN_15
|
78 0x2D40 //RX_FDEQ_BIN_15
|
||||||
79 0x0000 //RX_FDEQ_BIN_16
|
79 0x0000 //RX_FDEQ_BIN_16
|
||||||
|
@ -23318,7 +23318,7 @@
|
||||||
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
29 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
29 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
||||||
32 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
32 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
||||||
33 0x50C3 //RX_TDDRC_LIMITER_THRD
|
33 0x7214 //RX_TDDRC_LIMITER_THRD
|
||||||
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
112 0x0002 //RX_TDDRC_THRD_0
|
112 0x0002 //RX_TDDRC_THRD_0
|
||||||
113 0x0006 //RX_TDDRC_THRD_1
|
113 0x0006 //RX_TDDRC_THRD_1
|
||||||
|
@ -23332,7 +23332,7 @@
|
||||||
121 0x199A //RX_TDDRC_HMNC_GAIN
|
121 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
122 0x0001 //RX_TDDRC_SMT_FLAG
|
122 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
123 0x0CCD //RX_TDDRC_SMT_W
|
123 0x0CCD //RX_TDDRC_SMT_W
|
||||||
124 0x04A0 //RX_TDDRC_DRC_GAIN
|
124 0x0492 //RX_TDDRC_DRC_GAIN
|
||||||
38 0x0020 //RX_FDEQ_SUBNUM
|
38 0x0020 //RX_FDEQ_SUBNUM
|
||||||
39 0x8064 //RX_FDEQ_GAIN_0
|
39 0x8064 //RX_FDEQ_GAIN_0
|
||||||
40 0x505B //RX_FDEQ_GAIN_1
|
40 0x505B //RX_FDEQ_GAIN_1
|
||||||
|
@ -23344,11 +23344,11 @@
|
||||||
46 0x5854 //RX_FDEQ_GAIN_7
|
46 0x5854 //RX_FDEQ_GAIN_7
|
||||||
47 0x5452 //RX_FDEQ_GAIN_8
|
47 0x5452 //RX_FDEQ_GAIN_8
|
||||||
48 0x545A //RX_FDEQ_GAIN_9
|
48 0x545A //RX_FDEQ_GAIN_9
|
||||||
49 0x5648 //RX_FDEQ_GAIN_10
|
49 0x6A5C //RX_FDEQ_GAIN_10
|
||||||
50 0x4861 //RX_FDEQ_GAIN_11
|
50 0x5C71 //RX_FDEQ_GAIN_11
|
||||||
51 0x6555 //RX_FDEQ_GAIN_12
|
51 0x6555 //RX_FDEQ_GAIN_12
|
||||||
52 0x6969 //RX_FDEQ_GAIN_13
|
52 0x7183 //RX_FDEQ_GAIN_13
|
||||||
53 0x5F62 //RX_FDEQ_GAIN_14
|
53 0x7570 //RX_FDEQ_GAIN_14
|
||||||
54 0x9494 //RX_FDEQ_GAIN_15
|
54 0x9494 //RX_FDEQ_GAIN_15
|
||||||
55 0x4848 //RX_FDEQ_GAIN_16
|
55 0x4848 //RX_FDEQ_GAIN_16
|
||||||
56 0x4848 //RX_FDEQ_GAIN_17
|
56 0x4848 //RX_FDEQ_GAIN_17
|
||||||
|
@ -23370,8 +23370,8 @@
|
||||||
72 0x0D12 //RX_FDEQ_BIN_9
|
72 0x0D12 //RX_FDEQ_BIN_9
|
||||||
73 0x0C0E //RX_FDEQ_BIN_10
|
73 0x0C0E //RX_FDEQ_BIN_10
|
||||||
74 0x0E32 //RX_FDEQ_BIN_11
|
74 0x0E32 //RX_FDEQ_BIN_11
|
||||||
75 0x1423 //RX_FDEQ_BIN_12
|
75 0x140F //RX_FDEQ_BIN_12
|
||||||
76 0x151E //RX_FDEQ_BIN_13
|
76 0x291E //RX_FDEQ_BIN_13
|
||||||
77 0x1E2D //RX_FDEQ_BIN_14
|
77 0x1E2D //RX_FDEQ_BIN_14
|
||||||
78 0x2D40 //RX_FDEQ_BIN_15
|
78 0x2D40 //RX_FDEQ_BIN_15
|
||||||
79 0x0000 //RX_FDEQ_BIN_16
|
79 0x0000 //RX_FDEQ_BIN_16
|
||||||
|
@ -24084,7 +24084,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x0278 //RX_TDDRC_DRC_GAIN
|
281 0x0271 //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0020 //RX_FDEQ_SUBNUM
|
195 0x0020 //RX_FDEQ_SUBNUM
|
||||||
196 0x8064 //RX_FDEQ_GAIN_0
|
196 0x8064 //RX_FDEQ_GAIN_0
|
||||||
197 0x505B //RX_FDEQ_GAIN_1
|
197 0x505B //RX_FDEQ_GAIN_1
|
||||||
|
@ -24096,11 +24096,11 @@
|
||||||
203 0x5854 //RX_FDEQ_GAIN_7
|
203 0x5854 //RX_FDEQ_GAIN_7
|
||||||
204 0x5452 //RX_FDEQ_GAIN_8
|
204 0x5452 //RX_FDEQ_GAIN_8
|
||||||
205 0x545A //RX_FDEQ_GAIN_9
|
205 0x545A //RX_FDEQ_GAIN_9
|
||||||
206 0x5648 //RX_FDEQ_GAIN_10
|
206 0x6A5C //RX_FDEQ_GAIN_10
|
||||||
207 0x4861 //RX_FDEQ_GAIN_11
|
207 0x5C71 //RX_FDEQ_GAIN_11
|
||||||
208 0x6555 //RX_FDEQ_GAIN_12
|
208 0x6555 //RX_FDEQ_GAIN_12
|
||||||
209 0x6969 //RX_FDEQ_GAIN_13
|
209 0x7183 //RX_FDEQ_GAIN_13
|
||||||
210 0x5F62 //RX_FDEQ_GAIN_14
|
210 0x7570 //RX_FDEQ_GAIN_14
|
||||||
211 0x9494 //RX_FDEQ_GAIN_15
|
211 0x9494 //RX_FDEQ_GAIN_15
|
||||||
212 0x4848 //RX_FDEQ_GAIN_16
|
212 0x4848 //RX_FDEQ_GAIN_16
|
||||||
213 0x4848 //RX_FDEQ_GAIN_17
|
213 0x4848 //RX_FDEQ_GAIN_17
|
||||||
|
@ -24122,8 +24122,8 @@
|
||||||
229 0x0D12 //RX_FDEQ_BIN_9
|
229 0x0D12 //RX_FDEQ_BIN_9
|
||||||
230 0x0C0E //RX_FDEQ_BIN_10
|
230 0x0C0E //RX_FDEQ_BIN_10
|
||||||
231 0x0E32 //RX_FDEQ_BIN_11
|
231 0x0E32 //RX_FDEQ_BIN_11
|
||||||
232 0x1423 //RX_FDEQ_BIN_12
|
232 0x140F //RX_FDEQ_BIN_12
|
||||||
233 0x151E //RX_FDEQ_BIN_13
|
233 0x291E //RX_FDEQ_BIN_13
|
||||||
234 0x1E2D //RX_FDEQ_BIN_14
|
234 0x1E2D //RX_FDEQ_BIN_14
|
||||||
235 0x2D40 //RX_FDEQ_BIN_15
|
235 0x2D40 //RX_FDEQ_BIN_15
|
||||||
236 0x0000 //RX_FDEQ_BIN_16
|
236 0x0000 //RX_FDEQ_BIN_16
|
||||||
|
@ -24169,7 +24169,7 @@
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
186 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
189 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x50C3 //RX_TDDRC_LIMITER_THRD
|
190 0x7214 //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0002 //RX_TDDRC_THRD_0
|
269 0x0002 //RX_TDDRC_THRD_0
|
||||||
270 0x0006 //RX_TDDRC_THRD_1
|
270 0x0006 //RX_TDDRC_THRD_1
|
||||||
|
@ -24183,7 +24183,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x04A0 //RX_TDDRC_DRC_GAIN
|
281 0x0492 //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0020 //RX_FDEQ_SUBNUM
|
195 0x0020 //RX_FDEQ_SUBNUM
|
||||||
196 0x8064 //RX_FDEQ_GAIN_0
|
196 0x8064 //RX_FDEQ_GAIN_0
|
||||||
197 0x505B //RX_FDEQ_GAIN_1
|
197 0x505B //RX_FDEQ_GAIN_1
|
||||||
|
@ -24195,11 +24195,11 @@
|
||||||
203 0x5854 //RX_FDEQ_GAIN_7
|
203 0x5854 //RX_FDEQ_GAIN_7
|
||||||
204 0x5452 //RX_FDEQ_GAIN_8
|
204 0x5452 //RX_FDEQ_GAIN_8
|
||||||
205 0x545A //RX_FDEQ_GAIN_9
|
205 0x545A //RX_FDEQ_GAIN_9
|
||||||
206 0x5648 //RX_FDEQ_GAIN_10
|
206 0x6A5C //RX_FDEQ_GAIN_10
|
||||||
207 0x4861 //RX_FDEQ_GAIN_11
|
207 0x5C71 //RX_FDEQ_GAIN_11
|
||||||
208 0x6555 //RX_FDEQ_GAIN_12
|
208 0x6555 //RX_FDEQ_GAIN_12
|
||||||
209 0x6969 //RX_FDEQ_GAIN_13
|
209 0x7183 //RX_FDEQ_GAIN_13
|
||||||
210 0x5F62 //RX_FDEQ_GAIN_14
|
210 0x7570 //RX_FDEQ_GAIN_14
|
||||||
211 0x9494 //RX_FDEQ_GAIN_15
|
211 0x9494 //RX_FDEQ_GAIN_15
|
||||||
212 0x4848 //RX_FDEQ_GAIN_16
|
212 0x4848 //RX_FDEQ_GAIN_16
|
||||||
213 0x4848 //RX_FDEQ_GAIN_17
|
213 0x4848 //RX_FDEQ_GAIN_17
|
||||||
|
@ -24221,8 +24221,8 @@
|
||||||
229 0x0D12 //RX_FDEQ_BIN_9
|
229 0x0D12 //RX_FDEQ_BIN_9
|
||||||
230 0x0C0E //RX_FDEQ_BIN_10
|
230 0x0C0E //RX_FDEQ_BIN_10
|
||||||
231 0x0E32 //RX_FDEQ_BIN_11
|
231 0x0E32 //RX_FDEQ_BIN_11
|
||||||
232 0x1423 //RX_FDEQ_BIN_12
|
232 0x140F //RX_FDEQ_BIN_12
|
||||||
233 0x151E //RX_FDEQ_BIN_13
|
233 0x291E //RX_FDEQ_BIN_13
|
||||||
234 0x1E2D //RX_FDEQ_BIN_14
|
234 0x1E2D //RX_FDEQ_BIN_14
|
||||||
235 0x2D40 //RX_FDEQ_BIN_15
|
235 0x2D40 //RX_FDEQ_BIN_15
|
||||||
236 0x0000 //RX_FDEQ_BIN_16
|
236 0x0000 //RX_FDEQ_BIN_16
|
||||||
|
@ -28623,7 +28623,7 @@
|
||||||
121 0x199A //RX_TDDRC_HMNC_GAIN
|
121 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
122 0x0001 //RX_TDDRC_SMT_FLAG
|
122 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
123 0x0CCD //RX_TDDRC_SMT_W
|
123 0x0CCD //RX_TDDRC_SMT_W
|
||||||
124 0x0278 //RX_TDDRC_DRC_GAIN
|
124 0x0271 //RX_TDDRC_DRC_GAIN
|
||||||
38 0x0020 //RX_FDEQ_SUBNUM
|
38 0x0020 //RX_FDEQ_SUBNUM
|
||||||
39 0x8064 //RX_FDEQ_GAIN_0
|
39 0x8064 //RX_FDEQ_GAIN_0
|
||||||
40 0x505B //RX_FDEQ_GAIN_1
|
40 0x505B //RX_FDEQ_GAIN_1
|
||||||
|
@ -28635,11 +28635,11 @@
|
||||||
46 0x5854 //RX_FDEQ_GAIN_7
|
46 0x5854 //RX_FDEQ_GAIN_7
|
||||||
47 0x5452 //RX_FDEQ_GAIN_8
|
47 0x5452 //RX_FDEQ_GAIN_8
|
||||||
48 0x545A //RX_FDEQ_GAIN_9
|
48 0x545A //RX_FDEQ_GAIN_9
|
||||||
49 0x5648 //RX_FDEQ_GAIN_10
|
49 0x6A5C //RX_FDEQ_GAIN_10
|
||||||
50 0x4861 //RX_FDEQ_GAIN_11
|
50 0x5C71 //RX_FDEQ_GAIN_11
|
||||||
51 0x6555 //RX_FDEQ_GAIN_12
|
51 0x6555 //RX_FDEQ_GAIN_12
|
||||||
52 0x6969 //RX_FDEQ_GAIN_13
|
52 0x7183 //RX_FDEQ_GAIN_13
|
||||||
53 0x5F62 //RX_FDEQ_GAIN_14
|
53 0x7570 //RX_FDEQ_GAIN_14
|
||||||
54 0x9494 //RX_FDEQ_GAIN_15
|
54 0x9494 //RX_FDEQ_GAIN_15
|
||||||
55 0x4848 //RX_FDEQ_GAIN_16
|
55 0x4848 //RX_FDEQ_GAIN_16
|
||||||
56 0x4848 //RX_FDEQ_GAIN_17
|
56 0x4848 //RX_FDEQ_GAIN_17
|
||||||
|
@ -28661,8 +28661,8 @@
|
||||||
72 0x0D12 //RX_FDEQ_BIN_9
|
72 0x0D12 //RX_FDEQ_BIN_9
|
||||||
73 0x0C0E //RX_FDEQ_BIN_10
|
73 0x0C0E //RX_FDEQ_BIN_10
|
||||||
74 0x0E32 //RX_FDEQ_BIN_11
|
74 0x0E32 //RX_FDEQ_BIN_11
|
||||||
75 0x1423 //RX_FDEQ_BIN_12
|
75 0x140F //RX_FDEQ_BIN_12
|
||||||
76 0x151E //RX_FDEQ_BIN_13
|
76 0x291E //RX_FDEQ_BIN_13
|
||||||
77 0x1E2D //RX_FDEQ_BIN_14
|
77 0x1E2D //RX_FDEQ_BIN_14
|
||||||
78 0x2D40 //RX_FDEQ_BIN_15
|
78 0x2D40 //RX_FDEQ_BIN_15
|
||||||
79 0x0000 //RX_FDEQ_BIN_16
|
79 0x0000 //RX_FDEQ_BIN_16
|
||||||
|
@ -28708,7 +28708,7 @@
|
||||||
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
29 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
29 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
||||||
32 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
32 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
||||||
33 0x50C3 //RX_TDDRC_LIMITER_THRD
|
33 0x7214 //RX_TDDRC_LIMITER_THRD
|
||||||
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
112 0x0002 //RX_TDDRC_THRD_0
|
112 0x0002 //RX_TDDRC_THRD_0
|
||||||
113 0x0006 //RX_TDDRC_THRD_1
|
113 0x0006 //RX_TDDRC_THRD_1
|
||||||
|
@ -28722,7 +28722,7 @@
|
||||||
121 0x199A //RX_TDDRC_HMNC_GAIN
|
121 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
122 0x0001 //RX_TDDRC_SMT_FLAG
|
122 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
123 0x0CCD //RX_TDDRC_SMT_W
|
123 0x0CCD //RX_TDDRC_SMT_W
|
||||||
124 0x04A0 //RX_TDDRC_DRC_GAIN
|
124 0x0492 //RX_TDDRC_DRC_GAIN
|
||||||
38 0x0020 //RX_FDEQ_SUBNUM
|
38 0x0020 //RX_FDEQ_SUBNUM
|
||||||
39 0x8064 //RX_FDEQ_GAIN_0
|
39 0x8064 //RX_FDEQ_GAIN_0
|
||||||
40 0x505B //RX_FDEQ_GAIN_1
|
40 0x505B //RX_FDEQ_GAIN_1
|
||||||
|
@ -28734,11 +28734,11 @@
|
||||||
46 0x5854 //RX_FDEQ_GAIN_7
|
46 0x5854 //RX_FDEQ_GAIN_7
|
||||||
47 0x5452 //RX_FDEQ_GAIN_8
|
47 0x5452 //RX_FDEQ_GAIN_8
|
||||||
48 0x545A //RX_FDEQ_GAIN_9
|
48 0x545A //RX_FDEQ_GAIN_9
|
||||||
49 0x5648 //RX_FDEQ_GAIN_10
|
49 0x6A5C //RX_FDEQ_GAIN_10
|
||||||
50 0x4861 //RX_FDEQ_GAIN_11
|
50 0x5C71 //RX_FDEQ_GAIN_11
|
||||||
51 0x6555 //RX_FDEQ_GAIN_12
|
51 0x6555 //RX_FDEQ_GAIN_12
|
||||||
52 0x6969 //RX_FDEQ_GAIN_13
|
52 0x7183 //RX_FDEQ_GAIN_13
|
||||||
53 0x5F62 //RX_FDEQ_GAIN_14
|
53 0x7570 //RX_FDEQ_GAIN_14
|
||||||
54 0x9494 //RX_FDEQ_GAIN_15
|
54 0x9494 //RX_FDEQ_GAIN_15
|
||||||
55 0x4848 //RX_FDEQ_GAIN_16
|
55 0x4848 //RX_FDEQ_GAIN_16
|
||||||
56 0x4848 //RX_FDEQ_GAIN_17
|
56 0x4848 //RX_FDEQ_GAIN_17
|
||||||
|
@ -28760,8 +28760,8 @@
|
||||||
72 0x0D12 //RX_FDEQ_BIN_9
|
72 0x0D12 //RX_FDEQ_BIN_9
|
||||||
73 0x0C0E //RX_FDEQ_BIN_10
|
73 0x0C0E //RX_FDEQ_BIN_10
|
||||||
74 0x0E32 //RX_FDEQ_BIN_11
|
74 0x0E32 //RX_FDEQ_BIN_11
|
||||||
75 0x1423 //RX_FDEQ_BIN_12
|
75 0x140F //RX_FDEQ_BIN_12
|
||||||
76 0x151E //RX_FDEQ_BIN_13
|
76 0x291E //RX_FDEQ_BIN_13
|
||||||
77 0x1E2D //RX_FDEQ_BIN_14
|
77 0x1E2D //RX_FDEQ_BIN_14
|
||||||
78 0x2D40 //RX_FDEQ_BIN_15
|
78 0x2D40 //RX_FDEQ_BIN_15
|
||||||
79 0x0000 //RX_FDEQ_BIN_16
|
79 0x0000 //RX_FDEQ_BIN_16
|
||||||
|
@ -29474,7 +29474,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x0278 //RX_TDDRC_DRC_GAIN
|
281 0x0271 //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0020 //RX_FDEQ_SUBNUM
|
195 0x0020 //RX_FDEQ_SUBNUM
|
||||||
196 0x8064 //RX_FDEQ_GAIN_0
|
196 0x8064 //RX_FDEQ_GAIN_0
|
||||||
197 0x505B //RX_FDEQ_GAIN_1
|
197 0x505B //RX_FDEQ_GAIN_1
|
||||||
|
@ -29486,11 +29486,11 @@
|
||||||
203 0x5854 //RX_FDEQ_GAIN_7
|
203 0x5854 //RX_FDEQ_GAIN_7
|
||||||
204 0x5452 //RX_FDEQ_GAIN_8
|
204 0x5452 //RX_FDEQ_GAIN_8
|
||||||
205 0x545A //RX_FDEQ_GAIN_9
|
205 0x545A //RX_FDEQ_GAIN_9
|
||||||
206 0x5648 //RX_FDEQ_GAIN_10
|
206 0x6A5C //RX_FDEQ_GAIN_10
|
||||||
207 0x4861 //RX_FDEQ_GAIN_11
|
207 0x5C71 //RX_FDEQ_GAIN_11
|
||||||
208 0x6555 //RX_FDEQ_GAIN_12
|
208 0x6555 //RX_FDEQ_GAIN_12
|
||||||
209 0x6969 //RX_FDEQ_GAIN_13
|
209 0x7183 //RX_FDEQ_GAIN_13
|
||||||
210 0x5F62 //RX_FDEQ_GAIN_14
|
210 0x7570 //RX_FDEQ_GAIN_14
|
||||||
211 0x9494 //RX_FDEQ_GAIN_15
|
211 0x9494 //RX_FDEQ_GAIN_15
|
||||||
212 0x4848 //RX_FDEQ_GAIN_16
|
212 0x4848 //RX_FDEQ_GAIN_16
|
||||||
213 0x4848 //RX_FDEQ_GAIN_17
|
213 0x4848 //RX_FDEQ_GAIN_17
|
||||||
|
@ -29512,8 +29512,8 @@
|
||||||
229 0x0D12 //RX_FDEQ_BIN_9
|
229 0x0D12 //RX_FDEQ_BIN_9
|
||||||
230 0x0C0E //RX_FDEQ_BIN_10
|
230 0x0C0E //RX_FDEQ_BIN_10
|
||||||
231 0x0E32 //RX_FDEQ_BIN_11
|
231 0x0E32 //RX_FDEQ_BIN_11
|
||||||
232 0x1423 //RX_FDEQ_BIN_12
|
232 0x140F //RX_FDEQ_BIN_12
|
||||||
233 0x151E //RX_FDEQ_BIN_13
|
233 0x291E //RX_FDEQ_BIN_13
|
||||||
234 0x1E2D //RX_FDEQ_BIN_14
|
234 0x1E2D //RX_FDEQ_BIN_14
|
||||||
235 0x2D40 //RX_FDEQ_BIN_15
|
235 0x2D40 //RX_FDEQ_BIN_15
|
||||||
236 0x0000 //RX_FDEQ_BIN_16
|
236 0x0000 //RX_FDEQ_BIN_16
|
||||||
|
@ -29559,7 +29559,7 @@
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
186 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
189 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x50C3 //RX_TDDRC_LIMITER_THRD
|
190 0x7214 //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0002 //RX_TDDRC_THRD_0
|
269 0x0002 //RX_TDDRC_THRD_0
|
||||||
270 0x0006 //RX_TDDRC_THRD_1
|
270 0x0006 //RX_TDDRC_THRD_1
|
||||||
|
@ -29573,7 +29573,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x04A0 //RX_TDDRC_DRC_GAIN
|
281 0x0492 //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0020 //RX_FDEQ_SUBNUM
|
195 0x0020 //RX_FDEQ_SUBNUM
|
||||||
196 0x8064 //RX_FDEQ_GAIN_0
|
196 0x8064 //RX_FDEQ_GAIN_0
|
||||||
197 0x505B //RX_FDEQ_GAIN_1
|
197 0x505B //RX_FDEQ_GAIN_1
|
||||||
|
@ -29585,11 +29585,11 @@
|
||||||
203 0x5854 //RX_FDEQ_GAIN_7
|
203 0x5854 //RX_FDEQ_GAIN_7
|
||||||
204 0x5452 //RX_FDEQ_GAIN_8
|
204 0x5452 //RX_FDEQ_GAIN_8
|
||||||
205 0x545A //RX_FDEQ_GAIN_9
|
205 0x545A //RX_FDEQ_GAIN_9
|
||||||
206 0x5648 //RX_FDEQ_GAIN_10
|
206 0x6A5C //RX_FDEQ_GAIN_10
|
||||||
207 0x4861 //RX_FDEQ_GAIN_11
|
207 0x5C71 //RX_FDEQ_GAIN_11
|
||||||
208 0x6555 //RX_FDEQ_GAIN_12
|
208 0x6555 //RX_FDEQ_GAIN_12
|
||||||
209 0x6969 //RX_FDEQ_GAIN_13
|
209 0x7183 //RX_FDEQ_GAIN_13
|
||||||
210 0x5F62 //RX_FDEQ_GAIN_14
|
210 0x7570 //RX_FDEQ_GAIN_14
|
||||||
211 0x9494 //RX_FDEQ_GAIN_15
|
211 0x9494 //RX_FDEQ_GAIN_15
|
||||||
212 0x4848 //RX_FDEQ_GAIN_16
|
212 0x4848 //RX_FDEQ_GAIN_16
|
||||||
213 0x4848 //RX_FDEQ_GAIN_17
|
213 0x4848 //RX_FDEQ_GAIN_17
|
||||||
|
@ -29611,8 +29611,8 @@
|
||||||
229 0x0D12 //RX_FDEQ_BIN_9
|
229 0x0D12 //RX_FDEQ_BIN_9
|
||||||
230 0x0C0E //RX_FDEQ_BIN_10
|
230 0x0C0E //RX_FDEQ_BIN_10
|
||||||
231 0x0E32 //RX_FDEQ_BIN_11
|
231 0x0E32 //RX_FDEQ_BIN_11
|
||||||
232 0x1423 //RX_FDEQ_BIN_12
|
232 0x140F //RX_FDEQ_BIN_12
|
||||||
233 0x151E //RX_FDEQ_BIN_13
|
233 0x291E //RX_FDEQ_BIN_13
|
||||||
234 0x1E2D //RX_FDEQ_BIN_14
|
234 0x1E2D //RX_FDEQ_BIN_14
|
||||||
235 0x2D40 //RX_FDEQ_BIN_15
|
235 0x2D40 //RX_FDEQ_BIN_15
|
||||||
236 0x0000 //RX_FDEQ_BIN_16
|
236 0x0000 //RX_FDEQ_BIN_16
|
||||||
|
|
Binary file not shown.
|
@ -3,7 +3,7 @@
|
||||||
#EXPORT_FLAG HEADSET
|
#EXPORT_FLAG HEADSET
|
||||||
#PARAM_MODE FULL
|
#PARAM_MODE FULL
|
||||||
#SAVE_MODE 3
|
#SAVE_MODE 3
|
||||||
#SAVE_TIME 2024-03-22 17:40:24
|
#SAVE_TIME 2024-04-02 17:22:44
|
||||||
|
|
||||||
#CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-NB
|
#CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-NB
|
||||||
#PARAM_TYPE TX+2RX
|
#PARAM_TYPE TX+2RX
|
||||||
|
@ -3715,8 +3715,8 @@
|
||||||
19 0x0020 //RX_PP_RESRV_1
|
19 0x0020 //RX_PP_RESRV_1
|
||||||
20 0x0600 //RX_N_SN_EST
|
20 0x0600 //RX_N_SN_EST
|
||||||
21 0x000C //RX_N2_SN_EST
|
21 0x000C //RX_N2_SN_EST
|
||||||
22 0x000F //RX_NS_LVL_CTRL
|
22 0x0009 //RX_NS_LVL_CTRL
|
||||||
23 0x0400 //RX_THR_SN_EST
|
23 0x0100 //RX_THR_SN_EST
|
||||||
24 0x7CCD //RX_LAMBDA_PFILT
|
24 0x7CCD //RX_LAMBDA_PFILT
|
||||||
25 0x000A //RX_MUTE_PERIOD
|
25 0x000A //RX_MUTE_PERIOD
|
||||||
26 0x0190 //RX_FADE_IN_PERIOD
|
26 0x0190 //RX_FADE_IN_PERIOD
|
||||||
|
@ -4544,7 +4544,7 @@
|
||||||
129 0x0100 //RX_SPK_VOL
|
129 0x0100 //RX_SPK_VOL
|
||||||
130 0x0000 //RX_VOL_RESRV_0
|
130 0x0000 //RX_VOL_RESRV_0
|
||||||
#RX 2
|
#RX 2
|
||||||
157 0xA43C //RX_RECVFUNC_MODE_0
|
157 0xA47C //RX_RECVFUNC_MODE_0
|
||||||
158 0x0000 //RX_RECVFUNC_MODE_1
|
158 0x0000 //RX_RECVFUNC_MODE_1
|
||||||
159 0x0001 //RX_SAMPLINGFREQ_SIG
|
159 0x0001 //RX_SAMPLINGFREQ_SIG
|
||||||
160 0x0001 //RX_SAMPLINGFREQ_PROC
|
160 0x0001 //RX_SAMPLINGFREQ_PROC
|
||||||
|
@ -4566,8 +4566,8 @@
|
||||||
176 0x0020 //RX_PP_RESRV_1
|
176 0x0020 //RX_PP_RESRV_1
|
||||||
177 0x0600 //RX_N_SN_EST
|
177 0x0600 //RX_N_SN_EST
|
||||||
178 0x000C //RX_N2_SN_EST
|
178 0x000C //RX_N2_SN_EST
|
||||||
179 0x0006 //RX_NS_LVL_CTRL
|
179 0x0009 //RX_NS_LVL_CTRL
|
||||||
180 0x0400 //RX_THR_SN_EST
|
180 0x0100 //RX_THR_SN_EST
|
||||||
181 0x7CCD //RX_LAMBDA_PFILT
|
181 0x7CCD //RX_LAMBDA_PFILT
|
||||||
182 0x000A //RX_MUTE_PERIOD
|
182 0x000A //RX_MUTE_PERIOD
|
||||||
183 0x0190 //RX_FADE_IN_PERIOD
|
183 0x0190 //RX_FADE_IN_PERIOD
|
||||||
|
@ -4798,7 +4798,7 @@
|
||||||
265 0x5333 //RX_FDDRC_SLANT_1_2
|
265 0x5333 //RX_FDDRC_SLANT_1_2
|
||||||
266 0x5333 //RX_FDDRC_SLANT_1_3
|
266 0x5333 //RX_FDDRC_SLANT_1_3
|
||||||
267 0x0000 //RX_FDDRC_RESRV_0
|
267 0x0000 //RX_FDDRC_RESRV_0
|
||||||
286 0x000A //RX_SPK_VOL
|
286 0x000B //RX_SPK_VOL
|
||||||
287 0x0000 //RX_VOL_RESRV_0
|
287 0x0000 //RX_VOL_RESRV_0
|
||||||
#VOL 1
|
#VOL 1
|
||||||
163 0x1000 //RX_TDDRC_ALPHA_UP_1
|
163 0x1000 //RX_TDDRC_ALPHA_UP_1
|
||||||
|
@ -4897,7 +4897,7 @@
|
||||||
265 0x5333 //RX_FDDRC_SLANT_1_2
|
265 0x5333 //RX_FDDRC_SLANT_1_2
|
||||||
266 0x5333 //RX_FDDRC_SLANT_1_3
|
266 0x5333 //RX_FDDRC_SLANT_1_3
|
||||||
267 0x0000 //RX_FDDRC_RESRV_0
|
267 0x0000 //RX_FDDRC_RESRV_0
|
||||||
286 0x000B //RX_SPK_VOL
|
286 0x0012 //RX_SPK_VOL
|
||||||
287 0x0000 //RX_VOL_RESRV_0
|
287 0x0000 //RX_VOL_RESRV_0
|
||||||
#VOL 2
|
#VOL 2
|
||||||
163 0x1000 //RX_TDDRC_ALPHA_UP_1
|
163 0x1000 //RX_TDDRC_ALPHA_UP_1
|
||||||
|
@ -11086,7 +11086,7 @@
|
||||||
294 0x000C //TX_MIN_GAIN_S_5
|
294 0x000C //TX_MIN_GAIN_S_5
|
||||||
295 0x000C //TX_MIN_GAIN_S_6
|
295 0x000C //TX_MIN_GAIN_S_6
|
||||||
296 0x000F //TX_MIN_GAIN_S_7
|
296 0x000F //TX_MIN_GAIN_S_7
|
||||||
297 0x6000 //TX_NMOS_SUP
|
297 0x4000 //TX_NMOS_SUP
|
||||||
298 0x0000 //TX_NS_MAX_PRI_SNR_TH
|
298 0x0000 //TX_NS_MAX_PRI_SNR_TH
|
||||||
299 0x0000 //TX_NMOS_SUP_MENSA
|
299 0x0000 //TX_NMOS_SUP_MENSA
|
||||||
300 0x7FFF //TX_SNRI_SUP_0
|
300 0x7FFF //TX_SNRI_SUP_0
|
||||||
|
@ -11576,10 +11576,10 @@
|
||||||
784 0x3000 //TX_TDDRC_ALPHA_UP_02
|
784 0x3000 //TX_TDDRC_ALPHA_UP_02
|
||||||
785 0x3000 //TX_TDDRC_ALPHA_UP_03
|
785 0x3000 //TX_TDDRC_ALPHA_UP_03
|
||||||
786 0x3000 //TX_TDDRC_ALPHA_UP_04
|
786 0x3000 //TX_TDDRC_ALPHA_UP_04
|
||||||
787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
|
787 0x6000 //TX_TDDRC_ALPHA_DWN_01
|
||||||
788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
|
788 0x6000 //TX_TDDRC_ALPHA_DWN_02
|
||||||
789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
|
789 0x6000 //TX_TDDRC_ALPHA_DWN_03
|
||||||
790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
|
790 0x6000 //TX_TDDRC_ALPHA_DWN_04
|
||||||
791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
|
791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
|
||||||
792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
|
792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
|
||||||
793 0x0000 //TX_TDDRC_RESRV_0
|
793 0x0000 //TX_TDDRC_RESRV_0
|
||||||
|
@ -11650,7 +11650,7 @@
|
||||||
858 0x3000 //TX_TDDRC_SLANT_0
|
858 0x3000 //TX_TDDRC_SLANT_0
|
||||||
859 0x6E00 //TX_TDDRC_SLANT_1
|
859 0x6E00 //TX_TDDRC_SLANT_1
|
||||||
860 0x3000 //TX_TDDRC_ALPHA_UP_00
|
860 0x3000 //TX_TDDRC_ALPHA_UP_00
|
||||||
861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
|
861 0x6000 //TX_TDDRC_ALPHA_DWN_00
|
||||||
862 0x0000 //TX_TDDRC_HMNC_FLAG
|
862 0x0000 //TX_TDDRC_HMNC_FLAG
|
||||||
863 0x199A //TX_TDDRC_HMNC_GAIN
|
863 0x199A //TX_TDDRC_HMNC_GAIN
|
||||||
864 0x0000 //TX_TDDRC_SMT_FLAG
|
864 0x0000 //TX_TDDRC_SMT_FLAG
|
||||||
|
@ -11778,7 +11778,7 @@
|
||||||
986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
|
986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
|
||||||
987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
|
987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
|
||||||
#RX
|
#RX
|
||||||
0 0x803C //RX_RECVFUNC_MODE_0
|
0 0x843C //RX_RECVFUNC_MODE_0
|
||||||
1 0x0000 //RX_RECVFUNC_MODE_1
|
1 0x0000 //RX_RECVFUNC_MODE_1
|
||||||
2 0x0003 //RX_SAMPLINGFREQ_SIG
|
2 0x0003 //RX_SAMPLINGFREQ_SIG
|
||||||
3 0x0003 //RX_SAMPLINGFREQ_PROC
|
3 0x0003 //RX_SAMPLINGFREQ_PROC
|
||||||
|
@ -12629,7 +12629,7 @@
|
||||||
129 0x0100 //RX_SPK_VOL
|
129 0x0100 //RX_SPK_VOL
|
||||||
130 0x0000 //RX_VOL_RESRV_0
|
130 0x0000 //RX_VOL_RESRV_0
|
||||||
#RX 2
|
#RX 2
|
||||||
157 0x803C //RX_RECVFUNC_MODE_0
|
157 0x843C //RX_RECVFUNC_MODE_0
|
||||||
158 0x0000 //RX_RECVFUNC_MODE_1
|
158 0x0000 //RX_RECVFUNC_MODE_1
|
||||||
159 0x0003 //RX_SAMPLINGFREQ_SIG
|
159 0x0003 //RX_SAMPLINGFREQ_SIG
|
||||||
160 0x0003 //RX_SAMPLINGFREQ_PROC
|
160 0x0003 //RX_SAMPLINGFREQ_PROC
|
||||||
|
@ -17190,8 +17190,8 @@
|
||||||
19 0x0020 //RX_PP_RESRV_1
|
19 0x0020 //RX_PP_RESRV_1
|
||||||
20 0x0600 //RX_N_SN_EST
|
20 0x0600 //RX_N_SN_EST
|
||||||
21 0x000C //RX_N2_SN_EST
|
21 0x000C //RX_N2_SN_EST
|
||||||
22 0x000F //RX_NS_LVL_CTRL
|
22 0x0009 //RX_NS_LVL_CTRL
|
||||||
23 0xF800 //RX_THR_SN_EST
|
23 0x0100 //RX_THR_SN_EST
|
||||||
24 0x7CCD //RX_LAMBDA_PFILT
|
24 0x7CCD //RX_LAMBDA_PFILT
|
||||||
25 0x000A //RX_MUTE_PERIOD
|
25 0x000A //RX_MUTE_PERIOD
|
||||||
26 0x0190 //RX_FADE_IN_PERIOD
|
26 0x0190 //RX_FADE_IN_PERIOD
|
||||||
|
@ -18041,8 +18041,8 @@
|
||||||
176 0x0020 //RX_PP_RESRV_1
|
176 0x0020 //RX_PP_RESRV_1
|
||||||
177 0x0600 //RX_N_SN_EST
|
177 0x0600 //RX_N_SN_EST
|
||||||
178 0x000C //RX_N2_SN_EST
|
178 0x000C //RX_N2_SN_EST
|
||||||
179 0x0006 //RX_NS_LVL_CTRL
|
179 0x0009 //RX_NS_LVL_CTRL
|
||||||
180 0xF800 //RX_THR_SN_EST
|
180 0x0100 //RX_THR_SN_EST
|
||||||
181 0x7CCD //RX_LAMBDA_PFILT
|
181 0x7CCD //RX_LAMBDA_PFILT
|
||||||
182 0x000A //RX_MUTE_PERIOD
|
182 0x000A //RX_MUTE_PERIOD
|
||||||
183 0x0190 //RX_FADE_IN_PERIOD
|
183 0x0190 //RX_FADE_IN_PERIOD
|
||||||
|
@ -29658,7 +29658,7 @@
|
||||||
1 0x0001 //TX_OPERATION_MODE_1
|
1 0x0001 //TX_OPERATION_MODE_1
|
||||||
2 0x00BB //TX_PATCH_REG
|
2 0x00BB //TX_PATCH_REG
|
||||||
3 0x6F7C //TX_SENDFUNC_MODE_0
|
3 0x6F7C //TX_SENDFUNC_MODE_0
|
||||||
4 0x0000 //TX_SENDFUNC_MODE_1
|
4 0x0080 //TX_SENDFUNC_MODE_1
|
||||||
5 0x0003 //TX_NUM_MIC
|
5 0x0003 //TX_NUM_MIC
|
||||||
6 0x0001 //TX_SAMPLINGFREQ_SIG
|
6 0x0001 //TX_SAMPLINGFREQ_SIG
|
||||||
7 0x0001 //TX_SAMPLINGFREQ_PROC
|
7 0x0001 //TX_SAMPLINGFREQ_PROC
|
||||||
|
@ -29899,18 +29899,18 @@
|
||||||
242 0xF800 //TX_THR_SN_EST_0
|
242 0xF800 //TX_THR_SN_EST_0
|
||||||
243 0x1200 //TX_THR_SN_EST_1
|
243 0x1200 //TX_THR_SN_EST_1
|
||||||
244 0x1000 //TX_THR_SN_EST_2
|
244 0x1000 //TX_THR_SN_EST_2
|
||||||
245 0x1000 //TX_THR_SN_EST_3
|
245 0xF600 //TX_THR_SN_EST_3
|
||||||
246 0xFA00 //TX_THR_SN_EST_4
|
246 0xFA00 //TX_THR_SN_EST_4
|
||||||
247 0xFA00 //TX_THR_SN_EST_5
|
247 0xFA00 //TX_THR_SN_EST_5
|
||||||
248 0xF000 //TX_THR_SN_EST_6
|
248 0xF600 //TX_THR_SN_EST_6
|
||||||
249 0xF800 //TX_THR_SN_EST_7
|
249 0xF800 //TX_THR_SN_EST_7
|
||||||
250 0x0100 //TX_DELTA_THR_SN_EST_0
|
250 0x0100 //TX_DELTA_THR_SN_EST_0
|
||||||
251 0xFB00 //TX_DELTA_THR_SN_EST_1
|
251 0xFB00 //TX_DELTA_THR_SN_EST_1
|
||||||
252 0xFD00 //TX_DELTA_THR_SN_EST_2
|
252 0xFD00 //TX_DELTA_THR_SN_EST_2
|
||||||
253 0xFD00 //TX_DELTA_THR_SN_EST_3
|
253 0xFB00 //TX_DELTA_THR_SN_EST_3
|
||||||
254 0x0100 //TX_DELTA_THR_SN_EST_4
|
254 0x0100 //TX_DELTA_THR_SN_EST_4
|
||||||
255 0x0200 //TX_DELTA_THR_SN_EST_5
|
255 0x0200 //TX_DELTA_THR_SN_EST_5
|
||||||
256 0x0700 //TX_DELTA_THR_SN_EST_6
|
256 0x0300 //TX_DELTA_THR_SN_EST_6
|
||||||
257 0x0200 //TX_DELTA_THR_SN_EST_7
|
257 0x0200 //TX_DELTA_THR_SN_EST_7
|
||||||
258 0x4000 //TX_LAMBDA_NN_EST_0
|
258 0x4000 //TX_LAMBDA_NN_EST_0
|
||||||
259 0x3FFF //TX_LAMBDA_NN_EST_1
|
259 0x3FFF //TX_LAMBDA_NN_EST_1
|
||||||
|
@ -29918,7 +29918,7 @@
|
||||||
261 0x3FFF //TX_LAMBDA_NN_EST_3
|
261 0x3FFF //TX_LAMBDA_NN_EST_3
|
||||||
262 0x4000 //TX_LAMBDA_NN_EST_4
|
262 0x4000 //TX_LAMBDA_NN_EST_4
|
||||||
263 0x4000 //TX_LAMBDA_NN_EST_5
|
263 0x4000 //TX_LAMBDA_NN_EST_5
|
||||||
264 0x4FFE //TX_LAMBDA_NN_EST_6
|
264 0x3FFF //TX_LAMBDA_NN_EST_6
|
||||||
265 0x4000 //TX_LAMBDA_NN_EST_7
|
265 0x4000 //TX_LAMBDA_NN_EST_7
|
||||||
266 0x0400 //TX_N_SN_EST
|
266 0x0400 //TX_N_SN_EST
|
||||||
267 0x001C //TX_INBEAM_T
|
267 0x001C //TX_INBEAM_T
|
||||||
|
@ -29938,18 +29938,18 @@
|
||||||
281 0x0010 //TX_NS_LVL_CTRL_0
|
281 0x0010 //TX_NS_LVL_CTRL_0
|
||||||
282 0x0008 //TX_NS_LVL_CTRL_1
|
282 0x0008 //TX_NS_LVL_CTRL_1
|
||||||
283 0x0020 //TX_NS_LVL_CTRL_2
|
283 0x0020 //TX_NS_LVL_CTRL_2
|
||||||
284 0x000C //TX_NS_LVL_CTRL_3
|
284 0x0010 //TX_NS_LVL_CTRL_3
|
||||||
285 0x0014 //TX_NS_LVL_CTRL_4
|
285 0x0014 //TX_NS_LVL_CTRL_4
|
||||||
286 0x0011 //TX_NS_LVL_CTRL_5
|
286 0x0011 //TX_NS_LVL_CTRL_5
|
||||||
287 0x0008 //TX_NS_LVL_CTRL_6
|
287 0x0024 //TX_NS_LVL_CTRL_6
|
||||||
288 0x0011 //TX_NS_LVL_CTRL_7
|
288 0x0011 //TX_NS_LVL_CTRL_7
|
||||||
289 0x001C //TX_MIN_GAIN_S_0
|
289 0x001C //TX_MIN_GAIN_S_0
|
||||||
290 0x0018 //TX_MIN_GAIN_S_1
|
290 0x0018 //TX_MIN_GAIN_S_1
|
||||||
291 0x0008 //TX_MIN_GAIN_S_2
|
291 0x0008 //TX_MIN_GAIN_S_2
|
||||||
292 0x0024 //TX_MIN_GAIN_S_3
|
292 0x0008 //TX_MIN_GAIN_S_3
|
||||||
293 0x0010 //TX_MIN_GAIN_S_4
|
293 0x0010 //TX_MIN_GAIN_S_4
|
||||||
294 0x0010 //TX_MIN_GAIN_S_5
|
294 0x0010 //TX_MIN_GAIN_S_5
|
||||||
295 0x0028 //TX_MIN_GAIN_S_6
|
295 0x001C //TX_MIN_GAIN_S_6
|
||||||
296 0x000F //TX_MIN_GAIN_S_7
|
296 0x000F //TX_MIN_GAIN_S_7
|
||||||
297 0x4FFD //TX_NMOS_SUP
|
297 0x4FFD //TX_NMOS_SUP
|
||||||
298 0x0000 //TX_NS_MAX_PRI_SNR_TH
|
298 0x0000 //TX_NS_MAX_PRI_SNR_TH
|
||||||
|
@ -29957,10 +29957,10 @@
|
||||||
300 0x7FFF //TX_SNRI_SUP_0
|
300 0x7FFF //TX_SNRI_SUP_0
|
||||||
301 0x2FFC //TX_SNRI_SUP_1
|
301 0x2FFC //TX_SNRI_SUP_1
|
||||||
302 0x4FF8 //TX_SNRI_SUP_2
|
302 0x4FF8 //TX_SNRI_SUP_2
|
||||||
303 0x1000 //TX_SNRI_SUP_3
|
303 0x47FF //TX_SNRI_SUP_3
|
||||||
304 0x4000 //TX_SNRI_SUP_4
|
304 0x4000 //TX_SNRI_SUP_4
|
||||||
305 0x50C0 //TX_SNRI_SUP_5
|
305 0x50C0 //TX_SNRI_SUP_5
|
||||||
306 0x77F3 //TX_SNRI_SUP_6
|
306 0x7FF8 //TX_SNRI_SUP_6
|
||||||
307 0x7FFF //TX_SNRI_SUP_7
|
307 0x7FFF //TX_SNRI_SUP_7
|
||||||
308 0x7FFF //TX_THR_LFNS
|
308 0x7FFF //TX_THR_LFNS
|
||||||
309 0x001C //TX_G_LFNS
|
309 0x001C //TX_G_LFNS
|
||||||
|
@ -29971,32 +29971,32 @@
|
||||||
314 0x5000 //TX_A_POST_FILT_S_0
|
314 0x5000 //TX_A_POST_FILT_S_0
|
||||||
315 0x47F9 //TX_A_POST_FILT_S_1
|
315 0x47F9 //TX_A_POST_FILT_S_1
|
||||||
316 0x37FB //TX_A_POST_FILT_S_2
|
316 0x37FB //TX_A_POST_FILT_S_2
|
||||||
317 0x2FFC //TX_A_POST_FILT_S_3
|
317 0x67F5 //TX_A_POST_FILT_S_3
|
||||||
318 0x4000 //TX_A_POST_FILT_S_4
|
318 0x4000 //TX_A_POST_FILT_S_4
|
||||||
319 0x5000 //TX_A_POST_FILT_S_5
|
319 0x5000 //TX_A_POST_FILT_S_5
|
||||||
320 0x27FD //TX_A_POST_FILT_S_6
|
320 0x7FF2 //TX_A_POST_FILT_S_6
|
||||||
321 0x7000 //TX_A_POST_FILT_S_7
|
321 0x7000 //TX_A_POST_FILT_S_7
|
||||||
322 0x2000 //TX_B_POST_FILT_0
|
322 0x2000 //TX_B_POST_FILT_0
|
||||||
323 0x2FFB //TX_B_POST_FILT_1
|
323 0x2FFB //TX_B_POST_FILT_1
|
||||||
324 0x27FC //TX_B_POST_FILT_2
|
324 0x27FC //TX_B_POST_FILT_2
|
||||||
325 0x2FFB //TX_B_POST_FILT_3
|
325 0x47F8 //TX_B_POST_FILT_3
|
||||||
326 0x4000 //TX_B_POST_FILT_4
|
326 0x4000 //TX_B_POST_FILT_4
|
||||||
327 0x1000 //TX_B_POST_FILT_5
|
327 0x1000 //TX_B_POST_FILT_5
|
||||||
328 0x0800 //TX_B_POST_FILT_6
|
328 0x5FF5 //TX_B_POST_FILT_6
|
||||||
329 0x2000 //TX_B_POST_FILT_7
|
329 0x2000 //TX_B_POST_FILT_7
|
||||||
330 0x4000 //TX_B_LESSCUT_RTO_S_0
|
330 0x4000 //TX_B_LESSCUT_RTO_S_0
|
||||||
331 0x5FFC //TX_B_LESSCUT_RTO_S_1
|
331 0x5FFC //TX_B_LESSCUT_RTO_S_1
|
||||||
332 0x4000 //TX_B_LESSCUT_RTO_S_2
|
332 0x4000 //TX_B_LESSCUT_RTO_S_2
|
||||||
333 0x4000 //TX_B_LESSCUT_RTO_S_3
|
333 0x4FFE //TX_B_LESSCUT_RTO_S_3
|
||||||
334 0x7FFF //TX_B_LESSCUT_RTO_S_4
|
334 0x7FFF //TX_B_LESSCUT_RTO_S_4
|
||||||
335 0x6000 //TX_B_LESSCUT_RTO_S_5
|
335 0x6000 //TX_B_LESSCUT_RTO_S_5
|
||||||
336 0x4FFE //TX_B_LESSCUT_RTO_S_6
|
336 0x77F9 //TX_B_LESSCUT_RTO_S_6
|
||||||
337 0x7FFF //TX_B_LESSCUT_RTO_S_7
|
337 0x7FFF //TX_B_LESSCUT_RTO_S_7
|
||||||
338 0x7C00 //TX_LAMBDA_PFILT
|
338 0x7C00 //TX_LAMBDA_PFILT
|
||||||
339 0x7C00 //TX_LAMBDA_PFILT_S_0
|
339 0x7C00 //TX_LAMBDA_PFILT_S_0
|
||||||
340 0x7FF0 //TX_LAMBDA_PFILT_S_1
|
340 0x7FF0 //TX_LAMBDA_PFILT_S_1
|
||||||
341 0x72FD //TX_LAMBDA_PFILT_S_2
|
341 0x72FD //TX_LAMBDA_PFILT_S_2
|
||||||
342 0x78F7 //TX_LAMBDA_PFILT_S_3
|
342 0x7EF1 //TX_LAMBDA_PFILT_S_3
|
||||||
343 0x7C00 //TX_LAMBDA_PFILT_S_4
|
343 0x7C00 //TX_LAMBDA_PFILT_S_4
|
||||||
344 0x7C00 //TX_LAMBDA_PFILT_S_5
|
344 0x7C00 //TX_LAMBDA_PFILT_S_5
|
||||||
345 0x7BF4 //TX_LAMBDA_PFILT_S_6
|
345 0x7BF4 //TX_LAMBDA_PFILT_S_6
|
||||||
|
@ -30044,14 +30044,14 @@
|
||||||
387 0x019A //TX_OUT_ENER_TH_NOISE
|
387 0x019A //TX_OUT_ENER_TH_NOISE
|
||||||
388 0x0333 //TX_OUT_ENER_TH_SPEECH
|
388 0x0333 //TX_OUT_ENER_TH_SPEECH
|
||||||
389 0x2000 //TX_SN_NPB_GAIN
|
389 0x2000 //TX_SN_NPB_GAIN
|
||||||
390 0x0000 //TX_NN_NPB_GAIN
|
390 0x1200 //TX_NN_NPB_GAIN
|
||||||
391 0x7FFF //TX_POST_MASK_SUP_HSNE
|
391 0x7FFF //TX_POST_MASK_SUP_HSNE
|
||||||
392 0x7FFF //TX_TAIL_DET_TH
|
392 0x7FFF //TX_TAIL_DET_TH
|
||||||
393 0x4000 //TX_B_LESSCUT_RTO_WTA
|
393 0x4000 //TX_B_LESSCUT_RTO_WTA
|
||||||
394 0x0000 //TX_MEL_G_R
|
394 0x0000 //TX_MEL_G_R
|
||||||
395 0x0080 //TX_SUPHIGH_TH
|
395 0x0080 //TX_SUPHIGH_TH
|
||||||
396 0x3000 //TX_MASK_G_R
|
396 0x3000 //TX_MASK_G_R
|
||||||
397 0x8001 //TX_LOGSNR_THR
|
397 0x0082 //TX_LOGSNR_THR
|
||||||
398 0x0000 //TX_C_POST_FLT_MASK
|
398 0x0000 //TX_C_POST_FLT_MASK
|
||||||
399 0x4000 //TX_A_POST_FLT_WNS
|
399 0x4000 //TX_A_POST_FLT_WNS
|
||||||
400 0x0148 //TX_MIN_G_LOW300HZ
|
400 0x0148 //TX_MIN_G_LOW300HZ
|
||||||
|
@ -30203,9 +30203,9 @@
|
||||||
546 0x59D8 //TX_WNS_SAT_TH
|
546 0x59D8 //TX_WNS_SAT_TH
|
||||||
547 0x0000 //TX_ABSM_WNS_TH
|
547 0x0000 //TX_ABSM_WNS_TH
|
||||||
548 0x0000 //TX_WNS_RESRV_3
|
548 0x0000 //TX_WNS_RESRV_3
|
||||||
549 0x0000 //TX_WNS_RESRV_4
|
549 0x4000 //TX_WNS_RESRV_4
|
||||||
550 0x0000 //TX_WNS_RESRV_5
|
550 0x7FFF //TX_WNS_RESRV_5
|
||||||
551 0x0000 //TX_WNS_RESRV_6
|
551 0x0100 //TX_WNS_RESRV_6
|
||||||
552 0x0000 //TX_BVE_NOISE_FLOOR_0
|
552 0x0000 //TX_BVE_NOISE_FLOOR_0
|
||||||
553 0x0070 //TX_BVE_NOISE_FLOOR_1
|
553 0x0070 //TX_BVE_NOISE_FLOOR_1
|
||||||
554 0x0070 //TX_BVE_NOISE_FLOOR_2
|
554 0x0070 //TX_BVE_NOISE_FLOOR_2
|
||||||
|
@ -30607,8 +30607,8 @@
|
||||||
950 0x0120 //TX_SDPCRN_GAIN
|
950 0x0120 //TX_SDPCRN_GAIN
|
||||||
951 0x7333 //TX_EASSA_CUT_GAINTH
|
951 0x7333 //TX_EASSA_CUT_GAINTH
|
||||||
952 0x0002 //TX_DT_HARME_ENDF
|
952 0x0002 //TX_DT_HARME_ENDF
|
||||||
953 0x77E3 //TX_NSSAMASK_MORENS
|
953 0x0BFE //TX_NSSAMASK_MORENS
|
||||||
954 0x0300 //TX_CGMMMASK_MORENS
|
954 0x5D00 //TX_CGMMMASK_MORENS
|
||||||
955 0x0CCD //TX_DPCRN_MASK_MORENS_ECHO
|
955 0x0CCD //TX_DPCRN_MASK_MORENS_ECHO
|
||||||
956 0x0028 //TX_PRE_EASSAMASK_SUP
|
956 0x0028 //TX_PRE_EASSAMASK_SUP
|
||||||
957 0x6FE5 //TX_NSSAMASK_MORENS_TYPE1
|
957 0x6FE5 //TX_NSSAMASK_MORENS_TYPE1
|
||||||
|
@ -30665,8 +30665,8 @@
|
||||||
19 0x0020 //RX_PP_RESRV_1
|
19 0x0020 //RX_PP_RESRV_1
|
||||||
20 0x0600 //RX_N_SN_EST
|
20 0x0600 //RX_N_SN_EST
|
||||||
21 0x000C //RX_N2_SN_EST
|
21 0x000C //RX_N2_SN_EST
|
||||||
22 0x000F //RX_NS_LVL_CTRL
|
22 0x0009 //RX_NS_LVL_CTRL
|
||||||
23 0xF800 //RX_THR_SN_EST
|
23 0x0100 //RX_THR_SN_EST
|
||||||
24 0x7CCD //RX_LAMBDA_PFILT
|
24 0x7CCD //RX_LAMBDA_PFILT
|
||||||
25 0x000A //RX_MUTE_PERIOD
|
25 0x000A //RX_MUTE_PERIOD
|
||||||
26 0x0190 //RX_FADE_IN_PERIOD
|
26 0x0190 //RX_FADE_IN_PERIOD
|
||||||
|
@ -31516,8 +31516,8 @@
|
||||||
176 0x0020 //RX_PP_RESRV_1
|
176 0x0020 //RX_PP_RESRV_1
|
||||||
177 0x0600 //RX_N_SN_EST
|
177 0x0600 //RX_N_SN_EST
|
||||||
178 0x000C //RX_N2_SN_EST
|
178 0x000C //RX_N2_SN_EST
|
||||||
179 0x0006 //RX_NS_LVL_CTRL
|
179 0x0009 //RX_NS_LVL_CTRL
|
||||||
180 0xF800 //RX_THR_SN_EST
|
180 0x0100 //RX_THR_SN_EST
|
||||||
181 0x7CCD //RX_LAMBDA_PFILT
|
181 0x7CCD //RX_LAMBDA_PFILT
|
||||||
182 0x000A //RX_MUTE_PERIOD
|
182 0x000A //RX_MUTE_PERIOD
|
||||||
183 0x0190 //RX_FADE_IN_PERIOD
|
183 0x0190 //RX_FADE_IN_PERIOD
|
||||||
|
@ -44138,9 +44138,9 @@
|
||||||
17 0x0003 //RX_SBD_PITCH_DET
|
17 0x0003 //RX_SBD_PITCH_DET
|
||||||
18 0x0100 //RX_PP_RESRV_0
|
18 0x0100 //RX_PP_RESRV_0
|
||||||
19 0x0020 //RX_PP_RESRV_1
|
19 0x0020 //RX_PP_RESRV_1
|
||||||
20 0x0600 //RX_N_SN_EST
|
20 0x0700 //RX_N_SN_EST
|
||||||
21 0x000C //RX_N2_SN_EST
|
21 0x000C //RX_N2_SN_EST
|
||||||
22 0x0006 //RX_NS_LVL_CTRL
|
22 0x0012 //RX_NS_LVL_CTRL
|
||||||
23 0xF800 //RX_THR_SN_EST
|
23 0xF800 //RX_THR_SN_EST
|
||||||
24 0x7CCD //RX_LAMBDA_PFILT
|
24 0x7CCD //RX_LAMBDA_PFILT
|
||||||
25 0x000A //RX_MUTE_PERIOD
|
25 0x000A //RX_MUTE_PERIOD
|
||||||
|
@ -44989,9 +44989,9 @@
|
||||||
174 0x0003 //RX_SBD_PITCH_DET
|
174 0x0003 //RX_SBD_PITCH_DET
|
||||||
175 0x0100 //RX_PP_RESRV_0
|
175 0x0100 //RX_PP_RESRV_0
|
||||||
176 0x0020 //RX_PP_RESRV_1
|
176 0x0020 //RX_PP_RESRV_1
|
||||||
177 0x0600 //RX_N_SN_EST
|
177 0x0700 //RX_N_SN_EST
|
||||||
178 0x000C //RX_N2_SN_EST
|
178 0x000C //RX_N2_SN_EST
|
||||||
179 0x0006 //RX_NS_LVL_CTRL
|
179 0x0012 //RX_NS_LVL_CTRL
|
||||||
180 0xF800 //RX_THR_SN_EST
|
180 0xF800 //RX_THR_SN_EST
|
||||||
181 0x7CCD //RX_LAMBDA_PFILT
|
181 0x7CCD //RX_LAMBDA_PFILT
|
||||||
182 0x000A //RX_MUTE_PERIOD
|
182 0x000A //RX_MUTE_PERIOD
|
||||||
|
@ -58353,7 +58353,7 @@
|
||||||
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
29 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
29 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
||||||
32 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
32 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
||||||
33 0x5A9D //RX_TDDRC_LIMITER_THRD
|
33 0x7214 //RX_TDDRC_LIMITER_THRD
|
||||||
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
112 0x0002 //RX_TDDRC_THRD_0
|
112 0x0002 //RX_TDDRC_THRD_0
|
||||||
113 0x0006 //RX_TDDRC_THRD_1
|
113 0x0006 //RX_TDDRC_THRD_1
|
||||||
|
@ -59204,7 +59204,7 @@
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
186 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
189 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x5A9D //RX_TDDRC_LIMITER_THRD
|
190 0x7214 //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0002 //RX_TDDRC_THRD_0
|
269 0x0002 //RX_TDDRC_THRD_0
|
||||||
270 0x0006 //RX_TDDRC_THRD_1
|
270 0x0006 //RX_TDDRC_THRD_1
|
||||||
|
@ -60963,7 +60963,7 @@
|
||||||
121 0x199A //RX_TDDRC_HMNC_GAIN
|
121 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
122 0x0001 //RX_TDDRC_SMT_FLAG
|
122 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
123 0x0CCD //RX_TDDRC_SMT_W
|
123 0x0CCD //RX_TDDRC_SMT_W
|
||||||
124 0x0278 //RX_TDDRC_DRC_GAIN
|
124 0x0271 //RX_TDDRC_DRC_GAIN
|
||||||
38 0x0020 //RX_FDEQ_SUBNUM
|
38 0x0020 //RX_FDEQ_SUBNUM
|
||||||
39 0x8064 //RX_FDEQ_GAIN_0
|
39 0x8064 //RX_FDEQ_GAIN_0
|
||||||
40 0x505B //RX_FDEQ_GAIN_1
|
40 0x505B //RX_FDEQ_GAIN_1
|
||||||
|
@ -60975,11 +60975,11 @@
|
||||||
46 0x5854 //RX_FDEQ_GAIN_7
|
46 0x5854 //RX_FDEQ_GAIN_7
|
||||||
47 0x5452 //RX_FDEQ_GAIN_8
|
47 0x5452 //RX_FDEQ_GAIN_8
|
||||||
48 0x545A //RX_FDEQ_GAIN_9
|
48 0x545A //RX_FDEQ_GAIN_9
|
||||||
49 0x5648 //RX_FDEQ_GAIN_10
|
49 0x6A5C //RX_FDEQ_GAIN_10
|
||||||
50 0x4861 //RX_FDEQ_GAIN_11
|
50 0x5C71 //RX_FDEQ_GAIN_11
|
||||||
51 0x6555 //RX_FDEQ_GAIN_12
|
51 0x6555 //RX_FDEQ_GAIN_12
|
||||||
52 0x6969 //RX_FDEQ_GAIN_13
|
52 0x7183 //RX_FDEQ_GAIN_13
|
||||||
53 0x5F62 //RX_FDEQ_GAIN_14
|
53 0x7570 //RX_FDEQ_GAIN_14
|
||||||
54 0x9494 //RX_FDEQ_GAIN_15
|
54 0x9494 //RX_FDEQ_GAIN_15
|
||||||
55 0x4848 //RX_FDEQ_GAIN_16
|
55 0x4848 //RX_FDEQ_GAIN_16
|
||||||
56 0x4848 //RX_FDEQ_GAIN_17
|
56 0x4848 //RX_FDEQ_GAIN_17
|
||||||
|
@ -61001,8 +61001,8 @@
|
||||||
72 0x0D12 //RX_FDEQ_BIN_9
|
72 0x0D12 //RX_FDEQ_BIN_9
|
||||||
73 0x0C0E //RX_FDEQ_BIN_10
|
73 0x0C0E //RX_FDEQ_BIN_10
|
||||||
74 0x0E32 //RX_FDEQ_BIN_11
|
74 0x0E32 //RX_FDEQ_BIN_11
|
||||||
75 0x1423 //RX_FDEQ_BIN_12
|
75 0x140F //RX_FDEQ_BIN_12
|
||||||
76 0x151E //RX_FDEQ_BIN_13
|
76 0x291E //RX_FDEQ_BIN_13
|
||||||
77 0x1E2D //RX_FDEQ_BIN_14
|
77 0x1E2D //RX_FDEQ_BIN_14
|
||||||
78 0x2D40 //RX_FDEQ_BIN_15
|
78 0x2D40 //RX_FDEQ_BIN_15
|
||||||
79 0x0000 //RX_FDEQ_BIN_16
|
79 0x0000 //RX_FDEQ_BIN_16
|
||||||
|
@ -61048,7 +61048,7 @@
|
||||||
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
29 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
29 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
||||||
32 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
32 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
||||||
33 0x50C3 //RX_TDDRC_LIMITER_THRD
|
33 0x7214 //RX_TDDRC_LIMITER_THRD
|
||||||
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
112 0x0002 //RX_TDDRC_THRD_0
|
112 0x0002 //RX_TDDRC_THRD_0
|
||||||
113 0x0006 //RX_TDDRC_THRD_1
|
113 0x0006 //RX_TDDRC_THRD_1
|
||||||
|
@ -61062,7 +61062,7 @@
|
||||||
121 0x199A //RX_TDDRC_HMNC_GAIN
|
121 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
122 0x0001 //RX_TDDRC_SMT_FLAG
|
122 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
123 0x0CCD //RX_TDDRC_SMT_W
|
123 0x0CCD //RX_TDDRC_SMT_W
|
||||||
124 0x04A0 //RX_TDDRC_DRC_GAIN
|
124 0x0492 //RX_TDDRC_DRC_GAIN
|
||||||
38 0x0020 //RX_FDEQ_SUBNUM
|
38 0x0020 //RX_FDEQ_SUBNUM
|
||||||
39 0x8064 //RX_FDEQ_GAIN_0
|
39 0x8064 //RX_FDEQ_GAIN_0
|
||||||
40 0x505B //RX_FDEQ_GAIN_1
|
40 0x505B //RX_FDEQ_GAIN_1
|
||||||
|
@ -61074,11 +61074,11 @@
|
||||||
46 0x5854 //RX_FDEQ_GAIN_7
|
46 0x5854 //RX_FDEQ_GAIN_7
|
||||||
47 0x5452 //RX_FDEQ_GAIN_8
|
47 0x5452 //RX_FDEQ_GAIN_8
|
||||||
48 0x545A //RX_FDEQ_GAIN_9
|
48 0x545A //RX_FDEQ_GAIN_9
|
||||||
49 0x5648 //RX_FDEQ_GAIN_10
|
49 0x6A5C //RX_FDEQ_GAIN_10
|
||||||
50 0x4861 //RX_FDEQ_GAIN_11
|
50 0x5C71 //RX_FDEQ_GAIN_11
|
||||||
51 0x6555 //RX_FDEQ_GAIN_12
|
51 0x6555 //RX_FDEQ_GAIN_12
|
||||||
52 0x6969 //RX_FDEQ_GAIN_13
|
52 0x7183 //RX_FDEQ_GAIN_13
|
||||||
53 0x5F62 //RX_FDEQ_GAIN_14
|
53 0x7570 //RX_FDEQ_GAIN_14
|
||||||
54 0x9494 //RX_FDEQ_GAIN_15
|
54 0x9494 //RX_FDEQ_GAIN_15
|
||||||
55 0x4848 //RX_FDEQ_GAIN_16
|
55 0x4848 //RX_FDEQ_GAIN_16
|
||||||
56 0x4848 //RX_FDEQ_GAIN_17
|
56 0x4848 //RX_FDEQ_GAIN_17
|
||||||
|
@ -61100,8 +61100,8 @@
|
||||||
72 0x0D12 //RX_FDEQ_BIN_9
|
72 0x0D12 //RX_FDEQ_BIN_9
|
||||||
73 0x0C0E //RX_FDEQ_BIN_10
|
73 0x0C0E //RX_FDEQ_BIN_10
|
||||||
74 0x0E32 //RX_FDEQ_BIN_11
|
74 0x0E32 //RX_FDEQ_BIN_11
|
||||||
75 0x1423 //RX_FDEQ_BIN_12
|
75 0x140F //RX_FDEQ_BIN_12
|
||||||
76 0x151E //RX_FDEQ_BIN_13
|
76 0x291E //RX_FDEQ_BIN_13
|
||||||
77 0x1E2D //RX_FDEQ_BIN_14
|
77 0x1E2D //RX_FDEQ_BIN_14
|
||||||
78 0x2D40 //RX_FDEQ_BIN_15
|
78 0x2D40 //RX_FDEQ_BIN_15
|
||||||
79 0x0000 //RX_FDEQ_BIN_16
|
79 0x0000 //RX_FDEQ_BIN_16
|
||||||
|
@ -61814,7 +61814,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x0278 //RX_TDDRC_DRC_GAIN
|
281 0x0271 //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0020 //RX_FDEQ_SUBNUM
|
195 0x0020 //RX_FDEQ_SUBNUM
|
||||||
196 0x8064 //RX_FDEQ_GAIN_0
|
196 0x8064 //RX_FDEQ_GAIN_0
|
||||||
197 0x505B //RX_FDEQ_GAIN_1
|
197 0x505B //RX_FDEQ_GAIN_1
|
||||||
|
@ -61826,11 +61826,11 @@
|
||||||
203 0x5854 //RX_FDEQ_GAIN_7
|
203 0x5854 //RX_FDEQ_GAIN_7
|
||||||
204 0x5452 //RX_FDEQ_GAIN_8
|
204 0x5452 //RX_FDEQ_GAIN_8
|
||||||
205 0x545A //RX_FDEQ_GAIN_9
|
205 0x545A //RX_FDEQ_GAIN_9
|
||||||
206 0x5648 //RX_FDEQ_GAIN_10
|
206 0x6A5C //RX_FDEQ_GAIN_10
|
||||||
207 0x4861 //RX_FDEQ_GAIN_11
|
207 0x5C71 //RX_FDEQ_GAIN_11
|
||||||
208 0x6555 //RX_FDEQ_GAIN_12
|
208 0x6555 //RX_FDEQ_GAIN_12
|
||||||
209 0x6969 //RX_FDEQ_GAIN_13
|
209 0x7183 //RX_FDEQ_GAIN_13
|
||||||
210 0x5F62 //RX_FDEQ_GAIN_14
|
210 0x7570 //RX_FDEQ_GAIN_14
|
||||||
211 0x9494 //RX_FDEQ_GAIN_15
|
211 0x9494 //RX_FDEQ_GAIN_15
|
||||||
212 0x4848 //RX_FDEQ_GAIN_16
|
212 0x4848 //RX_FDEQ_GAIN_16
|
||||||
213 0x4848 //RX_FDEQ_GAIN_17
|
213 0x4848 //RX_FDEQ_GAIN_17
|
||||||
|
@ -61852,8 +61852,8 @@
|
||||||
229 0x0D12 //RX_FDEQ_BIN_9
|
229 0x0D12 //RX_FDEQ_BIN_9
|
||||||
230 0x0C0E //RX_FDEQ_BIN_10
|
230 0x0C0E //RX_FDEQ_BIN_10
|
||||||
231 0x0E32 //RX_FDEQ_BIN_11
|
231 0x0E32 //RX_FDEQ_BIN_11
|
||||||
232 0x1423 //RX_FDEQ_BIN_12
|
232 0x140F //RX_FDEQ_BIN_12
|
||||||
233 0x151E //RX_FDEQ_BIN_13
|
233 0x291E //RX_FDEQ_BIN_13
|
||||||
234 0x1E2D //RX_FDEQ_BIN_14
|
234 0x1E2D //RX_FDEQ_BIN_14
|
||||||
235 0x2D40 //RX_FDEQ_BIN_15
|
235 0x2D40 //RX_FDEQ_BIN_15
|
||||||
236 0x0000 //RX_FDEQ_BIN_16
|
236 0x0000 //RX_FDEQ_BIN_16
|
||||||
|
@ -61899,7 +61899,7 @@
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
186 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
189 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x50C3 //RX_TDDRC_LIMITER_THRD
|
190 0x7214 //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0002 //RX_TDDRC_THRD_0
|
269 0x0002 //RX_TDDRC_THRD_0
|
||||||
270 0x0006 //RX_TDDRC_THRD_1
|
270 0x0006 //RX_TDDRC_THRD_1
|
||||||
|
@ -61913,7 +61913,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x04A0 //RX_TDDRC_DRC_GAIN
|
281 0x0492 //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0020 //RX_FDEQ_SUBNUM
|
195 0x0020 //RX_FDEQ_SUBNUM
|
||||||
196 0x8064 //RX_FDEQ_GAIN_0
|
196 0x8064 //RX_FDEQ_GAIN_0
|
||||||
197 0x505B //RX_FDEQ_GAIN_1
|
197 0x505B //RX_FDEQ_GAIN_1
|
||||||
|
@ -61925,11 +61925,11 @@
|
||||||
203 0x5854 //RX_FDEQ_GAIN_7
|
203 0x5854 //RX_FDEQ_GAIN_7
|
||||||
204 0x5452 //RX_FDEQ_GAIN_8
|
204 0x5452 //RX_FDEQ_GAIN_8
|
||||||
205 0x545A //RX_FDEQ_GAIN_9
|
205 0x545A //RX_FDEQ_GAIN_9
|
||||||
206 0x5648 //RX_FDEQ_GAIN_10
|
206 0x6A5C //RX_FDEQ_GAIN_10
|
||||||
207 0x4861 //RX_FDEQ_GAIN_11
|
207 0x5C71 //RX_FDEQ_GAIN_11
|
||||||
208 0x6555 //RX_FDEQ_GAIN_12
|
208 0x6555 //RX_FDEQ_GAIN_12
|
||||||
209 0x6969 //RX_FDEQ_GAIN_13
|
209 0x7183 //RX_FDEQ_GAIN_13
|
||||||
210 0x5F62 //RX_FDEQ_GAIN_14
|
210 0x7570 //RX_FDEQ_GAIN_14
|
||||||
211 0x9494 //RX_FDEQ_GAIN_15
|
211 0x9494 //RX_FDEQ_GAIN_15
|
||||||
212 0x4848 //RX_FDEQ_GAIN_16
|
212 0x4848 //RX_FDEQ_GAIN_16
|
||||||
213 0x4848 //RX_FDEQ_GAIN_17
|
213 0x4848 //RX_FDEQ_GAIN_17
|
||||||
|
@ -61951,8 +61951,8 @@
|
||||||
229 0x0D12 //RX_FDEQ_BIN_9
|
229 0x0D12 //RX_FDEQ_BIN_9
|
||||||
230 0x0C0E //RX_FDEQ_BIN_10
|
230 0x0C0E //RX_FDEQ_BIN_10
|
||||||
231 0x0E32 //RX_FDEQ_BIN_11
|
231 0x0E32 //RX_FDEQ_BIN_11
|
||||||
232 0x1423 //RX_FDEQ_BIN_12
|
232 0x140F //RX_FDEQ_BIN_12
|
||||||
233 0x151E //RX_FDEQ_BIN_13
|
233 0x291E //RX_FDEQ_BIN_13
|
||||||
234 0x1E2D //RX_FDEQ_BIN_14
|
234 0x1E2D //RX_FDEQ_BIN_14
|
||||||
235 0x2D40 //RX_FDEQ_BIN_15
|
235 0x2D40 //RX_FDEQ_BIN_15
|
||||||
236 0x0000 //RX_FDEQ_BIN_16
|
236 0x0000 //RX_FDEQ_BIN_16
|
||||||
|
@ -66353,7 +66353,7 @@
|
||||||
121 0x199A //RX_TDDRC_HMNC_GAIN
|
121 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
122 0x0001 //RX_TDDRC_SMT_FLAG
|
122 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
123 0x0CCD //RX_TDDRC_SMT_W
|
123 0x0CCD //RX_TDDRC_SMT_W
|
||||||
124 0x0278 //RX_TDDRC_DRC_GAIN
|
124 0x0271 //RX_TDDRC_DRC_GAIN
|
||||||
38 0x0020 //RX_FDEQ_SUBNUM
|
38 0x0020 //RX_FDEQ_SUBNUM
|
||||||
39 0x8064 //RX_FDEQ_GAIN_0
|
39 0x8064 //RX_FDEQ_GAIN_0
|
||||||
40 0x505B //RX_FDEQ_GAIN_1
|
40 0x505B //RX_FDEQ_GAIN_1
|
||||||
|
@ -66365,11 +66365,11 @@
|
||||||
46 0x5854 //RX_FDEQ_GAIN_7
|
46 0x5854 //RX_FDEQ_GAIN_7
|
||||||
47 0x5452 //RX_FDEQ_GAIN_8
|
47 0x5452 //RX_FDEQ_GAIN_8
|
||||||
48 0x545A //RX_FDEQ_GAIN_9
|
48 0x545A //RX_FDEQ_GAIN_9
|
||||||
49 0x5648 //RX_FDEQ_GAIN_10
|
49 0x6A5C //RX_FDEQ_GAIN_10
|
||||||
50 0x4861 //RX_FDEQ_GAIN_11
|
50 0x5C71 //RX_FDEQ_GAIN_11
|
||||||
51 0x6555 //RX_FDEQ_GAIN_12
|
51 0x6555 //RX_FDEQ_GAIN_12
|
||||||
52 0x6969 //RX_FDEQ_GAIN_13
|
52 0x7183 //RX_FDEQ_GAIN_13
|
||||||
53 0x5F62 //RX_FDEQ_GAIN_14
|
53 0x7570 //RX_FDEQ_GAIN_14
|
||||||
54 0x9494 //RX_FDEQ_GAIN_15
|
54 0x9494 //RX_FDEQ_GAIN_15
|
||||||
55 0x4848 //RX_FDEQ_GAIN_16
|
55 0x4848 //RX_FDEQ_GAIN_16
|
||||||
56 0x4848 //RX_FDEQ_GAIN_17
|
56 0x4848 //RX_FDEQ_GAIN_17
|
||||||
|
@ -66391,8 +66391,8 @@
|
||||||
72 0x0D12 //RX_FDEQ_BIN_9
|
72 0x0D12 //RX_FDEQ_BIN_9
|
||||||
73 0x0C0E //RX_FDEQ_BIN_10
|
73 0x0C0E //RX_FDEQ_BIN_10
|
||||||
74 0x0E32 //RX_FDEQ_BIN_11
|
74 0x0E32 //RX_FDEQ_BIN_11
|
||||||
75 0x1423 //RX_FDEQ_BIN_12
|
75 0x140F //RX_FDEQ_BIN_12
|
||||||
76 0x151E //RX_FDEQ_BIN_13
|
76 0x291E //RX_FDEQ_BIN_13
|
||||||
77 0x1E2D //RX_FDEQ_BIN_14
|
77 0x1E2D //RX_FDEQ_BIN_14
|
||||||
78 0x2D40 //RX_FDEQ_BIN_15
|
78 0x2D40 //RX_FDEQ_BIN_15
|
||||||
79 0x0000 //RX_FDEQ_BIN_16
|
79 0x0000 //RX_FDEQ_BIN_16
|
||||||
|
@ -66438,7 +66438,7 @@
|
||||||
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
29 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
29 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
||||||
32 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
32 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
||||||
33 0x50C3 //RX_TDDRC_LIMITER_THRD
|
33 0x7214 //RX_TDDRC_LIMITER_THRD
|
||||||
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
34 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
112 0x0002 //RX_TDDRC_THRD_0
|
112 0x0002 //RX_TDDRC_THRD_0
|
||||||
113 0x0006 //RX_TDDRC_THRD_1
|
113 0x0006 //RX_TDDRC_THRD_1
|
||||||
|
@ -66452,7 +66452,7 @@
|
||||||
121 0x199A //RX_TDDRC_HMNC_GAIN
|
121 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
122 0x0001 //RX_TDDRC_SMT_FLAG
|
122 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
123 0x0CCD //RX_TDDRC_SMT_W
|
123 0x0CCD //RX_TDDRC_SMT_W
|
||||||
124 0x04A0 //RX_TDDRC_DRC_GAIN
|
124 0x0492 //RX_TDDRC_DRC_GAIN
|
||||||
38 0x0020 //RX_FDEQ_SUBNUM
|
38 0x0020 //RX_FDEQ_SUBNUM
|
||||||
39 0x8064 //RX_FDEQ_GAIN_0
|
39 0x8064 //RX_FDEQ_GAIN_0
|
||||||
40 0x505B //RX_FDEQ_GAIN_1
|
40 0x505B //RX_FDEQ_GAIN_1
|
||||||
|
@ -66464,11 +66464,11 @@
|
||||||
46 0x5854 //RX_FDEQ_GAIN_7
|
46 0x5854 //RX_FDEQ_GAIN_7
|
||||||
47 0x5452 //RX_FDEQ_GAIN_8
|
47 0x5452 //RX_FDEQ_GAIN_8
|
||||||
48 0x545A //RX_FDEQ_GAIN_9
|
48 0x545A //RX_FDEQ_GAIN_9
|
||||||
49 0x5648 //RX_FDEQ_GAIN_10
|
49 0x6A5C //RX_FDEQ_GAIN_10
|
||||||
50 0x4861 //RX_FDEQ_GAIN_11
|
50 0x5C71 //RX_FDEQ_GAIN_11
|
||||||
51 0x6555 //RX_FDEQ_GAIN_12
|
51 0x6555 //RX_FDEQ_GAIN_12
|
||||||
52 0x6969 //RX_FDEQ_GAIN_13
|
52 0x7183 //RX_FDEQ_GAIN_13
|
||||||
53 0x5F62 //RX_FDEQ_GAIN_14
|
53 0x7570 //RX_FDEQ_GAIN_14
|
||||||
54 0x9494 //RX_FDEQ_GAIN_15
|
54 0x9494 //RX_FDEQ_GAIN_15
|
||||||
55 0x4848 //RX_FDEQ_GAIN_16
|
55 0x4848 //RX_FDEQ_GAIN_16
|
||||||
56 0x4848 //RX_FDEQ_GAIN_17
|
56 0x4848 //RX_FDEQ_GAIN_17
|
||||||
|
@ -66490,8 +66490,8 @@
|
||||||
72 0x0D12 //RX_FDEQ_BIN_9
|
72 0x0D12 //RX_FDEQ_BIN_9
|
||||||
73 0x0C0E //RX_FDEQ_BIN_10
|
73 0x0C0E //RX_FDEQ_BIN_10
|
||||||
74 0x0E32 //RX_FDEQ_BIN_11
|
74 0x0E32 //RX_FDEQ_BIN_11
|
||||||
75 0x1423 //RX_FDEQ_BIN_12
|
75 0x140F //RX_FDEQ_BIN_12
|
||||||
76 0x151E //RX_FDEQ_BIN_13
|
76 0x291E //RX_FDEQ_BIN_13
|
||||||
77 0x1E2D //RX_FDEQ_BIN_14
|
77 0x1E2D //RX_FDEQ_BIN_14
|
||||||
78 0x2D40 //RX_FDEQ_BIN_15
|
78 0x2D40 //RX_FDEQ_BIN_15
|
||||||
79 0x0000 //RX_FDEQ_BIN_16
|
79 0x0000 //RX_FDEQ_BIN_16
|
||||||
|
@ -67204,7 +67204,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x0278 //RX_TDDRC_DRC_GAIN
|
281 0x0271 //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0020 //RX_FDEQ_SUBNUM
|
195 0x0020 //RX_FDEQ_SUBNUM
|
||||||
196 0x8064 //RX_FDEQ_GAIN_0
|
196 0x8064 //RX_FDEQ_GAIN_0
|
||||||
197 0x505B //RX_FDEQ_GAIN_1
|
197 0x505B //RX_FDEQ_GAIN_1
|
||||||
|
@ -67216,11 +67216,11 @@
|
||||||
203 0x5854 //RX_FDEQ_GAIN_7
|
203 0x5854 //RX_FDEQ_GAIN_7
|
||||||
204 0x5452 //RX_FDEQ_GAIN_8
|
204 0x5452 //RX_FDEQ_GAIN_8
|
||||||
205 0x545A //RX_FDEQ_GAIN_9
|
205 0x545A //RX_FDEQ_GAIN_9
|
||||||
206 0x5648 //RX_FDEQ_GAIN_10
|
206 0x6A5C //RX_FDEQ_GAIN_10
|
||||||
207 0x4861 //RX_FDEQ_GAIN_11
|
207 0x5C71 //RX_FDEQ_GAIN_11
|
||||||
208 0x6555 //RX_FDEQ_GAIN_12
|
208 0x6555 //RX_FDEQ_GAIN_12
|
||||||
209 0x6969 //RX_FDEQ_GAIN_13
|
209 0x7183 //RX_FDEQ_GAIN_13
|
||||||
210 0x5F62 //RX_FDEQ_GAIN_14
|
210 0x7570 //RX_FDEQ_GAIN_14
|
||||||
211 0x9494 //RX_FDEQ_GAIN_15
|
211 0x9494 //RX_FDEQ_GAIN_15
|
||||||
212 0x4848 //RX_FDEQ_GAIN_16
|
212 0x4848 //RX_FDEQ_GAIN_16
|
||||||
213 0x4848 //RX_FDEQ_GAIN_17
|
213 0x4848 //RX_FDEQ_GAIN_17
|
||||||
|
@ -67242,8 +67242,8 @@
|
||||||
229 0x0D12 //RX_FDEQ_BIN_9
|
229 0x0D12 //RX_FDEQ_BIN_9
|
||||||
230 0x0C0E //RX_FDEQ_BIN_10
|
230 0x0C0E //RX_FDEQ_BIN_10
|
||||||
231 0x0E32 //RX_FDEQ_BIN_11
|
231 0x0E32 //RX_FDEQ_BIN_11
|
||||||
232 0x1423 //RX_FDEQ_BIN_12
|
232 0x140F //RX_FDEQ_BIN_12
|
||||||
233 0x151E //RX_FDEQ_BIN_13
|
233 0x291E //RX_FDEQ_BIN_13
|
||||||
234 0x1E2D //RX_FDEQ_BIN_14
|
234 0x1E2D //RX_FDEQ_BIN_14
|
||||||
235 0x2D40 //RX_FDEQ_BIN_15
|
235 0x2D40 //RX_FDEQ_BIN_15
|
||||||
236 0x0000 //RX_FDEQ_BIN_16
|
236 0x0000 //RX_FDEQ_BIN_16
|
||||||
|
@ -67289,7 +67289,7 @@
|
||||||
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
|
||||||
186 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
186 0x6000 //RX_TDDRC_ALPHA_DWN_3
|
||||||
189 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
189 0x4000 //RX_TDDRC_ALPHA_DWN_4
|
||||||
190 0x50C3 //RX_TDDRC_LIMITER_THRD
|
190 0x7214 //RX_TDDRC_LIMITER_THRD
|
||||||
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
191 0x0800 //RX_TDDRC_LIMITER_GAIN
|
||||||
269 0x0002 //RX_TDDRC_THRD_0
|
269 0x0002 //RX_TDDRC_THRD_0
|
||||||
270 0x0006 //RX_TDDRC_THRD_1
|
270 0x0006 //RX_TDDRC_THRD_1
|
||||||
|
@ -67303,7 +67303,7 @@
|
||||||
278 0x199A //RX_TDDRC_HMNC_GAIN
|
278 0x199A //RX_TDDRC_HMNC_GAIN
|
||||||
279 0x0001 //RX_TDDRC_SMT_FLAG
|
279 0x0001 //RX_TDDRC_SMT_FLAG
|
||||||
280 0x0CCD //RX_TDDRC_SMT_W
|
280 0x0CCD //RX_TDDRC_SMT_W
|
||||||
281 0x04A0 //RX_TDDRC_DRC_GAIN
|
281 0x0492 //RX_TDDRC_DRC_GAIN
|
||||||
195 0x0020 //RX_FDEQ_SUBNUM
|
195 0x0020 //RX_FDEQ_SUBNUM
|
||||||
196 0x8064 //RX_FDEQ_GAIN_0
|
196 0x8064 //RX_FDEQ_GAIN_0
|
||||||
197 0x505B //RX_FDEQ_GAIN_1
|
197 0x505B //RX_FDEQ_GAIN_1
|
||||||
|
@ -67315,11 +67315,11 @@
|
||||||
203 0x5854 //RX_FDEQ_GAIN_7
|
203 0x5854 //RX_FDEQ_GAIN_7
|
||||||
204 0x5452 //RX_FDEQ_GAIN_8
|
204 0x5452 //RX_FDEQ_GAIN_8
|
||||||
205 0x545A //RX_FDEQ_GAIN_9
|
205 0x545A //RX_FDEQ_GAIN_9
|
||||||
206 0x5648 //RX_FDEQ_GAIN_10
|
206 0x6A5C //RX_FDEQ_GAIN_10
|
||||||
207 0x4861 //RX_FDEQ_GAIN_11
|
207 0x5C71 //RX_FDEQ_GAIN_11
|
||||||
208 0x6555 //RX_FDEQ_GAIN_12
|
208 0x6555 //RX_FDEQ_GAIN_12
|
||||||
209 0x6969 //RX_FDEQ_GAIN_13
|
209 0x7183 //RX_FDEQ_GAIN_13
|
||||||
210 0x5F62 //RX_FDEQ_GAIN_14
|
210 0x7570 //RX_FDEQ_GAIN_14
|
||||||
211 0x9494 //RX_FDEQ_GAIN_15
|
211 0x9494 //RX_FDEQ_GAIN_15
|
||||||
212 0x4848 //RX_FDEQ_GAIN_16
|
212 0x4848 //RX_FDEQ_GAIN_16
|
||||||
213 0x4848 //RX_FDEQ_GAIN_17
|
213 0x4848 //RX_FDEQ_GAIN_17
|
||||||
|
@ -67341,8 +67341,8 @@
|
||||||
229 0x0D12 //RX_FDEQ_BIN_9
|
229 0x0D12 //RX_FDEQ_BIN_9
|
||||||
230 0x0C0E //RX_FDEQ_BIN_10
|
230 0x0C0E //RX_FDEQ_BIN_10
|
||||||
231 0x0E32 //RX_FDEQ_BIN_11
|
231 0x0E32 //RX_FDEQ_BIN_11
|
||||||
232 0x1423 //RX_FDEQ_BIN_12
|
232 0x140F //RX_FDEQ_BIN_12
|
||||||
233 0x151E //RX_FDEQ_BIN_13
|
233 0x291E //RX_FDEQ_BIN_13
|
||||||
234 0x1E2D //RX_FDEQ_BIN_14
|
234 0x1E2D //RX_FDEQ_BIN_14
|
||||||
235 0x2D40 //RX_FDEQ_BIN_15
|
235 0x2D40 //RX_FDEQ_BIN_15
|
||||||
236 0x0000 //RX_FDEQ_BIN_16
|
236 0x0000 //RX_FDEQ_BIN_16
|
||||||
|
@ -70083,7 +70083,7 @@
|
||||||
1 0x0001 //TX_OPERATION_MODE_1
|
1 0x0001 //TX_OPERATION_MODE_1
|
||||||
2 0x00BB //TX_PATCH_REG
|
2 0x00BB //TX_PATCH_REG
|
||||||
3 0x6F7C //TX_SENDFUNC_MODE_0
|
3 0x6F7C //TX_SENDFUNC_MODE_0
|
||||||
4 0x0000 //TX_SENDFUNC_MODE_1
|
4 0x0080 //TX_SENDFUNC_MODE_1
|
||||||
5 0x0003 //TX_NUM_MIC
|
5 0x0003 //TX_NUM_MIC
|
||||||
6 0x0001 //TX_SAMPLINGFREQ_SIG
|
6 0x0001 //TX_SAMPLINGFREQ_SIG
|
||||||
7 0x0001 //TX_SAMPLINGFREQ_PROC
|
7 0x0001 //TX_SAMPLINGFREQ_PROC
|
||||||
|
@ -70324,18 +70324,18 @@
|
||||||
242 0xF800 //TX_THR_SN_EST_0
|
242 0xF800 //TX_THR_SN_EST_0
|
||||||
243 0x1200 //TX_THR_SN_EST_1
|
243 0x1200 //TX_THR_SN_EST_1
|
||||||
244 0x1000 //TX_THR_SN_EST_2
|
244 0x1000 //TX_THR_SN_EST_2
|
||||||
245 0x1000 //TX_THR_SN_EST_3
|
245 0xF600 //TX_THR_SN_EST_3
|
||||||
246 0xFA00 //TX_THR_SN_EST_4
|
246 0xFA00 //TX_THR_SN_EST_4
|
||||||
247 0xFA00 //TX_THR_SN_EST_5
|
247 0xFA00 //TX_THR_SN_EST_5
|
||||||
248 0xF000 //TX_THR_SN_EST_6
|
248 0xF600 //TX_THR_SN_EST_6
|
||||||
249 0xF800 //TX_THR_SN_EST_7
|
249 0xF800 //TX_THR_SN_EST_7
|
||||||
250 0x0100 //TX_DELTA_THR_SN_EST_0
|
250 0x0100 //TX_DELTA_THR_SN_EST_0
|
||||||
251 0xFB00 //TX_DELTA_THR_SN_EST_1
|
251 0xFB00 //TX_DELTA_THR_SN_EST_1
|
||||||
252 0xFD00 //TX_DELTA_THR_SN_EST_2
|
252 0xFD00 //TX_DELTA_THR_SN_EST_2
|
||||||
253 0xFD00 //TX_DELTA_THR_SN_EST_3
|
253 0xFB00 //TX_DELTA_THR_SN_EST_3
|
||||||
254 0x0100 //TX_DELTA_THR_SN_EST_4
|
254 0x0100 //TX_DELTA_THR_SN_EST_4
|
||||||
255 0x0200 //TX_DELTA_THR_SN_EST_5
|
255 0x0200 //TX_DELTA_THR_SN_EST_5
|
||||||
256 0x0700 //TX_DELTA_THR_SN_EST_6
|
256 0x0300 //TX_DELTA_THR_SN_EST_6
|
||||||
257 0x0200 //TX_DELTA_THR_SN_EST_7
|
257 0x0200 //TX_DELTA_THR_SN_EST_7
|
||||||
258 0x4000 //TX_LAMBDA_NN_EST_0
|
258 0x4000 //TX_LAMBDA_NN_EST_0
|
||||||
259 0x3FFF //TX_LAMBDA_NN_EST_1
|
259 0x3FFF //TX_LAMBDA_NN_EST_1
|
||||||
|
@ -70343,7 +70343,7 @@
|
||||||
261 0x3FFF //TX_LAMBDA_NN_EST_3
|
261 0x3FFF //TX_LAMBDA_NN_EST_3
|
||||||
262 0x4000 //TX_LAMBDA_NN_EST_4
|
262 0x4000 //TX_LAMBDA_NN_EST_4
|
||||||
263 0x4000 //TX_LAMBDA_NN_EST_5
|
263 0x4000 //TX_LAMBDA_NN_EST_5
|
||||||
264 0x4FFE //TX_LAMBDA_NN_EST_6
|
264 0x3FFF //TX_LAMBDA_NN_EST_6
|
||||||
265 0x4000 //TX_LAMBDA_NN_EST_7
|
265 0x4000 //TX_LAMBDA_NN_EST_7
|
||||||
266 0x0400 //TX_N_SN_EST
|
266 0x0400 //TX_N_SN_EST
|
||||||
267 0x001C //TX_INBEAM_T
|
267 0x001C //TX_INBEAM_T
|
||||||
|
@ -70363,18 +70363,18 @@
|
||||||
281 0x0010 //TX_NS_LVL_CTRL_0
|
281 0x0010 //TX_NS_LVL_CTRL_0
|
||||||
282 0x0008 //TX_NS_LVL_CTRL_1
|
282 0x0008 //TX_NS_LVL_CTRL_1
|
||||||
283 0x0020 //TX_NS_LVL_CTRL_2
|
283 0x0020 //TX_NS_LVL_CTRL_2
|
||||||
284 0x000C //TX_NS_LVL_CTRL_3
|
284 0x0010 //TX_NS_LVL_CTRL_3
|
||||||
285 0x0014 //TX_NS_LVL_CTRL_4
|
285 0x0014 //TX_NS_LVL_CTRL_4
|
||||||
286 0x0011 //TX_NS_LVL_CTRL_5
|
286 0x0011 //TX_NS_LVL_CTRL_5
|
||||||
287 0x0008 //TX_NS_LVL_CTRL_6
|
287 0x0024 //TX_NS_LVL_CTRL_6
|
||||||
288 0x0011 //TX_NS_LVL_CTRL_7
|
288 0x0011 //TX_NS_LVL_CTRL_7
|
||||||
289 0x001C //TX_MIN_GAIN_S_0
|
289 0x001C //TX_MIN_GAIN_S_0
|
||||||
290 0x0018 //TX_MIN_GAIN_S_1
|
290 0x0018 //TX_MIN_GAIN_S_1
|
||||||
291 0x0008 //TX_MIN_GAIN_S_2
|
291 0x0008 //TX_MIN_GAIN_S_2
|
||||||
292 0x0024 //TX_MIN_GAIN_S_3
|
292 0x0008 //TX_MIN_GAIN_S_3
|
||||||
293 0x0010 //TX_MIN_GAIN_S_4
|
293 0x0010 //TX_MIN_GAIN_S_4
|
||||||
294 0x0010 //TX_MIN_GAIN_S_5
|
294 0x0010 //TX_MIN_GAIN_S_5
|
||||||
295 0x0028 //TX_MIN_GAIN_S_6
|
295 0x001C //TX_MIN_GAIN_S_6
|
||||||
296 0x000F //TX_MIN_GAIN_S_7
|
296 0x000F //TX_MIN_GAIN_S_7
|
||||||
297 0x4FFD //TX_NMOS_SUP
|
297 0x4FFD //TX_NMOS_SUP
|
||||||
298 0x0000 //TX_NS_MAX_PRI_SNR_TH
|
298 0x0000 //TX_NS_MAX_PRI_SNR_TH
|
||||||
|
@ -70382,10 +70382,10 @@
|
||||||
300 0x7FFF //TX_SNRI_SUP_0
|
300 0x7FFF //TX_SNRI_SUP_0
|
||||||
301 0x2FFC //TX_SNRI_SUP_1
|
301 0x2FFC //TX_SNRI_SUP_1
|
||||||
302 0x4FF8 //TX_SNRI_SUP_2
|
302 0x4FF8 //TX_SNRI_SUP_2
|
||||||
303 0x1000 //TX_SNRI_SUP_3
|
303 0x47FF //TX_SNRI_SUP_3
|
||||||
304 0x4000 //TX_SNRI_SUP_4
|
304 0x4000 //TX_SNRI_SUP_4
|
||||||
305 0x50C0 //TX_SNRI_SUP_5
|
305 0x50C0 //TX_SNRI_SUP_5
|
||||||
306 0x77F3 //TX_SNRI_SUP_6
|
306 0x7FF8 //TX_SNRI_SUP_6
|
||||||
307 0x7FFF //TX_SNRI_SUP_7
|
307 0x7FFF //TX_SNRI_SUP_7
|
||||||
308 0x7FFF //TX_THR_LFNS
|
308 0x7FFF //TX_THR_LFNS
|
||||||
309 0x001C //TX_G_LFNS
|
309 0x001C //TX_G_LFNS
|
||||||
|
@ -70396,32 +70396,32 @@
|
||||||
314 0x5000 //TX_A_POST_FILT_S_0
|
314 0x5000 //TX_A_POST_FILT_S_0
|
||||||
315 0x47F9 //TX_A_POST_FILT_S_1
|
315 0x47F9 //TX_A_POST_FILT_S_1
|
||||||
316 0x37FB //TX_A_POST_FILT_S_2
|
316 0x37FB //TX_A_POST_FILT_S_2
|
||||||
317 0x2FFC //TX_A_POST_FILT_S_3
|
317 0x67F5 //TX_A_POST_FILT_S_3
|
||||||
318 0x4000 //TX_A_POST_FILT_S_4
|
318 0x4000 //TX_A_POST_FILT_S_4
|
||||||
319 0x5000 //TX_A_POST_FILT_S_5
|
319 0x5000 //TX_A_POST_FILT_S_5
|
||||||
320 0x27FD //TX_A_POST_FILT_S_6
|
320 0x7FF2 //TX_A_POST_FILT_S_6
|
||||||
321 0x7000 //TX_A_POST_FILT_S_7
|
321 0x7000 //TX_A_POST_FILT_S_7
|
||||||
322 0x2000 //TX_B_POST_FILT_0
|
322 0x2000 //TX_B_POST_FILT_0
|
||||||
323 0x2FFB //TX_B_POST_FILT_1
|
323 0x2FFB //TX_B_POST_FILT_1
|
||||||
324 0x27FC //TX_B_POST_FILT_2
|
324 0x27FC //TX_B_POST_FILT_2
|
||||||
325 0x2FFB //TX_B_POST_FILT_3
|
325 0x47F8 //TX_B_POST_FILT_3
|
||||||
326 0x4000 //TX_B_POST_FILT_4
|
326 0x4000 //TX_B_POST_FILT_4
|
||||||
327 0x1000 //TX_B_POST_FILT_5
|
327 0x1000 //TX_B_POST_FILT_5
|
||||||
328 0x0800 //TX_B_POST_FILT_6
|
328 0x5FF5 //TX_B_POST_FILT_6
|
||||||
329 0x2000 //TX_B_POST_FILT_7
|
329 0x2000 //TX_B_POST_FILT_7
|
||||||
330 0x4000 //TX_B_LESSCUT_RTO_S_0
|
330 0x4000 //TX_B_LESSCUT_RTO_S_0
|
||||||
331 0x5FFC //TX_B_LESSCUT_RTO_S_1
|
331 0x5FFC //TX_B_LESSCUT_RTO_S_1
|
||||||
332 0x4000 //TX_B_LESSCUT_RTO_S_2
|
332 0x4000 //TX_B_LESSCUT_RTO_S_2
|
||||||
333 0x4000 //TX_B_LESSCUT_RTO_S_3
|
333 0x4FFE //TX_B_LESSCUT_RTO_S_3
|
||||||
334 0x7FFF //TX_B_LESSCUT_RTO_S_4
|
334 0x7FFF //TX_B_LESSCUT_RTO_S_4
|
||||||
335 0x6000 //TX_B_LESSCUT_RTO_S_5
|
335 0x6000 //TX_B_LESSCUT_RTO_S_5
|
||||||
336 0x4FFE //TX_B_LESSCUT_RTO_S_6
|
336 0x77F9 //TX_B_LESSCUT_RTO_S_6
|
||||||
337 0x7FFF //TX_B_LESSCUT_RTO_S_7
|
337 0x7FFF //TX_B_LESSCUT_RTO_S_7
|
||||||
338 0x7C00 //TX_LAMBDA_PFILT
|
338 0x7C00 //TX_LAMBDA_PFILT
|
||||||
339 0x7C00 //TX_LAMBDA_PFILT_S_0
|
339 0x7C00 //TX_LAMBDA_PFILT_S_0
|
||||||
340 0x7FF0 //TX_LAMBDA_PFILT_S_1
|
340 0x7FF0 //TX_LAMBDA_PFILT_S_1
|
||||||
341 0x72FD //TX_LAMBDA_PFILT_S_2
|
341 0x72FD //TX_LAMBDA_PFILT_S_2
|
||||||
342 0x78F7 //TX_LAMBDA_PFILT_S_3
|
342 0x7EF1 //TX_LAMBDA_PFILT_S_3
|
||||||
343 0x7C00 //TX_LAMBDA_PFILT_S_4
|
343 0x7C00 //TX_LAMBDA_PFILT_S_4
|
||||||
344 0x7C00 //TX_LAMBDA_PFILT_S_5
|
344 0x7C00 //TX_LAMBDA_PFILT_S_5
|
||||||
345 0x7BF4 //TX_LAMBDA_PFILT_S_6
|
345 0x7BF4 //TX_LAMBDA_PFILT_S_6
|
||||||
|
@ -70469,14 +70469,14 @@
|
||||||
387 0x019A //TX_OUT_ENER_TH_NOISE
|
387 0x019A //TX_OUT_ENER_TH_NOISE
|
||||||
388 0x0333 //TX_OUT_ENER_TH_SPEECH
|
388 0x0333 //TX_OUT_ENER_TH_SPEECH
|
||||||
389 0x2000 //TX_SN_NPB_GAIN
|
389 0x2000 //TX_SN_NPB_GAIN
|
||||||
390 0x0000 //TX_NN_NPB_GAIN
|
390 0x1200 //TX_NN_NPB_GAIN
|
||||||
391 0x7FFF //TX_POST_MASK_SUP_HSNE
|
391 0x7FFF //TX_POST_MASK_SUP_HSNE
|
||||||
392 0x7FFF //TX_TAIL_DET_TH
|
392 0x7FFF //TX_TAIL_DET_TH
|
||||||
393 0x4000 //TX_B_LESSCUT_RTO_WTA
|
393 0x4000 //TX_B_LESSCUT_RTO_WTA
|
||||||
394 0x0000 //TX_MEL_G_R
|
394 0x0000 //TX_MEL_G_R
|
||||||
395 0x0080 //TX_SUPHIGH_TH
|
395 0x0080 //TX_SUPHIGH_TH
|
||||||
396 0x3000 //TX_MASK_G_R
|
396 0x3000 //TX_MASK_G_R
|
||||||
397 0x8001 //TX_LOGSNR_THR
|
397 0x0082 //TX_LOGSNR_THR
|
||||||
398 0x0000 //TX_C_POST_FLT_MASK
|
398 0x0000 //TX_C_POST_FLT_MASK
|
||||||
399 0x4000 //TX_A_POST_FLT_WNS
|
399 0x4000 //TX_A_POST_FLT_WNS
|
||||||
400 0x0148 //TX_MIN_G_LOW300HZ
|
400 0x0148 //TX_MIN_G_LOW300HZ
|
||||||
|
@ -70628,9 +70628,9 @@
|
||||||
546 0x59D8 //TX_WNS_SAT_TH
|
546 0x59D8 //TX_WNS_SAT_TH
|
||||||
547 0x0000 //TX_ABSM_WNS_TH
|
547 0x0000 //TX_ABSM_WNS_TH
|
||||||
548 0x0000 //TX_WNS_RESRV_3
|
548 0x0000 //TX_WNS_RESRV_3
|
||||||
549 0x0000 //TX_WNS_RESRV_4
|
549 0x4000 //TX_WNS_RESRV_4
|
||||||
550 0x0000 //TX_WNS_RESRV_5
|
550 0x7FFF //TX_WNS_RESRV_5
|
||||||
551 0x0000 //TX_WNS_RESRV_6
|
551 0x0100 //TX_WNS_RESRV_6
|
||||||
552 0x0000 //TX_BVE_NOISE_FLOOR_0
|
552 0x0000 //TX_BVE_NOISE_FLOOR_0
|
||||||
553 0x0070 //TX_BVE_NOISE_FLOOR_1
|
553 0x0070 //TX_BVE_NOISE_FLOOR_1
|
||||||
554 0x0070 //TX_BVE_NOISE_FLOOR_2
|
554 0x0070 //TX_BVE_NOISE_FLOOR_2
|
||||||
|
@ -71032,8 +71032,8 @@
|
||||||
950 0x0120 //TX_SDPCRN_GAIN
|
950 0x0120 //TX_SDPCRN_GAIN
|
||||||
951 0x7333 //TX_EASSA_CUT_GAINTH
|
951 0x7333 //TX_EASSA_CUT_GAINTH
|
||||||
952 0x0002 //TX_DT_HARME_ENDF
|
952 0x0002 //TX_DT_HARME_ENDF
|
||||||
953 0x77E3 //TX_NSSAMASK_MORENS
|
953 0x0BFE //TX_NSSAMASK_MORENS
|
||||||
954 0x0300 //TX_CGMMMASK_MORENS
|
954 0x5D00 //TX_CGMMMASK_MORENS
|
||||||
955 0x0CCD //TX_DPCRN_MASK_MORENS_ECHO
|
955 0x0CCD //TX_DPCRN_MASK_MORENS_ECHO
|
||||||
956 0x0028 //TX_PRE_EASSAMASK_SUP
|
956 0x0028 //TX_PRE_EASSAMASK_SUP
|
||||||
957 0x6FE5 //TX_NSSAMASK_MORENS_TYPE1
|
957 0x6FE5 //TX_NSSAMASK_MORENS_TYPE1
|
||||||
|
@ -98040,8 +98040,8 @@
|
||||||
19 0x0020 //RX_PP_RESRV_1
|
19 0x0020 //RX_PP_RESRV_1
|
||||||
20 0x0600 //RX_N_SN_EST
|
20 0x0600 //RX_N_SN_EST
|
||||||
21 0x000C //RX_N2_SN_EST
|
21 0x000C //RX_N2_SN_EST
|
||||||
22 0x000F //RX_NS_LVL_CTRL
|
22 0x0009 //RX_NS_LVL_CTRL
|
||||||
23 0xF800 //RX_THR_SN_EST
|
23 0x0100 //RX_THR_SN_EST
|
||||||
24 0x7CCD //RX_LAMBDA_PFILT
|
24 0x7CCD //RX_LAMBDA_PFILT
|
||||||
25 0x000A //RX_MUTE_PERIOD
|
25 0x000A //RX_MUTE_PERIOD
|
||||||
26 0x0190 //RX_FADE_IN_PERIOD
|
26 0x0190 //RX_FADE_IN_PERIOD
|
||||||
|
@ -98891,8 +98891,8 @@
|
||||||
176 0x0020 //RX_PP_RESRV_1
|
176 0x0020 //RX_PP_RESRV_1
|
||||||
177 0x0600 //RX_N_SN_EST
|
177 0x0600 //RX_N_SN_EST
|
||||||
178 0x000C //RX_N2_SN_EST
|
178 0x000C //RX_N2_SN_EST
|
||||||
179 0x0006 //RX_NS_LVL_CTRL
|
179 0x0009 //RX_NS_LVL_CTRL
|
||||||
180 0xF800 //RX_THR_SN_EST
|
180 0x0100 //RX_THR_SN_EST
|
||||||
181 0x7CCD //RX_LAMBDA_PFILT
|
181 0x7CCD //RX_LAMBDA_PFILT
|
||||||
182 0x000A //RX_MUTE_PERIOD
|
182 0x000A //RX_MUTE_PERIOD
|
||||||
183 0x0190 //RX_FADE_IN_PERIOD
|
183 0x0190 //RX_FADE_IN_PERIOD
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue