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thermal: Update cdev ceiling to match latest EM table

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Bug: 318313844
Test: maintain Tskin with burn8/burncycle/MH
Change-Id: I544b89427c1597153766feded7aeaeec4993d4f9
This commit is contained in:
sashwinbalaji 2024-01-08 09:50:37 +08:00
parent 43db25bdf8
commit 506a2dbaa6
1 changed files with 18 additions and 18 deletions
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36
thermal/thermal_info_config_comet.json
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@ -272,7 +272,7 @@
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 1, "MaxThrottleStep": 1,
"BindedPowerRail": "S4M_VDD_CPUCL0", "BindedPowerRail": "S4M_VDD_CPUCL0",
"CdevCeiling": [0, 2, 2, 2, 2, 2, 2] "CdevCeiling": [0, 4, 4, 4, 4, 4, 4]
}, },
{ {
"CdevRequest": "thermal-cpufreq-1", "CdevRequest": "thermal-cpufreq-1",
@ -280,7 +280,7 @@
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"BindedPowerRail": "S2M_VDD_CPUCL1", "BindedPowerRail": "S2M_VDD_CPUCL1",
"CdevCeiling": [0, 6, 6, 6, 6, 6, 6] "CdevCeiling": [0, 8, 8, 8, 8, 8, 8]
}, },
{ {
"CdevRequest": "thermal-cpufreq-2", "CdevRequest": "thermal-cpufreq-2",
@ -288,7 +288,7 @@
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"BindedPowerRail": "S3M_VDD_CPUCL2", "BindedPowerRail": "S3M_VDD_CPUCL2",
"CdevCeiling": [0, 8, 8, 8, 8, 8, 8] "CdevCeiling": [0, 12, 12, 12, 12, 12, 12]
} }
] ]
}, },
@ -323,21 +323,21 @@
"CdevWeightForPID": [0.292, 0.292, 0.292, 0.292, 0.292, 0.292, 0.292], "CdevWeightForPID": [0.292, 0.292, 0.292, 0.292, 0.292, 0.292, 0.292],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 1, "MaxThrottleStep": 1,
"CdevCeiling": [0, 6, 6, 6, 6, 6, 6] "CdevCeiling": [0, 8, 8, 8, 8, 8, 8]
}, },
{ {
"CdevRequest": "thermal-cpufreq-1", "CdevRequest": "thermal-cpufreq-1",
"CdevWeightForPID": [0.804, 0.804, 0.804, 0.804, 0.804, 0.804, 0.804], "CdevWeightForPID": [0.804, 0.804, 0.804, 0.804, 0.804, 0.804, 0.804],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"CdevCeiling": [0, 9, 9, 9, 9, 9, 9] "CdevCeiling": [0, 11, 11, 11, 11, 11, 11]
}, },
{ {
"CdevRequest": "thermal-cpufreq-2", "CdevRequest": "thermal-cpufreq-2",
"CdevWeightForPID": [0.342, 0.342, 0.342, 0.342, 0.342, 0.342, 0.342], "CdevWeightForPID": [0.342, 0.342, 0.342, 0.342, 0.342, 0.342, 0.342],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"CdevCeiling": [0, 12, 12, 12, 12, 12, 12] "CdevCeiling": [0, 16, 16, 16, 16, 16, 16]
} }
], ],
"Profile": [ "Profile": [
@ -414,21 +414,21 @@
"CdevWeightForPID": [0.156, 0.156, 0.156, 0.156, 0.156, 0.156, 0.156], "CdevWeightForPID": [0.156, 0.156, 0.156, 0.156, 0.156, 0.156, 0.156],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 1, "MaxThrottleStep": 1,
"CdevCeiling": [0, 8, 8, 8, 8, 8, 8] "CdevCeiling": [0, 10, 10, 10, 10, 10, 10]
}, },
{ {
"CdevRequest": "thermal-cpufreq-1", "CdevRequest": "thermal-cpufreq-1",
"CdevWeightForPID": [0.428, 0.428, 0.428, 0.428, 0.428, 0.428, 0.428], "CdevWeightForPID": [0.428, 0.428, 0.428, 0.428, 0.428, 0.428, 0.428],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"CdevCeiling": [0, 11, 11, 11, 11, 11, 11] "CdevCeiling": [0, 14, 14, 14, 14, 14, 14]
}, },
{ {
"CdevRequest": "thermal-cpufreq-2", "CdevRequest": "thermal-cpufreq-2",
"CdevWeightForPID": [0.225, 0.225, 0.225, 0.225, 0.225, 0.225, 0.225], "CdevWeightForPID": [0.225, 0.225, 0.225, 0.225, 0.225, 0.225, 0.225],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"CdevCeiling": [0, 13, 13, 13, 13, 13, 13] "CdevCeiling": [0, 17, 17, 17, 17, 17, 17]
} }
], ],
"Profile": [ "Profile": [
@ -462,7 +462,7 @@
], ],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 1, "MaxThrottleStep": 1,
"CdevCeiling": [0, 6, 6, 6, 6, 6, 6] "CdevCeiling": [0, 8, 8, 8, 8, 8, 8]
}, },
{ {
"CdevRequest": "thermal-cpufreq-1", "CdevRequest": "thermal-cpufreq-1",
@ -471,7 +471,7 @@
], ],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"CdevCeiling": [0, 9, 9, 9, 9, 9, 9] "CdevCeiling": [0, 11, 11, 11, 11, 11, 11]
}, },
{ {
"CdevRequest": "thermal-cpufreq-2", "CdevRequest": "thermal-cpufreq-2",
@ -480,7 +480,7 @@
], ],
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"CdevCeiling": [0, 12, 12, 12, 12, 12, 12] "CdevCeiling": [0, 16, 16, 16, 16, 16, 16]
} }
] ]
} }
@ -518,8 +518,8 @@
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 1, "MaxThrottleStep": 1,
"BindedPowerRail": "S4M_VDD_CPUCL0", "BindedPowerRail": "S4M_VDD_CPUCL0",
"CdevCeiling": [0, 8, 8, 8, 8, 9, 9], "CdevCeiling": [0, 10, 10, 10, 10, 11, 11],
"LimitInfo": [0, 0, 0, 0, 0, 9, 9] "LimitInfo": [0, 0, 0, 0, 0, 11, 11]
}, },
{ {
"CdevRequest": "thermal-cpufreq-1", "CdevRequest": "thermal-cpufreq-1",
@ -527,8 +527,8 @@
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"BindedPowerRail": "S2M_VDD_CPUCL1", "BindedPowerRail": "S2M_VDD_CPUCL1",
"CdevCeiling": [0, 11, 11, 11, 11, 14, 14], "CdevCeiling": [0, 14, 14, 14, 14, 16, 16],
"LimitInfo": [0, 0, 0, 0, 0, 14, 14] "LimitInfo": [0, 0, 0, 0, 0, 16, 16]
}, },
{ {
"CdevRequest": "thermal-cpufreq-2", "CdevRequest": "thermal-cpufreq-2",
@ -536,8 +536,8 @@
"MaxReleaseStep": 1, "MaxReleaseStep": 1,
"MaxThrottleStep": 2, "MaxThrottleStep": 2,
"BindedPowerRail": "S3M_VDD_CPUCL2", "BindedPowerRail": "S3M_VDD_CPUCL2",
"CdevCeiling": [0, 13, 13, 13, 13, 14, 14], "CdevCeiling": [0, 17, 17, 17, 17, 17, 17],
"LimitInfo": [0, 0, 0, 0, 0, 14, 14] "LimitInfo": [0, 0, 0, 0, 0, 17, 17]
}, },
{ {
"CdevRequest": "thermal-gpufreq-0", "CdevRequest": "thermal-gpufreq-0",