From ac16103f81c0d1f822156f52425984dae3169761 Mon Sep 17 00:00:00 2001 From: Juyu Chen Date: Mon, 26 Feb 2024 08:46:27 +0000 Subject: [PATCH] tuning: update the telephony tables Bug: 326854364 Test: see the bug Change-Id: I17cc50b90a1157d6dc06f38e8735c050506830ea Signed-off-by: Juyu Chen --- audio/comet/tuning/fortemedia/BLUETOOTH.dat | Bin 161366 -> 161366 bytes audio/comet/tuning/fortemedia/BLUETOOTH.mods | 160 ++--- audio/comet/tuning/fortemedia/HANDSET.dat | Bin 139854 -> 139854 bytes audio/comet/tuning/fortemedia/HANDSET.mods | 638 +++++++++---------- audio/comet/tuning/fortemedia/HANDSFREE.dat | Bin 64562 -> 64562 bytes audio/comet/tuning/fortemedia/HANDSFREE.mods | 240 +++---- audio/comet/tuning/fortemedia/HEADSET.dat | Bin 258170 -> 258170 bytes audio/comet/tuning/fortemedia/HEADSET.mods | 310 ++++----- 8 files changed, 674 insertions(+), 674 deletions(-) diff --git a/audio/comet/tuning/fortemedia/BLUETOOTH.dat b/audio/comet/tuning/fortemedia/BLUETOOTH.dat index 60649069913d81a6df475aac8bb100be7bd65eb0..71956f9da81f95698e818ac988ef365f57997821 100644 GIT binary patch delta 661 zcmccihV$AR&IxX;EDS6R%+vF$7@arvc``8;Z@$6A#H7ZcpvlOo9$NEuz`Hsa04Wn0t#1LYPy{oBhO^3I+4v$e>6a9QBBzn zl=eV1LR@OQQvjymbgw0hJe#fRz!riGVbVggYP;V#xHfOj>F=YN!oh9=8W{8gA_LO5 UOL=>k5)-DSQ9f`%WZnEy0CCFCrT_o{ delta 674 zcmccihV$AR&IxX;EetFS%+vF$7@arvc``8uY`($7#H98wUXzi5K?{hr8UNSoFfusk zGX5;rWBi@24`drK9tbdG{1d;4HH(pH0^{Z!wmuG~xVp)I__|q{t}rt&P2bST*tD5X zz(k63HvIMv z$Ol?i0K|oiQv{0`zc3aveh4jL)KD%3ij@IzInYTJK)RA~4Q~}=z+~+xcaRGT4650u z|L0`1W@2!dY|tY%+0Npjtiw)b2F6{?XL)urYcT9#{$IZri1z`-_5<-|hvausleI!* z2D1yz6q%S9wohna+@(BOua0N4-3l8vpvdNi8;dv@`8Uh&h*v=2TJr)$vp^!L$B;b6Cb njM!dp&vb`pd+-lNcaWtJr*98aV#0Joln-1G-IUG#?w5H0DA3pU diff --git a/audio/comet/tuning/fortemedia/BLUETOOTH.mods b/audio/comet/tuning/fortemedia/BLUETOOTH.mods index 9724048..3dc1267 100644 --- a/audio/comet/tuning/fortemedia/BLUETOOTH.mods +++ b/audio/comet/tuning/fortemedia/BLUETOOTH.mods @@ -3,7 +3,7 @@ #EXPORT_FLAG BLUETOOTH #PARAM_MODE FULL #SAVE_MODE 3 -#SAVE_TIME 2024-02-02 12:09:15 +#SAVE_TIME 2024-03-05 17:38:30 #CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-WB #PARAM_TYPE TX+2RX @@ -13,7 +13,7 @@ 1 0x0001 //TX_OPERATION_MODE_1 2 0x003B //TX_PATCH_REG 3 0x6F7C //TX_SENDFUNC_MODE_0 -4 0x0084 //TX_SENDFUNC_MODE_1 +4 0x0004 //TX_SENDFUNC_MODE_1 5 0x0003 //TX_NUM_MIC 6 0x0001 //TX_SAMPLINGFREQ_SIG 7 0x0001 //TX_SAMPLINGFREQ_PROC @@ -177,7 +177,7 @@ 165 0x4000 //TX_LAMBDA_RE_EST 166 0x4000 //TX_LAMBDA_CB_NLE 167 0x0000 //TX_C_POST_FLT -168 0x5000 //TX_GAIN_NP +168 0x7300 //TX_GAIN_NP 169 0x02A0 //TX_SE_HOLD_N 170 0x0060 //TX_DT_HOLD_N 171 0x00C0 //TX_DT2_HOLD_N @@ -306,16 +306,16 @@ 294 0x0010 //TX_MIN_GAIN_S_5 295 0x0020 //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 -297 0x5FFE //TX_NMOS_SUP +297 0x2000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x4000 //TX_SNRI_SUP_1 302 0x77F9 //TX_SNRI_SUP_2 -303 0x67FB //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x50C0 //TX_SNRI_SUP_5 -306 0x5FFC //TX_SNRI_SUP_6 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0028 //TX_G_LFNS @@ -406,7 +406,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x1FFF //TX_MASK_G_R -397 0x0190 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x0000 //TX_C_POST_FLT_MASK 399 0x4000 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -954,7 +954,7 @@ 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0100 //TX_MIC_VOLUME_MIC1MUTE 944 0xD8F0 //TX_TFMASKM4_2_DT_THR -945 0x7E5E //TX_MEAN_GAIN500HZ_DT_THR +945 0x7300 //TX_MEAN_GAIN500HZ_DT_THR 946 0x000A //TX_MUTE_REF_POW_TH 947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN 948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN @@ -989,8 +989,8 @@ 977 0x0032 //TX_EASSA_NONLECHO_TH 978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH 979 0x0600 //TX_EASSA_NNG -980 0x0200 //TX_EASSA_NONLHFG -981 0x0200 //TX_EASSA_DT2000HZ_REFG +980 0x1000 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG 982 0x0C00 //TX_EASSA_DT400HZ_MAING 983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA 984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 @@ -2706,9 +2706,9 @@ #TX 0 0x4001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 -2 0x00BB //TX_PATCH_REG +2 0x003B //TX_PATCH_REG 3 0x6F7C //TX_SENDFUNC_MODE_0 -4 0x0084 //TX_SENDFUNC_MODE_1 +4 0x0004 //TX_SENDFUNC_MODE_1 5 0x0003 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC @@ -2872,7 +2872,7 @@ 165 0x3000 //TX_LAMBDA_RE_EST 166 0x3000 //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT -168 0x4000 //TX_GAIN_NP +168 0x7300 //TX_GAIN_NP 169 0x0260 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x00C0 //TX_DT2_HOLD_N @@ -2947,8 +2947,8 @@ 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xF800 //TX_THR_SN_EST_0 -243 0xFB00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFB00 //TX_THR_SN_EST_2 245 0xFA00 //TX_THR_SN_EST_3 246 0xF800 //TX_THR_SN_EST_4 247 0xFA00 //TX_THR_SN_EST_5 @@ -2987,7 +2987,7 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x001A //TX_NS_LVL_CTRL_1 -283 0x0024 //TX_NS_LVL_CTRL_2 +283 0x0022 //TX_NS_LVL_CTRL_2 284 0x001A //TX_NS_LVL_CTRL_3 285 0x0014 //TX_NS_LVL_CTRL_4 286 0x0011 //TX_NS_LVL_CTRL_5 @@ -3001,7 +3001,7 @@ 294 0x0020 //TX_MIN_GAIN_S_5 295 0x0020 //TX_MIN_GAIN_S_6 296 0x0020 //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP +297 0x5000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 @@ -3071,19 +3071,19 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x000F //TX_NOISE_TH_0 +367 0x000A //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 -370 0x1194 //TX_NOISE_TH_1 -371 0x01F4 //TX_NOISE_TH_2 -372 0x55F0 //TX_NOISE_TH_3 -373 0x2328 //TX_NOISE_TH_4 +370 0x1310 //TX_NOISE_TH_1 +371 0x0283 //TX_NOISE_TH_2 +372 0x651E //TX_NOISE_TH_3 +373 0x19AF //TX_NOISE_TH_4 374 0x7FFF //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 -378 0x0DAC //TX_NOISE_TH_6 -379 0x0050 //TX_MINENOISE_TH +378 0x7FFF //TX_NOISE_TH_6 +379 0x000E //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH @@ -3101,7 +3101,7 @@ 394 0x4000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0190 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x0000 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -3580,7 +3580,7 @@ 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK +876 0x4000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 @@ -3595,7 +3595,7 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK +891 0x5000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL @@ -3657,14 +3657,14 @@ 950 0x0080 //TX_SDPCRN_GAIN 951 0x7333 //TX_EASSA_CUT_GAINTH 952 0x0002 //TX_DT_HARME_ENDF -953 0x4000 //TX_NSSAMASK_MORENS +953 0x3000 //TX_NSSAMASK_MORENS 954 0x0100 //TX_CGMMMASK_MORENS 955 0x0CCD //TX_DPCRN_MASK_MORENS_ECHO 956 0x0028 //TX_PRE_EASSAMASK_SUP -957 0x7FFF //TX_NSSAMASK_MORENS_TYPE1 -958 0x7FFF //TX_NSSAMASK_MORENS_TYPE2 -959 0x0100 //TX_CGMMMASK_MORENS_TYPE1 -960 0x0100 //TX_CGMMMASK_MORENS_TYPE2 +957 0x68E6 //TX_NSSAMASK_MORENS_TYPE1 +958 0x7000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0500 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0500 //TX_CGMMMASK_MORENS_TYPE2 961 0x0000 //TX_SSA30_RESRV_0 962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 963 0x0100 //TX_EASSA_AEC_NSSA_REFG_1 @@ -5401,9 +5401,9 @@ #TX 0 0x4001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 -2 0x00BB //TX_PATCH_REG +2 0x003B //TX_PATCH_REG 3 0x6F7C //TX_SENDFUNC_MODE_0 -4 0x0084 //TX_SENDFUNC_MODE_1 +4 0x0004 //TX_SENDFUNC_MODE_1 5 0x0003 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC @@ -5567,7 +5567,7 @@ 165 0x3000 //TX_LAMBDA_RE_EST 166 0x3000 //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT -168 0x4000 //TX_GAIN_NP +168 0x7300 //TX_GAIN_NP 169 0x0260 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x00C0 //TX_DT2_HOLD_N @@ -5642,8 +5642,8 @@ 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xF800 //TX_THR_SN_EST_0 -243 0xFB00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFB00 //TX_THR_SN_EST_2 245 0xFA00 //TX_THR_SN_EST_3 246 0xF800 //TX_THR_SN_EST_4 247 0xFA00 //TX_THR_SN_EST_5 @@ -5682,7 +5682,7 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x001A //TX_NS_LVL_CTRL_1 -283 0x0024 //TX_NS_LVL_CTRL_2 +283 0x0022 //TX_NS_LVL_CTRL_2 284 0x001A //TX_NS_LVL_CTRL_3 285 0x0014 //TX_NS_LVL_CTRL_4 286 0x0011 //TX_NS_LVL_CTRL_5 @@ -5696,7 +5696,7 @@ 294 0x0020 //TX_MIN_GAIN_S_5 295 0x0020 //TX_MIN_GAIN_S_6 296 0x0020 //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP +297 0x5000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 @@ -5766,19 +5766,19 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x000F //TX_NOISE_TH_0 +367 0x000A //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 -370 0x1194 //TX_NOISE_TH_1 -371 0x01F4 //TX_NOISE_TH_2 -372 0x55F0 //TX_NOISE_TH_3 -373 0x2328 //TX_NOISE_TH_4 +370 0x1310 //TX_NOISE_TH_1 +371 0x0283 //TX_NOISE_TH_2 +372 0x651E //TX_NOISE_TH_3 +373 0x19AF //TX_NOISE_TH_4 374 0x7FFF //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 -378 0x0DAC //TX_NOISE_TH_6 -379 0x0050 //TX_MINENOISE_TH +378 0x7FFF //TX_NOISE_TH_6 +379 0x000E //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH @@ -5796,7 +5796,7 @@ 394 0x4000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0190 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x0000 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -6275,7 +6275,7 @@ 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK +876 0x4000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 @@ -6290,7 +6290,7 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK +891 0x5000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL @@ -6352,14 +6352,14 @@ 950 0x0080 //TX_SDPCRN_GAIN 951 0x7333 //TX_EASSA_CUT_GAINTH 952 0x0002 //TX_DT_HARME_ENDF -953 0x4000 //TX_NSSAMASK_MORENS +953 0x3000 //TX_NSSAMASK_MORENS 954 0x0100 //TX_CGMMMASK_MORENS 955 0x0CCD //TX_DPCRN_MASK_MORENS_ECHO 956 0x0028 //TX_PRE_EASSAMASK_SUP -957 0x7FFF //TX_NSSAMASK_MORENS_TYPE1 -958 0x7FFF //TX_NSSAMASK_MORENS_TYPE2 -959 0x0100 //TX_CGMMMASK_MORENS_TYPE1 -960 0x0100 //TX_CGMMMASK_MORENS_TYPE2 +957 0x68E6 //TX_NSSAMASK_MORENS_TYPE1 +958 0x7000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0500 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0500 //TX_CGMMMASK_MORENS_TYPE2 961 0x0000 //TX_SSA30_RESRV_0 962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 963 0x0100 //TX_EASSA_AEC_NSSA_REFG_1 @@ -8491,7 +8491,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0800 //TX_SUPHIGH_TH 396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x0800 //TX_C_POST_FLT_MASK 399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -9105,7 +9105,7 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0600 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_MUTE_PERIOD @@ -11186,7 +11186,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0800 //TX_SUPHIGH_TH 396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x0800 //TX_C_POST_FLT_MASK 399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -11800,7 +11800,7 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_MUTE_PERIOD @@ -13881,7 +13881,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0800 //TX_SUPHIGH_TH 396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x0800 //TX_C_POST_FLT_MASK 399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -14495,7 +14495,7 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_MUTE_PERIOD @@ -15346,7 +15346,7 @@ 176 0x0020 //RX_PP_RESRV_1 177 0x0400 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST -179 0x000F //RX_NS_LVL_CTRL +179 0x0006 //RX_NS_LVL_CTRL 180 0x9000 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT 182 0x000A //RX_MUTE_PERIOD @@ -16576,7 +16576,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0800 //TX_SUPHIGH_TH 396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x0800 //TX_C_POST_FLT_MASK 399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -17190,7 +17190,7 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0600 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_MUTE_PERIOD @@ -19271,7 +19271,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0800 //TX_SUPHIGH_TH 396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x0800 //TX_C_POST_FLT_MASK 399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -19885,7 +19885,7 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_MUTE_PERIOD @@ -21966,7 +21966,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0800 //TX_SUPHIGH_TH 396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x0800 //TX_C_POST_FLT_MASK 399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -22580,7 +22580,7 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_MUTE_PERIOD @@ -23431,7 +23431,7 @@ 176 0x0020 //RX_PP_RESRV_1 177 0x0400 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST -179 0x000F //RX_NS_LVL_CTRL +179 0x0006 //RX_NS_LVL_CTRL 180 0x9000 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT 182 0x000A //RX_MUTE_PERIOD @@ -24661,7 +24661,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0800 //TX_SUPHIGH_TH 396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x0800 //TX_C_POST_FLT_MASK 399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -27356,7 +27356,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0800 //TX_SUPHIGH_TH 396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x0800 //TX_C_POST_FLT_MASK 399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -27970,7 +27970,7 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_MUTE_PERIOD @@ -30051,7 +30051,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0800 //TX_SUPHIGH_TH 396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x0800 //TX_C_POST_FLT_MASK 399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -30665,7 +30665,7 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_MUTE_PERIOD @@ -31516,7 +31516,7 @@ 176 0x0020 //RX_PP_RESRV_1 177 0x0400 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST -179 0x000F //RX_NS_LVL_CTRL +179 0x0006 //RX_NS_LVL_CTRL 180 0x9000 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT 182 0x000A //RX_MUTE_PERIOD @@ -32746,7 +32746,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0800 //TX_SUPHIGH_TH 396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x0800 //TX_C_POST_FLT_MASK 399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -35441,7 +35441,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0800 //TX_SUPHIGH_TH 396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x0800 //TX_C_POST_FLT_MASK 399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -36055,7 +36055,7 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_MUTE_PERIOD @@ -38136,7 +38136,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0800 //TX_SUPHIGH_TH 396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x0800 //TX_C_POST_FLT_MASK 399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -38750,7 +38750,7 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_MUTE_PERIOD @@ -39601,7 +39601,7 @@ 176 0x0020 //RX_PP_RESRV_1 177 0x0400 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST -179 0x000F //RX_NS_LVL_CTRL +179 0x0006 //RX_NS_LVL_CTRL 180 0x9000 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT 182 0x000A //RX_MUTE_PERIOD diff --git a/audio/comet/tuning/fortemedia/HANDSET.dat b/audio/comet/tuning/fortemedia/HANDSET.dat index f1305163e9a6e7fcb43f4ddbe5969d439ee3233f..f7bc110006ecc63d94d86b457cd5d5573bd34bb0 100644 GIT binary patch delta 2029 zcmX?igyY;1jtyCCOpFba3k;Mt_p!}kRV-lm%T&Pd4~YK*F#~fT10xVK0WmWWvoJGn z_BShL+`NyshJ}ftV6uaa7%Px&;Fx@0SRBaMTp$$02$Nt&lGv1i5NAOW-`pUIkYEE! z@W4zG$VN!810}>^5)&j45?nwDEtrHt9zud2DB%E;SRj2)1nA4n1qSbC0HX&vrQ-H`v5Xs(h%aNd=eIE`tB_HBf-K6E+3tUiq~HfxcSm-6@DGx8 HU6us^GNuR{ delta 1824 zcmX?igyY;1jtyCCOcNL<7Z@mQ?qi$7s+hv?m#Ki^9}xcsVg}{_21aIY1|}e824WUw zhRyzF#f+Qx@z$_Rf0WE9!^k%IzOeY@dHo`ryV4vO(Z#q#FvVtNVv0$LV~VZH!4%Vy z!W7$;U&^;xUCSNhk!x9f>A7Hv?VDN3H(9@qd$U=H%`k|JJt9Lk9)_^ffmy)((vZ#qo2~y0 zY4>lpS7RKi9@u`)krABuNv#OB--~73phSFz-=5#bsH{RpjRUeMQ)avWIg-K{WZfOv M?ZH1t)^%AH06x(}r~m)} diff --git a/audio/comet/tuning/fortemedia/HANDSET.mods b/audio/comet/tuning/fortemedia/HANDSET.mods index 2f62544..b3aa473 100644 --- a/audio/comet/tuning/fortemedia/HANDSET.mods +++ b/audio/comet/tuning/fortemedia/HANDSET.mods @@ -3,7 +3,7 @@ #EXPORT_FLAG HANDSET #PARAM_MODE FULL #SAVE_MODE 3 -#SAVE_TIME 2024-02-01 20:10:17 +#SAVE_TIME 2024-03-05 17:38:03 #CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-WB #PARAM_TYPE TX+2RX @@ -406,7 +406,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0500 //TX_MASK_G_R -397 0x0190 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -774,15 +774,15 @@ 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT -765 0x0064 //TX_MIC_CALIBRATION_0 +765 0x0070 //TX_MIC_CALIBRATION_0 766 0x0070 //TX_MIC_CALIBRATION_1 767 0x0070 //TX_MIC_CALIBRATION_2 768 0x0070 //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x004B //TX_MIC_PWR_BIAS_1 -771 0x004B //TX_MIC_PWR_BIAS_2 -772 0x004B //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 +769 0x0051 //TX_MIC_PWR_BIAS_0 +770 0x0051 //TX_MIC_PWR_BIAS_1 +771 0x0051 //TX_MIC_PWR_BIAS_2 +772 0x0051 //TX_MIC_PWR_BIAS_3 +773 0x0003 //TX_GAIN_LIMIT_0 774 0x0003 //TX_GAIN_LIMIT_1 775 0x0003 //TX_GAIN_LIMIT_2 776 0x0003 //TX_GAIN_LIMIT_3 @@ -1160,20 +1160,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0008 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -1259,20 +1259,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x0003 //RX_TDDRC_THRD_0 +113 0x0008 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -1358,20 +1358,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x0004 //RX_TDDRC_THRD_0 +113 0x0008 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -1457,20 +1457,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x0006 //RX_TDDRC_THRD_0 +113 0x000C //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -1556,20 +1556,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x0007 //RX_TDDRC_THRD_0 +113 0x0017 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -1655,20 +1655,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x000A //RX_TDDRC_THRD_0 +113 0x002A //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -1754,20 +1754,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x000F //RX_TDDRC_THRD_0 +113 0x0040 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -3101,7 +3101,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0190 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -3469,15 +3469,15 @@ 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT -765 0x0064 //TX_MIC_CALIBRATION_0 -766 0x006C //TX_MIC_CALIBRATION_1 -767 0x006C //TX_MIC_CALIBRATION_2 -768 0x006C //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x004D //TX_MIC_PWR_BIAS_1 -771 0x004D //TX_MIC_PWR_BIAS_2 -772 0x004D //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 +765 0x0070 //TX_MIC_CALIBRATION_0 +766 0x0070 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0051 //TX_MIC_PWR_BIAS_0 +770 0x0051 //TX_MIC_PWR_BIAS_1 +771 0x0051 //TX_MIC_PWR_BIAS_2 +772 0x0051 //TX_MIC_PWR_BIAS_3 +773 0x0003 //TX_GAIN_LIMIT_0 774 0x0003 //TX_GAIN_LIMIT_1 775 0x0003 //TX_GAIN_LIMIT_2 776 0x0003 //TX_GAIN_LIMIT_3 @@ -3855,20 +3855,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +113 0x0008 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -3954,20 +3954,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +113 0x0008 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -4053,20 +4053,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +113 0x0008 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -4152,20 +4152,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +113 0x0008 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -4251,20 +4251,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x0003 //RX_TDDRC_THRD_0 +113 0x0013 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -4350,20 +4350,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x0006 //RX_TDDRC_THRD_0 +113 0x001A //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -4449,20 +4449,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x0008 //RX_TDDRC_THRD_0 +113 0x0028 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -5796,7 +5796,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0500 //TX_MASK_G_R -397 0x0190 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -6164,15 +6164,15 @@ 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT -765 0x0064 //TX_MIC_CALIBRATION_0 +765 0x0070 //TX_MIC_CALIBRATION_0 766 0x0070 //TX_MIC_CALIBRATION_1 767 0x0070 //TX_MIC_CALIBRATION_2 768 0x0070 //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x004B //TX_MIC_PWR_BIAS_1 -771 0x004B //TX_MIC_PWR_BIAS_2 -772 0x004B //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 +769 0x0051 //TX_MIC_PWR_BIAS_0 +770 0x0051 //TX_MIC_PWR_BIAS_1 +771 0x0051 //TX_MIC_PWR_BIAS_2 +772 0x0051 //TX_MIC_PWR_BIAS_3 +773 0x0003 //TX_GAIN_LIMIT_0 774 0x0003 //TX_GAIN_LIMIT_1 775 0x0003 //TX_GAIN_LIMIT_2 776 0x0003 //TX_GAIN_LIMIT_3 @@ -6550,20 +6550,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0008 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -6649,20 +6649,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x0003 //RX_TDDRC_THRD_0 +113 0x0008 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -6748,20 +6748,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x0004 //RX_TDDRC_THRD_0 +113 0x0008 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -6847,20 +6847,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x0006 //RX_TDDRC_THRD_0 +113 0x000C //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -6946,20 +6946,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x0007 //RX_TDDRC_THRD_0 +113 0x0017 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -7045,20 +7045,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x000A //RX_TDDRC_THRD_0 +113 0x002A //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -7144,20 +7144,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x000F //RX_TDDRC_THRD_0 +113 0x0040 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -8491,7 +8491,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0190 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -8859,15 +8859,15 @@ 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT -765 0x0064 //TX_MIC_CALIBRATION_0 -766 0x006C //TX_MIC_CALIBRATION_1 -767 0x006C //TX_MIC_CALIBRATION_2 -768 0x006C //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x004D //TX_MIC_PWR_BIAS_1 -771 0x004D //TX_MIC_PWR_BIAS_2 -772 0x004D //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 +765 0x0070 //TX_MIC_CALIBRATION_0 +766 0x0070 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0051 //TX_MIC_PWR_BIAS_0 +770 0x0051 //TX_MIC_PWR_BIAS_1 +771 0x0051 //TX_MIC_PWR_BIAS_2 +772 0x0051 //TX_MIC_PWR_BIAS_3 +773 0x0003 //TX_GAIN_LIMIT_0 774 0x0003 //TX_GAIN_LIMIT_1 775 0x0003 //TX_GAIN_LIMIT_2 776 0x0003 //TX_GAIN_LIMIT_3 @@ -9245,20 +9245,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +113 0x0008 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -9344,20 +9344,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +113 0x0008 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -9443,20 +9443,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +113 0x0008 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -9542,20 +9542,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +113 0x0008 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -9641,20 +9641,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x0003 //RX_TDDRC_THRD_0 +113 0x0013 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -9740,20 +9740,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x0006 //RX_TDDRC_THRD_0 +113 0x001A //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -9839,20 +9839,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x0008 //RX_TDDRC_THRD_0 +113 0x0028 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -11186,7 +11186,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0190 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -11554,15 +11554,15 @@ 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT -765 0x0064 //TX_MIC_CALIBRATION_0 -766 0x006C //TX_MIC_CALIBRATION_1 -767 0x006C //TX_MIC_CALIBRATION_2 -768 0x006C //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x004D //TX_MIC_PWR_BIAS_1 -771 0x004D //TX_MIC_PWR_BIAS_2 -772 0x004D //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 +765 0x0070 //TX_MIC_CALIBRATION_0 +766 0x0070 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0051 //TX_MIC_PWR_BIAS_0 +770 0x0051 //TX_MIC_PWR_BIAS_1 +771 0x0051 //TX_MIC_PWR_BIAS_2 +772 0x0051 //TX_MIC_PWR_BIAS_3 +773 0x0003 //TX_GAIN_LIMIT_0 774 0x0003 //TX_GAIN_LIMIT_1 775 0x0003 //TX_GAIN_LIMIT_2 776 0x0003 //TX_GAIN_LIMIT_3 @@ -11940,20 +11940,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +113 0x0008 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -12039,20 +12039,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +113 0x0008 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -12138,20 +12138,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +113 0x0008 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -12237,20 +12237,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +113 0x0008 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -12336,20 +12336,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x0003 //RX_TDDRC_THRD_0 +113 0x0013 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -12435,20 +12435,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x0006 //RX_TDDRC_THRD_0 +113 0x001A //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -12534,20 +12534,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x0008 //RX_TDDRC_THRD_0 +113 0x0028 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -13881,7 +13881,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0190 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -14249,15 +14249,15 @@ 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT -765 0x0064 //TX_MIC_CALIBRATION_0 -766 0x006C //TX_MIC_CALIBRATION_1 -767 0x006C //TX_MIC_CALIBRATION_2 -768 0x006C //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x004D //TX_MIC_PWR_BIAS_1 -771 0x004D //TX_MIC_PWR_BIAS_2 -772 0x004D //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 +765 0x0070 //TX_MIC_CALIBRATION_0 +766 0x0070 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0051 //TX_MIC_PWR_BIAS_0 +770 0x0051 //TX_MIC_PWR_BIAS_1 +771 0x0051 //TX_MIC_PWR_BIAS_2 +772 0x0051 //TX_MIC_PWR_BIAS_3 +773 0x0003 //TX_GAIN_LIMIT_0 774 0x0003 //TX_GAIN_LIMIT_1 775 0x0003 //TX_GAIN_LIMIT_2 776 0x0003 //TX_GAIN_LIMIT_3 @@ -14635,20 +14635,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +113 0x0008 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -14734,20 +14734,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +113 0x0008 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -14833,20 +14833,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +113 0x0008 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -14932,20 +14932,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +113 0x0008 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -15031,20 +15031,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x0003 //RX_TDDRC_THRD_0 +113 0x0013 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -15130,20 +15130,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x0006 //RX_TDDRC_THRD_0 +113 0x001A //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -15229,20 +15229,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x0008 //RX_TDDRC_THRD_0 +113 0x0028 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -16576,7 +16576,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0190 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -16944,15 +16944,15 @@ 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT -765 0x0064 //TX_MIC_CALIBRATION_0 -766 0x006C //TX_MIC_CALIBRATION_1 -767 0x006C //TX_MIC_CALIBRATION_2 -768 0x006C //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x004D //TX_MIC_PWR_BIAS_1 -771 0x004D //TX_MIC_PWR_BIAS_2 -772 0x004D //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 +765 0x0070 //TX_MIC_CALIBRATION_0 +766 0x0070 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0051 //TX_MIC_PWR_BIAS_0 +770 0x0051 //TX_MIC_PWR_BIAS_1 +771 0x0051 //TX_MIC_PWR_BIAS_2 +772 0x0051 //TX_MIC_PWR_BIAS_3 +773 0x0003 //TX_GAIN_LIMIT_0 774 0x0003 //TX_GAIN_LIMIT_1 775 0x0003 //TX_GAIN_LIMIT_2 776 0x0003 //TX_GAIN_LIMIT_3 @@ -17330,20 +17330,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +113 0x0008 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -17429,20 +17429,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +113 0x0008 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -17528,20 +17528,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +113 0x0008 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -17627,20 +17627,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +113 0x0008 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -17726,20 +17726,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x0003 //RX_TDDRC_THRD_0 +113 0x0013 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -17825,20 +17825,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x0006 //RX_TDDRC_THRD_0 +113 0x001A //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -17924,20 +17924,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x0008 //RX_TDDRC_THRD_0 +113 0x0028 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -19271,7 +19271,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0190 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -19639,15 +19639,15 @@ 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT -765 0x0064 //TX_MIC_CALIBRATION_0 -766 0x006C //TX_MIC_CALIBRATION_1 -767 0x006C //TX_MIC_CALIBRATION_2 -768 0x006C //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x004D //TX_MIC_PWR_BIAS_1 -771 0x004D //TX_MIC_PWR_BIAS_2 -772 0x004D //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 +765 0x0070 //TX_MIC_CALIBRATION_0 +766 0x0070 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0051 //TX_MIC_PWR_BIAS_0 +770 0x0051 //TX_MIC_PWR_BIAS_1 +771 0x0051 //TX_MIC_PWR_BIAS_2 +772 0x0051 //TX_MIC_PWR_BIAS_3 +773 0x0003 //TX_GAIN_LIMIT_0 774 0x0003 //TX_GAIN_LIMIT_1 775 0x0003 //TX_GAIN_LIMIT_2 776 0x0003 //TX_GAIN_LIMIT_3 @@ -20025,20 +20025,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +113 0x0008 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -20124,20 +20124,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +113 0x0008 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -20223,20 +20223,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +113 0x0008 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -20322,20 +20322,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +113 0x0008 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -20421,20 +20421,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x0003 //RX_TDDRC_THRD_0 +113 0x0013 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -20520,20 +20520,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x0006 //RX_TDDRC_THRD_0 +113 0x001A //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -20619,20 +20619,20 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +27 0x7000 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x78D0 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0006 //RX_TDDRC_THRD_1 +112 0x0008 //RX_TDDRC_THRD_0 +113 0x0028 //RX_TDDRC_THRD_1 114 0x1AE0 //RX_TDDRC_THRD_2 115 0x1AE0 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +119 0x7000 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG @@ -21966,7 +21966,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0500 //TX_MASK_G_R -397 0x0190 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -22334,15 +22334,15 @@ 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT -765 0x0064 //TX_MIC_CALIBRATION_0 +765 0x0070 //TX_MIC_CALIBRATION_0 766 0x0070 //TX_MIC_CALIBRATION_1 767 0x0070 //TX_MIC_CALIBRATION_2 768 0x0070 //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x004B //TX_MIC_PWR_BIAS_1 -771 0x004B //TX_MIC_PWR_BIAS_2 -772 0x004B //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 +769 0x0051 //TX_MIC_PWR_BIAS_0 +770 0x0051 //TX_MIC_PWR_BIAS_1 +771 0x0051 //TX_MIC_PWR_BIAS_2 +772 0x0051 //TX_MIC_PWR_BIAS_3 +773 0x0003 //TX_GAIN_LIMIT_0 774 0x0003 //TX_GAIN_LIMIT_1 775 0x0003 //TX_GAIN_LIMIT_2 776 0x0003 //TX_GAIN_LIMIT_3 @@ -24661,7 +24661,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0190 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -25029,15 +25029,15 @@ 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT -765 0x0064 //TX_MIC_CALIBRATION_0 -766 0x006C //TX_MIC_CALIBRATION_1 -767 0x006C //TX_MIC_CALIBRATION_2 -768 0x006C //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x004D //TX_MIC_PWR_BIAS_1 -771 0x004D //TX_MIC_PWR_BIAS_2 -772 0x004D //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 +765 0x0070 //TX_MIC_CALIBRATION_0 +766 0x0070 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0051 //TX_MIC_PWR_BIAS_0 +770 0x0051 //TX_MIC_PWR_BIAS_1 +771 0x0051 //TX_MIC_PWR_BIAS_2 +772 0x0051 //TX_MIC_PWR_BIAS_3 +773 0x0003 //TX_GAIN_LIMIT_0 774 0x0003 //TX_GAIN_LIMIT_1 775 0x0003 //TX_GAIN_LIMIT_2 776 0x0003 //TX_GAIN_LIMIT_3 @@ -27356,7 +27356,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0500 //TX_MASK_G_R -397 0x0190 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -27724,15 +27724,15 @@ 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT -765 0x0064 //TX_MIC_CALIBRATION_0 +765 0x0070 //TX_MIC_CALIBRATION_0 766 0x0070 //TX_MIC_CALIBRATION_1 767 0x0070 //TX_MIC_CALIBRATION_2 768 0x0070 //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x004B //TX_MIC_PWR_BIAS_1 -771 0x004B //TX_MIC_PWR_BIAS_2 -772 0x004B //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 +769 0x0051 //TX_MIC_PWR_BIAS_0 +770 0x0051 //TX_MIC_PWR_BIAS_1 +771 0x0051 //TX_MIC_PWR_BIAS_2 +772 0x0051 //TX_MIC_PWR_BIAS_3 +773 0x0003 //TX_GAIN_LIMIT_0 774 0x0003 //TX_GAIN_LIMIT_1 775 0x0003 //TX_GAIN_LIMIT_2 776 0x0003 //TX_GAIN_LIMIT_3 @@ -30051,7 +30051,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0190 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -30419,15 +30419,15 @@ 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT -765 0x0064 //TX_MIC_CALIBRATION_0 -766 0x006C //TX_MIC_CALIBRATION_1 -767 0x006C //TX_MIC_CALIBRATION_2 -768 0x006C //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x004D //TX_MIC_PWR_BIAS_1 -771 0x004D //TX_MIC_PWR_BIAS_2 -772 0x004D //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 +765 0x0070 //TX_MIC_CALIBRATION_0 +766 0x0070 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0051 //TX_MIC_PWR_BIAS_0 +770 0x0051 //TX_MIC_PWR_BIAS_1 +771 0x0051 //TX_MIC_PWR_BIAS_2 +772 0x0051 //TX_MIC_PWR_BIAS_3 +773 0x0003 //TX_GAIN_LIMIT_0 774 0x0003 //TX_GAIN_LIMIT_1 775 0x0003 //TX_GAIN_LIMIT_2 776 0x0003 //TX_GAIN_LIMIT_3 @@ -32746,7 +32746,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0190 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -33114,15 +33114,15 @@ 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT -765 0x0064 //TX_MIC_CALIBRATION_0 -766 0x006C //TX_MIC_CALIBRATION_1 -767 0x006C //TX_MIC_CALIBRATION_2 -768 0x006C //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x004D //TX_MIC_PWR_BIAS_1 -771 0x004D //TX_MIC_PWR_BIAS_2 -772 0x004D //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 +765 0x0070 //TX_MIC_CALIBRATION_0 +766 0x0070 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0051 //TX_MIC_PWR_BIAS_0 +770 0x0051 //TX_MIC_PWR_BIAS_1 +771 0x0051 //TX_MIC_PWR_BIAS_2 +772 0x0051 //TX_MIC_PWR_BIAS_3 +773 0x0003 //TX_GAIN_LIMIT_0 774 0x0003 //TX_GAIN_LIMIT_1 775 0x0003 //TX_GAIN_LIMIT_2 776 0x0003 //TX_GAIN_LIMIT_3 diff --git a/audio/comet/tuning/fortemedia/HANDSFREE.dat b/audio/comet/tuning/fortemedia/HANDSFREE.dat index 6803316fef7030ea04425845940502d57f19bbde..4fa790038fa384ba96330871d6a803e44a555ec8 100644 GIT binary patch delta 862 zcmdn=gL%^r<_T_$EF0Y?FfkTyzQM%Aq{g72$;iN<1;pBn|Lb)a860#Of0pY3X?-9z zU_20D2&6Z$W-&4`Hf+ve>*HWzD4zU>ubWli3NwSi<{tiSQWNbs7+E&^hk#9e5T?z@ z`s*_T!|%xg5wjSTCa-U@U<}y&Ku?U(kc%N7Xh{JO7cvS67cn+76*J1EmN2fDECq^{ z0dYCdAr(Nn5{Ro9`6lbPxP$C1FsNo{beQ}h(V8(}vO&*xS%aO-42-*&&+_bM)?nDf z{48THGef~XW(L;%Ks?zYxqkC*%Wf%7YX&BUl6+={!Q{Hl4#`~7V3)-VK9{|hnryrR V;<}JQ={oaE(t|Cz0VDL86aX5U7%Bh& delta 882 zcmdn=gL%^r<_T_$EgRh@Ffj&fzQM%Ar1mdflaYZz3y8HD|JUm=d7Ff%Z1?&04i#kre-iJ>N+nW1H~ ze+bZMhs_Vdv>91{e`a9#HCZ5H7Ng4K^-UIx37a42i7^`TGvotpDgfd_#wmhDj9(aw z89#)UFls250>#RJxE$!33Lss{xQ4fiF<`QOi#y2j0)uMy$Z4TMjM4>{An}`5tDKujf^4UMky$vA7U0cIi;r4^eCce zLWBoiun-d$ErO=*;;Pj+n>JJa5H1wLjKpP0Ez~Kd?#yVkbJN1b$GP`@=bdxzIp4dn zWpixV9O_3TH}wH@V+8fJ`3~Ml4^RY6*A}w*?F^%Vh09T4llQ>E!+SOW{bOt{6LR>h zIcUr$mi=0&(x#0E@+9n!ZS*frbqEnHbQZ#lWM%P+=m7 zw$Nx2pE$fjFtNQp!# z{JvENr0x)Gb~~jlm#Bb9^I>U4Z6A6dk@=|~`;AC^tokkn!NTS!b&8oxc&M6=5hVT& zO439yiir%uHjSl_9{WMaPj+eshoF#6l|VH#3;Qf)19SROIcUl1ggfYi{EOG%dG2*t zMVCaktf)uY8xp;+mz^jBS0aCC4*Lx3NEyvy`S+n1npxdZSkJ4NpadrAwDO8N$ZNWK z`3)uBFeT|z63oAd0kOp4eX>E3oLye39{t?5H8%GcD7+?6yFGQciOFWSiOL7CqVV{T zypiV-IDo}%(4JhHQ;KLYh}9Rct&fxp+U=5KBMvMS;W#W8C;BOOShBT{D*AQ?b@l&B zL`aDYtL$u-`~$Cypk?sfDnPy#QZ(v3-2`TSMq3jKTv3F3f~KCTZMqp# S3~TyA+w>+^Js*BMp!@;l@6UAr delta 1319 zcmd5+-%FEG7(Va&q4UGfKKp^%8n`rMPV+~E*piZhlr3ru!l-aUQs6~SEj1l$h*3Eh zgD*T_U08V0g~aMy94%0<7p0IF6QLBN%O(}1Q)cJer{O;kc=2-H^Bm559^U6UZ*oaZ zE~(KlVzfq!pc7iP#JrEWq(TXiXu)_M8_3Ku(btdQB%8`v1FRdPbJ>v3X4Oy@a~$x2 z7CT&EB%UKiLQ}&~zW{;EPX%n;t`vC{%($yz)647nu?;W+{FNWWS=bz)wGT0r zf%6hU8hru-+P>TyJUj#i$ik7ae0rt?Eb@DT#NRHFK^}^sc(a~cK4KYUZ2Tf5NiTlF z5jaMt?NAFX+&YVSP_2@7LBl7a1D@{hgx}Bwt5@!Vt@xh6x<&K|s=Z>p592v~;HGEG zp+P4Wox^?;Ro_A-bvzbj194o2dd+$&FO$HuM1cAiFhIXBxSDQIzL}nL?@5kYY*|p; zCEB7wonxRdN1$#;cc%Y3DU0Z*o~niiJSP7A4eYq& zT`~8pfp8EZbkv4Ld@2P?rDDg$4(;2COXi8|sG0wdUF#SSMCPnqv!c*TE0X?`yot}sU+5pW AegFUf diff --git a/audio/comet/tuning/fortemedia/HEADSET.mods b/audio/comet/tuning/fortemedia/HEADSET.mods index 39ea114..3b9ad51 100644 --- a/audio/comet/tuning/fortemedia/HEADSET.mods +++ b/audio/comet/tuning/fortemedia/HEADSET.mods @@ -3,7 +3,7 @@ #EXPORT_FLAG HEADSET #PARAM_MODE FULL #SAVE_MODE 3 -#SAVE_TIME 2024-02-02 12:09:29 +#SAVE_TIME 2024-03-05 17:38:47 #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-WB #PARAM_TYPE TX+2RX @@ -159,7 +159,7 @@ 147 0x0080 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x36B0 //TX_EAD_THR +150 0x7D00 //TX_EAD_THR 151 0x0800 //TX_THR_RE_EST 152 0x0800 //TX_MIN_EQ_RE_EST_0 153 0x0800 //TX_MIN_EQ_RE_EST_1 @@ -178,7 +178,7 @@ 166 0x2000 //TX_LAMBDA_CB_NLE 167 0x6000 //TX_C_POST_FLT 168 0x7000 //TX_GAIN_NP -169 0x0064 //TX_SE_HOLD_N +169 0x02C0 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 @@ -406,7 +406,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -862,7 +862,7 @@ 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 -853 0x0001 //TX_FILTINDX +853 0x0002 //TX_FILTINDX 854 0x0000 //TX_TDDRC_THRD_0 855 0x0000 //TX_TDDRC_THRD_1 856 0x2000 //TX_TDDRC_THRD_2 @@ -998,7 +998,7 @@ 986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX -0 0xA43C //RX_RECVFUNC_MODE_0 +0 0xA47C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -1556,14 +1556,14 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +27 0x1000 //RX_TDDRC_ALPHA_DWN_1 +28 0x32B0 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 +112 0x0008 //RX_TDDRC_THRD_0 +113 0x0800 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 @@ -1655,14 +1655,14 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +27 0x1000 //RX_TDDRC_ALPHA_DWN_1 +28 0x32B0 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 +112 0x0008 //RX_TDDRC_THRD_0 +113 0x0800 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 @@ -1754,14 +1754,14 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +27 0x1000 //RX_TDDRC_ALPHA_DWN_1 +28 0x32B0 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 +112 0x0008 //RX_TDDRC_THRD_0 +113 0x0800 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 @@ -3101,7 +3101,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -3715,7 +3715,7 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_MUTE_PERIOD @@ -5796,7 +5796,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -6410,7 +6410,7 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_MUTE_PERIOD @@ -7261,7 +7261,7 @@ 176 0x0020 //RX_PP_RESRV_1 177 0x0400 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST -179 0x000F //RX_NS_LVL_CTRL +179 0x0006 //RX_NS_LVL_CTRL 180 0x9000 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT 182 0x000A //RX_MUTE_PERIOD @@ -8491,7 +8491,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -11186,7 +11186,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -11800,7 +11800,7 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_MUTE_PERIOD @@ -13881,7 +13881,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -14495,7 +14495,7 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_MUTE_PERIOD @@ -15346,7 +15346,7 @@ 176 0x0020 //RX_PP_RESRV_1 177 0x0400 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST -179 0x000F //RX_NS_LVL_CTRL +179 0x0006 //RX_NS_LVL_CTRL 180 0x9000 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT 182 0x000A //RX_MUTE_PERIOD @@ -16183,7 +16183,7 @@ 1 0x0001 //TX_OPERATION_MODE_1 2 0x003B //TX_PATCH_REG 3 0x6F7C //TX_SENDFUNC_MODE_0 -4 0x0084 //TX_SENDFUNC_MODE_1 +4 0x0004 //TX_SENDFUNC_MODE_1 5 0x0003 //TX_NUM_MIC 6 0x0001 //TX_SAMPLINGFREQ_SIG 7 0x0001 //TX_SAMPLINGFREQ_PROC @@ -16347,7 +16347,7 @@ 165 0x4000 //TX_LAMBDA_RE_EST 166 0x4000 //TX_LAMBDA_CB_NLE 167 0x0000 //TX_C_POST_FLT -168 0x5000 //TX_GAIN_NP +168 0x7300 //TX_GAIN_NP 169 0x02A0 //TX_SE_HOLD_N 170 0x0060 //TX_DT_HOLD_N 171 0x00C0 //TX_DT2_HOLD_N @@ -16476,16 +16476,16 @@ 294 0x0010 //TX_MIN_GAIN_S_5 295 0x0020 //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 -297 0x5FFE //TX_NMOS_SUP +297 0x2000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x4000 //TX_SNRI_SUP_1 302 0x77F9 //TX_SNRI_SUP_2 -303 0x67FB //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x50C0 //TX_SNRI_SUP_5 -306 0x5FFC //TX_SNRI_SUP_6 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0028 //TX_G_LFNS @@ -16576,7 +16576,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x1FFF //TX_MASK_G_R -397 0x0190 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x0000 //TX_C_POST_FLT_MASK 399 0x4000 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -17124,7 +17124,7 @@ 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0100 //TX_MIC_VOLUME_MIC1MUTE 944 0xD8F0 //TX_TFMASKM4_2_DT_THR -945 0x7E5E //TX_MEAN_GAIN500HZ_DT_THR +945 0x7300 //TX_MEAN_GAIN500HZ_DT_THR 946 0x000A //TX_MUTE_REF_POW_TH 947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN 948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN @@ -17159,8 +17159,8 @@ 977 0x0032 //TX_EASSA_NONLECHO_TH 978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH 979 0x0600 //TX_EASSA_NNG -980 0x0200 //TX_EASSA_NONLHFG -981 0x0200 //TX_EASSA_DT2000HZ_REFG +980 0x1000 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG 982 0x0C00 //TX_EASSA_DT400HZ_MAING 983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA 984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 @@ -18876,9 +18876,9 @@ #TX 0 0x4001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 -2 0x00BB //TX_PATCH_REG +2 0x003B //TX_PATCH_REG 3 0x6F7C //TX_SENDFUNC_MODE_0 -4 0x0084 //TX_SENDFUNC_MODE_1 +4 0x0004 //TX_SENDFUNC_MODE_1 5 0x0003 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC @@ -19042,7 +19042,7 @@ 165 0x3000 //TX_LAMBDA_RE_EST 166 0x3000 //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT -168 0x4000 //TX_GAIN_NP +168 0x7300 //TX_GAIN_NP 169 0x0260 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x00C0 //TX_DT2_HOLD_N @@ -19117,8 +19117,8 @@ 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xF800 //TX_THR_SN_EST_0 -243 0xFB00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFB00 //TX_THR_SN_EST_2 245 0xFA00 //TX_THR_SN_EST_3 246 0xF800 //TX_THR_SN_EST_4 247 0xFA00 //TX_THR_SN_EST_5 @@ -19157,7 +19157,7 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x001A //TX_NS_LVL_CTRL_1 -283 0x0024 //TX_NS_LVL_CTRL_2 +283 0x0022 //TX_NS_LVL_CTRL_2 284 0x001A //TX_NS_LVL_CTRL_3 285 0x0014 //TX_NS_LVL_CTRL_4 286 0x0011 //TX_NS_LVL_CTRL_5 @@ -19171,7 +19171,7 @@ 294 0x0020 //TX_MIN_GAIN_S_5 295 0x0020 //TX_MIN_GAIN_S_6 296 0x0020 //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP +297 0x5000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 @@ -19241,19 +19241,19 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x000F //TX_NOISE_TH_0 +367 0x000A //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 -370 0x1194 //TX_NOISE_TH_1 -371 0x01F4 //TX_NOISE_TH_2 -372 0x55F0 //TX_NOISE_TH_3 -373 0x2328 //TX_NOISE_TH_4 +370 0x1310 //TX_NOISE_TH_1 +371 0x0283 //TX_NOISE_TH_2 +372 0x651E //TX_NOISE_TH_3 +373 0x19AF //TX_NOISE_TH_4 374 0x7FFF //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 -378 0x0DAC //TX_NOISE_TH_6 -379 0x0050 //TX_MINENOISE_TH +378 0x7FFF //TX_NOISE_TH_6 +379 0x000E //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH @@ -19271,7 +19271,7 @@ 394 0x4000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0190 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x0000 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -19750,7 +19750,7 @@ 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK +876 0x4000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 @@ -19765,7 +19765,7 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK +891 0x5000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL @@ -19827,14 +19827,14 @@ 950 0x0080 //TX_SDPCRN_GAIN 951 0x7333 //TX_EASSA_CUT_GAINTH 952 0x0002 //TX_DT_HARME_ENDF -953 0x4000 //TX_NSSAMASK_MORENS +953 0x3000 //TX_NSSAMASK_MORENS 954 0x0100 //TX_CGMMMASK_MORENS 955 0x0CCD //TX_DPCRN_MASK_MORENS_ECHO 956 0x0028 //TX_PRE_EASSAMASK_SUP -957 0x7FFF //TX_NSSAMASK_MORENS_TYPE1 -958 0x7FFF //TX_NSSAMASK_MORENS_TYPE2 -959 0x0100 //TX_CGMMMASK_MORENS_TYPE1 -960 0x0100 //TX_CGMMMASK_MORENS_TYPE2 +957 0x68E6 //TX_NSSAMASK_MORENS_TYPE1 +958 0x7000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0500 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0500 //TX_CGMMMASK_MORENS_TYPE2 961 0x0000 //TX_SSA30_RESRV_0 962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 963 0x0100 //TX_EASSA_AEC_NSSA_REFG_1 @@ -19885,7 +19885,7 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_MUTE_PERIOD @@ -21571,9 +21571,9 @@ #TX 0 0x4001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 -2 0x00BB //TX_PATCH_REG +2 0x003B //TX_PATCH_REG 3 0x6F7C //TX_SENDFUNC_MODE_0 -4 0x0084 //TX_SENDFUNC_MODE_1 +4 0x0004 //TX_SENDFUNC_MODE_1 5 0x0003 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC @@ -21737,7 +21737,7 @@ 165 0x3000 //TX_LAMBDA_RE_EST 166 0x3000 //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT -168 0x4000 //TX_GAIN_NP +168 0x7300 //TX_GAIN_NP 169 0x0260 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x00C0 //TX_DT2_HOLD_N @@ -21812,8 +21812,8 @@ 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xF800 //TX_THR_SN_EST_0 -243 0xFB00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFB00 //TX_THR_SN_EST_2 245 0xFA00 //TX_THR_SN_EST_3 246 0xF800 //TX_THR_SN_EST_4 247 0xFA00 //TX_THR_SN_EST_5 @@ -21852,7 +21852,7 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x001A //TX_NS_LVL_CTRL_1 -283 0x0024 //TX_NS_LVL_CTRL_2 +283 0x0022 //TX_NS_LVL_CTRL_2 284 0x001A //TX_NS_LVL_CTRL_3 285 0x0014 //TX_NS_LVL_CTRL_4 286 0x0011 //TX_NS_LVL_CTRL_5 @@ -21866,7 +21866,7 @@ 294 0x0020 //TX_MIN_GAIN_S_5 295 0x0020 //TX_MIN_GAIN_S_6 296 0x0020 //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP +297 0x5000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 @@ -21936,19 +21936,19 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x000F //TX_NOISE_TH_0 +367 0x000A //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 -370 0x1194 //TX_NOISE_TH_1 -371 0x01F4 //TX_NOISE_TH_2 -372 0x55F0 //TX_NOISE_TH_3 -373 0x2328 //TX_NOISE_TH_4 +370 0x1310 //TX_NOISE_TH_1 +371 0x0283 //TX_NOISE_TH_2 +372 0x651E //TX_NOISE_TH_3 +373 0x19AF //TX_NOISE_TH_4 374 0x7FFF //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 -378 0x0DAC //TX_NOISE_TH_6 -379 0x0050 //TX_MINENOISE_TH +378 0x7FFF //TX_NOISE_TH_6 +379 0x000E //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH @@ -21966,7 +21966,7 @@ 394 0x4000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0190 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x0000 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -22445,7 +22445,7 @@ 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK +876 0x4000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 @@ -22460,7 +22460,7 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK +891 0x5000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL @@ -22522,14 +22522,14 @@ 950 0x0080 //TX_SDPCRN_GAIN 951 0x7333 //TX_EASSA_CUT_GAINTH 952 0x0002 //TX_DT_HARME_ENDF -953 0x4000 //TX_NSSAMASK_MORENS +953 0x3000 //TX_NSSAMASK_MORENS 954 0x0100 //TX_CGMMMASK_MORENS 955 0x0CCD //TX_DPCRN_MASK_MORENS_ECHO 956 0x0028 //TX_PRE_EASSAMASK_SUP -957 0x7FFF //TX_NSSAMASK_MORENS_TYPE1 -958 0x7FFF //TX_NSSAMASK_MORENS_TYPE2 -959 0x0100 //TX_CGMMMASK_MORENS_TYPE1 -960 0x0100 //TX_CGMMMASK_MORENS_TYPE2 +957 0x68E6 //TX_NSSAMASK_MORENS_TYPE1 +958 0x7000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0500 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0500 //TX_CGMMMASK_MORENS_TYPE2 961 0x0000 //TX_SSA30_RESRV_0 962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 963 0x0100 //TX_EASSA_AEC_NSSA_REFG_1 @@ -22580,7 +22580,7 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_MUTE_PERIOD @@ -23431,7 +23431,7 @@ 176 0x0020 //RX_PP_RESRV_1 177 0x0400 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST -179 0x000F //RX_NS_LVL_CTRL +179 0x0006 //RX_NS_LVL_CTRL 180 0x9000 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT 182 0x000A //RX_MUTE_PERIOD @@ -24661,7 +24661,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -25253,7 +25253,7 @@ 986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX -0 0xA020 //RX_RECVFUNC_MODE_0 +0 0xA024 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -26104,7 +26104,7 @@ 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 -157 0xA020 //RX_RECVFUNC_MODE_0 +157 0xA024 //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0001 //RX_SAMPLINGFREQ_SIG 160 0x0001 //RX_SAMPLINGFREQ_PROC @@ -27356,7 +27356,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -30051,7 +30051,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -32746,7 +32746,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0000 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ @@ -35441,7 +35441,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0000 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ @@ -38136,7 +38136,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0000 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ @@ -40438,7 +40438,7 @@ 1 0x0001 //TX_OPERATION_MODE_1 2 0x003B //TX_PATCH_REG 3 0x6F7C //TX_SENDFUNC_MODE_0 -4 0x0084 //TX_SENDFUNC_MODE_1 +4 0x0004 //TX_SENDFUNC_MODE_1 5 0x0003 //TX_NUM_MIC 6 0x0001 //TX_SAMPLINGFREQ_SIG 7 0x0001 //TX_SAMPLINGFREQ_PROC @@ -40602,7 +40602,7 @@ 165 0x4000 //TX_LAMBDA_RE_EST 166 0x4000 //TX_LAMBDA_CB_NLE 167 0x0000 //TX_C_POST_FLT -168 0x5000 //TX_GAIN_NP +168 0x7300 //TX_GAIN_NP 169 0x02A0 //TX_SE_HOLD_N 170 0x0060 //TX_DT_HOLD_N 171 0x00C0 //TX_DT2_HOLD_N @@ -40731,16 +40731,16 @@ 294 0x0010 //TX_MIN_GAIN_S_5 295 0x0020 //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 -297 0x5FFE //TX_NMOS_SUP +297 0x2000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x4000 //TX_SNRI_SUP_1 302 0x77F9 //TX_SNRI_SUP_2 -303 0x67FB //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x50C0 //TX_SNRI_SUP_5 -306 0x5FFC //TX_SNRI_SUP_6 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0028 //TX_G_LFNS @@ -40831,7 +40831,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x1FFF //TX_MASK_G_R -397 0x0190 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x0000 //TX_C_POST_FLT_MASK 399 0x4000 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -41379,7 +41379,7 @@ 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0100 //TX_MIC_VOLUME_MIC1MUTE 944 0xD8F0 //TX_TFMASKM4_2_DT_THR -945 0x7E5E //TX_MEAN_GAIN500HZ_DT_THR +945 0x7300 //TX_MEAN_GAIN500HZ_DT_THR 946 0x000A //TX_MUTE_REF_POW_TH 947 0x0014 //TX_MIC0_MUTE_INITECHO_CUT_LEN 948 0x0014 //TX_MIC1_MUTE_INITECHO_CUT_LEN @@ -41414,8 +41414,8 @@ 977 0x0032 //TX_EASSA_NONLECHO_TH 978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH 979 0x0600 //TX_EASSA_NNG -980 0x0200 //TX_EASSA_NONLHFG -981 0x0200 //TX_EASSA_DT2000HZ_REFG +980 0x1000 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG 982 0x0C00 //TX_EASSA_DT400HZ_MAING 983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA 984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 @@ -43131,9 +43131,9 @@ #TX 0 0x4001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 -2 0x00BB //TX_PATCH_REG +2 0x003B //TX_PATCH_REG 3 0x6F7C //TX_SENDFUNC_MODE_0 -4 0x0084 //TX_SENDFUNC_MODE_1 +4 0x0004 //TX_SENDFUNC_MODE_1 5 0x0003 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC @@ -43297,7 +43297,7 @@ 165 0x3000 //TX_LAMBDA_RE_EST 166 0x3000 //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT -168 0x4000 //TX_GAIN_NP +168 0x7300 //TX_GAIN_NP 169 0x0260 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x00C0 //TX_DT2_HOLD_N @@ -43372,8 +43372,8 @@ 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xF800 //TX_THR_SN_EST_0 -243 0xFB00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFB00 //TX_THR_SN_EST_2 245 0xFA00 //TX_THR_SN_EST_3 246 0xF800 //TX_THR_SN_EST_4 247 0xFA00 //TX_THR_SN_EST_5 @@ -43412,7 +43412,7 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x001A //TX_NS_LVL_CTRL_1 -283 0x0024 //TX_NS_LVL_CTRL_2 +283 0x0022 //TX_NS_LVL_CTRL_2 284 0x001A //TX_NS_LVL_CTRL_3 285 0x0014 //TX_NS_LVL_CTRL_4 286 0x0011 //TX_NS_LVL_CTRL_5 @@ -43426,7 +43426,7 @@ 294 0x0020 //TX_MIN_GAIN_S_5 295 0x0020 //TX_MIN_GAIN_S_6 296 0x0020 //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP +297 0x5000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 @@ -43496,19 +43496,19 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x000F //TX_NOISE_TH_0 +367 0x000A //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 -370 0x1194 //TX_NOISE_TH_1 -371 0x01F4 //TX_NOISE_TH_2 -372 0x55F0 //TX_NOISE_TH_3 -373 0x2328 //TX_NOISE_TH_4 +370 0x1310 //TX_NOISE_TH_1 +371 0x0283 //TX_NOISE_TH_2 +372 0x651E //TX_NOISE_TH_3 +373 0x19AF //TX_NOISE_TH_4 374 0x7FFF //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 -378 0x0DAC //TX_NOISE_TH_6 -379 0x0050 //TX_MINENOISE_TH +378 0x7FFF //TX_NOISE_TH_6 +379 0x000E //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH @@ -43526,7 +43526,7 @@ 394 0x4000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0190 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x0000 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -44005,7 +44005,7 @@ 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK +876 0x4000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 @@ -44020,7 +44020,7 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK +891 0x5000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL @@ -44082,14 +44082,14 @@ 950 0x0080 //TX_SDPCRN_GAIN 951 0x7333 //TX_EASSA_CUT_GAINTH 952 0x0002 //TX_DT_HARME_ENDF -953 0x4000 //TX_NSSAMASK_MORENS +953 0x3000 //TX_NSSAMASK_MORENS 954 0x0100 //TX_CGMMMASK_MORENS 955 0x0CCD //TX_DPCRN_MASK_MORENS_ECHO 956 0x0028 //TX_PRE_EASSAMASK_SUP -957 0x7FFF //TX_NSSAMASK_MORENS_TYPE1 -958 0x7FFF //TX_NSSAMASK_MORENS_TYPE2 -959 0x0100 //TX_CGMMMASK_MORENS_TYPE1 -960 0x0100 //TX_CGMMMASK_MORENS_TYPE2 +957 0x68E6 //TX_NSSAMASK_MORENS_TYPE1 +958 0x7000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0500 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0500 //TX_CGMMMASK_MORENS_TYPE2 961 0x0000 //TX_SSA30_RESRV_0 962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 963 0x0100 //TX_EASSA_AEC_NSSA_REFG_1 @@ -45826,9 +45826,9 @@ #TX 0 0x4001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 -2 0x00BB //TX_PATCH_REG +2 0x003B //TX_PATCH_REG 3 0x6F7C //TX_SENDFUNC_MODE_0 -4 0x0084 //TX_SENDFUNC_MODE_1 +4 0x0004 //TX_SENDFUNC_MODE_1 5 0x0003 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC @@ -45992,7 +45992,7 @@ 165 0x3000 //TX_LAMBDA_RE_EST 166 0x3000 //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT -168 0x4000 //TX_GAIN_NP +168 0x7300 //TX_GAIN_NP 169 0x0260 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x00C0 //TX_DT2_HOLD_N @@ -46067,8 +46067,8 @@ 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xF800 //TX_THR_SN_EST_0 -243 0xFB00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFB00 //TX_THR_SN_EST_2 245 0xFA00 //TX_THR_SN_EST_3 246 0xF800 //TX_THR_SN_EST_4 247 0xFA00 //TX_THR_SN_EST_5 @@ -46107,7 +46107,7 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x001A //TX_NS_LVL_CTRL_1 -283 0x0024 //TX_NS_LVL_CTRL_2 +283 0x0022 //TX_NS_LVL_CTRL_2 284 0x001A //TX_NS_LVL_CTRL_3 285 0x0014 //TX_NS_LVL_CTRL_4 286 0x0011 //TX_NS_LVL_CTRL_5 @@ -46121,7 +46121,7 @@ 294 0x0020 //TX_MIN_GAIN_S_5 295 0x0020 //TX_MIN_GAIN_S_6 296 0x0020 //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP +297 0x5000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 @@ -46191,19 +46191,19 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x000F //TX_NOISE_TH_0 +367 0x000A //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 -370 0x1194 //TX_NOISE_TH_1 -371 0x01F4 //TX_NOISE_TH_2 -372 0x55F0 //TX_NOISE_TH_3 -373 0x2328 //TX_NOISE_TH_4 +370 0x1310 //TX_NOISE_TH_1 +371 0x0283 //TX_NOISE_TH_2 +372 0x651E //TX_NOISE_TH_3 +373 0x19AF //TX_NOISE_TH_4 374 0x7FFF //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 -378 0x0DAC //TX_NOISE_TH_6 -379 0x0050 //TX_MINENOISE_TH +378 0x7FFF //TX_NOISE_TH_6 +379 0x000E //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH @@ -46221,7 +46221,7 @@ 394 0x4000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0190 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x0000 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -46700,7 +46700,7 @@ 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK +876 0x4000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 @@ -46715,7 +46715,7 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK +891 0x5000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL @@ -46777,14 +46777,14 @@ 950 0x0080 //TX_SDPCRN_GAIN 951 0x7333 //TX_EASSA_CUT_GAINTH 952 0x0002 //TX_DT_HARME_ENDF -953 0x4000 //TX_NSSAMASK_MORENS +953 0x3000 //TX_NSSAMASK_MORENS 954 0x0100 //TX_CGMMMASK_MORENS 955 0x0CCD //TX_DPCRN_MASK_MORENS_ECHO 956 0x0028 //TX_PRE_EASSAMASK_SUP -957 0x7FFF //TX_NSSAMASK_MORENS_TYPE1 -958 0x7FFF //TX_NSSAMASK_MORENS_TYPE2 -959 0x0100 //TX_CGMMMASK_MORENS_TYPE1 -960 0x0100 //TX_CGMMMASK_MORENS_TYPE2 +957 0x68E6 //TX_NSSAMASK_MORENS_TYPE1 +958 0x7000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0500 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0500 //TX_CGMMMASK_MORENS_TYPE2 961 0x0000 //TX_SSA30_RESRV_0 962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 963 0x0100 //TX_EASSA_AEC_NSSA_REFG_1 @@ -48916,7 +48916,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0000 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ @@ -51611,7 +51611,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0000 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ @@ -54306,7 +54306,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0000 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ @@ -57001,7 +57001,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -59696,7 +59696,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -60310,7 +60310,7 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_MUTE_PERIOD @@ -62391,7 +62391,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_LOGSNR_THR +397 0x8001 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -63005,7 +63005,7 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_MUTE_PERIOD @@ -63856,7 +63856,7 @@ 176 0x0020 //RX_PP_RESRV_1 177 0x0400 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST -179 0x000F //RX_NS_LVL_CTRL +179 0x0006 //RX_NS_LVL_CTRL 180 0x9000 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT 182 0x000A //RX_MUTE_PERIOD