Snap for 11728787 from 8d7f260156
to 24Q3-release
Change-Id: I9ea90824d6d53865118d40adb9ed100a5ad49cbd
This commit is contained in:
commit
ac3b064076
4 changed files with 19 additions and 19 deletions
|
@ -47,7 +47,7 @@ GlueLayer_isReqDBHFromFwRefLoc=1
|
||||||
GlueLayer_isReqUBPFromPressureSensor=1
|
GlueLayer_isReqUBPFromPressureSensor=1
|
||||||
GlueLayer_IsMemsEnable=1
|
GlueLayer_IsMemsEnable=1
|
||||||
GlueLayer_MeasCorrCap=7
|
GlueLayer_MeasCorrCap=7
|
||||||
Chip_Configuration_mems_data_Configuration=0x17
|
Chip_Configuration_mems_data_Configuration=0x7
|
||||||
Chip_Configuration_FeatureCfg_ANDRD_MEAS_CORR_ENABLE=1
|
Chip_Configuration_FeatureCfg_ANDRD_MEAS_CORR_ENABLE=1
|
||||||
CP_LocTech_PrimaryConst=0
|
CP_LocTech_PrimaryConst=0
|
||||||
CP_LocTech_Constraints=0x81
|
CP_LocTech_Constraints=0x81
|
||||||
|
|
|
@ -171,7 +171,7 @@ GlueLayer_isReqDBHFromFwRefLoc=1
|
||||||
GlueLayer_isReqUBPFromPressureSensor=1
|
GlueLayer_isReqUBPFromPressureSensor=1
|
||||||
GlueLayer_IsMemsEnable=1
|
GlueLayer_IsMemsEnable=1
|
||||||
GlueLayer_MeasCorrCap=7
|
GlueLayer_MeasCorrCap=7
|
||||||
Chip_Configuration_mems_data_Configuration=0x17
|
Chip_Configuration_mems_data_Configuration=0x7
|
||||||
Chip_Configuration_FeatureCfg_ANDRD_MEAS_CORR_ENABLE=1
|
Chip_Configuration_FeatureCfg_ANDRD_MEAS_CORR_ENABLE=1
|
||||||
CP_LocTech_PrimaryConst=0
|
CP_LocTech_PrimaryConst=0
|
||||||
CP_LocTech_Constraints=0x81
|
CP_LocTech_Constraints=0x81
|
||||||
|
|
|
@ -344,7 +344,7 @@
|
||||||
"MaxReleaseStep": 1,
|
"MaxReleaseStep": 1,
|
||||||
"MaxThrottleStep": 1,
|
"MaxThrottleStep": 1,
|
||||||
"BindedPowerRail": "S4M_VDD_CPUCL0",
|
"BindedPowerRail": "S4M_VDD_CPUCL0",
|
||||||
"CdevCeiling": [0, 4, 4, 4, 4, 4, 4]
|
"CdevCeiling": [0, 2, 2, 2, 2, 2, 2]
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"CdevRequest": "thermal-cpufreq-1",
|
"CdevRequest": "thermal-cpufreq-1",
|
||||||
|
@ -352,7 +352,7 @@
|
||||||
"MaxReleaseStep": 1,
|
"MaxReleaseStep": 1,
|
||||||
"MaxThrottleStep": 2,
|
"MaxThrottleStep": 2,
|
||||||
"BindedPowerRail": "S2M_VDD_CPUCL1",
|
"BindedPowerRail": "S2M_VDD_CPUCL1",
|
||||||
"CdevCeiling": [0, 8, 8, 8, 8, 8, 8]
|
"CdevCeiling": [0, 6, 6, 6, 6, 6, 6]
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"CdevRequest": "thermal-cpufreq-2",
|
"CdevRequest": "thermal-cpufreq-2",
|
||||||
|
@ -360,7 +360,7 @@
|
||||||
"MaxReleaseStep": 1,
|
"MaxReleaseStep": 1,
|
||||||
"MaxThrottleStep": 2,
|
"MaxThrottleStep": 2,
|
||||||
"BindedPowerRail": "S3M_VDD_CPUCL2",
|
"BindedPowerRail": "S3M_VDD_CPUCL2",
|
||||||
"CdevCeiling": [0, 12, 12, 12, 12, 12, 12]
|
"CdevCeiling": [0, 15, 15, 15, 15, 15, 15]
|
||||||
}
|
}
|
||||||
],
|
],
|
||||||
"Profile": [
|
"Profile": [
|
||||||
|
@ -420,21 +420,21 @@
|
||||||
"CdevWeightForPID": [0.292, 0.292, 0.292, 0.292, 0.292, 0.292, 0.292],
|
"CdevWeightForPID": [0.292, 0.292, 0.292, 0.292, 0.292, 0.292, 0.292],
|
||||||
"MaxReleaseStep": 1,
|
"MaxReleaseStep": 1,
|
||||||
"MaxThrottleStep": 1,
|
"MaxThrottleStep": 1,
|
||||||
"CdevCeiling": [0, 8, 8, 8, 8, 8, 8]
|
"CdevCeiling": [0, 7, 7, 7, 7, 7, 7]
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"CdevRequest": "thermal-cpufreq-1",
|
"CdevRequest": "thermal-cpufreq-1",
|
||||||
"CdevWeightForPID": [0.804, 0.804, 0.804, 0.804, 0.804, 0.804, 0.804],
|
"CdevWeightForPID": [0.804, 0.804, 0.804, 0.804, 0.804, 0.804, 0.804],
|
||||||
"MaxReleaseStep": 1,
|
"MaxReleaseStep": 1,
|
||||||
"MaxThrottleStep": 2,
|
"MaxThrottleStep": 2,
|
||||||
"CdevCeiling": [0, 11, 11, 11, 11, 11, 11]
|
"CdevCeiling": [0, 10, 10, 10, 10, 10, 10]
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"CdevRequest": "thermal-cpufreq-2",
|
"CdevRequest": "thermal-cpufreq-2",
|
||||||
"CdevWeightForPID": [0.342, 0.342, 0.342, 0.342, 0.342, 0.342, 0.342],
|
"CdevWeightForPID": [0.342, 0.342, 0.342, 0.342, 0.342, 0.342, 0.342],
|
||||||
"MaxReleaseStep": 1,
|
"MaxReleaseStep": 1,
|
||||||
"MaxThrottleStep": 2,
|
"MaxThrottleStep": 2,
|
||||||
"CdevCeiling": [0, 16, 16, 16, 16, 16, 16]
|
"CdevCeiling": [0, 17, 17, 17, 17, 17, 17]
|
||||||
}
|
}
|
||||||
],
|
],
|
||||||
"Profile": [
|
"Profile": [
|
||||||
|
@ -518,7 +518,7 @@
|
||||||
"CdevWeightForPID": [0.428, 0.428, 0.428, 0.428, 0.428, 0.428, 0.428],
|
"CdevWeightForPID": [0.428, 0.428, 0.428, 0.428, 0.428, 0.428, 0.428],
|
||||||
"MaxReleaseStep": 1,
|
"MaxReleaseStep": 1,
|
||||||
"MaxThrottleStep": 2,
|
"MaxThrottleStep": 2,
|
||||||
"CdevCeiling": [0, 14, 14, 14, 14, 14, 14]
|
"CdevCeiling": [0, 13, 13, 13, 13, 13, 13]
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"CdevRequest": "thermal-cpufreq-2",
|
"CdevRequest": "thermal-cpufreq-2",
|
||||||
|
@ -559,7 +559,7 @@
|
||||||
],
|
],
|
||||||
"MaxReleaseStep": 1,
|
"MaxReleaseStep": 1,
|
||||||
"MaxThrottleStep": 1,
|
"MaxThrottleStep": 1,
|
||||||
"CdevCeiling": [0, 4, 4, 4, 4, 4, 4]
|
"CdevCeiling": [0, 2, 2, 2, 2, 2, 2]
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"CdevRequest": "thermal-cpufreq-1",
|
"CdevRequest": "thermal-cpufreq-1",
|
||||||
|
@ -568,7 +568,7 @@
|
||||||
],
|
],
|
||||||
"MaxReleaseStep": 1,
|
"MaxReleaseStep": 1,
|
||||||
"MaxThrottleStep": 2,
|
"MaxThrottleStep": 2,
|
||||||
"CdevCeiling": [0, 8, 8, 8, 8, 8, 8]
|
"CdevCeiling": [0, 6, 6, 6, 6, 6, 6]
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"CdevRequest": "thermal-cpufreq-2",
|
"CdevRequest": "thermal-cpufreq-2",
|
||||||
|
@ -577,7 +577,7 @@
|
||||||
],
|
],
|
||||||
"MaxReleaseStep": 1,
|
"MaxReleaseStep": 1,
|
||||||
"MaxThrottleStep": 2,
|
"MaxThrottleStep": 2,
|
||||||
"CdevCeiling": [0, 12, 12, 12, 12, 12, 12]
|
"CdevCeiling": [0, 15, 15, 15, 15, 15, 15]
|
||||||
}
|
}
|
||||||
]
|
]
|
||||||
}
|
}
|
||||||
|
@ -624,7 +624,7 @@
|
||||||
"MaxReleaseStep": 1,
|
"MaxReleaseStep": 1,
|
||||||
"MaxThrottleStep": 2,
|
"MaxThrottleStep": 2,
|
||||||
"BindedPowerRail": "S2M_VDD_CPUCL1",
|
"BindedPowerRail": "S2M_VDD_CPUCL1",
|
||||||
"CdevCeiling": [0, 14, 14, 14, 14, 16, 16],
|
"CdevCeiling": [0, 13, 13, 13, 14, 16, 16],
|
||||||
"LimitInfo": [0, 0, 0, 0, 0, 16, 16]
|
"LimitInfo": [0, 0, 0, 0, 0, 16, 16]
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
|
|
|
@ -62,7 +62,7 @@ ant_grp0.tx_power_control=01
|
||||||
ant_grp0.ch5.pdoa.axisx.lut_id=00
|
ant_grp0.ch5.pdoa.axisx.lut_id=00
|
||||||
ant_grp0.ch9.pdoa.axisy.lut_id=01
|
ant_grp0.ch9.pdoa.axisy.lut_id=01
|
||||||
|
|
||||||
# Patch Antenna TX / Two Chain Operation
|
# Patch Antenna TX / One Chain Operation
|
||||||
ant_grp1.rf_config.rfoff=00
|
ant_grp1.rf_config.rfoff=00
|
||||||
ant_grp1.rf_config.tx=03
|
ant_grp1.rf_config.tx=03
|
||||||
ant_grp1.rf_config.tx_aoa=03
|
ant_grp1.rf_config.tx_aoa=03
|
||||||
|
@ -73,8 +73,8 @@ ant_grp1.rf_config.rx_sts2=0e
|
||||||
ant_grp1.rf_config.rx_sts3=0e
|
ant_grp1.rf_config.rx_sts3=0e
|
||||||
ant_grp1.ext_sw_config=01
|
ant_grp1.ext_sw_config=01
|
||||||
ant_grp1.lna_rxa=01
|
ant_grp1.lna_rxa=01
|
||||||
ant_grp1.lna_rxb=01
|
ant_grp1.lna_rxb=00
|
||||||
ant_grp1.rx_config=04
|
ant_grp1.rx_config=00
|
||||||
ant_grp1.pdoa_segments=02:07:00:00:00:00
|
ant_grp1.pdoa_segments=02:07:00:00:00:00
|
||||||
ant_grp1.pdoa_type=00:00:00
|
ant_grp1.pdoa_type=00:00:00
|
||||||
ant_grp1.tx_power_control=01
|
ant_grp1.tx_power_control=01
|
||||||
|
@ -96,7 +96,7 @@ ant_grp2.lna_rxb=01
|
||||||
ant_grp2.rx_config=01
|
ant_grp2.rx_config=01
|
||||||
ant_grp2.tx_power_control=01
|
ant_grp2.tx_power_control=01
|
||||||
|
|
||||||
# Patch Antenna TX / Two Chain Operation - DPD Corrected
|
# Patch Antenna TX / One Chain Operation - DPD Corrected
|
||||||
ant_grp3.rf_config.rfoff=00
|
ant_grp3.rf_config.rfoff=00
|
||||||
ant_grp3.rf_config.tx=03
|
ant_grp3.rf_config.tx=03
|
||||||
ant_grp3.rf_config.tx_aoa=03
|
ant_grp3.rf_config.tx_aoa=03
|
||||||
|
@ -107,8 +107,8 @@ ant_grp3.rf_config.rx_sts2=0e
|
||||||
ant_grp3.rf_config.rx_sts3=0e
|
ant_grp3.rf_config.rx_sts3=0e
|
||||||
ant_grp3.ext_sw_config=00
|
ant_grp3.ext_sw_config=00
|
||||||
ant_grp3.lna_rxa=01
|
ant_grp3.lna_rxa=01
|
||||||
ant_grp3.lna_rxb=01
|
ant_grp3.lna_rxb=00
|
||||||
ant_grp3.rx_config=04
|
ant_grp3.rx_config=00
|
||||||
ant_grp3.pdoa_segments=02:07:00:00:00:00
|
ant_grp3.pdoa_segments=02:07:00:00:00:00
|
||||||
ant_grp3.pdoa_type=00:00:00
|
ant_grp3.pdoa_type=00:00:00
|
||||||
ant_grp3.tx_power_control=01
|
ant_grp3.tx_power_control=01
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue