MIF frequency optimization for 60fps video recording use-case

This CL sets the MIF min clock frequency to 1539MHz, which based on
initial ODPM and MIPS measurements shows benefit both in terms of power
consumption and cycles-per-instructions (CPI), reducing the gap with R4
device.

Sync from L10 ag/19320914.

Bug: 250738213
Test: Build pass
Change-Id: If7be3253d5125734e3ce676488b5f2573b4a9f42
This commit is contained in:
pointerkung 2022-10-04 10:10:15 +08:00
parent 75cf47aa44
commit 4aabd30d24

View file

@ -5,6 +5,7 @@
"Path": "/sys/devices/platform/17000010.devfreq_mif/devfreq/17000010.devfreq_mif/min_freq",
"Values": [
"3172000",
"1539000",
"1014000",
"421000"
],
@ -978,7 +979,7 @@
"PowerHint": "CAMERA_STREAMING_HIGH",
"Node": "MemFreq",
"Duration": 0,
"Value": "1014000"
"Value": "1539000"
},
{
"PowerHint": "CAMERA_STREAMING_HIGH",